ARM: qcom: cpuidle support for 8064, 8074, 8084

Hi,

This patchset adds acks and reviewed-by tags to the SPM driver and updates the defconfig files to enable cpuidle support on the v18 rev of the patchset [1].

The dependencies for these changes are
- SCM and device tree changes for QCOM SoCs [2], [4].
- cpuidle framework changes [3]

Changes since v18:
+ Add commit tags to SPM driver
+ Update qcom_defconfig to enable cpuidle support
+ Update multi_v7_defconfig to enable cpuidle support

Thanks,
Lina

[1]. http://lists.infradead.org/pipermail/linux-arm-kernel/2015-March/333521.html
[2]. https://lkml.org/lkml/2015/3/27/599
[3]. https://lkml.org/lkml/2015/3/25/117
[4]. https://lkml.org/lkml/2015/1/19/483

Lina Iyer (3):
ARM: qcom: Add Subsystem Power Manager (SPM) driver
ARM: config: Update qcom_defconfig to enable cpuidle
ARM: config: multi_v7: Update to enable cpuidle for QCOM SoCs

 arch/arm/configs/multi_v7_defconfig |   2 +
 arch/arm/configs/qcom_defconfig     |   2 +
 drivers/soc/qcom/Kconfig            |   7 +
 drivers/soc/qcom/Makefile           |   1 +
 drivers/soc/qcom/spm.c              | 385 ++++++++++++++++++++++++++++++++++++
 5 files changed, 397 insertions(+)
 create mode 100644 drivers/soc/qcom/spm.c

2.1.0

SPM is a hardware block that controls the peripheral logic surrounding the application cores (cpu/l$). When the core executes WFI instruction, the SPM takes over the putting the core in low power state as configured. The wake up for the SPM is an interrupt at the GIC, which then completes the rest of low power mode sequence and brings the core out of low power mode.

The SPM has a set of control registers that configure the SPMs individually based on the type of the core and the runtime conditions. SPM is a finite state machine block to which a sequence is provided and it interprets the bytes and executes them in sequence. Each low power mode that the core can enter into is provided to the SPM as a sequence.

Configure the SPM to set the core (cpu or L2) into its low power mode, the index of the first command in the sequence is set in the SPM_CTL register. When the core executes ARM wfi instruction, it triggers the SPM state machine to start executing from that index. The SPM state machine waits until the interrupt occurs and starts executing the rest of the sequence until it hits the end of the sequence. The end of the sequence jumps the core out of its low power mode.

Add support for an idle driver to set up the SPM to place the core in Standby or Standalone power collapse mode when the core is idle.

Based on work by: Mahesh Sivasubramanian <[email protected]>, Ai Li <[email protected]>, Praveen Chidambaram <[email protected]> Original tree available at -
git://codeaurora.org/quic/la/kernel/msm-3.10.git

---
 drivers/soc/qcom/Kconfig  |   7 +
 drivers/soc/qcom/Makefile |   1 +
 drivers/soc/qcom/spm.c    | 385 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 393 insertions(+)
 create mode 100644 drivers/soc/qcom/spm.c

index 7bd2c94..628bcba 100644
@@ -9,3 +9,10 @@ config QCOM_GSBI
           functions for connecting the underlying serial UART, SPI, and I2C
           devices to the output pins.
 
+config QCOM_PM
+	bool "Qualcomm Power Management"
+	depends on ARCH_QCOM
+	help
+	  QCOM Platform specific power driver to manage cores and L2 low power
+	  modes. It interface with various system drivers to put the cores in
+	  low power modes.

index 4389012..931d385 100644
@@ -1 +1,2 @@
 obj-$(CONFIG_QCOM_GSBI)	+=	qcom_gsbi.o
+obj-$(CONFIG_QCOM_PM)	+=	spm.o

2.1.0

Update qcom_defconfig to allow cpuidle for QCOM cpus.

* Enable QCOM_PM
* Enable ARM_CPUIDLE

---
 arch/arm/configs/qcom_defconfig | 2 ++
 1 file changed, 2 insertions(+)

index 8c7da33..33a5339 100644
@@ -30,6 +30,7 @@ CONFIG_CLEANCACHE=y
 CONFIG_ARM_APPENDED_DTB=y
 CONFIG_ARM_ATAG_DTB_COMPAT=y
 CONFIG_CPU_IDLE=y
+CONFIG_ARM_CPUIDLE=y
 CONFIG_VFP=y
 CONFIG_NEON=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set

@@ -135,6 +136,7 @@ CONFIG_DMADEVICES=y
 CONFIG_QCOM_BAM_DMA=y
 CONFIG_STAGING=y
 CONFIG_QCOM_GSBI=y
+CONFIG_QCOM_PM=y
 CONFIG_COMMON_CLK_QCOM=y
 CONFIG_APQ_MMCC_8084=y
 CONFIG_IPQ_GCC_806X=y

2.1.0

Update defconfig to allow cpuidle for QCOM cpus.

* Enable QCOM_PM
* Enable ARM_CPUIDLE

---
 arch/arm/configs/multi_v7_defconfig | 2 ++
 1 file changed, 2 insertions(+)

index e8a4c95..18fcc66 100644
@@ -96,6 +96,7 @@ CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_STAT_DETAILS=y
 CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
 CONFIG_CPU_IDLE=y
+CONFIG_ARM_CPUIDLE=y
 CONFIG_NEON=y
 CONFIG_ARM_ZYNQ_CPUIDLE=y
 CONFIG_NET=y

@@ -454,6 +455,7 @@ CONFIG_SERIO_NVEC_PS2=y
 CONFIG_NVEC_POWER=y
 CONFIG_NVEC_PAZ00=y
 CONFIG_QCOM_GSBI=y
+CONFIG_QCOM_PM=y
 CONFIG_COMMON_CLK_QCOM=y
 CONFIG_COMMON_CLK_MAX77686=y
 CONFIG_APQ_MMCC_8084=y

2.1.0

Applied.

I?ve updated the Kconfig to only be built on ARM32 for now.

- k

Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Thank you so much.

Sounds good.

Thanks,
Lina