ARM: imx: move clock drivers into drivers/clk
Subsystems (6)
cover ARM: imx: move clock drivers into drivers/clk
This series cleans up i.MX clock drivers to remove all the inclusions of platform headers, and then move them into drivers/clk/imx/ folder.
Mike, Stephen,
I would like to take this series through IMX tree. So please give your ACKs if it looks fine to you. Thanks.
Shawn
Shawn Guo (11):
ARM: imx: use dynamic mapping for timer
ARM: imx: use dynamic mapping for CCM
ARM: imx: move revision definitions and declarations into a header
ARM: imx5: let pm code map CCM block on its own
ARM: imx6: set initial power mode in pm function
ARM: imx6: let pm code map CCM block on its own
ARM: imx6: do not use cpu_is_xxx() in clock driver
ARM: imx: add clk-pllv1 type support
ARM: imx: remove inclusions of platform headers
ARM: imx: move clock drivers into drivers/clk
MAINTAINERS: add new folders into IMX entry
MAINTAINERS | 2 ++
arch/arm/mach-imx/Makefile | 27 +++++++---------
arch/arm/mach-imx/common.h | 11 ++-----
arch/arm/mach-imx/cpuidle-imx6q.c | 4 +--
arch/arm/mach-imx/cpuidle-imx6sl.c | 4 +--
arch/arm/mach-imx/cpuidle-imx6sx.c | 4 +--
arch/arm/mach-imx/hardware.h | 1 +
arch/arm/mach-imx/mx27.h | 4 ---
arch/arm/mach-imx/mx3x.h | 7 ----
arch/arm/mach-imx/mxc.h | 16 ----------
arch/arm/mach-imx/pm-imx5.c | 9 +++---
arch/arm/mach-imx/pm-imx6.c | 30 ++++++++++--------
arch/arm/mach-imx/time.c | 5 +--
drivers/clk/Makefile | 1 +
drivers/clk/imx/Makefile | 25 +++++++++++++++
{arch/arm/mach-imx => drivers/clk/imx}/clk-busy.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-cpu.c | 0
.../mach-imx => drivers/clk/imx}/clk-fixup-div.c | 0
.../mach-imx => drivers/clk/imx}/clk-fixup-mux.c | 0
.../clk/imx}/clk-gate-exclusive.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-gate2.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-imx1.c | 16 ++++++----
{arch/arm/mach-imx => drivers/clk/imx}/clk-imx21.c | 13 +++++---
{arch/arm/mach-imx => drivers/clk/imx}/clk-imx25.c | 6 ++--
{arch/arm/mach-imx => drivers/clk/imx}/clk-imx27.c | 14 +++++---
{arch/arm/mach-imx => drivers/clk/imx}/clk-imx31.c | 34 ++++++++++++++------
{arch/arm/mach-imx => drivers/clk/imx}/clk-imx35.c | 31 ++++++++++++++----
.../mach-imx => drivers/clk/imx}/clk-imx51-imx53.c | 5 +--
{arch/arm/mach-imx => drivers/clk/imx}/clk-imx6q.c | 34 +++++++++++---------
.../arm/mach-imx => drivers/clk/imx}/clk-imx6sl.c | 7 ----
.../arm/mach-imx => drivers/clk/imx}/clk-imx6sx.c | 6 ----
{arch/arm/mach-imx => drivers/clk/imx}/clk-pfd.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-pllv1.c | 33 +++++++++++++------
{arch/arm/mach-imx => drivers/clk/imx}/clk-pllv2.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-pllv3.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-vf610.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk.h | 20 ++++++++++--
include/soc/imx/revision.h | 37 ++++++++++++++++++++++
39 files changed, 249 insertions(+), 157 deletions(-)
create mode 100644 drivers/clk/imx/Makefile
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-busy.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-cpu.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-fixup-div.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-fixup-mux.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-gate-exclusive.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-gate2.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx1.c (92%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx21.c (96%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx25.c (98%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx27.c (97%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx31.c (92%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx35.c (94%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx51-imx53.c (99%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx6q.c (98%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx6sl.c (99%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx6sx.c (99%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-pfd.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-pllv1.c (75%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-pllv2.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-pllv3.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-vf610.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk.h (89%)
create mode 100644 include/soc/imx/revision.hSignature · 1 line
1.9.1
PATCH 1/11 ARM: imx: use dynamic mapping for timer
Pass physical address of timer block to mxc_timer_init() call, which in turn does dynamic mapping within the function. Thus, we can avoid using static mapping in clock drivers.
Signed-off-by Shawn Guo <[email protected]>
--- arch/arm/mach-imx/clk-imx1.c | 2 +- arch/arm/mach-imx/clk-imx21.c | 2 +- arch/arm/mach-imx/clk-imx27.c | 2 +- arch/arm/mach-imx/clk-imx31.c | 2 +- arch/arm/mach-imx/clk-imx35.c | 2 +- arch/arm/mach-imx/common.h | 2 +- arch/arm/mach-imx/time.c | 5 +++-- 7 files changed, 9 insertions(+), 8 deletions(-)
arch/arm/mach-imx/clk-imx1.c +1 -1
@@ -98,7 +98,7 @@ int __init mx1_clocks_init(unsigned long fref)clk_register_clkdev (clk[IMX1_CLK_DUMMY ],"ipg" ,"imx1-fb.0" );clk_register_clkdev (clk[IMX1_CLK_DUMMY ],"ahb" ,"imx1-fb.0" ); -mxc_timer_init (MX1_IO_ADDRESS (MX1_TIM1_BASE_ADDR ),MX1_TIM1_INT ); +mxc_timer_init (MX1_TIM1_BASE_ADDR ,MX1_TIM1_INT );return 0 ; }
arch/arm/mach-imx/clk-imx21.c +1 -1
@@ -153,7 +153,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)clk_register_clkdev (clk[IMX21_CLK_I2C_GATE ],NULL ,"imx21-i2c.0" );clk_register_clkdev (clk[IMX21_CLK_OWIRE_GATE ],NULL ,"mxc_w1.0" ); -mxc_timer_init (MX21_IO_ADDRESS (MX21_GPT1_BASE_ADDR ),MX21_INT_GPT1 ); +mxc_timer_init (MX21_GPT1_BASE_ADDR ,MX21_INT_GPT1 );return 0 ; }
arch/arm/mach-imx/clk-imx27.c +1 -1
@@ -229,7 +229,7 @@ int __init mx27_clocks_init(unsigned long fref)clk_register_clkdev (clk[IMX27_CLK_EMMA_AHB_GATE ],"ahb" ,"m2m-emmaprp.0" );clk_register_clkdev (clk[IMX27_CLK_EMMA_IPG_GATE ],"ipg" ,"m2m-emmaprp.0" ); -mxc_timer_init (MX27_IO_ADDRESS (MX27_GPT1_BASE_ADDR ),MX27_INT_GPT1 ); +mxc_timer_init (MX27_GPT1_BASE_ADDR ,MX27_INT_GPT1 );return 0 ; }
arch/arm/mach-imx/clk-imx31.c +1 -1
@@ -182,7 +182,7 @@ int __init mx31_clocks_init(unsigned long fref)mx31_revision ();clk_disable_unprepare (clk[iim_gate]); -mxc_timer_init (MX31_IO_ADDRESS (MX31_GPT1_BASE_ADDR ),MX31_INT_GPT ); +mxc_timer_init (MX31_GPT1_BASE_ADDR ,MX31_INT_GPT );return 0 ; }
arch/arm/mach-imx/clk-imx35.c +1 -1
@@ -279,7 +279,7 @@ int __init mx35_clocks_init(void)#ifdef CONFIG_MXC_USE_EPIT epit_timer_init (MX35_IO_ADDRESS (MX35_EPIT1_BASE_ADDR ),MX35_INT_EPIT1 );#else -mxc_timer_init (MX35_IO_ADDRESS (MX35_GPT1_BASE_ADDR ),MX35_INT_GPT ); +mxc_timer_init (MX35_GPT1_BASE_ADDR ,MX35_INT_GPT );#endif return 0 ;
arch/arm/mach-imx/common.h +1 -1
@@ -44,7 +44,7 @@ void imx27_soc_init(void);void imx31_soc_init (void );void imx35_soc_init (void );void epit_timer_init (void __iomem *base,int irq); -void mxc_timer_init (void __iomem *,int ); +void mxc_timer_init (unsigned long ,int );int mx1_clocks_init (unsigned long fref);int mx21_clocks_init (unsigned long lref,unsigned long fref);int mx27_clocks_init (unsigned long fref);
arch/arm/mach-imx/time.c +3 -2
@@ -344,12 +344,13 @@ static void __init _mxc_timer_init(int irq,setup_irq (irq, &mxc_timer_irq); } -void __init mxc_timer_init (void __iomem *base,int irq) +void __init mxc_timer_init (unsigned long pbase,int irq) {struct clk *clk_per =clk_get_sys ("imx-gpt.0" ,"per" );struct clk *clk_ipg =clk_get_sys ("imx-gpt.0" ,"ipg" ); - timer_base = base; + timer_base =ioremap (pbase,SZ_4K ); +BUG_ON (!timer_base);_mxc_timer_init (irq, clk_per, clk_ipg); }
Signature · 1 line
1.9.1
PATCH 2/11 ARM: imx: use dynamic mapping for CCM
In reply to Shawn GuoReplace the static mapping of CCM block in clock drivers with dynamic mapping.
Signed-off-by Shawn Guo <[email protected]>
--- arch/arm/mach-imx/clk-imx1.c | 3 ++- arch/arm/mach-imx/clk-imx31.c | 5 ++++- arch/arm/mach-imx/clk-imx35.c | 5 ++++- 3 files changed, 10 insertions(+), 3 deletions(-)
arch/arm/mach-imx/clk-imx1.c +2 -1
@@ -75,7 +75,8 @@ static void __init _mx1_clocks_init(unsigned long fref)int __init mx1_clocks_init (unsigned long fref) { - ccm =MX1_IO_ADDRESS (MX1_CCM_BASE_ADDR ); + ccm =ioremap (MX1_CCM_BASE_ADDR ,SZ_4K ); +BUG_ON (!ccm);_mx1_clocks_init (fref);
arch/arm/mach-imx/clk-imx31.c +4 -1
@@ -50,9 +50,12 @@ static struct clk_onecell_data clk_data;int __init mx31_clocks_init (unsigned long fref) { -void __iomem *base =MX31_IO_ADDRESS (MX31_CCM_BASE_ADDR ); +void __iomem *base;struct device_node *np; + base =ioremap (MX31_CCM_BASE_ADDR ,SZ_4K ); +BUG_ON (!base); + clk[dummy] =imx_clk_fixed ("dummy" ,0 ); clk[ckih] =imx_clk_fixed ("ckih" , fref); clk[ckil] =imx_clk_fixed ("ckil" ,32768 );
arch/arm/mach-imx/clk-imx35.c +4 -1
@@ -71,11 +71,14 @@ static struct clk *clk[clk_max];int __init mx35_clocks_init (void ) { -void __iomem *base =MX35_IO_ADDRESS (MX35_CCM_BASE_ADDR ); +void __iomem *base;u32 pdr0, consumer_sel, hsp_sel;struct arm_ahb_div *aad;unsigned char *hsp_div; + base =ioremap (MX35_CCM_BASE_ADDR ,SZ_4K ); +BUG_ON (base); + pdr0 =__raw_readl (base +MXC_CCM_PDR0 ); consumer_sel = (pdr0 >>16 ) &0xf ; aad = &clk_consumer[consumer_sel];
Signature · 1 line
1.9.1
PATCH 2/11 ARM: imx: use dynamic mapping for CCM
Hi,
Quoted 48 lines · Shawn Guo
Replace the static mapping of CCM block in clock drivers with dynamic mapping.
Signed-off-by Shawn Guo <[email protected]>--- arch/arm/mach-imx/clk-imx1.c | 3 ++- arch/arm/mach-imx/clk-imx31.c | 5 ++++- arch/arm/mach-imx/clk-imx35.c | 5 ++++- 3 files changed, 10 insertions(+), 3 deletions(-)arch/arm/mach-imx/clk-imx1.c +2
-1@@ -75,7 +75,8 @@ static void __init _mx1_clocks_init(unsigned long fref)int __init mx1_clocks_init (unsigned long fref) { - ccm =MX1_IO_ADDRESS (MX1_CCM_BASE_ADDR ); + ccm =ioremap (MX1_CCM_BASE_ADDR ,SZ_4K ); +BUG_ON (!ccm);_mx1_clocks_init (fref);arch/arm/mach-imx/clk-imx31.c +4
-1@@ -50,9 +50,12 @@ static struct clk_onecell_data clk_data;int __init mx31_clocks_init (unsigned long fref) { -void __iomem *base =MX31_IO_ADDRESS (MX31_CCM_BASE_ADDR ); +void __iomem *base;struct device_node *np; + base =ioremap (MX31_CCM_BASE_ADDR ,SZ_4K ); +BUG_ON (!base); + clk[dummy] =imx_clk_fixed ("dummy" ,0 ); clk[ckih] =imx_clk_fixed ("ckih" , fref); clk[ckil] =imx_clk_fixed ("ckil" ,32768 );arch/arm/mach-imx/clk-imx35.c +0
-0@@ -71,11 +71,14 @@ static struct clk *clk[clk_max];
arch/arm/mach-imx/clk-imx35.c static struct clk *clk[clk_max]; · line 80
Quoted 10 lines
arch/arm/mach-imx/clk-imx35.c +3
-1int __init mx35_clocks_init (void ) { -void __iomem *base =MX35_IO_ADDRESS (MX35_CCM_BASE_ADDR ); +void __iomem *base;u32 pdr0, consumer_sel, hsp_sel;struct arm_ahb_div *aad;unsigned char *hsp_div; + base =ioremap (MX35_CCM_BASE_ADDR ,SZ_4K ); +BUG_ON (base);
BUG_ON(!base) ?
Quoted 7 lines
arch/arm/mach-imx/clk-imx35.c +1
-1+ pdr0 =__raw_readl (base +MXC_CCM_PDR0 ); consumer_sel = (pdr0 >>16 ) &0xf ; aad = &clk_consumer[consumer_sel]; --1.9.1
Best regards,
Nicolae Rosia
PATCH 2/11 ARM: imx: use dynamic mapping for CCM
Quoted 14 lines · Nicolae Rosia
Quoted 14 lines
arch/arm/mach-imx/clk-imx35.c +1
-1@@ -71,11 +71,14 @@ static struct clk *clk[clk_max];int __init mx35_clocks_init (void ) { -void __iomem *base =MX35_IO_ADDRESS (MX35_CCM_BASE_ADDR ); +void __iomem *base;u32 pdr0, consumer_sel, hsp_sel;struct arm_ahb_div *aad;unsigned char *hsp_div;
Quoted 3 lines
arch/arm/mach-imx/clk-imx35.c static struct clk *clk[clk_max]; · line 80
Quoted 2 lines
arch/arm/mach-imx/clk-imx35.c +2
-0+ base =ioremap (MX35_CCM_BASE_ADDR ,SZ_4K ); +BUG_ON (base);
BUG_ON(!base)?
Oops. Fixed. Thanks for spotting it, Nicolae.
Shawn
PATCH 3/11 ARM: imx: move revision definitions and declarations into a header
In reply to Shawn GuoThe revision definitions and declarations are widely used by clock drivers. As a step of moving clock drivers out of arch/arm/mach-imx, let's create header include/soc/imx/revision.h to accommodate them.
Signed-off-by Shawn Guo <[email protected]>
--- arch/arm/mach-imx/common.h | 4 ---- arch/arm/mach-imx/hardware.h | 1 + arch/arm/mach-imx/mx27.h | 4 ---- arch/arm/mach-imx/mx3x.h | 7 ------- arch/arm/mach-imx/mxc.h | 16 ---------------- include/soc/imx/revision.h | 37 +++++++++++++++++++++++++++++++++++++ 6 files changed, 38 insertions(+), 31 deletions(-) create mode 100644 include/soc/imx/revision.h
arch/arm/mach-imx/common.h +0 -4
@@ -56,13 +56,10 @@ struct platform_device *mxc_register_gpio(char *name, int id,void mxc_set_cpu_type (unsigned int type);void mxc_restart (enum reboot_mode ,const char *);void mxc_arch_reset_init (void __iomem *); -int mx51_revision (void ); -int mx53_revision (void );void imx_set_aips (void __iomem *);void imx_aips_allow_unprivileged_access (const char *compat);int mxc_device_init (void );void imx_set_soc_revision (unsigned int rev); -unsigned int imx_get_soc_revision (void );void imx_init_revision_from_anatop (void );struct device *imx_soc_device_init (void );void imx6_enable_rbc (bool enable);
@@ -87,7 +84,6 @@ enum mx3_cpu_pwr_mode { };void mx3_cpu_lp_set (enum mx3_cpu_pwr_mode mode); -void imx_print_silicon_rev (const char *cpu,int srev);void imx_enable_cpu (int cpu,bool enable);void imx_set_cpu_jump (int cpu,void *jump_addr);
arch/arm/mach-imx/hardware.h +1 -0
@@ -22,6 +22,7 @@#ifndef __ASSEMBLY__#include <asm/io.h> +#include <soc/imx/revision.h> #endif #include <asm/sizes.h>
arch/arm/mach-imx/mx27.h +0 -4
@@ -231,8 +231,4 @@#define MX27_DMA_REQ_SDHC3 36#define MX27_DMA_REQ_NFC 37 -#ifndef __ASSEMBLY__ -extern int mx27_revision (void ); -#endif -#endif /* ifndef __MACH_MX27_H__ */
arch/arm/mach-imx/mx3x.h +0 -7
@@ -185,11 +185,4 @@#define MX3x_PROD_SIGNATURE 0x1/* For MX31 */ -/* Mandatory defines used globally */ - -#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) -extern int mx35_revision (void ); -extern int mx31_revision (void ); -#endif -#endif /* ifndef __MACH_MX3x_H__ */
arch/arm/mach-imx/mxc.h +0 -16
@@ -39,22 +39,6 @@#define MXC_CPU_IMX6SX 0x62#define MXC_CPU_IMX6Q 0x63 -#define IMX_CHIP_REVISION_1_0 0x10 -#define IMX_CHIP_REVISION_1_1 0x11 -#define IMX_CHIP_REVISION_1_2 0x12 -#define IMX_CHIP_REVISION_1_3 0x13 -#define IMX_CHIP_REVISION_1_4 0x14 -#define IMX_CHIP_REVISION_1_5 0x15 -#define IMX_CHIP_REVISION_2_0 0x20 -#define IMX_CHIP_REVISION_2_1 0x21 -#define IMX_CHIP_REVISION_2_2 0x22 -#define IMX_CHIP_REVISION_2_3 0x23 -#define IMX_CHIP_REVISION_3_0 0x30 -#define IMX_CHIP_REVISION_3_1 0x31 -#define IMX_CHIP_REVISION_3_2 0x32 -#define IMX_CHIP_REVISION_3_3 0x33 -#define IMX_CHIP_REVISION_UNKNOWN 0xff -#define IMX_DDR_TYPE_LPDDR2 1#ifndef __ASSEMBLY__
include/soc/imx/revision.h new file +37 -0
@@ -0,0 +1,37 @@ +/* +* Copyright 2015 Linaro Ltd. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +*/ + +#ifndef __SOC_IMX_REVISION_H__ +#define __SOC_IMX_REVISION_H__ + +#define IMX_CHIP_REVISION_1_0 0x10 +#define IMX_CHIP_REVISION_1_1 0x11 +#define IMX_CHIP_REVISION_1_2 0x12 +#define IMX_CHIP_REVISION_1_3 0x13 +#define IMX_CHIP_REVISION_1_4 0x14 +#define IMX_CHIP_REVISION_1_5 0x15 +#define IMX_CHIP_REVISION_2_0 0x20 +#define IMX_CHIP_REVISION_2_1 0x21 +#define IMX_CHIP_REVISION_2_2 0x22 +#define IMX_CHIP_REVISION_2_3 0x23 +#define IMX_CHIP_REVISION_3_0 0x30 +#define IMX_CHIP_REVISION_3_1 0x31 +#define IMX_CHIP_REVISION_3_2 0x32 +#define IMX_CHIP_REVISION_3_3 0x33 +#define IMX_CHIP_REVISION_UNKNOWN 0xff + +int mx27_revision (void ); +int mx31_revision (void ); +int mx35_revision (void ); +int mx51_revision (void ); +int mx53_revision (void ); + +unsigned int imx_get_soc_revision (void ); +void imx_print_silicon_rev (const char *cpu,int srev); + +#endif /* __SOC_IMX_REVISION_H__ */
Signature · 1 line
1.9.1
PATCH 4/11 ARM: imx5: let pm code map CCM block on its own
In reply to Shawn GuoWe are about to move imx5 clock driver into drivers/clk, so let's get imx5 pm code map CCM block on its own rather than relying on clock driver to do the mapping.
Signed-off-by Shawn Guo <[email protected]>
--- arch/arm/mach-imx/clk-imx51-imx53.c | 2 -- arch/arm/mach-imx/common.h | 2 -- arch/arm/mach-imx/pm-imx5.c | 9 ++++----- 3 files changed, 4 insertions(+), 9 deletions(-)
arch/arm/mach-imx/clk-imx51-imx53.c +0 -2
@@ -133,8 +133,6 @@ static struct clk_onecell_data clk_data;static void __init mx5_clocks_common_init (void __iomem *ccm_base) { -imx5_pm_set_ccm_base (ccm_base); - clk[IMX5_CLK_DUMMY ] =imx_clk_fixed ("dummy" ,0 ); clk[IMX5_CLK_CKIL ] =imx_obtain_fixed_clock ("ckil" ,0 ); clk[IMX5_CLK_OSC ] =imx_obtain_fixed_clock ("osc" ,0 );
arch/arm/mach-imx/common.h +0 -2
@@ -132,11 +132,9 @@ void imx6q_pm_set_ccm_base(void __iomem *base);#ifdef CONFIG_PM void imx51_pm_init (void );void imx53_pm_init (void ); -void imx5_pm_set_ccm_base (void __iomem *base);#else static inline void imx51_pm_init (void ) {}static inline void imx53_pm_init (void ) {} -static inline void imx5_pm_set_ccm_base (void __iomem *base) {}#endif #ifdef CONFIG_NEON
arch/arm/mach-imx/pm-imx5.c +4 -5
@@ -50,16 +50,19 @@#define IMX5_DEFAULT_CPU_IDLE_STATE WAIT_UNCLOCKED_POWER_OFFstruct imx5_pm_data { +phys_addr_t ccm_addr;phys_addr_t cortex_addr;phys_addr_t gpc_addr; };static const struct imx5_pm_data imx51_pm_data__initconst = { + .ccm_addr =0x73fd4000 , .cortex_addr =0x83fa0000 , .gpc_addr =0x73fd8000 , };static const struct imx5_pm_data imx53_pm_data__initconst = { + .ccm_addr =0x53fd4000 , .cortex_addr =0x63fa0000 , .gpc_addr =0x53fd8000 , };
@@ -68,11 +71,6 @@ static void __iomem *ccm_base;static void __iomem *cortex_base;static void __iomem *gpc_base; -void __init imx5_pm_set_ccm_base (void __iomem *base) -{ - ccm_base = base; -} -/* * set cpu low power mode before WFI instruction. This function is called * mx5 because it can be used for mx51, and mx53.
@@ -208,6 +206,7 @@ static int __init imx5_pm_common_init(const struct imx5_pm_data *data) arm_pm_idle = imx5_pm_idle; + ccm_base =ioremap (data->ccm_addr,SZ_16K ); cortex_base =ioremap (data->cortex_addr,SZ_16K ); gpc_base =ioremap (data->gpc_addr,SZ_16K );WARN_ON (!ccm_base || !cortex_base || !gpc_base);
Signature · 1 line
1.9.1
PATCH 5/11 ARM: imx6: set initial power mode in pm function
In reply to Shawn GuoRather than setting initial low-power mode in every single i.MX6 clock initialization function, we should really do that in pm code. Let's move imx6q_set_lpm(WAIT_CLOCKED) call into imx6_pm_common_init().
While at it, let's rename the function to imx6_set_lpm() since it's actually common for all i.MX6 SoCs.
Signed-off-by Shawn Guo <[email protected]>
--- arch/arm/mach-imx/clk-imx6q.c | 3 --- arch/arm/mach-imx/clk-imx6sl.c | 3 --- arch/arm/mach-imx/clk-imx6sx.c | 3 --- arch/arm/mach-imx/common.h | 2 +- arch/arm/mach-imx/cpuidle-imx6q.c | 4 ++-- arch/arm/mach-imx/cpuidle-imx6sl.c | 4 ++-- arch/arm/mach-imx/cpuidle-imx6sx.c | 4 ++-- arch/arm/mach-imx/pm-imx6.c | 14 ++++++++------ 8 files changed, 15 insertions(+), 22 deletions(-)
arch/arm/mach-imx/clk-imx6q.c +0 -3
@@ -527,8 +527,5 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)/* All existing boards with PCIe use LVDS1 */ if (IS_ENABLED (CONFIG_PCI_IMX6 ))clk_set_parent (clk[IMX6QDL_CLK_LVDS1_SEL ], clk[IMX6QDL_CLK_SATA_REF_100M ]); - -/* Set initial power mode */ -imx6q_set_lpm (WAIT_CLOCKED ); }CLK_OF_DECLARE (imx6q,"fsl,imx6q-ccm" , imx6q_clocks_init);
arch/arm/mach-imx/clk-imx6sl.c +0 -3
@@ -443,8 +443,5 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)clk_set_parent (clks[IMX6SL_CLK_LCDIF_AXI_SEL ], clks[IMX6SL_CLK_PLL2_PFD2 ]); - -/* Set initial power mode */ -imx6q_set_lpm (WAIT_CLOCKED ); }CLK_OF_DECLARE (imx6sl,"fsl,imx6sl-ccm" , imx6sl_clocks_init);
arch/arm/mach-imx/clk-imx6sx.c +0 -3
@@ -560,8 +560,5 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)clk_set_parent (clks[IMX6SX_CLK_QSPI1_SEL ], clks[IMX6SX_CLK_PLL2_BUS ]);clk_set_parent (clks[IMX6SX_CLK_QSPI2_SEL ], clks[IMX6SX_CLK_PLL2_BUS ]); - -/* Set initial power mode */ -imx6q_set_lpm (WAIT_CLOCKED ); }CLK_OF_DECLARE (imx6sx,"fsl,imx6sx-ccm" , imx6sx_clocks_init);
arch/arm/mach-imx/common.h +1 -1
@@ -107,7 +107,7 @@ void imx_gpc_hwirq_unmask(unsigned int hwirq);void imx_anatop_init (void );void imx_anatop_pre_suspend (void );void imx_anatop_post_resume (void ); -int imx6q_set_lpm (enum mxc_cpu_pwr_mode mode); +int imx6_set_lpm (enum mxc_cpu_pwr_mode mode);void imx6q_set_int_mem_clk_lpm (bool enable);void imx6sl_set_wait_clk (bool enter);int imx_mmdc_get_ddr_type (void );
arch/arm/mach-imx/cpuidle-imx6q.c +2 -2
@@ -28,9 +28,9 @@ static int imx6q_enter_wait(struct cpuidle_device *dev,*/ if (!spin_trylock (&master_lock)) goto idle; -imx6q_set_lpm (WAIT_UNCLOCKED ); +imx6_set_lpm (WAIT_UNCLOCKED );cpu_do_idle (); -imx6q_set_lpm (WAIT_CLOCKED ); +imx6_set_lpm (WAIT_CLOCKED );spin_unlock (&master_lock); goto done; }
arch/arm/mach-imx/cpuidle-imx6sl.c +2 -2
@@ -17,7 +17,7 @@static int imx6sl_enter_wait (struct cpuidle_device *dev,struct cpuidle_driver *drv,int index) { -imx6q_set_lpm (WAIT_UNCLOCKED ); +imx6_set_lpm (WAIT_UNCLOCKED );/* * Software workaround for ERR005311, see function * description for details.
@@ -25,7 +25,7 @@ static int imx6sl_enter_wait(struct cpuidle_device *dev,imx6sl_set_wait_clk (true);cpu_do_idle ();imx6sl_set_wait_clk (false); -imx6q_set_lpm (WAIT_CLOCKED ); +imx6_set_lpm (WAIT_CLOCKED );return index; }
arch/arm/mach-imx/cpuidle-imx6sx.c +2 -2
@@ -26,7 +26,7 @@ static int imx6sx_idle_finish(unsigned long val)static int imx6sx_enter_wait (struct cpuidle_device *dev,struct cpuidle_driver *drv,int index) { -imx6q_set_lpm (WAIT_UNCLOCKED ); +imx6_set_lpm (WAIT_UNCLOCKED );switch (index) {case 1 :
@@ -51,7 +51,7 @@ static int imx6sx_enter_wait(struct cpuidle_device *dev,break ; } -imx6q_set_lpm (WAIT_CLOCKED ); +imx6_set_lpm (WAIT_CLOCKED );return index; }
arch/arm/mach-imx/pm-imx6.c +8 -6
@@ -255,7 +255,7 @@ static void imx6q_enable_wb(bool enable)writel_relaxed (val, ccm_base +CCR ); } -int imx6q_set_lpm (enum mxc_cpu_pwr_mode mode) +int imx6_set_lpm (enum mxc_cpu_pwr_mode mode) {u32 val =readl_relaxed (ccm_base +CLPCR );
@@ -340,7 +340,7 @@ static int imx6q_pm_enter(suspend_state_t state) {switch (state) {case PM_SUSPEND_STANDBY : -imx6q_set_lpm (STOP_POWER_ON ); +imx6_set_lpm (STOP_POWER_ON );imx6q_set_int_mem_clk_lpm (true);imx_gpc_pre_suspend (false);if (cpu_is_imx6sl ())
@@ -350,10 +350,10 @@ static int imx6q_pm_enter(suspend_state_t state)if (cpu_is_imx6sl ())imx6sl_set_wait_clk (false);imx_gpc_post_resume (); -imx6q_set_lpm (WAIT_CLOCKED ); +imx6_set_lpm (WAIT_CLOCKED );break ;case PM_SUSPEND_MEM : -imx6q_set_lpm (STOP_POWER_OFF ); +imx6_set_lpm (STOP_POWER_OFF );imx6q_set_int_mem_clk_lpm (false);imx6q_enable_wb (true);/*
@@ -373,7 +373,7 @@ static int imx6q_pm_enter(suspend_state_t state)imx6_enable_rbc (false);imx6q_enable_wb (false);imx6q_set_int_mem_clk_lpm (true); -imx6q_set_lpm (WAIT_CLOCKED ); +imx6_set_lpm (WAIT_CLOCKED );break ;default :return -EINVAL ;
@@ -559,6 +559,8 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdataWARN_ON (!ccm_base); +imx6_set_lpm (WAIT_CLOCKED ); +if (IS_ENABLED (CONFIG_SUSPEND )) { ret =imx6q_suspend_init (socdata);if (ret)
@@ -568,7 +570,7 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata/* * This is for SW workaround step #1 of ERR007265, see comments -* in imx6q_set_lpm for details of this errata. +* in imx6_set_lpm for details of this errata. * Force IOMUXC irq pending, so that the interrupt to GPC can be * used to deassert dsm_request signal when the signal gets * asserted unexpectedly.
Signature · 1 line
1.9.1
PATCH 5/11 ARM: imx6: set initial power mode in pm function
Hi Shawn,
Quoted 8 lines · Shawn Guo
Rather than setting initial low-power mode in every single i.MX6 clock initialization function, we should really do that in pm code. Let's move
imx6q_set_lpm(WAIT_CLOCKED)call intoimx6_pm_common_init().While at it, let's rename the function to
imx6_set_lpm()since it's actually common for all i.MX6 SoCs.Signed-off-by Shawn Guo <[email protected]>
Some boot failures on imx6[1] (multi_v7_defconfig) were bisected down to this patch. A simple revert doesn't build, so I was unable tot test a direct revert. However, from the boot failures you can see that while multi_v7_defconfig boots fail, the imx_v6_v7_defconfig boots fine. Disabling CONFIG_CPU_IDLE in multi_v7_defconfig allows this to start booting again on my wandboard quad, so I think there is something wrong with the cpuidle changes.
Kevin
PATCH 5/11 ARM: imx6: set initial power mode in pm function
Hi Kevin,
Quoted 10 lines · Kevin Hilman
Hi Shawn,
Quoted 7 lines · Shawn Guo
Rather than setting initial low-power mode in every single i.MX6 clock initialization function, we should really do that in pm code. Let's move
imx6q_set_lpm(WAIT_CLOCKED)call intoimx6_pm_common_init().While at it, let's rename the function to
imx6_set_lpm()since it's actually common for all i.MX6 SoCs.
Quoted 7 lines
Quoted 1 line
Signed-off-by Shawn Guo <[email protected]>Some boot failures on imx6[1] (
multi_v7_defconfig) were bisected down to this patch. A simple revert doesn't build, so I was unable tot test a direct revert. However, from the boot failures you can see that whilemulti_v7_defconfigboots fail, theimx_v6_v7_defconfigboots fine.
This reminds me that cpuidle support is not turned on in imx_v6_v7_defconfig. I will send a patch to enable it for testing coverage.
Quoted 3 lines
Disabling
CONFIG_CPU_IDLEinmulti_v7_defconfigallows this to start booting again on my wandboard quad, so I think there is something wrong with the cpuidle changes.
I just tracked down the issue, and sent a fix like below.
The kernelci.org boot automation farm helps. Thanks.
Shawn
----8<-------------------------------
Quoted 1 line
From
056a5da1b56a057762eccd52b5b6b920c7f56b14Mon Sep 17 00:00:00 2001
From: Shawn Guo <[email protected]>
Date: Wed, 29 Apr 2015 13:07:03 +0800
Subject: [PATCH] ARM: imx6: initialize CCM_CLPCR_LPM into RUN mode earlier
Commit 4631960d26da ("ARM: imx6: set initial power mode in pm function") moves imx6_set_lpm() from clock init function into imx6_pm_common_init(). This causes a hang when cpuidle support is enabled. The reason for that is ARM core clock is shut down unexpectedly by WAIT mode. It happens with the following call stack:
cpuidle_register_governor()
cpuidle_switch_governor()
cpuidle_uninstall_idle_handler()
synchronize_sched()
wait_rcu_gp()
wait_for_completion()When wait_for_completion() is called as above, all cores are idle/WFI. Hence, the reset value of CCM_CLPCR_LPM - WAIT mode, will trigger a hardware shutdown of the ARM core clock.
To fix the regression, we need to ensure that CCM_CLPCR_LPM is initialized into RUN mode earlier than cpuidle governor registration, which is a postcore_initcall. This patch creates function imx6_pm_ccm_init() to map CCM block and initialize CCM_CLPCR_LPM into RUN mode, and have the function called from machine .init_irq hook, which should be early enough.
Reported-by Kevin Hilman <[email protected]>
Fixes 4631960d26da ("ARM: imx6: set initial power mode in pm function")
Signed-off-by Shawn Guo <[email protected]>
--- arch/arm/mach-imx/common.h | 1 + arch/arm/mach-imx/mach-imx6q.c | 1 + arch/arm/mach-imx/mach-imx6sl.c | 1 + arch/arm/mach-imx/mach-imx6sx.c | 1 + arch/arm/mach-imx/pm-imx6.c | 28 ++++++++++++++++++---------- 5 files changed, 22 insertions(+), 10 deletions(-)
arch/arm/mach-imx/common.h +1 -0
@@ -123,6 +123,7 @@ static inline void v7_cpu_resume(void) {}static inline void imx6_suspend (void __iomem *ocram_vbase) {}#endif +void imx6_pm_ccm_init (const char *ccm_compat);void imx6q_pm_init (void );void imx6dl_pm_init (void );void imx6sl_pm_init (void );
arch/arm/mach-imx/mach-imx6q.c +1 -0
@@ -393,6 +393,7 @@ static void __init imx6q_init_irq(void)imx_init_l2cache ();imx_src_init ();irqchip_init (); +imx6_pm_ccm_init ("fsl,imx6q-ccm" ); }static const char *const imx6q_dt_compat[]__initconst = {
arch/arm/mach-imx/mach-imx6sl.c +1 -0
@@ -66,6 +66,7 @@ static void __init imx6sl_init_irq(void)imx_init_l2cache ();imx_src_init ();irqchip_init (); +imx6_pm_ccm_init ("fsl,imx6sl-ccm" ); }static const char *const imx6sl_dt_compat[]__initconst = {
arch/arm/mach-imx/mach-imx6sx.c +1 -0
@@ -86,6 +86,7 @@ static void __init imx6sx_init_irq(void)imx_init_l2cache ();imx_src_init ();irqchip_init (); +imx6_pm_ccm_init ("fsl,imx6sx-ccm" ); }static void __init imx6sx_init_late (void )
arch/arm/mach-imx/pm-imx6.c +18 -10
@@ -89,7 +89,6 @@ struct imx6_pm_base {struct imx6_pm_socdata {u32 ddr_type; -const char *ccm_compat;const char *mmdc_compat;const char *src_compat;const char *iomuxc_compat;
@@ -139,7 +138,6 @@ static const u32 imx6sx_mmdc_io_offset[] __initconst = { };static const struct imx6_pm_socdata imx6q_pm_data__initconst = { - .ccm_compat ="fsl,imx6q-ccm" , .mmdc_compat ="fsl,imx6q-mmdc" , .src_compat ="fsl,imx6q-src" , .iomuxc_compat ="fsl,imx6q-iomuxc" ,
@@ -149,7 +147,6 @@ static const struct imx6_pm_socdata imx6q_pm_data __initconst = { };static const struct imx6_pm_socdata imx6dl_pm_data__initconst = { - .ccm_compat ="fsl,imx6q-ccm" , .mmdc_compat ="fsl,imx6q-mmdc" , .src_compat ="fsl,imx6q-src" , .iomuxc_compat ="fsl,imx6dl-iomuxc" ,
@@ -159,7 +156,6 @@ static const struct imx6_pm_socdata imx6dl_pm_data __initconst = { };static const struct imx6_pm_socdata imx6sl_pm_data__initconst = { - .ccm_compat ="fsl,imx6sl-ccm" , .mmdc_compat ="fsl,imx6sl-mmdc" , .src_compat ="fsl,imx6sl-src" , .iomuxc_compat ="fsl,imx6sl-iomuxc" ,
@@ -169,7 +165,6 @@ static const struct imx6_pm_socdata imx6sl_pm_data __initconst = { };static const struct imx6_pm_socdata imx6sx_pm_data__initconst = { - .ccm_compat ="fsl,imx6sx-ccm" , .mmdc_compat ="fsl,imx6sx-mmdc" , .src_compat ="fsl,imx6sx-src" , .iomuxc_compat ="fsl,imx6sx-iomuxc" ,
@@ -553,16 +548,11 @@ put_node:static void __init imx6_pm_common_init (const struct imx6_pm_socdata *socdata) { -struct device_node *np;struct regmap *gpr;int ret; - np =of_find_compatible_node (NULL ,NULL , socdata->ccm_compat); - ccm_base =of_iomap (np,0 );WARN_ON (!ccm_base); -imx6_set_lpm (WAIT_CLOCKED ); -if (IS_ENABLED (CONFIG_SUSPEND )) { ret =imx6q_suspend_init (socdata);if (ret)
@@ -583,6 +573,24 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata IMX6Q_GPR1_GINT); } +void __init imx6_pm_ccm_init (const char *ccm_compat) +{ +struct device_node *np; +u32 val; + + np =of_find_compatible_node (NULL ,NULL , ccm_compat); + ccm_base =of_iomap (np,0 ); +BUG_ON (!ccm_base); + +/* +* Initialize CCM_CLPCR_LPM into RUN mode to avoid ARM core +* clock being shut down unexpectedly by WAIT mode. +*/ + val =readl_relaxed (ccm_base +CLPCR ); + val &= ~BM_CLPCR_LPM ; +writel_relaxed (val, ccm_base +CLPCR ); +} +void __init imx6q_pm_init (void ) {imx6_pm_common_init (&imx6q_pm_data);
Signature · 1 line
1.9.1
PATCH 5/11 ARM: imx6: set initial power mode in pm function
Quoted 25 lines · Shawn Guo
Hi Kevin,
Quoted 10 lines · Kevin Hilman
Hi Shawn,
Quoted 7 lines · Shawn Guo
Rather than setting initial low-power mode in every single i.MX6 clock initialization function, we should really do that in pm code. Let's move
imx6q_set_lpm(WAIT_CLOCKED)call intoimx6_pm_common_init().While at it, let's rename the function to
imx6_set_lpm()since it's actually common for all i.MX6 SoCs.Quoted 7 lines
Quoted 1 line
Signed-off-by Shawn Guo <[email protected]>Some boot failures on imx6[1] (
multi_v7_defconfig) were bisected down to this patch. A simple revert doesn't build, so I was unable tot test a direct revert. However, from the boot failures you can see that whilemulti_v7_defconfigboots fail, theimx_v6_v7_defconfigboots fine.This reminds me that cpuidle support is not turned on in
imx_v6_v7_defconfig. I will send a patch to enable it for testing coverage.
Quoted 5 lines
Quoted 3 lines
Disabling
CONFIG_CPU_IDLEinmulti_v7_defconfigallows this to start booting again on my wandboard quad, so I think there is something wrong with the cpuidle changes.I just tracked down the issue, and sent a fix like below.
Thanks for the quick fix.
Quoted 1 line
The kernelci.org boot automation farm helps. Thanks.
Glad it's useful. We're doing a build/boot test of your fix now, and will keep you updated.
In the mean time...,
Quoted 30 lines
----8<-------------------------------
From056a5da1b56a057762eccd52b5b6b920c7f56b14Mon Sep 17 00:00:00 2001
From: Shawn Guo <[email protected]>
Date: Wed, 29 Apr 2015 13:07:03 +0800
Subject: [PATCH] ARM: imx6: initializeCCM_CLPCR_LPMinto RUN mode earlierCommit
4631960d26da("ARM: imx6: set initial power mode in pm function") movesimx6_set_lpm()from clock init function intoimx6_pm_common_init(). This causes a hang when cpuidle support is enabled. The reason for that is ARM core clock is shut down unexpectedly by WAIT mode. It happens with the following call stack:cpuidle_register_governor() cpuidle_switch_governor() cpuidle_uninstall_idle_handler() synchronize_sched() wait_rcu_gp() wait_for_completion()When
wait_for_completion()is called as above, all cores are idle/WFI. Hence, the reset value ofCCM_CLPCR_LPM- WAIT mode, will trigger a hardware shutdown of the ARM core clock.To fix the regression, we need to ensure that
CCM_CLPCR_LPMis initialized into RUN mode earlier than cpuidle governor registration, which is apostcore_initcall. This patch creates functionimx6_pm_ccm_init()to map CCM block and initializeCCM_CLPCR_LPMinto RUN mode, and have the function called from machine .init_irq hook, which should be early enough.
Quoted 3 lines
Reported-by Kevin Hilman <[email protected]>Fixes 4631960d26da ("ARM: imx6: set initial power mode in pm function")Signed-off-by Shawn Guo <[email protected]>
...I did a quick test of this locally on my wandboard-quad, and it's now booting with multi_v7_defconfig too.
Tested-by Kevin Hilman <[email protected]>
PATCH 5/11 ARM: imx6: set initial power mode in pm function
Quoted 4 lines · Kevin Hilman
...I did a quick test of this locally on my wandboard-quad, and it's now booting with
multi_v7_defconfigtoo.Tested-by Kevin Hilman <[email protected]>
Thanks for testing, Kevin.
Shawn
PATCH 6/11 ARM: imx6: let pm code map CCM block on its own
In reply to Shawn GuoWe are about to move imx6 clock driver into drivers/clk, so let's get imx6 pm code map CCM block on its own rather than relying on clock driver to do the mapping.
Signed-off-by Shawn Guo <[email protected]>
--- arch/arm/mach-imx/clk-imx6q.c | 2 -- arch/arm/mach-imx/clk-imx6sl.c | 3 --- arch/arm/mach-imx/clk-imx6sx.c | 2 -- arch/arm/mach-imx/common.h | 1 - arch/arm/mach-imx/pm-imx6.c | 16 +++++++++------- 5 files changed, 9 insertions(+), 15 deletions(-)
arch/arm/mach-imx/clk-imx6q.c +0 -2
@@ -262,8 +262,6 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) base =of_iomap (np,0 );WARN_ON (!base); -imx6q_pm_set_ccm_base (base); -/* name reg shift width parent_names num_parents */ clk[IMX6QDL_CLK_STEP ] =imx_clk_mux ("step" , base +0xc ,8 ,1 , step_sels,ARRAY_SIZE (step_sels)); clk[IMX6QDL_CLK_PLL1_SW ] =imx_clk_mux ("pll1_sw" , base +0xc ,2 ,1 , pll1_sw_sels,ARRAY_SIZE (pll1_sw_sels));
arch/arm/mach-imx/clk-imx6sl.c +0 -3
@@ -288,9 +288,6 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)WARN_ON (!base); ccm_base = base; -/* Reuse imx6q pm code */ -imx6q_pm_set_ccm_base (base); -/* name reg shift width parent_names num_parents */ clks[IMX6SL_CLK_STEP ] =imx_clk_mux ("step" , base +0xc ,8 ,1 , step_sels,ARRAY_SIZE (step_sels)); clks[IMX6SL_CLK_PLL1_SW ] =imx_clk_mux ("pll1_sw" , base +0xc ,2 ,1 , pll1_sw_sels,ARRAY_SIZE (pll1_sw_sels));
arch/arm/mach-imx/clk-imx6sx.c +0 -2
@@ -268,8 +268,6 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) base =of_iomap (np,0 );WARN_ON (!base); -imx6q_pm_set_ccm_base (base); -/* name reg shift width parent_names num_parents */ clks[IMX6SX_CLK_STEP ] =imx_clk_mux ("step" , base +0xc ,8 ,1 , step_sels,ARRAY_SIZE (step_sels)); clks[IMX6SX_CLK_PLL1_SW ] =imx_clk_mux ("pll1_sw" , base +0xc ,2 ,1 , pll1_sw_sels,ARRAY_SIZE (pll1_sw_sels));
arch/arm/mach-imx/common.h +0 -1
@@ -127,7 +127,6 @@ void imx6q_pm_init(void);void imx6dl_pm_init (void );void imx6sl_pm_init (void );void imx6sx_pm_init (void ); -void imx6q_pm_set_ccm_base (void __iomem *base);#ifdef CONFIG_PM void imx51_pm_init (void );
arch/arm/mach-imx/pm-imx6.c +9 -7
@@ -89,6 +89,7 @@ struct imx6_pm_base {struct imx6_pm_socdata {u32 ddr_type; +const char *ccm_compat;const char *mmdc_compat;const char *src_compat;const char *iomuxc_compat;
@@ -138,6 +139,7 @@ static const u32 imx6sx_mmdc_io_offset[] __initconst = { };static const struct imx6_pm_socdata imx6q_pm_data__initconst = { + .ccm_compat ="fsl,imx6q-ccm" , .mmdc_compat ="fsl,imx6q-mmdc" , .src_compat ="fsl,imx6q-src" , .iomuxc_compat ="fsl,imx6q-iomuxc" ,
@@ -147,6 +149,7 @@ static const struct imx6_pm_socdata imx6q_pm_data __initconst = { };static const struct imx6_pm_socdata imx6dl_pm_data__initconst = { + .ccm_compat ="fsl,imx6q-ccm" , .mmdc_compat ="fsl,imx6q-mmdc" , .src_compat ="fsl,imx6q-src" , .iomuxc_compat ="fsl,imx6dl-iomuxc" ,
@@ -156,6 +159,7 @@ static const struct imx6_pm_socdata imx6dl_pm_data __initconst = { };static const struct imx6_pm_socdata imx6sl_pm_data__initconst = { + .ccm_compat ="fsl,imx6sl-ccm" , .mmdc_compat ="fsl,imx6sl-mmdc" , .src_compat ="fsl,imx6sl-src" , .iomuxc_compat ="fsl,imx6sl-iomuxc" ,
@@ -165,6 +169,7 @@ static const struct imx6_pm_socdata imx6sl_pm_data __initconst = { };static const struct imx6_pm_socdata imx6sx_pm_data__initconst = { + .ccm_compat ="fsl,imx6sx-ccm" , .mmdc_compat ="fsl,imx6sx-mmdc" , .src_compat ="fsl,imx6sx-src" , .iomuxc_compat ="fsl,imx6sx-iomuxc" ,
@@ -392,11 +397,6 @@ static const struct platform_suspend_ops imx6q_pm_ops = { .valid = imx6q_pm_valid, }; -void __init imx6q_pm_set_ccm_base (void __iomem *base) -{ - ccm_base = base; -} -static int __init imx6_pm_get_base (struct imx6_pm_base *base,const char *compat) {
@@ -482,8 +482,7 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)/* * ccm physical address is not used by asm code currently, -* so get ccm virtual address directly, as we already have -* it from ccm driver. +* so get ccm virtual address directly. */ pm_info->ccm_base.vbase = ccm_base;
@@ -554,9 +553,12 @@ put_node:static void __init imx6_pm_common_init (const struct imx6_pm_socdata *socdata) { +struct device_node *np;struct regmap *gpr;int ret; + np =of_find_compatible_node (NULL ,NULL , socdata->ccm_compat); + ccm_base =of_iomap (np,0 );WARN_ON (!ccm_base);imx6_set_lpm (WAIT_CLOCKED );
Signature · 1 line
1.9.1
PATCH 7/11 ARM: imx6: do not use cpu_is_xxx() in clock driver
In reply to Shawn GuoAs we're about to move clock drivers out of arch/arm/mach-imx, cpu_is_xxx() shouldn't be used any more. Let's avoid the call by looking at the device tree machine compatible string to determine which SoC the clock driver is running on.
Signed-off-by Shawn Guo <[email protected]>
--- arch/arm/mach-imx/clk-imx6q.c | 26 ++++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-)
arch/arm/mach-imx/clk-imx6q.c +18 -8
@@ -121,6 +121,16 @@ static unsigned int share_count_ssi2;static unsigned int share_count_ssi3;static unsigned int share_count_mipi_core_cfg; +static inline int clk_on_imx6q (void ) +{ +return of_machine_is_compatible ("fsl,imx6q" ); +} + +static inline int clk_on_imx6dl (void ) +{ +return of_machine_is_compatible ("fsl,imx6dl" ); +} +static void __init imx6q_clocks_init (struct device_node *ccm_node) {struct device_node *np;
@@ -141,7 +151,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)WARN_ON (!base);/* Audio/video PLL post dividers do not work on i.MX6q revision 1.0 */ -if (cpu_is_imx6q () &&imx_get_soc_revision () ==IMX_CHIP_REVISION_1_0 ) { +if (clk_on_imx6q () &&imx_get_soc_revision () ==IMX_CHIP_REVISION_1_0 ) { post_div_table[1 ].div =1 ; post_div_table[2 ].div =1 ; video_div_table[1 ].div =1 ;
@@ -248,7 +258,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk[IMX6QDL_CLK_TWD ] =imx_clk_fixed_factor ("twd" ,"arm" ,1 ,2 ); clk[IMX6QDL_CLK_GPT_3M ] =imx_clk_fixed_factor ("gpt_3m" ,"osc" ,1 ,8 ); clk[IMX6QDL_CLK_VIDEO_27M ] =imx_clk_fixed_factor ("video_27m" ,"pll3_pfd1_540m" ,1 ,20 ); -if (cpu_is_imx6dl ()) { +if (clk_on_imx6dl ()) { clk[IMX6QDL_CLK_GPU2D_AXI ] =imx_clk_fixed_factor ("gpu2d_axi" ,"mmdc_ch0_axi_podf" ,1 ,1 ); clk[IMX6QDL_CLK_GPU3D_AXI ] =imx_clk_fixed_factor ("gpu3d_axi" ,"mmdc_ch0_axi_podf" ,1 ,1 ); }
@@ -273,7 +283,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk[IMX6QDL_CLK_ESAI_SEL ] =imx_clk_mux ("esai_sel" , base +0x20 ,19 ,2 , audio_sels,ARRAY_SIZE (audio_sels)); clk[IMX6QDL_CLK_ASRC_SEL ] =imx_clk_mux ("asrc_sel" , base +0x30 ,7 ,2 , audio_sels,ARRAY_SIZE (audio_sels)); clk[IMX6QDL_CLK_SPDIF_SEL ] =imx_clk_mux ("spdif_sel" , base +0x30 ,20 ,2 , audio_sels,ARRAY_SIZE (audio_sels)); -if (cpu_is_imx6q ()) { +if (clk_on_imx6q ()) { clk[IMX6QDL_CLK_GPU2D_AXI ] =imx_clk_mux ("gpu2d_axi" , base +0x18 ,0 ,1 , gpu_axi_sels,ARRAY_SIZE (gpu_axi_sels)); clk[IMX6QDL_CLK_GPU3D_AXI ] =imx_clk_mux ("gpu3d_axi" , base +0x18 ,1 ,1 , gpu_axi_sels,ARRAY_SIZE (gpu_axi_sels)); }
@@ -380,7 +390,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk[IMX6QDL_CLK_ECSPI2 ] =imx_clk_gate2 ("ecspi2" ,"ecspi_root" , base +0x6c ,2 ); clk[IMX6QDL_CLK_ECSPI3 ] =imx_clk_gate2 ("ecspi3" ,"ecspi_root" , base +0x6c ,4 ); clk[IMX6QDL_CLK_ECSPI4 ] =imx_clk_gate2 ("ecspi4" ,"ecspi_root" , base +0x6c ,6 ); -if (cpu_is_imx6dl ()) +if (clk_on_imx6dl ()) clk[IMX6DL_CLK_I2C4 ] =imx_clk_gate2 ("i2c4" ,"ipg_per" , base +0x6c ,8 );else clk[IMX6Q_CLK_ECSPI5 ] =imx_clk_gate2 ("ecspi5" ,"ecspi_root" , base +0x6c ,8 );
@@ -390,7 +400,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk[IMX6QDL_CLK_ESAI_MEM ] =imx_clk_gate2_shared ("esai_mem" ,"ahb" , base +0x6c ,16 , &share_count_esai); clk[IMX6QDL_CLK_GPT_IPG ] =imx_clk_gate2 ("gpt_ipg" ,"ipg" , base +0x6c ,20 ); clk[IMX6QDL_CLK_GPT_IPG_PER ] =imx_clk_gate2 ("gpt_ipg_per" ,"ipg_per" , base +0x6c ,22 ); -if (cpu_is_imx6dl ()) +if (clk_on_imx6dl ())/* * The multiplexer and divider of imx6q clock gpu3d_shader get * redefined/reused as gpu2d_core_sel and gpu2d_core_podf on imx6dl.
@@ -418,7 +428,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk[IMX6QDL_CLK_HSI_TX ] =imx_clk_gate2_shared ("hsi_tx" ,"hsi_tx_podf" , base +0x74 ,16 , &share_count_mipi_core_cfg); clk[IMX6QDL_CLK_MIPI_CORE_CFG ] =imx_clk_gate2_shared ("mipi_core_cfg" ,"video_27m" , base +0x74 ,16 , &share_count_mipi_core_cfg); clk[IMX6QDL_CLK_MIPI_IPG ] =imx_clk_gate2_shared ("mipi_ipg" ,"ipg" , base +0x74 ,16 , &share_count_mipi_core_cfg); -if (cpu_is_imx6dl ()) +if (clk_on_imx6dl ())/* * The multiplexer and divider of the imx6q clock gpu2d get * redefined/reused as mlb_sys_sel and mlb_sys_clk_podf on imx6dl.
@@ -468,7 +478,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)* The gpt_3m clock is not available on i.MX6Q TO1.0. Let's point it * to clock gpt_ipg_per to ease the gpt driver code. */ -if (cpu_is_imx6q () &&imx_get_soc_revision () ==IMX_CHIP_REVISION_1_0 ) +if (clk_on_imx6q () &&imx_get_soc_revision () ==IMX_CHIP_REVISION_1_0 ) clk[IMX6QDL_CLK_GPT_3M ] = clk[IMX6QDL_CLK_GPT_IPG_PER ];imx_check_clocks (clk,ARRAY_SIZE (clk));
@@ -480,7 +490,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)clk_register_clkdev (clk[IMX6QDL_CLK_ENET_REF ],"enet_ref" ,NULL );if ((imx_get_soc_revision () !=IMX_CHIP_REVISION_1_0 ) || -cpu_is_imx6dl ()) { +clk_on_imx6dl ()) {clk_set_parent (clk[IMX6QDL_CLK_LDB_DI0_SEL ], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV ]);clk_set_parent (clk[IMX6QDL_CLK_LDB_DI1_SEL ], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV ]); }
Signature · 1 line
1.9.1
PATCH 8/11 ARM: imx: add clk-pllv1 type support
In reply to Shawn GuoInstead of calling cpu_is_xxx() in clk-pllv1 driver, let's add clk-pllv1 type support to handle the difference/quirk in particular SoC designs. Doing so will help get clk-pllv1 driver ready for being moved out of arch/arm/mach-imx folder.
Signed-off-by Shawn Guo <[email protected]>
--- arch/arm/mach-imx/clk-imx1.c | 4 ++-- arch/arm/mach-imx/clk-imx21.c | 4 ++-- arch/arm/mach-imx/clk-imx25.c | 4 ++-- arch/arm/mach-imx/clk-imx27.c | 4 ++-- arch/arm/mach-imx/clk-imx31.c | 6 +++--- arch/arm/mach-imx/clk-imx35.c | 4 ++-- arch/arm/mach-imx/clk-pllv1.c | 31 ++++++++++++++++++++++++------- arch/arm/mach-imx/clk.h | 13 +++++++++++-- 8 files changed, 48 insertions(+), 22 deletions(-)
arch/arm/mach-imx/clk-imx1.c +2 -2
@@ -50,9 +50,9 @@ static void __init _mx1_clocks_init(unsigned long fref) clk[IMX1_CLK_CLK16M ] =imx_clk_gate ("clk16m" ,"clk16m_ext" ,CCM_CSCR ,17 ); clk[IMX1_CLK_CLK32_PREMULT ] =imx_clk_fixed_factor ("clk32_premult" ,"clk32" ,512 ,1 ); clk[IMX1_CLK_PREM ] =imx_clk_mux ("prem" ,CCM_CSCR ,16 ,1 , prem_sel_clks,ARRAY_SIZE (prem_sel_clks)); - clk[IMX1_CLK_MPLL ] =imx_clk_pllv1 ("mpll" ,"clk32_premult" ,CCM_MPCTL0 ); + clk[IMX1_CLK_MPLL ] =imx_clk_pllv1 (IMX_PLLV1_IMX1 ,"mpll" ,"clk32_premult" ,CCM_MPCTL0 ); clk[IMX1_CLK_MPLL_GATE ] =imx_clk_gate ("mpll_gate" ,"mpll" ,CCM_CSCR ,0 ); - clk[IMX1_CLK_SPLL ] =imx_clk_pllv1 ("spll" ,"prem" ,CCM_SPCTL0 ); + clk[IMX1_CLK_SPLL ] =imx_clk_pllv1 (IMX_PLLV1_IMX1 ,"spll" ,"prem" ,CCM_SPCTL0 ); clk[IMX1_CLK_SPLL_GATE ] =imx_clk_gate ("spll_gate" ,"spll" ,CCM_CSCR ,1 ); clk[IMX1_CLK_MCU ] =imx_clk_divider ("mcu" ,"clk32_premult" ,CCM_CSCR ,15 ,1 ); clk[IMX1_CLK_FCLK ] =imx_clk_divider ("fclk" ,"mpll_gate" ,CCM_CSCR ,15 ,1 );
arch/arm/mach-imx/clk-imx21.c +2 -2
@@ -63,9 +63,9 @@ static void __init _mx21_clocks_init(unsigned long lref, unsigned long href) clk[IMX21_CLK_USB_DIV ] =imx_clk_divider ("usb_div" ,"spll_gate" ,CCM_CSCR ,26 ,3 ); clk[IMX21_CLK_FCLK ] =imx_clk_divider ("fclk" ,"mpll_gate" ,CCM_CSCR ,29 ,3 ); - clk[IMX21_CLK_MPLL ] =imx_clk_pllv1 ("mpll" ,"mpll_sel" ,CCM_MPCTL0 ); + clk[IMX21_CLK_MPLL ] =imx_clk_pllv1 (IMX_PLLV1_IMX21 ,"mpll" ,"mpll_sel" ,CCM_MPCTL0 ); - clk[IMX21_CLK_SPLL ] =imx_clk_pllv1 ("spll" ,"spll_sel" ,CCM_SPCTL0 ); + clk[IMX21_CLK_SPLL ] =imx_clk_pllv1 (IMX_PLLV1_IMX21 ,"spll" ,"spll_sel" ,CCM_SPCTL0 ); clk[IMX21_CLK_NFC_DIV ] =imx_clk_divider ("nfc_div" ,"fclk" ,CCM_PCDR0 ,12 ,4 ); clk[IMX21_CLK_SSI1_DIV ] =imx_clk_divider ("ssi1_div" ,"ssi1_sel" ,CCM_PCDR0 ,16 ,6 );
arch/arm/mach-imx/clk-imx25.c +2 -2
@@ -95,8 +95,8 @@ static int __init __mx25_clocks_init(unsigned long osc_rate, clk[dummy] =imx_clk_fixed ("dummy" ,0 ); clk[osc] =imx_clk_fixed ("osc" , osc_rate); - clk[mpll] =imx_clk_pllv1 ("mpll" ,"osc" ,ccm (CCM_MPCTL )); - clk[upll] =imx_clk_pllv1 ("upll" ,"osc" ,ccm (CCM_UPCTL )); + clk[mpll] =imx_clk_pllv1 (IMX_PLLV1_IMX25 ,"mpll" ,"osc" ,ccm (CCM_MPCTL )); + clk[upll] =imx_clk_pllv1 (IMX_PLLV1_IMX25 ,"upll" ,"osc" ,ccm (CCM_UPCTL )); clk[mpll_cpu_3_4] =imx_clk_fixed_factor ("mpll_cpu_3_4" ,"mpll" ,3 ,4 ); clk[cpu_sel] =imx_clk_mux ("cpu_sel" ,ccm (CCM_CCTL ),14 ,1 , cpu_sel_clks,ARRAY_SIZE (cpu_sel_clks)); clk[cpu] =imx_clk_divider ("cpu" ,"cpu_sel" ,ccm (CCM_CCTL ),30 ,2 );
arch/arm/mach-imx/clk-imx27.c +2 -2
@@ -54,8 +54,8 @@ static void __init _mx27_clocks_init(unsigned long fref) clk[IMX27_CLK_CKIH_GATE ] =imx_clk_gate_dis ("ckih_gate" ,"ckih" ,CCM_CSCR ,3 ); clk[IMX27_CLK_MPLL_OSC_SEL ] =imx_clk_mux ("mpll_osc_sel" ,CCM_CSCR ,4 ,1 , mpll_osc_sel_clks,ARRAY_SIZE (mpll_osc_sel_clks)); clk[IMX27_CLK_MPLL_SEL ] =imx_clk_mux ("mpll_sel" ,CCM_CSCR ,16 ,1 , mpll_sel_clks,ARRAY_SIZE (mpll_sel_clks)); - clk[IMX27_CLK_MPLL ] =imx_clk_pllv1 ("mpll" ,"mpll_sel" ,CCM_MPCTL0 ); - clk[IMX27_CLK_SPLL ] =imx_clk_pllv1 ("spll" ,"ckih_gate" ,CCM_SPCTL0 ); + clk[IMX27_CLK_MPLL ] =imx_clk_pllv1 (IMX_PLLV1_IMX27 ,"mpll" ,"mpll_sel" ,CCM_MPCTL0 ); + clk[IMX27_CLK_SPLL ] =imx_clk_pllv1 (IMX_PLLV1_IMX27 ,"spll" ,"ckih_gate" ,CCM_SPCTL0 ); clk[IMX27_CLK_SPLL_GATE ] =imx_clk_gate ("spll_gate" ,"spll" ,CCM_CSCR ,1 ); clk[IMX27_CLK_MPLL_MAIN2 ] =imx_clk_fixed_factor ("mpll_main2" ,"mpll" ,2 ,3 );
arch/arm/mach-imx/clk-imx31.c +3 -3
@@ -59,9 +59,9 @@ int __init mx31_clocks_init(unsigned long fref) clk[dummy] =imx_clk_fixed ("dummy" ,0 ); clk[ckih] =imx_clk_fixed ("ckih" , fref); clk[ckil] =imx_clk_fixed ("ckil" ,32768 ); - clk[mpll] =imx_clk_pllv1 ("mpll" ,"ckih" , base +MXC_CCM_MPCTL ); - clk[spll] =imx_clk_pllv1 ("spll" ,"ckih" , base +MXC_CCM_SRPCTL ); - clk[upll] =imx_clk_pllv1 ("upll" ,"ckih" , base +MXC_CCM_UPCTL ); + clk[mpll] =imx_clk_pllv1 (IMX_PLLV1_IMX31 ,"mpll" ,"ckih" , base +MXC_CCM_MPCTL ); + clk[spll] =imx_clk_pllv1 (IMX_PLLV1_IMX31 ,"spll" ,"ckih" , base +MXC_CCM_SRPCTL ); + clk[upll] =imx_clk_pllv1 (IMX_PLLV1_IMX31 ,"upll" ,"ckih" , base +MXC_CCM_UPCTL ); clk[mcu_main] =imx_clk_mux ("mcu_main" , base +MXC_CCM_PMCR0 ,31 ,1 , mcu_main_sel,ARRAY_SIZE (mcu_main_sel)); clk[hsp] =imx_clk_divider ("hsp" ,"mcu_main" , base +MXC_CCM_PDR0 ,11 ,3 ); clk[ahb] =imx_clk_divider ("ahb" ,"mcu_main" , base +MXC_CCM_PDR0 ,3 ,3 );
arch/arm/mach-imx/clk-imx35.c +2 -2
@@ -92,8 +92,8 @@ int __init mx35_clocks_init(void) } clk[ckih] =imx_clk_fixed ("ckih" ,24000000 ); - clk[mpll] =imx_clk_pllv1 ("mpll" ,"ckih" , base +MX35_CCM_MPCTL ); - clk[ppll] =imx_clk_pllv1 ("ppll" ,"ckih" , base +MX35_CCM_PPCTL ); + clk[mpll] =imx_clk_pllv1 (IMX_PLLV1_IMX35 ,"mpll" ,"ckih" , base +MX35_CCM_MPCTL ); + clk[ppll] =imx_clk_pllv1 (IMX_PLLV1_IMX35 ,"ppll" ,"ckih" , base +MX35_CCM_PPCTL ); clk[mpll] =imx_clk_fixed_factor ("mpll_075" ,"mpll" ,3 ,4 );
arch/arm/mach-imx/clk-pllv1.c +24 -7
@@ -26,13 +26,29 @@struct clk_pllv1 {struct clk_hw hw;void __iomem *base; +enum imx_pllv1_type type; };#define to_clk_pllv1 (clk) (container_of(clk, struct clk_pllv1, clk)) -static inline bool mfn_is_negative (unsigned int mfn) +static inline bool is_imx1_pllv1 (struct clk_pllv1 *pll) { -return !cpu_is_mx1 () && !cpu_is_mx21 () && (mfn &MFN_SIGN ); +return pll->type ==IMX_PLLV1_IMX1 ; +} + +static inline bool is_imx21_pllv1 (struct clk_pllv1 *pll) +{ +return pll->type ==IMX_PLLV1_IMX21 ; +} + +static inline bool is_imx27_pllv1 (struct clk_pllv1 *pll) +{ +return pll->type ==IMX_PLLV1_IMX27 ; +} + +static inline bool mfn_is_negative (struct clk_pllv1 *pll,unsigned int mfn) +{ +return !is_imx1_pllv1 (pll) && !is_imx21_pllv1 (pll) && (mfn &MFN_SIGN ); } static unsigned long clk_pllv1_recalc_rate(struct clk_hw *hw,
@@ -71,8 +87,8 @@ static unsigned long clk_pllv1_recalc_rate(struct clk_hw *hw,* 2's complements number. * On i.MX27 the bit 9 is the sign bit. */ -if (mfn_is_negative (mfn)) { -if (cpu_is_mx27 ()) +if (mfn_is_negative (pll, mfn)) { +if (is_imx27_pllv1 (pll)) mfn_abs = mfn &MFN_MASK ;else mfn_abs =BIT (MFN_BITS ) - mfn;
@@ -85,7 +101,7 @@ static unsigned long clk_pllv1_recalc_rate(struct clk_hw *hw,do_div (ll, mfd +1 ); -if (mfn_is_negative (mfn)) +if (mfn_is_negative (pll, mfn)) ll = -ll; ll = (rate * mfi) + ll;
@@ -97,8 +113,8 @@ static struct clk_ops clk_pllv1_ops = { .recalc_rate = clk_pllv1_recalc_rate, }; -struct clk *imx_clk_pllv1 (const char *name,const char *parent, -void __iomem *base) +struct clk *imx_clk_pllv1 (enum imx_pllv1_type type,const char *name, +const char *parent,void __iomem *base) {struct clk_pllv1 *pll;struct clk *clk;
@@ -109,6 +125,7 @@ struct clk *imx_clk_pllv1(const char *name, const char *parent,return ERR_PTR (-ENOMEM ); pll->base = base; + pll->type = type; init.name = name; init.ops = &clk_pllv1_ops;
arch/arm/mach-imx/clk.h +11 -2
@@ -10,8 +10,17 @@ void imx_check_clocks(struct clk *clks[], unsigned int count);extern void imx_cscmr1_fixup (u32 *val); -struct clk *imx_clk_pllv1 (const char *name,const char *parent, -void __iomem *base); +enum imx_pllv1_type { +IMX_PLLV1_IMX1 , +IMX_PLLV1_IMX21 , +IMX_PLLV1_IMX25 , +IMX_PLLV1_IMX27 , +IMX_PLLV1_IMX31 , +IMX_PLLV1_IMX35 , +}; + +struct clk *imx_clk_pllv1 (enum imx_pllv1_type type,const char *name, +const char *parent,void __iomem *base);struct clk *imx_clk_pllv2 (const char *name,const char *parent,void __iomem *base);
Signature · 1 line
1.9.1
PATCH 9/11 ARM: imx: remove inclusions of platform headers
In reply to Shawn GuoWith the cleanup done before, we now can simply define base address and irq as needed in clock driver, to get those platform header inclusions removed.
Signed-off-by Shawn Guo <[email protected]>
--- arch/arm/mach-imx/clk-imx1.c | 7 +++++-- arch/arm/mach-imx/clk-imx21.c | 7 +++++-- arch/arm/mach-imx/clk-imx25.c | 2 -- arch/arm/mach-imx/clk-imx27.c | 8 ++++++-- arch/arm/mach-imx/clk-imx31.c | 21 +++++++++++++++++---- arch/arm/mach-imx/clk-imx35.c | 20 +++++++++++++++++--- arch/arm/mach-imx/clk-imx51-imx53.c | 3 +-- arch/arm/mach-imx/clk-imx6q.c | 3 +-- arch/arm/mach-imx/clk-imx6sl.c | 1 - arch/arm/mach-imx/clk-imx6sx.c | 1 - arch/arm/mach-imx/clk-pllv1.c | 2 -- arch/arm/mach-imx/clk.h | 7 +++++++ 12 files changed, 59 insertions(+), 23 deletions(-)
arch/arm/mach-imx/clk-imx1.c +5 -2
@@ -23,10 +23,13 @@#include <linux/of.h> #include <linux/of_address.h> #include <dt-bindings/clock/imx1-clock.h> +#include <asm/irq.h> #include "clk.h" -#include "common.h" -#include "hardware.h" + +#define MX1_CCM_BASE_ADDR 0x0021b000 +#define MX1_TIM1_BASE_ADDR 0x00220000 +#define MX1_TIM1_INT (NR_IRQS_LEGACY + 59)static const char *prem_sel_clks[] = {"clk32_premult" ,"clk16m" , };static const char *clko_sel_clks[] = {"per1" ,"hclk" ,"clk48m" ,"clk16m" ,
arch/arm/mach-imx/clk-imx21.c +5 -2
@@ -15,10 +15,13 @@#include <linux/of.h> #include <linux/of_address.h> #include <dt-bindings/clock/imx21-clock.h> +#include <asm/irq.h> #include "clk.h" -#include "common.h" -#include "hardware.h" + +#define MX21_CCM_BASE_ADDR 0x10027000 +#define MX21_GPT1_BASE_ADDR 0x10003000 +#define MX21_INT_GPT1 (NR_IRQS_LEGACY + 26)static void __iomem *ccm__initdata ;
arch/arm/mach-imx/clk-imx25.c +0 -2
@@ -28,8 +28,6 @@#include <linux/of_irq.h> #include "clk.h" -#include "common.h" -#include "hardware.h" #define CCM_MPCTL 0x00#define CCM_UPCTL 0x04
arch/arm/mach-imx/clk-imx27.c +6 -2
@@ -5,10 +5,14 @@#include <linux/of.h> #include <linux/of_address.h> #include <dt-bindings/clock/imx27-clock.h> +#include <soc/imx/revision.h> +#include <asm/irq.h> #include "clk.h" -#include "common.h" -#include "hardware.h" + +#define MX27_CCM_BASE_ADDR 0x10027000 +#define MX27_GPT1_BASE_ADDR 0x10003000 +#define MX27_INT_GPT1 (NR_IRQS_LEGACY + 26)static void __iomem *ccm__initdata ;
arch/arm/mach-imx/clk-imx31.c +17 -4
@@ -21,12 +21,25 @@#include <linux/io.h> #include <linux/err.h> #include <linux/of.h> +#include <soc/imx/revision.h> +#include <asm/irq.h> #include "clk.h" -#include "common.h" -#include "crmregs-imx3.h" -#include "hardware.h" -#include "mx31.h" + +#define MX31_CCM_BASE_ADDR 0x53f80000 +#define MX31_GPT1_BASE_ADDR 0x53f90000 +#define MX31_INT_GPT (NR_IRQS_LEGACY + 29) + +#define MXC_CCM_CCMR 0x00 +#define MXC_CCM_PDR0 0x04 +#define MXC_CCM_PDR1 0x08 +#define MXC_CCM_MPCTL 0x10 +#define MXC_CCM_UPCTL 0x14 +#define MXC_CCM_SRPCTL 0x18 +#define MXC_CCM_CGR0 0x20 +#define MXC_CCM_CGR1 0x24 +#define MXC_CCM_CGR2 0x28 +#define MXC_CCM_PMCR0 0x5cstatic const char *mcu_main_sel[] = {"spll" ,"mpll" , };static const char *per_sel[] = {"per_div" ,"ipg" , };
arch/arm/mach-imx/clk-imx35.c +17 -3
@@ -13,11 +13,25 @@#include <linux/clkdev.h> #include <linux/of.h> #include <linux/err.h> +#include <soc/imx/revision.h> +#include <asm/irq.h> -#include "crmregs-imx3.h" #include "clk.h" -#include "common.h" -#include "hardware.h" + +#define MX35_CCM_BASE_ADDR 0x53f80000 +#define MX35_GPT1_BASE_ADDR 0x53f90000 +#define MX35_INT_GPT (NR_IRQS_LEGACY + 29) + +#define MXC_CCM_PDR0 0x04 +#define MX35_CCM_PDR2 0x0c +#define MX35_CCM_PDR3 0x10 +#define MX35_CCM_PDR4 0x14 +#define MX35_CCM_MPCTL 0x1c +#define MX35_CCM_PPCTL 0x20 +#define MX35_CCM_CGR0 0x2c +#define MX35_CCM_CGR1 0x30 +#define MX35_CCM_CGR2 0x34 +#define MX35_CCM_CGR3 0x38struct arm_ahb_div {unsigned char arm, ahb, sel;
arch/arm/mach-imx/clk-imx51-imx53.c +1 -2
@@ -16,11 +16,10 @@#include <linux/of.h> #include <linux/of_address.h> #include <linux/of_irq.h> +#include <soc/imx/revision.h> #include <dt-bindings/clock/imx5-clock.h> #include "clk.h" -#include "common.h" -#include "hardware.h" #define MX51_DPLL1_BASE 0x83f80000#define MX51_DPLL2_BASE 0x83f84000
arch/arm/mach-imx/clk-imx6q.c +1 -2
@@ -19,11 +19,10 @@#include <linux/of.h> #include <linux/of_address.h> #include <linux/of_irq.h> +#include <soc/imx/revision.h> #include <dt-bindings/clock/imx6qdl-clock.h> #include "clk.h" -#include "common.h" -#include "hardware.h" static const char *step_sels[] = {"osc" ,"pll2_pfd2_396m" , };static const char *pll1_sw_sels[] = {"pll1_sys" ,"step" , };
arch/arm/mach-imx/clk-imx6sl.c +0 -1
@@ -16,7 +16,6 @@#include <dt-bindings/clock/imx6sl-clock.h> #include "clk.h" -#include "common.h" #define CCSR 0xc#define BM_CCSR_PLL1_SW_CLK_SEL (1 << 2)
arch/arm/mach-imx/clk-imx6sx.c +0 -1
@@ -21,7 +21,6 @@#include <linux/types.h> #include "clk.h" -#include "common.h" #define CCDR 0x4#define BM_CCM_CCDR_MMDC_CH0_MASK (0x2 << 16)
arch/arm/mach-imx/clk-pllv1.c +0 -2
@@ -6,8 +6,6 @@#include <linux/err.h> #include "clk.h" -#include "common.h" -#include "hardware.h" /** * pll v1
arch/arm/mach-imx/clk.h +7 -0
@@ -6,6 +6,13 @@extern spinlock_t imx_ccm_lock; +/* +* This is a stop-gap solution for clock drivers like imx1/imx21 which call +* mxc_timer_init() to initialize timer for non-DT boot. It can be removed +* when these legacy non-DT support is converted or dropped. +*/ +void mxc_timer_init (unsigned long pbase,int irq); +void imx_check_clocks (struct clk *clks[],unsigned int count);extern void imx_cscmr1_fixup (u32 *val);
Signature · 1 line
1.9.1
PATCH 10/11 ARM: imx: move clock drivers into drivers/clk
In reply to Shawn GuoAfter the cleanup on clock drivers, they are now ready to be moved into drivers/clk. Let's move them into drivers/clk/imx folder.
Signed-off-by Shawn Guo <[email protected]>
---
arch/arm/mach-imx/Makefile | 27 +++++++++-------------
drivers/clk/Makefile | 1 +
drivers/clk/imx/Makefile | 25 ++++++++++++++++++++
{arch/arm/mach-imx => drivers/clk/imx}/clk-busy.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-cpu.c | 0
.../mach-imx => drivers/clk/imx}/clk-fixup-div.c | 0
.../mach-imx => drivers/clk/imx}/clk-fixup-mux.c | 0
.../clk/imx}/clk-gate-exclusive.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-gate2.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-imx1.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-imx21.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-imx25.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-imx27.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-imx31.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-imx35.c | 0
.../mach-imx => drivers/clk/imx}/clk-imx51-imx53.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-imx6q.c | 0
.../arm/mach-imx => drivers/clk/imx}/clk-imx6sl.c | 0
.../arm/mach-imx => drivers/clk/imx}/clk-imx6sx.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-pfd.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-pllv1.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-pllv2.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-pllv3.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk-vf610.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk.c | 0
{arch/arm/mach-imx => drivers/clk/imx}/clk.h | 0
26 files changed, 37 insertions(+), 16 deletions(-)
create mode 100644 drivers/clk/imx/Makefile
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-busy.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-cpu.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-fixup-div.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-fixup-mux.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-gate-exclusive.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-gate2.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx1.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx21.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx25.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx27.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx31.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx35.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx51-imx53.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx6q.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx6sl.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-imx6sx.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-pfd.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-pllv1.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-pllv2.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-pllv3.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk-vf610.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk.c (100%)
rename {arch/arm/mach-imx => drivers/clk/imx}/clk.h (100%)arch/arm/mach-imx/Makefile +11 -16
@@ -1,23 +1,18 @@ obj-y := time.o cpu.o system.o irq-common.o -obj-$(CONFIG_SOC_IMX1) += clk-imx1.o mm-imx1.o -obj-$(CONFIG_SOC_IMX21) += clk-imx21.o mm-imx21.o +obj-$(CONFIG_SOC_IMX1) += mm-imx1.o +obj-$(CONFIG_SOC_IMX21) += mm-imx21.o -obj-$(CONFIG_SOC_IMX25) += clk-imx25.o cpu-imx25.o mach-imx25.o +obj-$(CONFIG_SOC_IMX25) += cpu-imx25.o mach-imx25.o obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o -obj-$(CONFIG_SOC_IMX27) += clk-imx27.o mm-imx27.o ehci-imx27.o +obj-$(CONFIG_SOC_IMX27) += mm-imx27.o ehci-imx27.o -obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clk-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o -obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clk-imx35.o ehci-imx35.o pm-imx3.o +obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o +obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o ehci-imx35.o pm-imx3.o imx5-pm-$(CONFIG_PM) += pm-imx5.o -obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o clk-imx51-imx53.o clk-cpu.o $(imx5-pm-y) - -obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \ - clk-pfd.o clk-busy.o clk.o \ - clk-fixup-div.o clk-fixup-mux.o \ - clk-gate-exclusive.o +obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o $(imx5-pm-y) obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
@@ -87,9 +82,9 @@ AFLAGS_headsmp.o :=-Wa,-march=armv7-a obj-$(CONFIG_SMP) += headsmp.o platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o endif -obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o -obj-$(CONFIG_SOC_IMX6SL) += clk-imx6sl.o mach-imx6sl.o -obj-$(CONFIG_SOC_IMX6SX) += clk-imx6sx.o mach-imx6sx.o +obj-$(CONFIG_SOC_IMX6Q) += mach-imx6q.o +obj-$(CONFIG_SOC_IMX6SL) += mach-imx6sl.o +obj-$(CONFIG_SOC_IMX6SX) += mach-imx6sx.o ifeq ($(CONFIG_SUSPEND),y) AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a
@@ -101,7 +96,7 @@ obj-$(CONFIG_SOC_IMX50) += mach-imx50.o obj-$(CONFIG_SOC_IMX51) += mach-imx51.o obj-$(CONFIG_SOC_IMX53) += mach-imx53.o -obj-$(CONFIG_SOC_VF610) += clk-vf610.o mach-vf610.o +obj-$(CONFIG_SOC_VF610) += mach-vf610.o obj-$(CONFIG_SOC_LS1021A) += mach-ls1021a.o
drivers/clk/Makefile +1 -0
@@ -48,6 +48,7 @@ obj-$(CONFIG_ARCH_BERLIN) += berlin/ obj-$(CONFIG_ARCH_HI3xxx) += hisilicon/ obj-$(CONFIG_ARCH_HIP04) += hisilicon/ obj-$(CONFIG_ARCH_HIX5HD2) += hisilicon/ +obj-$(CONFIG_ARCH_MXC) += imx/ obj-$(CONFIG_COMMON_CLK_KEYSTONE) += keystone/ ifeq ($(CONFIG_COMMON_CLK), y) obj-$(CONFIG_ARCH_MMP) += mmp/
drivers/clk/imx/Makefile new file +25 -0
@@ -0,0 +1,25 @@ + +obj-y += \ + clk.o \ + clk-busy.o \ + clk-cpu.o \ + clk-fixup-div.o \ + clk-fixup-mux.o \ + clk-gate-exclusive.o \ + clk-gate2.o \ + clk-pllv1.o \ + clk-pllv2.o \ + clk-pllv3.o \ + clk-pfd.o + +obj-$(CONFIG_SOC_IMX1) += clk-imx1.o +obj-$(CONFIG_SOC_IMX21) += clk-imx21.o +obj-$(CONFIG_SOC_IMX25) += clk-imx25.o +obj-$(CONFIG_SOC_IMX27) += clk-imx27.o +obj-$(CONFIG_SOC_IMX31) += clk-imx31.o +obj-$(CONFIG_SOC_IMX35) += clk-imx35.o +obj-$(CONFIG_SOC_IMX5) += clk-imx51-imx53.o +obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o +obj-$(CONFIG_SOC_IMX6SL) += clk-imx6sl.o +obj-$(CONFIG_SOC_IMX6SX) += clk-imx6sx.o +obj-$(CONFIG_SOC_VF610) += clk-vf610.o
drivers/clk/imx/clk-busy.c renamed from arch/arm/mach-imx/clk-busy.c +0 -0
drivers/clk/imx/clk-cpu.c renamed from arch/arm/mach-imx/clk-cpu.c +0 -0
drivers/clk/imx/clk-fixup-div.c renamed from arch/arm/mach-imx/clk-fixup-div.c +0 -0
drivers/clk/imx/clk-fixup-mux.c renamed from arch/arm/mach-imx/clk-fixup-mux.c +0 -0
drivers/clk/imx/clk-gate-exclusive.c renamed from arch/arm/mach-imx/clk-gate-exclusive.c +0 -0
drivers/clk/imx/clk-gate2.c renamed from arch/arm/mach-imx/clk-gate2.c +0 -0
drivers/clk/imx/clk-imx1.c renamed from arch/arm/mach-imx/clk-imx1.c +0 -0
drivers/clk/imx/clk-imx21.c renamed from arch/arm/mach-imx/clk-imx21.c +0 -0
drivers/clk/imx/clk-imx25.c renamed from arch/arm/mach-imx/clk-imx25.c +0 -0
drivers/clk/imx/clk-imx27.c renamed from arch/arm/mach-imx/clk-imx27.c +0 -0
drivers/clk/imx/clk-imx31.c renamed from arch/arm/mach-imx/clk-imx31.c +0 -0
drivers/clk/imx/clk-imx35.c renamed from arch/arm/mach-imx/clk-imx35.c +0 -0
drivers/clk/imx/clk-imx51-imx53.c renamed from arch/arm/mach-imx/clk-imx51-imx53.c +0 -0
drivers/clk/imx/clk-imx6q.c renamed from arch/arm/mach-imx/clk-imx6q.c +0 -0
drivers/clk/imx/clk-imx6sl.c renamed from arch/arm/mach-imx/clk-imx6sl.c +0 -0
drivers/clk/imx/clk-imx6sx.c renamed from arch/arm/mach-imx/clk-imx6sx.c +0 -0
drivers/clk/imx/clk-pfd.c renamed from arch/arm/mach-imx/clk-pfd.c +0 -0
drivers/clk/imx/clk-pllv1.c renamed from arch/arm/mach-imx/clk-pllv1.c +0 -0
drivers/clk/imx/clk-pllv2.c renamed from arch/arm/mach-imx/clk-pllv2.c +0 -0
drivers/clk/imx/clk-pllv3.c renamed from arch/arm/mach-imx/clk-pllv3.c +0 -0
drivers/clk/imx/clk-vf610.c renamed from arch/arm/mach-imx/clk-vf610.c +0 -0
drivers/clk/imx/clk.c renamed from arch/arm/mach-imx/clk.c +0 -0
drivers/clk/imx/clk.h renamed from arch/arm/mach-imx/clk.h +0 -0
Signature · 1 line
1.9.1
PATCH 10/11 ARM: imx: move clock drivers into drivers/clk
Quoted 4 lines · Shawn Guo
After the cleanup on clock drivers, they are now ready to be moved into
drivers/clk. Let's move them intodrivers/clk/imxfolder.Signed-off-by Shawn Guo <[email protected]>
Acked-by Stephen Boyd <[email protected]>
Signature · 2 lines
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH 11/11 MAINTAINERS: add new folders into IMX entry
In reply to Shawn GuoAdd new created folders drivers/clk/imx/ and include/soc/imx/ into IMX entry.
Signed-off-by Shawn Guo <[email protected]>
--- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+)
MAINTAINERS +2 -0
@@ -1029,6 +1029,8 @@ F: arch/arm/mach-imx/ F: arch/arm/mach-mxs/ F: arch/arm/boot/dts/imx* F: arch/arm/configs/imx*_defconfig +F: drivers/clk/imx/ +F: include/soc/imx/ ARM/GLOMATION GESBC9312SX MACHINE SUPPORT M: Lennert Buytenhek <[email protected]>
Signature · 1 line
1.9.1