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irqchip: tegra: fix wrong data being passed as the irqdomain chip data

PATCH In review Lucas Stach 4 participants 4 messages May 9, 2015 – May 13, 2015

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#0 lore raw

PATCH 1/1 irqchip: tegra: fix wrong data being passed as the irqdomain chip data

The irq chip functions use the irq chipdata directly as the base register address of the controller, so this should be passed in instead of a pointer to the array address holding the base address.

This fixes Tegra20 CPUidle as now the un-/masking of IRQs at the LIC level works again, but more importantly it fixes the resulting memory corruption.

---
This is an important fix and should go into 4.1.

---
 drivers/irqchip/irq-tegra.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/irqchip/irq-tegra.c +1 -1
index 51c485d..f67bbd8 100644
@@ -264,7 +264,7 @@ static int tegra_ictlr_domain_alloc(struct irq_domain *domain,
 
 		irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
 					      &tegra_ictlr_chip,
-					      &info->base[ictlr]);
+					      info->base[ictlr]);
 	}
 
 	parent_args = *args;
Signature · 1 line
2.1.0
#1 lore raw

[tip:irq/urgent] irqchip: tegra: Set the proper base address in irq chip data

irqchip: tegra: Set the proper base address in irq chip data
Commit-ID:  9cf82e72ec449b4516843377ac7a20abe300c64f
Gitweb:     http://git.kernel.org/tip/9cf82e72ec449b4516843377ac7a20abe300c64f
Author:     Lucas Stach <[email protected]>
AuthorDate: Sat, 9 May 2015 22:06:54 +0200
Committer:  Thomas Gleixner <[email protected]>
CommitDate: Wed, 13 May 2015 10:46:07 +0200

irqchip: tegra: Set the proper base address in irq chip data

The irq chip functions use the irq chipdata directly as the base register address of the controller, so this should be passed in instead of a pointer to the array address holding the base address.

This fixes Tegra20 CPUidle as now the un-/masking of IRQs at the LIC level works again, but more importantly it fixes the resulting memory corruption.

Fixes de3ce0804916 ' irqchip: tegra: Add DT-based support for legacy interrupt controller'
Cc Stephen Warren <[email protected]>
Cc Thierry Reding <[email protected]>
Cc Alexandre Courbot <[email protected]>
Cc Jason Cooper <[email protected]>
Cc Marc Zyngier <[email protected]>
---
 drivers/irqchip/irq-tegra.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/irqchip/irq-tegra.c +1 -1
index 51c485d..f67bbd8 100644
@@ -264,7 +264,7 @@ static int tegra_ictlr_domain_alloc(struct irq_domain *domain,
 
 		irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
 					      &tegra_ictlr_chip,
-					      &info->base[ictlr]);
+					      info->base[ictlr]);
 	}
 
 	parent_args = *args;
Tested-by Acked-by on v1 1/1
#2 lore raw
In reply to Lucas Stach
Quoted 7 lines · Lucas Stach

The irq chip functions use the irq chipdata directly as the base register address of the controller, so this should be passed in instead of a pointer to the array address holding the base address.

This fixes Tegra20 CPUidle as now the un-/masking of IRQs at the LIC level works again, but more importantly it fixes the resulting memory corruption.

Quoted 6 lines

---
This is an important fix and should go into 4.1.

---
 drivers/irqchip/irq-tegra.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

This does indeed fix a boot regression on Tegra20. Unfortunately this is not exposed on any platform that uses PCIe because PCIe needs to disable the CPUidle LP2 state as a workaround for a hardware bug. However, I was able to reproduce the regression on TrimSlice by disabling PCIe, hence keeping CPUidle LP2 activated. I reproduced with v4.1-rc3 and applying this patch on top restores functionality.

Thanks for tracking this down Lucas.

I just noticed that Thomas already applied this while I was testing it, but here goes anyway:

Tested-by on v1 1/1
#3 lore raw
In reply to Lucas Stach
Quoted 6 lines · Lucas Stach

The irq chip functions use the irq chipdata directly as the base register address of the controller, so this should be passed in instead of a pointer to the array address holding the base address.

This fixes Tegra20 CPUidle as now the un-/masking of IRQs at the LIC level works again, but more importantly it fixes the resulting memory corruption.

Tested on NVIDIA Seaboard (which is affected by the bug in the default configuration/DT) with the patch applied on to of 4.1-rc3.