Enable PREEMPT_RT_FULL on arm64

PATCH New Anders Roxell 5 participants 14 messages Apr 27, 2015 – May 18, 2015

Subsystems (3)

perf events arm64 Arm PMU profiling and debugging

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Anders Roxell

author

2015-04-27 20:53 UTC #0 lore raw

v2 cover Enable PREEMPT_RT_FULL on arm64

Hi,

I tested this on an arm64 juno target, and to get that to boot I had to backport the dtb from v4.0-rc6 to v3.18.11-rt7.

Incorporated comments from Sebastian Andrzej Siewior and Ayyappa Ch.

Cheers,
Anders

Anders Roxell (3):
arm64: Mark PMU interrupt IRQF_NO_THREAD
arm64: Allow forced irq threading
arch/arm64: Enable PREEMPT_RT_FULL

 arch/arm64/Kconfig                   |  2 ++
 arch/arm64/include/asm/thread_info.h |  3 +++
 arch/arm64/kernel/asm-offsets.c      |  1 +
 arch/arm64/kernel/entry.S            | 13 ++++++++++---
 arch/arm64/kernel/perf_event.c       |  2 +-
 5 files changed, 17 insertions(+), 4 deletions(-)

Signature · 1 line

2.1.4

Anders Roxell

author

2015-04-27 20:53 UTC #1 lore raw

PATCH v2 1/3 arm64: Mark PMU interrupt IRQF_NO_THREAD

Mark the PMU interrupts as non-threadable, as is the case with arch/arm: d9c3365 ARM: 7813/1: Mark pmu interupt IRQF_NO_THREAD

Signed-off-by Anders Roxell <[email protected]>

---
 arch/arm64/kernel/perf_event.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm64/kernel/perf_event.c +1 -1

index aa29ecb..70dcde6 100644
@@ -461,7 +461,7 @@ armpmu_reserve_hardware(struct arm_pmu *armpmu)
 			}
 
 			err = request_irq(irq, armpmu->handle_irq,
-					IRQF_NOBALANCING,
+					IRQF_NOBALANCING | IRQF_NO_THREAD,
 					"arm-pmu", armpmu);
 			if (err) {
 				pr_err("unable to request IRQ%d for ARM PMU counters\n",

Signature · 1 line

2.1.4

Will Deacon

2015-05-14 15:42 UTC #3 lore raw

PATCH v2 1/3 arm64: Mark PMU interrupt IRQF_NO_THREAD

Quoted 10 lines · Sebastian Andrzej Siewior

Quoted 5 lines · * Anders Roxell | 2015-04-27 22:53:08 [+0200]:
Mark the PMU interrupts as non-threadable, as is the case with arch/arm: d9c3365 ARM: 7813/1: Mark pmu interupt IRQF_NO_THREAD
Suggested-by Sebastian Andrzej Siewior <[email protected]>
Signed-off-by Anders Roxell <[email protected]>
Acked-by Sebastian Andrzej Siewior <[email protected]>
Could this please go via the arm64 tree?

I already acked it:

https://lkml.org/lkml/2015/4/23/161

so it will be picked up for 4.2.

Will

Kevin Hilman

2015-05-14 17:09 UTC #4 lore raw

PATCH v2 1/3 arm64: Mark PMU interrupt IRQF_NO_THREAD

Quoted 10 lines · Will Deacon

Quoted 9 lines · Sebastian Andrzej Siewior
Quoted 5 lines · * Anders Roxell | 2015-04-27 22:53:08 [+0200]:
Mark the PMU interrupts as non-threadable, as is the case with arch/arm: d9c3365 ARM: 7813/1: Mark pmu interupt IRQF_NO_THREAD
Suggested-by Sebastian Andrzej Siewior <[email protected]>
Signed-off-by Anders Roxell <[email protected]>
Acked-by Sebastian Andrzej Siewior <[email protected]>

Quoted 7 lines

Quoted 1 line
Could this please go via the arm64 tree?
I already acked it:
https://lkml.org/lkml/2015/4/23/161
so it will be picked up for 4.2.

Which tree is at applied to? I'm not seeing it in -next, and couldn't find it in any branches of the arm64 tree[1]. Sorry to pester, I'm just looking to cherry-pick it from it's proper upstream for testing with a stable/3.18 based kernel.

Thanks,

Kevin

[1] https://git.kernel.org/cgit/linux/kernel/git/arm64/linux.git/

Will Deacon

2015-05-14 17:10 UTC #5 lore raw

PATCH v2 1/3 arm64: Mark PMU interrupt IRQF_NO_THREAD

Quoted 15 lines · Kevin Hilman

Quoted 14 lines · Will Deacon
Quoted 10 lines · Sebastian Andrzej Siewior
Quoted 5 lines · * Anders Roxell | 2015-04-27 22:53:08 [+0200]:
Mark the PMU interrupts as non-threadable, as is the case with arch/arm: d9c3365 ARM: 7813/1: Mark pmu interupt IRQF_NO_THREAD
Suggested-by Sebastian Andrzej Siewior <[email protected]>
Signed-off-by Anders Roxell <[email protected]>
Acked-by Sebastian Andrzej Siewior <[email protected]>
Could this please go via the arm64 tree?
I already acked it:

Quoted 8 lines

Quoted 3 lines
https://lkml.org/lkml/2015/4/23/161
so it will be picked up for 4.2.
Which tree is at applied to? I'm not seeing it in -next, and couldn't find it in any branches of the arm64 tree[1]. Sorry to pester, I'm just looking to cherry-pick it from it's proper upstream for testing with a stable/3.18 based kernel.

I don't think Catalin has started putting together our for-next/core branch yet, but I'd expect it to appear there when he picks it up.

Will

Kevin Hilman

2015-05-14 17:19 UTC #6 lore raw

PATCH v2 1/3 arm64: Mark PMU interrupt IRQF_NO_THREAD

Quoted 1 line · Will Deacon

On Thu, May 14, 2015 at 06:09:23PM +0100, Kevin Hilman wrote:

[...]

Quoted 7 lines

Quoted 4 lines
Which tree is at applied to? I'm not seeing it in -next, and couldn't find it in any branches of the arm64 tree[1]. Sorry to pester, I'm just looking to cherry-pick it from it's proper upstream for testing with a stable/3.18 based kernel.
I don't think Catalin has started putting together our for-next/core branch yet, but I'd expect it to appear there when he picks it up.

Cool, thanks.

Kevin

Catalin Marinas

maintainer

2015-05-14 17:24 UTC #7 lore raw

PATCH v2 1/3 arm64: Mark PMU interrupt IRQF_NO_THREAD

In reply to Will Deacon

Quoted 20 lines · Will Deacon

Quoted 19 lines · Kevin Hilman
Quoted 17 lines · Will Deacon
Quoted 10 lines · Sebastian Andrzej Siewior
Quoted 5 lines · * Anders Roxell | 2015-04-27 22:53:08 [+0200]:
Mark the PMU interrupts as non-threadable, as is the case with arch/arm: d9c3365 ARM: 7813/1: Mark pmu interupt IRQF_NO_THREAD
Suggested-by Sebastian Andrzej Siewior <[email protected]>
Signed-off-by Anders Roxell <[email protected]>
Acked-by Sebastian Andrzej Siewior <[email protected]>
Could this please go via the arm64 tree?
I already acked it:
https://lkml.org/lkml/2015/4/23/161
so it will be picked up for 4.2.

Quoted 7 lines

Quoted 4 lines
Which tree is at applied to? I'm not seeing it in -next, and couldn't find it in any branches of the arm64 tree[1]. Sorry to pester, I'm just looking to cherry-pick it from it's proper upstream for testing with a stable/3.18 based kernel.
I don't think Catalin has started putting together our for-next/core branch yet, but I'd expect it to appear there when he picks it up.

I'll push it out after -rc4 (i.e. next week).

Signature · 1 line

Catalin

Anders Roxell

author

2015-04-27 20:53 UTC #8 lore raw

PATCH v2 2/3 arm64: Allow forced irq threading

In reply to Anders Roxell

Now its safe to allow forced interrupt threading for arm64, all timer interrupts and the perf interrupt are marked NO_THREAD, as is the case with arch/arm: da0ec6f ARM: 7814/2: Allow forced irq threading

Signed-off-by Anders Roxell <[email protected]>

---
 arch/arm64/Kconfig | 1 +
 1 file changed, 1 insertion(+)

arch/arm64/Kconfig +1 -0

index 9532f8d..3708eec 100644
@@ -61,6 +61,7 @@ config ARM64
 	select HAVE_RCU_TABLE_FREE
 	select HAVE_SYSCALL_TRACEPOINTS
 	select IRQ_DOMAIN
+	select IRQ_FORCED_THREADING
 	select MODULES_USE_ELF_RELA
 	select NO_BOOTMEM
 	select OF

Signature · 1 line

2.1.4

Sebastian Andrzej Siewior

2015-05-14 15:40 UTC #9 lore raw

PATCH v2 2/3 arm64: Allow forced irq threading

Quoted 6 lines · * Anders Roxell | 2015-04-27 22:53:09 [+0200]:

Now its safe to allow forced interrupt threading for arm64, all timer interrupts and the perf interrupt are marked NO_THREAD, as is the case with arch/arm: da0ec6f ARM: 7814/2: Allow forced irq threading
Suggested-by Sebastian Andrzej Siewior <[email protected]>
Signed-off-by Anders Roxell <[email protected]>

Acked-by Sebastian Andrzej Siewior <[email protected]>

Please, could this go via the ARM64 tree?

Quoted 9 lines

---
arch/arm64/Kconfig | 1 +
1 file changed, 1 insertion(+)
arch/arm64/Kconfig +0 -0
index 9532f8d..3708eec 100644

arch/arm64/Kconfig config ARM64 · line 67

Quoted 7 lines

arch/arm64/Kconfig +1 -0

@@ -61,6 +61,7 @@ config ARM64
 	select HAVE_RCU_TABLE_FREE
 	select HAVE_SYSCALL_TRACEPOINTS
 	select IRQ_DOMAIN
+	select IRQ_FORCED_THREADING
 	select MODULES_USE_ELF_RELA
 	select NO_BOOTMEM
 	select OF

Sebastian

Anders Roxell

author

2015-04-27 20:53 UTC #10 lore raw

PATCH v2 3/3 arch/arm64: Enable PREEMPT_RT_FULL

In reply to Anders Roxell

arm64 is missing support for PREEMPT_RT. The main feature which is lacking is support for lazy preemption. The arch-specific entry code, thread information structure definitions, and associated data tables have to be extended to provide this support. Then the Kconfig file has to be extended to indicate the support is available, and also to indicate that support for full RT preemption is now available.

Signed-off-by Anders Roxell <[email protected]>

---
 arch/arm64/Kconfig                   |  1 +
 arch/arm64/include/asm/thread_info.h |  3 +++
 arch/arm64/kernel/asm-offsets.c      |  1 +
 arch/arm64/kernel/entry.S            | 13 ++++++++++---
 4 files changed, 15 insertions(+), 3 deletions(-)

arch/arm64/Kconfig +1 -0

index 3708eec..06995bc 100644
@@ -59,6 +59,7 @@ config ARM64
 	select HAVE_PERF_REGS
 	select HAVE_PERF_USER_STACK_DUMP
 	select HAVE_RCU_TABLE_FREE
+	select HAVE_PREEMPT_LAZY
 	select HAVE_SYSCALL_TRACEPOINTS
 	select IRQ_DOMAIN
 	select IRQ_FORCED_THREADING

arch/arm64/include/asm/thread_info.h +3 -0

index 459bf8e..3e24ea1 100644
@@ -50,6 +50,7 @@ struct thread_info {
 	struct exec_domain	*exec_domain;	/* execution domain */
 	struct restart_block	restart_block;
 	int			preempt_count;	/* 0 => preemptable, <0 => bug */
+	int			preempt_lazy_count;	/* 0 => preemptable, <0 => bug */
 	int			cpu;		/* cpu */
 };

@@ -108,6 +109,7 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_NEED_RESCHED	1
 #define TIF_NOTIFY_RESUME	2	/* callback before returning to user */
 #define TIF_FOREIGN_FPSTATE	3	/* CPU's FP state is not current's */
+#define TIF_NEED_RESCHED_LAZY	4
 #define TIF_NOHZ		7
 #define TIF_SYSCALL_TRACE	8
 #define TIF_SYSCALL_AUDIT	9

@@ -124,6 +126,7 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_NEED_RESCHED	(1 << TIF_NEED_RESCHED)
 #define _TIF_NOTIFY_RESUME	(1 << TIF_NOTIFY_RESUME)
 #define _TIF_FOREIGN_FPSTATE	(1 << TIF_FOREIGN_FPSTATE)
+#define _TIF_NEED_RESCHED_LAZY	(1 << TIF_NEED_RESCHED_LAZY)
 #define _TIF_NOHZ		(1 << TIF_NOHZ)
 #define _TIF_SYSCALL_TRACE	(1 << TIF_SYSCALL_TRACE)
 #define _TIF_SYSCALL_AUDIT	(1 << TIF_SYSCALL_AUDIT)

arch/arm64/kernel/asm-offsets.c +1 -0

index 9a9fce0..f774136 100644
@@ -36,6 +36,7 @@ int main(void)
   BLANK();
   DEFINE(TI_FLAGS,		offsetof(struct thread_info, flags));
   DEFINE(TI_PREEMPT,		offsetof(struct thread_info, preempt_count));
+  DEFINE(TI_PREEMPT_LAZY,	offsetof(struct thread_info, preempt_lazy_count));
   DEFINE(TI_ADDR_LIMIT,		offsetof(struct thread_info, addr_limit));
   DEFINE(TI_TASK,		offsetof(struct thread_info, task));
   DEFINE(TI_EXEC_DOMAIN,	offsetof(struct thread_info, exec_domain));

arch/arm64/kernel/entry.S +10 -3

index 726b910..b324d45 100644
@@ -347,11 +347,16 @@ el1_irq:
 #ifdef CONFIG_PREEMPT
 	get_thread_info tsk
 	ldr	w24, [tsk, #TI_PREEMPT]		// get preempt count
-	cbnz	w24, 1f				// preempt count != 0
+	cbnz	w24, 2f				// preempt count != 0
 	ldr	x0, [tsk, #TI_FLAGS]		// get flags
-	tbz	x0, #TIF_NEED_RESCHED, 1f	// needs rescheduling?
-	bl	el1_preempt
+	tbnz	x0, #TIF_NEED_RESCHED, 1f	// needs rescheduling?
+
+	ldr	w24, [tsk, #TI_PREEMPT_LAZY]	// get preempt lazy count
+	cbnz	w24, 2f				// preempt lazy count != 0
+	tbz	x0, #TIF_NEED_RESCHED_LAZY, 2f	// needs rescheduling?
 1:
+	bl	el1_preempt
+2:
 #endif
 #ifdef CONFIG_TRACE_IRQFLAGS
 	bl	trace_hardirqs_on

@@ -365,6 +370,7 @@ el1_preempt:
 1:	bl	preempt_schedule_irq		// irq en/disable is done inside
 	ldr	x0, [tsk, #TI_FLAGS]		// get new tasks TI_FLAGS
 	tbnz	x0, #TIF_NEED_RESCHED, 1b	// needs rescheduling?
+	tbnz	x0, #TIF_NEED_RESCHED_LAZY, 1b	// needs rescheduling?
 	ret	x24
 #endif

@@ -601,6 +607,7 @@ fast_work_pending:
 	str	x0, [sp, #S_X0]			// returned x0
 work_pending:
 	tbnz	x1, #TIF_NEED_RESCHED, work_resched
+	tbnz	x1, #TIF_NEED_RESCHED_LAZY, work_resched
 	/* TIF_SIGPENDING, TIF_NOTIFY_RESUME or TIF_FOREIGN_FPSTATE case */
 	ldr	x2, [sp, #S_PSTATE]
 	mov	x0, sp				// 'regs'

Signature · 1 line

2.1.4

Sebastian Andrzej Siewior

2015-05-14 15:57 UTC #11 lore raw

PATCH v2 3/3 arch/arm64: Enable PREEMPT_RT_FULL

Quoted 2 lines · * Anders Roxell | 2015-04-27 22:53:10 [+0200]:

arm64 is missing support for PREEMPT_RT. The main feature which is lacking is support for lazy preemption. The arch-specific entry code,

I'm taking this but I am renaming the subject. Lazy preempt is not required by -RT but supporting it benefits it. That means you could run arm64 without it.

Sebastian

Anders Roxell

author

2015-05-15 12:08 UTC #12 lore raw

PATCH v2 3/3 arch/arm64: Enable PREEMPT_RT_FULL

Quoted 8 lines · Sebastian Andrzej Siewior

Quoted 2 lines · * Anders Roxell | 2015-04-27 22:53:10 [+0200]:
arm64 is missing support for PREEMPT_RT. The main feature which is lacking is support for lazy preemption. The arch-specific entry code,
I'm taking this but I am renaming the subject. Lazy preempt is not required by -RT but supporting it benefits it. That means you could run arm64 without it.

Thanks for picking up the patch and fixing the subject, though I was surprised to see the ownership changed.

Cheers,
Anders

Sebastian Andrzej Siewior

2015-05-18 07:18 UTC #13 lore raw

PATCH v2 3/3 arch/arm64: Enable PREEMPT_RT_FULL

Quoted 6 lines · Anders Roxell

Quoted 5 lines · Sebastian Andrzej Siewior
Quoted 2 lines · * Anders Roxell | 2015-04-27 22:53:10 [+0200]:
arm64 is missing support for PREEMPT_RT. The main feature which is lacking is support for lazy preemption. The arch-specific entry code,

Quoted 6 lines

Quoted 3 lines
I'm taking this but I am renaming the subject. Lazy preempt is not required by -RT but supporting it benefits it. That means you could run arm64 without it.
Thanks for picking up the patch and fixing the subject, though I was surprised to see the ownership changed.

Oh. The ownership ship changed only in #3 by mistake. I will fix it, sorry for that.

Quoted 2 lines

Cheers,
Anders

Sebastian