Change snvs rtc and poweroff to use syscon add pwrkey driver
Subsystems (6)
v3 cover Change snvs rtc and poweroff to use syscon add pwrkey driver
From: Frank Li <[email protected]>
Change from v2 to v3
- Keep snvs rtc compatiblity with old dts file
- use general syscon-poweroff instead of modifying snvs-poweroff.c
Change from v1 to v2
- Change simple-bus to simple-mfd
- RTC remove lock.
- RTC remove comments "These register offsets are relative to LP (Low Power) range"
- power off, remove extra space
Frank Li (5):
rtc: arm: imx: snvs: change use syscon to access register
Document: dt: fsl: snvs: change support syscon
arm: dts: imx: update snvs to use syscon access register
document: devicetree: input: imx: i.mx snvs power device tree bindings
arm: dts: imx6sx: enable snvs power key
Robin Gong (1):
input: keyboard: imx: add snvs power key driver
.../devicetree/bindings/crypto/fsl-sec4.txt | 70 +++++-- .../devicetree/bindings/input/snvs-pwrkey.txt | 1 + arch/arm/boot/dts/imx6qdl.dtsi | 19 +- arch/arm/boot/dts/imx6sl.dtsi | 19 +- arch/arm/boot/dts/imx6sx.dtsi | 24 ++- arch/arm/boot/dts/vfxxx.dtsi | 9 +- drivers/input/keyboard/Kconfig | 11 + drivers/input/keyboard/Makefile | 1 + drivers/input/keyboard/snvs_pwrkey.c | 232 +++++++++++++++++++++ drivers/rtc/rtc-snvs.c | 136 ++++++------ 10 files changed, 408 insertions(+), 114 deletions(-) create mode 100644 Documentation/devicetree/bindings/input/snvs-pwrkey.txt create mode 100644 drivers/input/keyboard/snvs_pwrkey.c
Signature · 1 line
1.9.1
PATCH v3 1/6 rtc: arm: imx: snvs: change use syscon to access register
From: Frank Li <[email protected]>
snvs included rtc, on/off key, power-off module
change to syscon to access register
Signed-off-by Frank Li <[email protected]>
--- drivers/rtc/rtc-snvs.c | 136 +++++++++++++++++++++++++------------------------ 1 file changed, 70 insertions(+), 66 deletions(-)
drivers/rtc/rtc-snvs.c +70 -66
@@ -18,6 +18,8 @@#include <linux/platform_device.h> #include <linux/rtc.h> #include <linux/clk.h> +#include <linux/mfd/syscon.h> +#include <linux/regmap.h> /* These register offsets are relative to LP (Low Power) range */ #define SNVS_LPCR 0x04
@@ -37,31 +39,35 @@struct snvs_rtc_data {struct rtc_device *rtc; -void __iomem *ioaddr; +struct regmap *regmap; +int offset;int irq; -spinlock_t lock;struct clk *clk; }; -static u32 rtc_read_lp_counter (void __iomem *ioaddr) +static u32 rtc_read_lp_counter (struct snvs_rtc_data *snvs) {u64 read1, read2; - +u32 val;do { - read1 =readl (ioaddr +SNVS_LPSRTCMR ); +regmap_read (snvs->regmap, snvs->offset +SNVS_LPSRTCMR , &val); + read1 = val; read1 <<=32 ; - read1 |=readl (ioaddr +SNVS_LPSRTCLR ); +regmap_read (snvs->regmap, snvs->offset +SNVS_LPSRTCLR , &val); + read1 |= val; - read2 =readl (ioaddr +SNVS_LPSRTCMR ); +regmap_read (snvs->regmap, snvs->offset +SNVS_LPSRTCMR , &val); + read2 = val; read2 <<=32 ; - read2 |=readl (ioaddr +SNVS_LPSRTCLR ); +regmap_read (snvs->regmap, snvs->offset +SNVS_LPSRTCLR , &val); + read2 |= val; }while (read1 != read2);/* Convert 47-bit counter to 32-bit raw second count */ return (u32) (read1 >>CNTR_TO_SECS_SH ); } -static void rtc_write_sync_lp (void __iomem *ioaddr) +static void rtc_write_sync_lp (struct snvs_rtc_data *snvs) {u32 count1, count2, count3;int i;
@@ -69,15 +75,15 @@ static void rtc_write_sync_lp(void __iomem *ioaddr)/* Wait for 3 CKIL cycles */ for (i =0 ; i <3 ; i++) {do { - count1 =readl (ioaddr +SNVS_LPSRTCLR ); - count2 =readl (ioaddr +SNVS_LPSRTCLR ); +regmap_read (snvs->regmap, snvs->offset +SNVS_LPSRTCLR , &count1); +regmap_read (snvs->regmap, snvs->offset +SNVS_LPSRTCLR , &count2); }while (count1 != count2);/* Now wait until counter value changes */ do {do { - count2 =readl (ioaddr +SNVS_LPSRTCLR ); - count3 =readl (ioaddr +SNVS_LPSRTCLR ); +regmap_read (snvs->regmap, snvs->offset +SNVS_LPSRTCLR , &count2); +regmap_read (snvs->regmap, snvs->offset +SNVS_LPSRTCLR , &count3); }while (count2 != count3); }while (count3 == count1); }
@@ -85,23 +91,14 @@ static void rtc_write_sync_lp(void __iomem *ioaddr)static int snvs_rtc_enable (struct snvs_rtc_data *data,bool enable) { -unsigned long flags;int timeout =1000 ;u32 lpcr; -spin_lock_irqsave (&data->lock, flags); - - lpcr =readl (data->ioaddr +SNVS_LPCR ); -if (enable) - lpcr |=SNVS_LPCR_SRTC_ENV ; -else - lpcr &= ~SNVS_LPCR_SRTC_ENV ; -writel (lpcr, data->ioaddr +SNVS_LPCR ); - -spin_unlock_irqrestore (&data->lock, flags); +regmap_update_bits (data->regmap, data->offset +SNVS_LPCR ,SNVS_LPCR_SRTC_ENV , + enable ?SNVS_LPCR_SRTC_ENV :0 );while (--timeout) { - lpcr =readl (data->ioaddr +SNVS_LPCR ); +regmap_read (data->regmap, data->offset +SNVS_LPCR , &lpcr);if (enable) {if (lpcr &SNVS_LPCR_SRTC_ENV )
@@ -121,7 +118,7 @@ static int snvs_rtc_enable(struct snvs_rtc_data *data, bool enable)static int snvs_rtc_read_time (struct device *dev,struct rtc_time *tm) {struct snvs_rtc_data *data =dev_get_drvdata (dev); -unsigned long time =rtc_read_lp_counter (data->ioaddr); +unsigned long time =rtc_read_lp_counter (data);rtc_time_to_tm (time, tm);
@@ -139,8 +136,8 @@ static int snvs_rtc_set_time(struct device *dev, struct rtc_time *tm)snvs_rtc_enable (data, false);/* Write 32-bit time to 47-bit timer, leaving 15 LSBs blank */ -writel (time <<CNTR_TO_SECS_SH , data->ioaddr +SNVS_LPSRTCLR ); -writel (time >> (32 -CNTR_TO_SECS_SH ), data->ioaddr +SNVS_LPSRTCMR ); +regmap_write (data->regmap, data->offset +SNVS_LPSRTCLR , time <<CNTR_TO_SECS_SH ); +regmap_write (data->regmap, data->offset +SNVS_LPSRTCMR , time >> (32 -CNTR_TO_SECS_SH ));/* Enable RTC again */ snvs_rtc_enable (data, true);
@@ -153,10 +150,10 @@ static int snvs_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)struct snvs_rtc_data *data =dev_get_drvdata (dev);u32 lptar, lpsr; - lptar =readl (data->ioaddr +SNVS_LPTAR ); +regmap_read (data->regmap, data->offset +SNVS_LPTAR , &lptar);rtc_time_to_tm (lptar, &alrm->time); - lpsr =readl (data->ioaddr +SNVS_LPSR ); +regmap_read (data->regmap, data->offset +SNVS_LPSR , &lpsr); alrm->pending = (lpsr &SNVS_LPSR_LPTA ) ?1 :0 ;return 0 ;
@@ -165,21 +162,12 @@ static int snvs_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)static int snvs_rtc_alarm_irq_enable (struct device *dev,unsigned int enable) {struct snvs_rtc_data *data =dev_get_drvdata (dev); -u32 lpcr; -unsigned long flags; - -spin_lock_irqsave (&data->lock, flags); - - lpcr =readl (data->ioaddr +SNVS_LPCR ); -if (enable) - lpcr |= (SNVS_LPCR_LPTA_EN |SNVS_LPCR_LPWUI_EN ); -else - lpcr &= ~(SNVS_LPCR_LPTA_EN |SNVS_LPCR_LPWUI_EN ); -writel (lpcr, data->ioaddr +SNVS_LPCR ); -spin_unlock_irqrestore (&data->lock, flags); +regmap_update_bits (data->regmap, data->offset +SNVS_LPCR , + (SNVS_LPCR_LPTA_EN |SNVS_LPCR_LPWUI_EN ), + enable ? (SNVS_LPCR_LPTA_EN |SNVS_LPCR_LPWUI_EN ) :0 ); -rtc_write_sync_lp (data->ioaddr); +rtc_write_sync_lp (data);return 0 ; }
@@ -189,24 +177,14 @@ static int snvs_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)struct snvs_rtc_data *data =dev_get_drvdata (dev);struct rtc_time *alrm_tm = &alrm->time;unsigned long time; -unsigned long flags; -u32 lpcr;rtc_tm_to_time (alrm_tm, &time); -spin_lock_irqsave (&data->lock, flags); - -/* Have to clear LPTA_EN before programming new alarm time in LPTAR */ - lpcr =readl (data->ioaddr +SNVS_LPCR ); - lpcr &= ~SNVS_LPCR_LPTA_EN ; -writel (lpcr, data->ioaddr +SNVS_LPCR ); - -spin_unlock_irqrestore (&data->lock, flags); - -writel (time, data->ioaddr +SNVS_LPTAR ); +regmap_update_bits (data->regmap, data->offset +SNVS_LPCR ,SNVS_LPCR_LPTA_EN ,0 ); +regmap_write (data->regmap, data->offset +SNVS_LPTAR , time);/* Clear alarm interrupt status bit */ -writel (SNVS_LPSR_LPTA , data->ioaddr +SNVS_LPSR ); +regmap_write (data->regmap, data->offset +SNVS_LPSR ,SNVS_LPSR_LPTA );return snvs_rtc_alarm_irq_enable (dev, alrm->enabled); }
@@ -226,7 +204,7 @@ static irqreturn_t snvs_rtc_irq_handler(int irq, void *dev_id)u32 lpsr;u32 events =0 ; - lpsr =readl (data->ioaddr +SNVS_LPSR ); +regmap_read (data->regmap, data->offset +SNVS_LPSR , &lpsr);if (lpsr &SNVS_LPSR_LPTA ) { events |= (RTC_AF |RTC_IRQF );
@@ -238,25 +216,53 @@ static irqreturn_t snvs_rtc_irq_handler(int irq, void *dev_id) }/* clear interrupt status */ -writel (lpsr, data->ioaddr +SNVS_LPSR ); +regmap_write (data->regmap, data->offset +SNVS_LPSR , lpsr);return events ?IRQ_HANDLED :IRQ_NONE ; } +static const struct regmap_config snvs_rtc_config = { + .reg_bits =32 , + .val_bits =32 , + .reg_stride =4 , +}; +static int snvs_rtc_probe (struct platform_device *pdev) {struct snvs_rtc_data *data;struct resource *res;int ret; +struct device_node *snvs_np; +void __iomem *mmio; data =devm_kzalloc (&pdev->dev,sizeof (*data),GFP_KERNEL );if (!data)return -ENOMEM ; - res =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); - data->ioaddr =devm_ioremap_resource (&pdev->dev, res); -if (IS_ERR (data->ioaddr)) -return PTR_ERR (data->ioaddr); + snvs_np =of_get_parent (pdev->dev.of_node); +if (!snvs_np) +return -ENODEV ; + +if (of_device_is_compatible (snvs_np,"syscon" )) { + data->regmap =syscon_node_to_regmap (snvs_np); + data->offset =0x34 ; + }else { +pr_warning ("snvs rtc: you use old dts file, please update it\n" ); + res =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); + + mmio =devm_ioremap_resource (&pdev->dev, res); +if (IS_ERR (mmio)) +return PTR_ERR (mmio); + + data->regmap =devm_regmap_init_mmio (&pdev->dev, mmio, &snvs_rtc_config); + } + +of_node_put (snvs_np); + +if (!data->regmap) { +pr_err ("Can't snvs syscon\n" ); +return -ENODEV ; + } data->irq =platform_get_irq (pdev,0 );if (data->irq <0 )
@@ -276,13 +282,11 @@ static int snvs_rtc_probe(struct platform_device *pdev)platform_set_drvdata (pdev, data); -spin_lock_init (&data->lock); -/* Initialize glitch detect */ -writel (SNVS_LPPGDR_INIT , data->ioaddr +SNVS_LPPGDR ); +regmap_write (data->regmap, data->offset +SNVS_LPPGDR ,SNVS_LPPGDR_INIT );/* Clear interrupt status */ -writel (0xffffffff , data->ioaddr +SNVS_LPSR ); +regmap_write (data->regmap, data->offset +SNVS_LPSR ,0xffffffff );/* Enable RTC */ snvs_rtc_enable (data, true);
Signature · 1 line
1.9.1
PATCH v3 1/6 rtc: arm: imx: snvs: change use syscon to access register
Hi,
This looks good to me, a few nits below
drivers/rtc/rtc-snvs.c static int snvs_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) · line 167
Quoted 3 lines · Frank.Li at freescale.com
drivers/rtc/rtc-snvs.c +2
-1-spin_unlock_irqrestore (&data->lock, flags); + regmap_update_bits(data->regmap, data->offset + SNVS_LPCR, + (SNVS_LPCR_LPTA_EN | SNVS_LPCR_LPWUI_EN),
That line is not properly aligned (missing one space)
[...]
drivers/rtc/rtc-snvs.c static irqreturn_t snvs_rtc_irq_handler(int irq, void *dev_id) · line 250
Quoted 5 lines
drivers/rtc/rtc-snvs.c +5
-0+if (of_device_is_compatible (snvs_np,"syscon" )) { + data->regmap =syscon_node_to_regmap (snvs_np); + data->offset =0x34 ; + }else { +pr_warning ("snvs rtc: you use old dts file, please update it\n" );
This should be pr_warn()
Signature · 3 lines
Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com
PATCH v3 1/6 rtc: arm: imx: snvs: change use syscon to access register
Quoted 12 lines · Alexandre Belloni
Hi,
This looks good to me, a few nits below
drivers/rtc/rtc-snvs.c static int snvs_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) · line 167
Quoted 3 lines · Frank.Li at freescale.com
drivers/rtc/rtc-snvs.c +2
-1-spin_unlock_irqrestore (&data->lock, flags); + regmap_update_bits(data->regmap, data->offset + SNVS_LPCR, + (SNVS_LPCR_LPTA_EN | SNVS_LPCR_LPWUI_EN),That line is not properly aligned (missing one space)
[...]
Quoted 7 lines
drivers/rtc/rtc-snvs.c static irqreturn_t snvs_rtc_irq_handler(int irq, void *dev_id) · line 250
Quoted 5 lines
drivers/rtc/rtc-snvs.c +5
-0+if (of_device_is_compatible (snvs_np,"syscon" )) { + data->regmap =syscon_node_to_regmap (snvs_np); + data->offset =0x34 ; + }else { +pr_warning ("snvs rtc: you use old dts file, please update it\n" );This should be
pr_warn()
It should be dev_warn().
Shawn
PATCH v3 2/6 Document: dt: fsl: snvs: change support syscon
In reply to Frank.Li at freescale.comFrom: Frank Li <[email protected]>
snvs actually is multi fucntion driver.
Change to use syscon to access register.
Signed-off-by Frank Li <[email protected]>
--- .../devicetree/bindings/crypto/fsl-sec4.txt | 28 ++++++++++++---------- 1 file changed, 15 insertions(+), 13 deletions(-)
Documentation/devicetree/bindings/crypto/fsl-sec4.txt +15 -13
@@ -288,12 +288,13 @@ Secure Non-Volatile Storage (SNVS) Node Node defines address range and the associated interrupt for the SNVS function. This function monitors security state information & reports - security violations. + security violations. This also included rtc, + system power off and ON/OFF key. - compatible Usage: required Value type: <string> - Definition: Must include "fsl,sec-v4.0-mon". + Definition: Must include "fsl,sec-v4.0-mon" and "syscon". - reg Usage: required
@@ -324,7 +325,7 @@ Secure Non-Volatile Storage (SNVS) Node the child address, parent address, & length. - interrupts - Usage: required + Usage: optional Value type: <prop_encoded-array> Definition: Specifies the interrupts generated by this device. The value of the interrupts property
@@ -341,7 +342,7 @@ Secure Non-Volatile Storage (SNVS) Node EXAMPLE sec_mon at 314000 { - compatible = "fsl,sec-v4.0-mon"; + compatible = "fsl,sec-v4.0-mon", "syscon"; reg = <0x314000 0x1000>; ranges = <0 0x314000 0x1000>; interrupt-parent = <&mpic>;
@@ -358,16 +359,19 @@ Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node Value type: <string> Definition: Must include "fsl,sec-v4.0-mon-rtc-lp". - - reg + - interrupts Usage: required - Value type: <prop-encoded-array> - Definition: A standard property. Specifies the physical - address and length of the SNVS LP configuration registers. + Value type: <prop_encoded-array> + Definition: Specifies the interrupts generated by this + device. The value of the interrupts property + consists of one interrupt specifier. The format + of the specifier is defined by the binding document + describing the node's interrupt parent. EXAMPLE - sec_mon_rtc_lp at 314000 { + sec_mon_rtc_lp at 1 { compatible = "fsl,sec-v4.0-mon-rtc-lp"; - reg = <0x34 0x58>; + interrupts = <93 2>; }; =====================================================================
@@ -443,12 +447,10 @@ FULL EXAMPLE compatible = "fsl,sec-v4.0-mon"; reg = <0x314000 0x1000>; ranges = <0 0x314000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <93 2>; sec_mon_rtc_lp at 34 { compatible = "fsl,sec-v4.0-mon-rtc-lp"; - reg = <0x34 0x58>; + interrupts = <93 2>; }; };
Signature · 1 line
1.9.1
PATCH v3 3/6 arm: dts: imx: update snvs to use syscon access register
In reply to Frank.Li at freescale.comFrom: Frank Li <[email protected]>
snvs is MFP device. Change dts to use syscon to allocate register resource. snvs power off also switch to common syscon-poweroff
Signed-off-by Frank Li <[email protected]>
--- arch/arm/boot/dts/imx6qdl.dtsi | 19 +++++++++---------- arch/arm/boot/dts/imx6sl.dtsi | 19 +++++++++---------- arch/arm/boot/dts/imx6sx.dtsi | 17 ++++++++--------- arch/arm/boot/dts/vfxxx.dtsi | 9 +++------ 4 files changed, 29 insertions(+), 35 deletions(-)
arch/arm/boot/dts/imx6qdl.dtsi +9 -10
@@ -686,22 +686,21 @@ fsl,anatop = <&anatop>; }; - snvs at 020cc000 { - compatible = "fsl,sec-v4.0-mon", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x020cc000 0x4000>; + snvs:snvs at 020cc000 { + compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; + reg = <0x020cc000 0x4000>; - snvs_rtc: snvs-rtc-lp at 34 { + snvs_rtc: snvs-rtc-lp { compatible = "fsl,sec-v4.0-mon-rtc-lp"; - reg = <0x34 0x58>; interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>, <0 20 IRQ_TYPE_LEVEL_HIGH>; }; - snvs_poweroff: snvs-poweroff at 38 { - compatible = "fsl,sec-v4.0-poweroff"; - reg = <0x38 0x4>; + snvs_poweroff: snvs-poweroff { + compatible = "syscon-poweroff"; + regmap = <&snvs>; + offset = <0x38>; + mask = <0x60>; status = "disabled"; }; };
arch/arm/boot/dts/imx6sl.dtsi +9 -10
@@ -563,22 +563,21 @@ fsl,anatop = <&anatop>; }; - snvs at 020cc000 { - compatible = "fsl,sec-v4.0-mon", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x020cc000 0x4000>; + snvs:snvs at 020cc000 { + compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; + reg = <0x020cc000 0x4000>; - snvs_rtc: snvs-rtc-lp at 34 { + snvs_rtc: snvs-rtc-lp { compatible = "fsl,sec-v4.0-mon-rtc-lp"; - reg = <0x34 0x58>; interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>, <0 20 IRQ_TYPE_LEVEL_HIGH>; }; - snvs_poweroff: snvs-poweroff at 38 { - compatible = "fsl,sec-v4.0-poweroff"; - reg = <0x38 0x4>; + snvs_poweroff: snvs-poweroff { + compatible = "syscon-poweroff"; + regmap = <&snvs>; + offset = <0x38>; + mask = <0x60>; status = "disabled"; }; };
arch/arm/boot/dts/imx6sx.dtsi +8 -9
@@ -662,20 +662,19 @@ }; snvs: snvs at 020cc000 { - compatible = "fsl,sec-v4.0-mon", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x020cc000 0x4000>; + compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; + reg = <0x020cc000 0x4000>; - snvs_rtc: snvs-rtc-lp at 34 { + snvs_rtc: snvs-rtc-lp { compatible = "fsl,sec-v4.0-mon-rtc-lp"; - reg = <0x34 0x58>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; }; - snvs_poweroff: snvs-poweroff at 38 { - compatible = "fsl,sec-v4.0-poweroff"; - reg = <0x38 0x4>; + snvs_poweroff: snvs-poweroff { + compatible = "syscon-poweroff"; + regmap = <&snvs>; + offset = <0x38>; + mask = <0x60>; status = "disabled"; }; };
arch/arm/boot/dts/vfxxx.dtsi +3 -6
@@ -404,14 +404,11 @@ }; snvs0: snvs at 400a7000 { - compatible = "fsl,sec-v4.0-mon", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x400a7000 0x2000>; + compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; + reg = <0x400a7000 0x2000>; - snvsrtc: snvs-rtc-lp at 34 { + snvsrtc: snvs-rtc-lp { compatible = "fsl,sec-v4.0-mon-rtc-lp"; - reg = <0x34 0x58>; interrupts = <100 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks VF610_CLK_SNVS>; clock-names = "snvs-rtc";
Signature · 1 line
1.9.1
PATCH v3 4/6 input: keyboard: imx: add snvs power key driver
In reply to Frank.Li at freescale.comFrom: Robin Gong <[email protected]>
add snvs power key driver.
It work in imx chips after i.mx6sx
ON/OFF key used power on/off whole system.
This driver make it wakeup from suspend state when short press ON/OFF key.
Long time press will trig SNVS power off chip without software intervention.
Signed-off-by Robin Gong <[email protected]>
Signed-off-by Frank Li <[email protected]>
--- drivers/input/keyboard/Kconfig | 11 ++ drivers/input/keyboard/Makefile | 1 + drivers/input/keyboard/snvs_pwrkey.c | 232 +++++++++++++++++++++++++++++++++++ 3 files changed, 244 insertions(+) create mode 100644 drivers/input/keyboard/snvs_pwrkey.c
drivers/input/keyboard/Kconfig +11 -0
@@ -400,6 +400,17 @@ config KEYBOARD_MPR121 To compile this driver as a module, choose M here: the module will be called mpr121_touchkey. +config KEYBOARD_SNVS_PWRKEY + tristate "IMX SNVS Power Key Driver" + depends on SOC_IMX6SX + depends on OF + help + This is the snvs powerkey driver for the Freescale i.MX application + processors that are newer than i.MX6 SX. + + To compile this driver as a module, choose M here; the + module will be called snvs_pwrkey. + config KEYBOARD_IMX tristate "IMX keypad support" depends on ARCH_MXC
drivers/input/keyboard/Makefile +1 -0
@@ -51,6 +51,7 @@ obj-$(CONFIG_KEYBOARD_QT1070) += qt1070.o obj-$(CONFIG_KEYBOARD_QT2160) += qt2160.o obj-$(CONFIG_KEYBOARD_SAMSUNG) += samsung-keypad.o obj-$(CONFIG_KEYBOARD_SH_KEYSC) += sh_keysc.o +obj-$(CONFIG_KEYBOARD_SNVS_PWRKEY) += snvs_pwrkey.o obj-$(CONFIG_KEYBOARD_SPEAR) += spear-keyboard.o obj-$(CONFIG_KEYBOARD_STMPE) += stmpe-keypad.o obj-$(CONFIG_KEYBOARD_STOWAWAY) += stowaway.o
drivers/input/keyboard/snvs_pwrkey.c new file +232 -0
232 lines not on this page · raw message
Signature · 1 line
1.9.1
PATCH v3 5/6 document: devicetree: input: imx: i.mx snvs power device tree bindings
In reply to Frank.Li at freescale.comFrom: Frank Li <[email protected]>
The snvs-pwrkey is designed to enable POWER key function which controlled by SNVS ONOFF. the driver can report the status of POWER key and wakeup system if pressed after system suspend.
Signed-off-by Frank Li <[email protected]>
Signed-off-by Robin Gong <[email protected]>
--- .../devicetree/bindings/crypto/fsl-sec4.txt | 42 ++++++++++++++++++++++ .../devicetree/bindings/input/snvs-pwrkey.txt | 1 + 2 files changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/input/snvs-pwrkey.txt
Documentation/devicetree/bindings/crypto/fsl-sec4.txt +42 -0
@@ -375,6 +375,41 @@ EXAMPLE }; ===================================================================== +System ON/OFF key driver + + The snvs-pwrkey is designed to enable POWER key function which controlled + by SNVS ONOFF, the driver can report the status of POWER key and wakeup + system if pressed after system suspend. + + - compatible: + Usage: required + Value type: <string> + Definition: Mush include "fsl,sec-v4.0-pwrkey". + + - interrupts: + Usage: required + Value type: <prop_encoded-array> + Definition: The SNVS ON/OFF interrupt number to the CPU(s). + + - linux,keycode: + Usage: option + Value type: <int> + Definition: Keycode to emit, KEY_POWER by default. + + - wakeup: + Usage: option + Value type: <boo> + Definition: Button can wake-up the system + +EXAMPLE: + snvs-pwrkey at 0x020cc000 { + compatible = "fsl,sec-v4.0-pwrkey"; + interrupts = <0 4 0x4> + linux,keycode = <116>; /* KEY_POWER */ + wakeup; + }; + +===================================================================== FULL EXAMPLE crypto: crypto at 300000 {
@@ -452,6 +487,13 @@ FULL EXAMPLE compatible = "fsl,sec-v4.0-mon-rtc-lp"; interrupts = <93 2>; }; + + snvs-pwrkey at 0x020cc000 { + compatible = "fsl,sec-v4.0-pwrkey"; + interrupts = <0 4 0x4>; + linux,keycode = <116>; /* KEY_POWER */ + wakeup; + }; }; =====================================================================
Documentation/devicetree/bindings/input/snvs-pwrkey.txt new file +1 -0
@@ -0,0 +1 @@ +See Documentation/devicetree/bindings/crypto/fsl-sec4.txt
Signature · 1 line
1.9.1
PATCH v3 6/6 arm: dts: imx6sx: enable snvs power key
In reply to Frank.Li at freescale.comFrom: Frank Li <[email protected]>
enable snvs ONOFF power key support
Signed-off-by Frank Li <[email protected]>
--- arch/arm/boot/dts/imx6sx.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)
arch/arm/boot/dts/imx6sx.dtsi +7 -0
@@ -677,6 +677,13 @@ mask = <0x60>; status = "disabled"; }; + + snvs_pwrkey: snvs-powerkey { + compatible = "fsl,sec-v4.0-pwrkey"; + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; + linux,keycode = <116>; /* KEY_POWER */ + wakeup; + }; }; epit1: epit at 020d0000 {
Signature · 1 line
1.9.1