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clk: sunxi: Add support for the usb-clk on sun8i a23 and a33 SoCs

PATCH New Hans de Goede 4 participants 7 messages Jun 1, 2015 – Jun 2, 2015

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Device tree bindings Common clk Arm/Allwinner sunXi SoC support Arm/Allwinner SoC Clock Support
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Hans de Goede

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#0 lore raw

PATCH 1/2 clk: sunxi: Add support for the usb-clk on sun8i a23 and a33 SoCs

The usb-clk on sun8i a23 and a33 SoCs is similar to the ones found on sun6i-a31 SoCs but instead of a 3th phy the a23 / a33 have a hsic interface which gets enabled by almost the same bits as used on the a31 for the 3th phy, but not exactly the same bits so we need a new compatible for this.

Signed-off-by Hans de Goede <[email protected]>
---
 Documentation/devicetree/bindings/clock/sunxi.txt |  1 +
 drivers/clk/sunxi/clk-usb.c                       | 11 +++++++++++
 2 files changed, 12 insertions(+)
Documentation/devicetree/bindings/clock/sunxi.txt +1 -0
index 4fa11af..8a47b77 100644
@@ -67,6 +67,7 @@ Required properties:
 	"allwinner,sun4i-a10-usb-clk" - for usb gates + resets on A10 / A20
 	"allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13
 	"allwinner,sun6i-a31-usb-clk" - for usb gates + resets on A31
+	"allwinner,sun8i-a23-usb-clk" - for usb gates + resets on A23
 	"allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80
 	"allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80
drivers/clk/sunxi/clk-usb.c +11 -0
index a86ed2f..3a25f95 100644
@@ -204,6 +204,17 @@ static void __init sun6i_a31_usb_setup(struct device_node *node)
 }
 CLK_OF_DECLARE(sun6i_a31_usb, "allwinner,sun6i-a31-usb-clk", sun6i_a31_usb_setup);
 
+static const struct usb_clk_data sun8i_a23_usb_clk_data __initconst = {
+	.clk_mask = BIT(16) | BIT(11) | BIT(10) | BIT(9) | BIT(8),
+	.reset_mask = BIT(2) | BIT(1) | BIT(0),
+};
+
+static void __init sun8i_a23_usb_setup(struct device_node *node)
+{
+	sunxi_usb_clk_setup(node, &sun8i_a23_usb_clk_data, &sun4i_a10_usb_lock);
+}
+CLK_OF_DECLARE(sun8i_a23_usb, "allwinner,sun8i-a23-usb-clk", sun8i_a23_usb_setup);
+
 static const struct usb_clk_data sun9i_a80_usb_mod_data __initconst = {
 	.clk_mask = BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1),
 	.reset_mask = BIT(19) | BIT(18) | BIT(17),
Signature · 1 line
2.4.2
author
#1 lore raw

PATCH 2/2 ARM: dts: sun8i: Add usb_clk node for a23/a33

Add an usb_clk node for a23/a33.

Signed-off-by Hans de Goede <[email protected]>
---
 arch/arm/boot/dts/sun8i-a23-a33.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)
arch/arm/boot/dts/sun8i-a23-a33.dtsi +10 -0
index c73d1d1..44dd7155 100644
@@ -248,6 +248,16 @@
 					     "mmc2_output",
 					     "mmc2_sample";
 		};
+
+		usb_clk: clk at 01c200cc {
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+			compatible = "allwinner,sun8i-a23-usb-clk";
+			reg = <0x01c200cc 0x4>;
+			clocks = <&osc24M>;
+			clock-output-names = "usb_phy0", "usb_phy1", "hsic",
+					     "hsic_12m", "usb_ohci0";
+		};
 	};
 
 	soc at 01c00000 {
Signature · 1 line
2.4.2
#2 lore raw

PATCH 2/2 ARM: dts: sun8i: Add usb_clk node for a23/a33

Quoted 14 lines · Hans de Goede

Add an usb_clk node for a23/a33.

Signed-off-by Hans de Goede <[email protected]>
---
 arch/arm/boot/dts/sun8i-a23-a33.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)
arch/arm/boot/dts/sun8i-a23-a33.dtsi +0 -0
index c73d1d1..44dd7155 100644
@@ -248,6 +248,16 @@
                                             "mmc2_output",
                                             "mmc2_sample";

arch/arm/boot/dts/sun8i-a23-a33.dtsi line 259

Quoted 10 lines
arch/arm/boot/dts/sun8i-a23-a33.dtsi +9 -0
                };
+
+               usb_clk: clk at 01c200cc {
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       compatible = "allwinner,sun8i-a23-usb-clk";
+                       reg = <0x01c200cc 0x4>;
+                       clocks = <&osc24M>;
+                       clock-output-names = "usb_phy0", "usb_phy1", "hsic",
+                                            "hsic_12m", "usb_ohci0";

Minor nitpicks:

"hsic_12m" should be "hsic_12M". And maybe add the "usb_" prefix to the hsic clocks as well?

Otherwise,

Reviewed-by Chen-Yu Tsai <[email protected]>

P.S. There's a new linux-clk mailing list that these 2 patches should be sent to as well.

Quoted 11 lines
arch/arm/boot/dts/sun8i-a23-a33.dtsi +1 -1
+               };
        };
 
        soc at 01c00000 {
--

2.4.2

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#3 lore raw

PATCH 2/2 ARM: dts: sun8i: Add usb_clk node for a23/a33

In reply to Hans de Goede
Quoted 3 lines · Hans de Goede

Add an usb_clk node for a23/a33.

Signed-off-by Hans de Goede <[email protected]>

Applied with Chen-Yu's comments.

Thanks!
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#4 lore raw

PATCH 1/2 clk: sunxi: Add support for the usb-clk on sun8i a23 and a33 SoCs

In reply to Hans de Goede

Hi Hans,

Quoted 5 lines · Hans de Goede

The usb-clk on sun8i a23 and a33 SoCs is similar to the ones found on sun6i-a31 SoCs but instead of a 3th phy the a23 / a33 have a hsic interface which gets enabled by almost the same bits as used on the a31 for the 3th phy, but not exactly the same bits so we need a new compatible for this.

Minor spelling note: it's "3rd" not "3th".

Thanks,

Signature · 4 lines
Julian Calaby

Email: julian.calaby at gmail.com
Profile: http://www.google.com/profiles/julian.calaby/
#5 lore raw

PATCH 1/2 clk: sunxi: Add support for the usb-clk on sun8i a23 and a33 SoCs

In reply to Hans de Goede
Quoted 7 lines · Hans de Goede

The usb-clk on sun8i a23 and a33 SoCs is similar to the ones found on sun6i-a31 SoCs but instead of a 3th phy the a23 / a33 have a hsic interface which gets enabled by almost the same bits as used on the a31 for the 3th phy, but not exactly the same bits so we need a new compatible for this.

Signed-off-by Hans de Goede <[email protected]>

I have almost the exact same patches in my old sun8i-otg branch. I was planning to rebase them onto the new musb patches today, but since you beat me to them,

Reviewed-by Chen-Yu Tsai <[email protected]>

My old patches are in https://github.com/wens/linux/tree/sun8i-usb
I planned on testing EHCI/OHCI first before posting anything.

Regards
ChenYu

Quoted 4 lines
---
 Documentation/devicetree/bindings/clock/sunxi.txt |  1 +
 drivers/clk/sunxi/clk-usb.c                       | 11 +++++++++++
 2 files changed, 12 insertions(+)
#6 lore raw

PATCH 1/2 clk: sunxi: Add support for the usb-clk on sun8i a23 and a33 SoCs

In reply to Hans de Goede
Quoted 7 lines · Hans de Goede

The usb-clk on sun8i a23 and a33 SoCs is similar to the ones found on sun6i-a31 SoCs but instead of a 3th phy the a23 / a33 have a hsic interface which gets enabled by almost the same bits as used on the a31 for the 3th phy, but not exactly the same bits so we need a new compatible for this.

Signed-off-by Hans de Goede <[email protected]>

Applied with Julian spelling fix.

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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