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ARM: DRA7: add display support

PATCH New Tomi Valkeinen 4 participants 29 messages Jun 1, 2015 – Jun 4, 2015

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#0 lore raw

v4 cover ARM: DRA7: add display support

Hi,

This series adds the arch/arm/ side of the display support for DRA7 (DRA72x, DRA74x, AM54xx) SoCs. Also support for HDMI output on x15 and DRA72 EVM boards is added.

The difference to v4 is that the DESHDCP patches were moved to the beginning of the series to fix boot issues if bisecting.

Tomi

Tomi Valkeinen (10):
arm: dra7: add DESHDCP clock
CLK: TI: always enable DESHDCP clock
arm/dts: dra7xx: add 'ti,set-rate-parent' for dss_dss_clk
ARM: DRA7: hwmod: add DMM hwmod description
ARM: DRA7: hwmod: set DSS submodule parent hwmods
ARM: OMAP: display: change compat names to array
ARM: OMAP2+: display: detect DRA7 DSS
arm/dts: dra7.dtsi: add DSS support
arm/dts: dra72-evm.dts: add HDMI
arm/dts: am57xx-beagle-x15.dts: add HDMI

 arch/arm/boot/dts/am57xx-beagle-x15.dts   |  81 ++++++++++++++++++++++
 arch/arm/boot/dts/dra7.dtsi               |  43 ++++++++++++
 arch/arm/boot/dts/dra72-evm.dts           | 110 ++++++++++++++++++++++++++++++
 arch/arm/boot/dts/dra72x.dtsi             |  11 +++
 arch/arm/boot/dts/dra74x.dtsi             |  15 ++++
 arch/arm/boot/dts/dra7xx-clocks.dtsi      |  11 +++
 arch/arm/mach-omap2/display.c             |  32 +++++----
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c |  33 +++++++++
 drivers/clk/ti/clk-7xx.c                  |   8 ++-
 9 files changed, 328 insertions(+), 16 deletions(-)
Signature · 1 line
2.1.4
#1 lore raw

PATCH v4 1/10 arm: dra7: add DESHDCP clock

Add a new Linux clock for DRA7 based SoCs to control DESHDCP clock.

---
 arch/arm/boot/dts/dra7.dtsi               |  5 +++++
 arch/arm/boot/dts/dra7xx-clocks.dtsi      | 10 ++++++++++
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c |  1 +
 drivers/clk/ti/clk-7xx.c                  |  1 +
 4 files changed, 17 insertions(+)
arch/arm/boot/dts/dra7.dtsi +5 -0
index 5332b57b4950..db0890a36e96 100644
@@ -131,6 +131,11 @@
 							regulator-max-microvolt = <3000000>;
 						};
 					};
+
+					scm_conf_clocks: clocks {
+						#address-cells = <1>;
+						#size-cells = <0>;
+					};
 				};
 
 				dra7_pmx_core: pinmux at 1400 {
arch/arm/boot/dts/dra7xx-clocks.dtsi +10 -0
index 3b933f74d000..470f39c4e326 100644
@@ -2136,3 +2136,13 @@
 		clocks = <&dpll_usb_ck>;
 	};
 };
+
+&scm_conf_clocks {
+	dss_deshdcp_clk: dss_deshdcp_clk {
+		#clock-cells = <0>;
+		compatible = "ti,gate-clock";
+		clocks = <&l3_iclk_div>;
+		ti,bit-shift = <0>;
+		reg = <0x558>;
+	};
+};
arch/arm/mach-omap2/omap_hwmod_7xx_data.c +1 -0
index 0e64c2fac0b5..817dbd87ce67 100644
@@ -438,6 +438,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = {
 	{ .role = "video2_clk", .clk = "dss_video2_clk" },
 	{ .role = "video1_clk", .clk = "dss_video1_clk" },
 	{ .role = "hdmi_clk", .clk = "dss_hdmi_clk" },
+	{ .role = "hdcp_clk", .clk = "dss_deshdcp_clk" },
 };
 
 static struct omap_hwmod dra7xx_dss_hwmod = {
drivers/clk/ti/clk-7xx.c +1 -0
index 5d2217ae4478..2dd956b9affa 100644
@@ -305,6 +305,7 @@ static struct ti_dt_clk dra7xx_clks[] = {
 	DT_CLK("4882c000.timer", "timer_sys_ck", "timer_sys_clk_div"),
 	DT_CLK("4882e000.timer", "timer_sys_ck", "timer_sys_clk_div"),
 	DT_CLK(NULL, "sys_clkin", "sys_clkin1"),
+	DT_CLK(NULL, "dss_deshdcp_clk", "dss_deshdcp_clk"),
 	{ .node_name = NULL },
 };
 
Signature · 1 line
2.1.4
#2 lore raw

PATCH v4 1/10 arm: dra7: add DESHDCP clock

Quoted 3 lines · Tomi Valkeinen

Add a new Linux clock for DRA7 based SoCs to control DESHDCP clock.

Quoted 66 lines
---
  arch/arm/boot/dts/dra7.dtsi               |  5 +++++
  arch/arm/boot/dts/dra7xx-clocks.dtsi      | 10 ++++++++++
  arch/arm/mach-omap2/omap_hwmod_7xx_data.c |  1 +
  drivers/clk/ti/clk-7xx.c                  |  1 +
  4 files changed, 17 insertions(+)
arch/arm/boot/dts/dra7.dtsi +5 -0
index 5332b57b4950..db0890a36e96 100644
@@ -131,6 +131,11 @@
  							regulator-max-microvolt = <3000000>;
  						};
  					};
+
+					scm_conf_clocks: clocks {
+						#address-cells = <1>;
+						#size-cells = <0>;
+					};
  				};
 
  				dra7_pmx_core: pinmux@1400 {
arch/arm/boot/dts/dra7xx-clocks.dtsi +10 -0
index 3b933f74d000..470f39c4e326 100644
@@ -2136,3 +2136,13 @@
  		clocks = <&dpll_usb_ck>;
  	};
  };
+
+&scm_conf_clocks {
+	dss_deshdcp_clk: dss_deshdcp_clk {
+		#clock-cells = <0>;
+		compatible = "ti,gate-clock";
+		clocks = <&l3_iclk_div>;
+		ti,bit-shift = <0>;
+		reg = <0x558>;
+	};
+};
arch/arm/mach-omap2/omap_hwmod_7xx_data.c +1 -0
index 0e64c2fac0b5..817dbd87ce67 100644
@@ -438,6 +438,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = {
  	{ .role = "video2_clk", .clk = "dss_video2_clk" },
  	{ .role = "video1_clk", .clk = "dss_video1_clk" },
  	{ .role = "hdmi_clk", .clk = "dss_hdmi_clk" },
+	{ .role = "hdcp_clk", .clk = "dss_deshdcp_clk" },
  };
 
  static struct omap_hwmod dra7xx_dss_hwmod = {
drivers/clk/ti/clk-7xx.c +1 -0
index 5d2217ae4478..2dd956b9affa 100644
@@ -305,6 +305,7 @@ static struct ti_dt_clk dra7xx_clks[] = {
  	DT_CLK("4882c000.timer", "timer_sys_ck", "timer_sys_clk_div"),
  	DT_CLK("4882e000.timer", "timer_sys_ck", "timer_sys_clk_div"),
  	DT_CLK(NULL, "sys_clkin", "sys_clkin1"),
+	DT_CLK(NULL, "dss_deshdcp_clk", "dss_deshdcp_clk"),
  	{ .node_name = NULL },
  };
 
#3 lore raw

PATCH v4 2/10 CLK: TI: always enable DESHDCP clock

In reply to Tomi Valkeinen

DESHDCP clock is needed on DRA7 based SoCs to enable the DSS IP. That clock is an odd one, as it is not supposed to be any kind of core clock for DSS, and we don't even support HDCP, but the clock is still needed even for the HWMOD framework to be able to reset the DSS IP.

As there's no support for multiple core clocks in the HWMOD framework, we don't have any obvious place to enable this clock when DSS IP is being enabled.

Furthermore, the HDMI on OMAP5 DSS is the same as on DRA7, and OMAP5 does not have any such clock configuration bit. This suggests that on OMAP5 the DESHDCP clock is always enabled, and for DRA7 we have the possibility to gate it.

So, as we don't have any clean way to enable and disable the clock based on the need, this patch enables the clock at boot time, making it work similarly to OMAP5.

---
 drivers/clk/ti/clk-7xx.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)
drivers/clk/ti/clk-7xx.c +6 -1
index 2dd956b9affa..63b8323df918 100644
@@ -312,7 +312,7 @@ static struct ti_dt_clk dra7xx_clks[] = {
 int __init dra7xx_dt_clk_init(void)
 {
 	int rc;
-	struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck;
+	struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck, *hdcp_ck;
 
 	ti_dt_clocks_register(dra7xx_clks);
 
@@ -348,5 +348,10 @@ int __init dra7xx_dt_clk_init(void)
 	if (rc)
 		pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__);
 
+	hdcp_ck = clk_get_sys(NULL, "dss_deshdcp_clk");
+	rc = clk_prepare_enable(hdcp_ck);
+	if (rc)
+		pr_err("%s: failed to set dss_deshdcp_clk\n", __func__);
+
 	return rc;
 }
Signature · 1 line
2.1.4
maintainer
#4 lore raw

PATCH v4 2/10 CLK: TI: always enable DESHDCP clock

Hi Mike, Stephen & Tero,

Quoted 14 lines · Tomi Valkeinen

DESHDCP clock is needed on DRA7 based SoCs to enable the DSS IP. That clock is an odd one, as it is not supposed to be any kind of core clock for DSS, and we don't even support HDCP, but the clock is still needed even for the HWMOD framework to be able to reset the DSS IP.

As there's no support for multiple core clocks in the HWMOD framework, we don't have any obvious place to enable this clock when DSS IP is being enabled.

Furthermore, the HDMI on OMAP5 DSS is the same as on DRA7, and OMAP5 does not have any such clock configuration bit. This suggests that on OMAP5 the DESHDCP clock is always enabled, and for DRA7 we have the possibility to gate it.

Quoted 5 lines

So, as we don't have any clean way to enable and disable the clock based on the need, this patch enables the clock at boot time, making it work similarly to OMAP5.

This series seems like I should take it as a whole series.. Care to ack/nack on this one?

Regards,

Tony

Quoted 31 lines
---
 drivers/clk/ti/clk-7xx.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)
drivers/clk/ti/clk-7xx.c +6 -1
index 2dd956b9affa..63b8323df918 100644
@@ -312,7 +312,7 @@ static struct ti_dt_clk dra7xx_clks[] = {
 int __init dra7xx_dt_clk_init(void)
 {
 	int rc;
-	struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck;
+	struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck, *hdcp_ck;
 
 	ti_dt_clocks_register(dra7xx_clks);
 
@@ -348,5 +348,10 @@ int __init dra7xx_dt_clk_init(void)
 	if (rc)
 		pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__);
 
+	hdcp_ck = clk_get_sys(NULL, "dss_deshdcp_clk");
+	rc = clk_prepare_enable(hdcp_ck);
+	if (rc)
+		pr_err("%s: failed to set dss_deshdcp_clk\n", __func__);
+
 	return rc;
 }
Signature · 1 line
2.1.4
#5 lore raw

PATCH v4 2/10 CLK: TI: always enable DESHDCP clock

Quoted 21 lines · Tony Lindgren

Hi Mike, Stephen & Tero,

Quoted 18 lines · Tomi Valkeinen

DESHDCP clock is needed on DRA7 based SoCs to enable the DSS IP. That clock is an odd one, as it is not supposed to be any kind of core clock for DSS, and we don't even support HDCP, but the clock is still needed even for the HWMOD framework to be able to reset the DSS IP.

As there's no support for multiple core clocks in the HWMOD framework, we don't have any obvious place to enable this clock when DSS IP is being enabled.

Furthermore, the HDMI on OMAP5 DSS is the same as on DRA7, and OMAP5 does not have any such clock configuration bit. This suggests that on OMAP5 the DESHDCP clock is always enabled, and for DRA7 we have the possibility to gate it.

So, as we don't have any clean way to enable and disable the clock based on the need, this patch enables the clock at boot time, making it work similarly to OMAP5.

Quoted 6 lines
Quoted 1 line

This series seems like I should take it as a whole series.. Care to ack/nack on this one?

Regards,

Quoted 35 lines

Tony

Quoted 31 lines
---
  drivers/clk/ti/clk-7xx.c | 7 ++++++-
  1 file changed, 6 insertions(+), 1 deletion(-)
drivers/clk/ti/clk-7xx.c +6 -2
index 2dd956b9affa..63b8323df918 100644
@@ -312,7 +312,7 @@ static struct ti_dt_clk dra7xx_clks[] = {
  int __init dra7xx_dt_clk_init(void)
  {
  	int rc;
-	struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck;
+	struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck, *hdcp_ck;
 
  	ti_dt_clocks_register(dra7xx_clks);
 
@@ -348,5 +348,10 @@ int __init dra7xx_dt_clk_init(void)
  	if (rc)
  		pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__);
 
+	hdcp_ck = clk_get_sys(NULL, "dss_deshdcp_clk");
+	rc = clk_prepare_enable(hdcp_ck);
+	if (rc)
+		pr_err("%s: failed to set dss_deshdcp_clk\n", __func__);
+
  	return rc;
  }
--

2.1.4

#6 lore raw

PATCH v4 3/10 arm/dts: dra7xx: add 'ti, set-rate-parent' for dss_dss_clk

In reply to Tomi Valkeinen

We need set-rate-parent flags for the display's clock path so that the DSS driver can change the clock rate of the PLL.

This patchs adds the ti,set-rate-parent flag to 'dss_dss_clk' clock node, which is only a gate clock, allowing the setting of the clock rate to propagate to the PLL.

Cc devicetree at vger.kernel.org
---
 arch/arm/boot/dts/dra7xx-clocks.dtsi | 1 +
 1 file changed, 1 insertion(+)
arch/arm/boot/dts/dra7xx-clocks.dtsi +1 -0
index 470f39c4e326..357bedeebfac 100644
@@ -1531,6 +1531,7 @@
 		clocks = <&dpll_per_h12x2_ck>;
 		ti,bit-shift = <8>;
 		reg = <0x1120>;
+		ti,set-rate-parent;
 	};
 
 	dss_hdmi_clk: dss_hdmi_clk {
Signature · 1 line
2.1.4
#7 lore raw

PATCH v4 3/10 arm/dts: dra7xx: add 'ti,set-rate-parent' for dss_dss_clk

Quoted 9 lines · Tomi Valkeinen

We need set-rate-parent flags for the display's clock path so that the DSS driver can change the clock rate of the PLL.

This patchs adds the ti,set-rate-parent flag to 'dss_dss_clk' clock node, which is only a gate clock, allowing the setting of the clock rate to propagate to the PLL.

Quoted 17 lines
---
  arch/arm/boot/dts/dra7xx-clocks.dtsi | 1 +
  1 file changed, 1 insertion(+)
arch/arm/boot/dts/dra7xx-clocks.dtsi +1 -0
index 470f39c4e326..357bedeebfac 100644
@@ -1531,6 +1531,7 @@
  		clocks = <&dpll_per_h12x2_ck>;
  		ti,bit-shift = <8>;
  		reg = <0x1120>;
+		ti,set-rate-parent;
  	};
 
  	dss_hdmi_clk: dss_hdmi_clk {
#8 lore raw

PATCH v4 4/10 ARM: DRA7: hwmod: add DMM hwmod description

In reply to Tomi Valkeinen

Add DMM hwmod entries for DRA7. This is identical to DMM on OMAP5.

---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)
arch/arm/mach-omap2/omap_hwmod_7xx_data.c +30 -0
index 817dbd87ce67..f6b94854fafc 100644
@@ -49,6 +49,27 @@
  */
 
 /*
+ * 'dmm' class
+ * instance(s): dmm
+ */
+static struct omap_hwmod_class dra7xx_dmm_hwmod_class = {
+	.name	= "dmm",
+};
+
+/* dmm */
+static struct omap_hwmod dra7xx_dmm_hwmod = {
+	.name		= "dmm",
+	.class		= &dra7xx_dmm_hwmod_class,
+	.clkdm_name	= "emif_clkdm",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = DRA7XX_CM_EMIF_DMM_CLKCTRL_OFFSET,
+			.context_offs = DRA7XX_RM_EMIF_DMM_CONTEXT_OFFSET,
+		},
+	},
+};
+
+/*
  * 'l3' class
  * instance(s): l3_instr, l3_main_1, l3_main_2
  */
@@ -2322,6 +2343,14 @@ static struct omap_hwmod dra7xx_wd_timer2_hwmod = {
  * Interfaces
  */
 
+/* l3_main_1 -> dmm */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__dmm = {
+	.master		= &dra7xx_l3_main_1_hwmod,
+	.slave		= &dra7xx_dmm_hwmod,
+	.clk		= "l3_iclk_div",
+	.user		= OCP_USER_SDMA,
+};
+
 /* l3_main_2 -> l3_instr */
 static struct omap_hwmod_ocp_if dra7xx_l3_main_2__l3_instr = {
 	.master		= &dra7xx_l3_main_2_hwmod,
@@ -3290,6 +3319,7 @@ static struct omap_hwmod_ocp_if dra7xx_l4_wkup__wd_timer2 = {
 };
 
 static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
+	&dra7xx_l3_main_1__dmm,
 	&dra7xx_l3_main_2__l3_instr,
 	&dra7xx_l4_cfg__l3_main_1,
 	&dra7xx_mpu__l3_main_1,
Signature · 1 line
2.1.4
#10 lore raw

PATCH v4 5/10 ARM: DRA7: hwmod: set DSS submodule parent hwmods

In reply to Tomi Valkeinen

Set DSS core hwmod as the parent for all the DSS submodules.

---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 2 ++
 1 file changed, 2 insertions(+)
arch/arm/mach-omap2/omap_hwmod_7xx_data.c +2 -0
index f6b94854fafc..9961f95f52ae 100644
@@ -522,6 +522,7 @@ static struct omap_hwmod dra7xx_dss_dispc_hwmod = {
 		},
 	},
 	.dev_attr	= &dss_dispc_dev_attr,
+	.parent_hwmod	= &dra7xx_dss_hwmod,
 };
 
 /*
@@ -563,6 +564,7 @@ static struct omap_hwmod dra7xx_dss_hdmi_hwmod = {
 	},
 	.opt_clks	= dss_hdmi_opt_clks,
 	.opt_clks_cnt	= ARRAY_SIZE(dss_hdmi_opt_clks),
+	.parent_hwmod	= &dra7xx_dss_hwmod,
 };
 
 /*
Signature · 1 line
2.1.4
maintainer
#11 lore raw

PATCH v4 5/10 ARM: DRA7: hwmod: set DSS submodule parent hwmods

Quoted 3 lines · Tomi Valkeinen

Set DSS core hwmod as the parent for all the DSS submodules.

By the way, for commits like this one, it would be nice to add a line describing why the change is needed to the commit message. Something like "This ensures that the parent hwmods are enabled before any DSS submodules are accessed." Tony, feel free to add that to the commit message if you think it's useful.

- Paul

#12 lore raw

PATCH v4 6/10 ARM: OMAP: display: change compat names to array

In reply to Tomi Valkeinen

Simplify the DSS detection logic by creating a list of the omapdss compat strings, instead of checking each separately with an 'if'.

---
 arch/arm/mach-omap2/display.c | 29 ++++++++++++++---------------
 1 file changed, 14 insertions(+), 15 deletions(-)
arch/arm/mach-omap2/display.c +14 -15
index f492ae147c6a..9868d0bc7805 100644
@@ -568,25 +568,24 @@ void __init omapdss_early_init_of(void)
 
 }
 
+static const char * const omapdss_compat_names[] __initconst = {
+	"ti,omap2-dss",
+	"ti,omap3-dss",
+	"ti,omap4-dss",
+	"ti,omap5-dss",
+};
+
 struct device_node * __init omapdss_find_dss_of_node(void)
 {
 	struct device_node *node;
+	int i;
 
-	node = of_find_compatible_node(NULL, NULL, "ti,omap2-dss");
-	if (node)
-		return node;
-
-	node = of_find_compatible_node(NULL, NULL, "ti,omap3-dss");
-	if (node)
-		return node;
-
-	node = of_find_compatible_node(NULL, NULL, "ti,omap4-dss");
-	if (node)
-		return node;
-
-	node = of_find_compatible_node(NULL, NULL, "ti,omap5-dss");
-	if (node)
-		return node;
+	for (i = 0; i < ARRAY_SIZE(omapdss_compat_names); ++i) {
+		node = of_find_compatible_node(NULL, NULL,
+			omapdss_compat_names[i]);
+		if (node)
+			return node;
+	}
 
 	return NULL;
 }
Signature · 1 line
2.1.4
maintainer
#13 lore raw

PATCH v4 6/10 ARM: OMAP: display: change compat names to array

Quoted 4 lines · Tomi Valkeinen

Simplify the DSS detection logic by creating a list of the omapdss compat strings, instead of checking each separately with an 'if'.

Quoted 51 lines
---
 arch/arm/mach-omap2/display.c | 29 ++++++++++++++---------------
 1 file changed, 14 insertions(+), 15 deletions(-)
arch/arm/mach-omap2/display.c +14 -15
index f492ae147c6a..9868d0bc7805 100644
@@ -568,25 +568,24 @@ void __init omapdss_early_init_of(void)
 
 }
 
+static const char * const omapdss_compat_names[] __initconst = {
+	"ti,omap2-dss",
+	"ti,omap3-dss",
+	"ti,omap4-dss",
+	"ti,omap5-dss",
+};
+
 struct device_node * __init omapdss_find_dss_of_node(void)
 {
 	struct device_node *node;
+	int i;
 
-	node = of_find_compatible_node(NULL, NULL, "ti,omap2-dss");
-	if (node)
-		return node;
-
-	node = of_find_compatible_node(NULL, NULL, "ti,omap3-dss");
-	if (node)
-		return node;
-
-	node = of_find_compatible_node(NULL, NULL, "ti,omap4-dss");
-	if (node)
-		return node;
-
-	node = of_find_compatible_node(NULL, NULL, "ti,omap5-dss");
-	if (node)
-		return node;
+	for (i = 0; i < ARRAY_SIZE(omapdss_compat_names); ++i) {
+		node = of_find_compatible_node(NULL, NULL,
+			omapdss_compat_names[i]);
+		if (node)
+			return node;
+	}
 
 	return NULL;
 }
Signature · 1 line
2.1.4
#14 lore raw

PATCH v4 7/10 ARM: OMAP2+: display: detect DRA7 DSS

In reply to Tomi Valkeinen

Add platform code to detect DRA7 DSS.

---
 arch/arm/mach-omap2/display.c | 3 +++
 1 file changed, 3 insertions(+)
arch/arm/mach-omap2/display.c +3 -0
index 9868d0bc7805..6ab13d18c636 100644
@@ -287,6 +287,8 @@ static enum omapdss_version __init omap_display_get_version(void)
 		return OMAPDSS_VER_OMAP5;
 	else if (soc_is_am43xx())
 		return OMAPDSS_VER_AM43xx;
+	else if (soc_is_dra7xx())
+		return OMAPDSS_VER_DRA7xx;
 	else
 		return OMAPDSS_VER_UNKNOWN;
 }
@@ -573,6 +575,7 @@ static const char * const omapdss_compat_names[] __initconst = {
 	"ti,omap3-dss",
 	"ti,omap4-dss",
 	"ti,omap5-dss",
+	"ti,dra7-dss",
 };
 
 struct device_node * __init omapdss_find_dss_of_node(void)
Signature · 1 line
2.1.4
maintainer
#15 lore raw

PATCH v4 7/10 ARM: OMAP2+: display: detect DRA7 DSS

Quoted 3 lines · Tomi Valkeinen

Add platform code to detect DRA7 DSS.

Quoted 28 lines
---
 arch/arm/mach-omap2/display.c | 3 +++
 1 file changed, 3 insertions(+)
arch/arm/mach-omap2/display.c +3 -0
index 9868d0bc7805..6ab13d18c636 100644
@@ -287,6 +287,8 @@ static enum omapdss_version __init omap_display_get_version(void)
 		return OMAPDSS_VER_OMAP5;
 	else if (soc_is_am43xx())
 		return OMAPDSS_VER_AM43xx;
+	else if (soc_is_dra7xx())
+		return OMAPDSS_VER_DRA7xx;
 	else
 		return OMAPDSS_VER_UNKNOWN;
 }
@@ -573,6 +575,7 @@ static const char * const omapdss_compat_names[] __initconst = {
 	"ti,omap3-dss",
 	"ti,omap4-dss",
 	"ti,omap5-dss",
+	"ti,dra7-dss",
 };
 
 struct device_node * __init omapdss_find_dss_of_node(void)
Signature · 1 line
2.1.4
#16 lore raw

PATCH v4 8/10 arm/dts: dra7.dtsi: add DSS support

In reply to Tomi Valkeinen

DRA7xxx contains a very similar DSS to OMAP5. The main differences are:

* no DSI or RFBI support.
* 1 or 2 dedicated video PLLs.
* need to do additional configuration to the DRA7 CONTROL module.

DRA72xx has only one video PLL, and DRA74xx has two.

Cc devicetree at vger.kernel.org
---
 arch/arm/boot/dts/dra7.dtsi   | 38 ++++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/dra72x.dtsi | 11 +++++++++++
 arch/arm/boot/dts/dra74x.dtsi | 15 +++++++++++++++
 3 files changed, 64 insertions(+)
arch/arm/boot/dts/dra7.dtsi +38 -0
index db0890a36e96..f3a8237cea39 100644
@@ -1474,6 +1474,44 @@
 			clocks = <&sys_clkin1>;
 			status = "disabled";
 		};
+
+		dss: dss at 58000000 {
+			compatible = "ti,dra7-dss";
+			/* 'reg' defined in dra72x.dtsi and dra74x.dtsi */
+			/* 'clocks' defined in dra72x.dtsi and dra74x.dtsi */
+			status = "disabled";
+			ti,hwmods = "dss_core";
+			/* CTRL_CORE_DSS_PLL_CONTROL */
+			syscon-pll-ctrl = <&scm_conf 0x538>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			dispc at 58001000 {
+				compatible = "ti,dra7-dispc";
+				reg = <0x58001000 0x1000>;
+				interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+				ti,hwmods = "dss_dispc";
+				clocks = <&dss_dss_clk>;
+				clock-names = "fck";
+				/* CTRL_CORE_SMA_SW_1 */
+				syscon-pol = <&scm_conf 0x534>;
+			};
+
+			hdmi: encoder at 58060000 {
+				compatible = "ti,dra7-hdmi";
+				reg = <0x58040000 0x200>,
+				      <0x58040200 0x80>,
+				      <0x58040300 0x80>,
+				      <0x58060000 0x19000>;
+				reg-names = "wp", "pll", "phy", "core";
+				interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+				ti,hwmods = "dss_hdmi";
+				clocks = <&dss_48mhz_clk>, <&dss_hdmi_clk>;
+				clock-names = "fck", "sys_clk";
+			};
+		};
 	};
 
 	thermal_zones: thermal-zones {
arch/arm/boot/dts/dra72x.dtsi +11 -0
index 03d742f8d572..eaca143faa77 100644
@@ -34,3 +34,14 @@
 		interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
 	};
 };
+
+&dss {
+	reg = <0x58000000 0x80>,
+	      <0x58004054 0x4>,
+	      <0x58004300 0x20>;
+	reg-names = "dss", "pll1_clkctrl", "pll1";
+
+	clocks = <&dss_dss_clk>,
+		 <&dss_video1_clk>;
+	clock-names = "fck", "video1_clk";
+};
arch/arm/boot/dts/dra74x.dtsi +15 -0
index cc560a70926f..fa995d0ca1f2 100644
@@ -73,3 +73,18 @@
 		};
 	};
 };
+
+&dss {
+	reg = <0x58000000 0x80>,
+	      <0x58004054 0x4>,
+	      <0x58004300 0x20>,
+	      <0x58005054 0x4>,
+	      <0x58005300 0x20>;
+	reg-names = "dss", "pll1_clkctrl", "pll1",
+		    "pll2_clkctrl", "pll2";
+
+	clocks = <&dss_dss_clk>,
+		 <&dss_video1_clk>,
+		 <&dss_video2_clk>;
+	clock-names = "fck", "video1_clk", "video2_clk";
+};
Signature · 1 line
2.1.4
maintainer
#17 lore raw

PATCH v4 8/10 arm/dts: dra7.dtsi: add DSS support

Quoted 10 lines · Tomi Valkeinen

DRA7xxx contains a very similar DSS to OMAP5. The main differences are:

* no DSI or RFBI support.
* 1 or 2 dedicated video PLLs.
* need to do additional configuration to the DRA7 CONTROL module.

DRA72xx has only one video PLL, and DRA74xx has two.

Cc devicetree at vger.kernel.org
#18 lore raw

PATCH v4 9/10 arm/dts: dra72-evm.dts: add HDMI

In reply to Tomi Valkeinen

DRA72 EVM has a HDMI output. This patch adds the device tree nodes required for HDMI.

Cc devicetree at vger.kernel.org
---
 arch/arm/boot/dts/dra72-evm.dts | 110 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 110 insertions(+)
arch/arm/boot/dts/dra72-evm.dts +110 -0
index ce0390f081d9..4e1b60581782 100644
@@ -19,6 +19,10 @@
 		reg = <0x80000000 0x40000000>; /* 1024 MB */
 	};
 
+	aliases {
+		display0 = &hdmi0;
+	};
+
 	evm_3v3: fixedregulator-evm_3v3 {
 		compatible = "regulator-fixed";
 		regulator-name = "evm_3v3";
@@ -35,6 +39,51 @@
 		compatible = "linux,extcon-usb-gpio";
 		id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
 	};
+
+	hdmi0: connector {
+		compatible = "hdmi-connector";
+		label = "hdmi";
+
+		type = "a";
+
+		port {
+			hdmi_connector_in: endpoint {
+				remote-endpoint = <&tpd12s015_out>;
+			};
+		};
+	};
+
+	tpd12s015: encoder {
+		compatible = "ti,tpd12s015";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&tpd12s015_pins>;
+
+		gpios = <&pcf_hdmi 4 GPIO_ACTIVE_HIGH>,	/* P4, CT CP HPD */
+			<&pcf_hdmi 5 GPIO_ACTIVE_HIGH>,	/* P5, LS OE */
+			<&gpio7 12 GPIO_ACTIVE_HIGH>;	/* gpio7_12/sp1_cs2, HPD */
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port at 0 {
+				reg = <0>;
+
+				tpd12s015_in: endpoint {
+					remote-endpoint = <&hdmi_out>;
+				};
+			};
+
+			port at 1 {
+				reg = <1>;
+
+				tpd12s015_out: endpoint {
+					remote-endpoint = <&hdmi_connector_in>;
+				};
+			};
+		};
+	};
 };
 
 &dra7_pmx_core {
@@ -45,6 +94,13 @@
 		>;
 	};
 
+	i2c5_pins: pinmux_i2c5_pins {
+		pinctrl-single,pins = <
+			0x2b4 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
+			0x2b8 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
+		>;
+	};
+
 	nand_default: nand_default {
 		pinctrl-single,pins = <
 			0x0	(PIN_INPUT  | MUX_MODE0) /* gpmc_ad0 */
@@ -142,6 +198,19 @@
 			0xb8 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_cs2.qspi1_cs0 */
 		>;
 	};
+
+	hdmi_pins: pinmux_hdmi_pins {
+		pinctrl-single,pins = <
+			0x408 (PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
+			0x40c (PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
+		>;
+	};
+
+	tpd12s015_pins: pinmux_tpd12s015_pins {
+		pinctrl-single,pins = <
+			0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
+		>;
+	};
 };
 
 &i2c1 {
@@ -277,6 +346,27 @@
 	};
 };
 
+&i2c5 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c5_pins>;
+	clock-frequency = <400000>;
+
+	pcf_hdmi: pcf8575 at 26 {
+		compatible = "nxp,pcf8575";
+		reg = <0x26>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		/*
+		 * initial state is used here to keep the mdio interface
+		 * selected on RU89 through SEL_VIN4_MUX_S0, VIN2_S1 and
+		 * VIN2_S0 driven high otherwise Ethernet stops working
+		 * VIN6_SEL_S0 is low, thus selecting McASP3 over VIN6
+		 */
+		lines-initial-states = <0x0f2b>;
+	};
+};
+
 &uart1 {
 	status = "okay";
 };
@@ -566,3 +656,23 @@
 		};
 	};
 };
+
+&dss {
+	status = "ok";
+
+	vdda_video-supply = <&ldo5_reg>;
+};
+
+&hdmi {
+	status = "ok";
+	vdda-supply = <&ldo3_reg>;
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&hdmi_pins>;
+
+	port {
+		hdmi_out: endpoint {
+			remote-endpoint = <&tpd12s015_in>;
+		};
+	};
+};
Signature · 1 line
2.1.4
#20 lore raw

PATCH v4 10/10 arm/dts: am57xx-beagle-x15.dts: add HDMI

In reply to Tomi Valkeinen

AM57xx Beagle X15 has a HDMI output. This patch adds the device tree nodes required for HDMI.

Cc devicetree at vger.kernel.org
---
 arch/arm/boot/dts/am57xx-beagle-x15.dts | 81 +++++++++++++++++++++++++++++++++
 1 file changed, 81 insertions(+)
arch/arm/boot/dts/am57xx-beagle-x15.dts +81 -0
index 15f198e4864d..f1e430507e4f 100644
@@ -18,6 +18,7 @@
 	aliases {
 		rtc0 = &mcp_rtc;
 		rtc1 = &tps659038_rtc;
+		display0 = &hdmi0;
 	};
 
 	memory {
@@ -102,6 +103,51 @@
 		pinctrl-names = "default";
 		pinctrl-0 = <&extcon_usb2_pins>;
 	};
+
+	hdmi0: connector {
+		compatible = "hdmi-connector";
+		label = "hdmi";
+
+		type = "a";
+
+		port {
+			hdmi_connector_in: endpoint {
+				remote-endpoint = <&tpd12s015_out>;
+			};
+		};
+	};
+
+	tpd12s015: encoder {
+		compatible = "ti,tpd12s015";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&tpd12s015_pins>;
+
+		gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>,	/* gpio7_10, CT CP HPD */
+			<&gpio6 28 GPIO_ACTIVE_HIGH>,	/* gpio6_28, LS OE */
+			<&gpio7 12 GPIO_ACTIVE_HIGH>;	/* gpio7_12/sp1_cs2, HPD */
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port at 0 {
+				reg = <0>;
+
+				tpd12s015_in: endpoint {
+					remote-endpoint = <&hdmi_out>;
+				};
+			};
+
+			port at 1 {
+				reg = <1>;
+
+				tpd12s015_out: endpoint {
+					remote-endpoint = <&hdmi_connector_in>;
+				};
+			};
+		};
+	};
 };
 
 &dra7_pmx_core {
@@ -121,6 +167,13 @@
 		>;
 	};
 
+	hdmi_pins: pinmux_hdmi_pins {
+		pinctrl-single,pins = <
+			0x408 (PIN_INPUT | MUX_MODE1)	/* i2c2_sda.hdmi1_ddc_scl */
+			0x40c (PIN_INPUT | MUX_MODE1)	/* i2c2_scl.hdmi1_ddc_sda */
+		>;
+	};
+
 	i2c3_pins_default: i2c3_pins_default {
 		pinctrl-single,pins = <
 			0x2a4 (PIN_INPUT| MUX_MODE10)	/* mcasp1_aclkx.i2c3_sda */
@@ -277,6 +330,14 @@
 			0x3e8 (PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_ctsn.gpio7_24 */
 		>;
 	};
+
+	tpd12s015_pins: pinmux_tpd12s015_pins {
+		pinctrl-single,pins = <
+			0x3b0 (PIN_OUTPUT | MUX_MODE14)		/* gpio7_10 CT_CP_HPD */
+			0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14)	/* gpio7_12 HPD */
+			0x370 (PIN_OUTPUT | MUX_MODE14)		/* gpio6_28 LS_OE */
+		>;
+	};
 };
 
 &i2c1 {
@@ -607,3 +668,23 @@
 		};
        };
 };
+
+&dss {
+	status = "ok";
+
+	vdda_video-supply = <&ldoln_reg>;
+};
+
+&hdmi {
+	status = "ok";
+	vdda-supply = <&ldo3_reg>;
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&hdmi_pins>;
+
+	port {
+		hdmi_out: endpoint {
+			remote-endpoint = <&tpd12s015_in>;
+		};
+	};
+};
Signature · 1 line
2.1.4
maintainer
#21 lore raw

PATCH v4 10/10 arm/dts: am57xx-beagle-x15.dts: add HDMI

Quoted 2 lines · Tomi Valkeinen

AM57xx Beagle X15 has a HDMI output. This patch adds the device tree nodes required for HDMI.

This one does not seem to apply to linux next, did not look further where it conflicts.

Regards,

Tony

#22 lore raw

PATCH v4 10/10 arm/dts: am57xx-beagle-x15.dts: add HDMI

Quoted 6 lines · Tony Lindgren
Quoted 2 lines · Tomi Valkeinen

AM57xx Beagle X15 has a HDMI output. This patch adds the device tree nodes required for HDMI.

This one does not seem to apply to linux next, did not look further where it conflicts.

Looks like a trivial one line conflict, about adding an alias to .dts.

Tomi

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#23 lore raw

PATCH v4 10/10 arm/dts: am57xx-beagle-x15.dts: add HDMI

In reply to Tony Lindgren
Quoted 6 lines · Tony Lindgren
Quoted 2 lines · Tomi Valkeinen

AM57xx Beagle X15 has a HDMI output. This patch adds the device tree nodes required for HDMI.

This one does not seem to apply to linux next, did not look further where it conflicts.

Looks like the change was also in -rc6. I've rebased my patches on -rc6, and added the acks:

git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git dra7-dss-arch

Tomi

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maintainer
#24 lore raw

PATCH v4 10/10 arm/dts: am57xx-beagle-x15.dts: add HDMI

Quoted 7 lines · Tomi Valkeinen
Quoted 4 lines · Tony Lindgren
Quoted 2 lines · Tomi Valkeinen

AM57xx Beagle X15 has a HDMI output. This patch adds the device tree nodes required for HDMI.

Quoted 7 lines
Quoted 2 lines

This one does not seem to apply to linux next, did not look further where it conflicts.

Looks like the change was also in -rc6. I've rebased my patches on -rc6, and added the acks:

git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git dra7-dss-arch

OK, since there are no other merge conflicts that I'm aware of, it's best that you merge the whole branch. I've acked the patches, so for this one too:

#25 lore raw

PATCH v4 10/10 arm/dts: am57xx-beagle-x15.dts: add HDMI

Quoted 11 lines · Tony Lindgren
Quoted 10 lines · Tomi Valkeinen
Quoted 6 lines · Tony Lindgren
Quoted 2 lines · Tomi Valkeinen

AM57xx Beagle X15 has a HDMI output. This patch adds the device tree nodes required for HDMI.

This one does not seem to apply to linux next, did not look further where it conflicts.

Quoted 8 lines
Quoted 4 lines

Looks like the change was also in -rc6. I've rebased my patches on -rc6, and added the acks:

git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git dra7-dss-arch

OK, since there are no other merge conflicts that I'm aware of, it's best that you merge the whole branch. I've acked the patches, so for this one too:

Ok, I can do that, but isn't this more linux-arm stuff? All the driver side code is already in the mainline.

Tomi

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maintainer
#26 lore raw

PATCH v4 10/10 arm/dts: am57xx-beagle-x15.dts: add HDMI

Quoted 17 lines · Tomi Valkeinen
Quoted 14 lines · Tony Lindgren
Quoted 13 lines · Tomi Valkeinen
Quoted 6 lines · Tony Lindgren
Quoted 2 lines · Tomi Valkeinen

AM57xx Beagle X15 has a HDMI output. This patch adds the device tree nodes required for HDMI.

This one does not seem to apply to linux next, did not look further where it conflicts.

Looks like the change was also in -rc6. I've rebased my patches on -rc6, and added the acks:

Quoted 8 lines
Quoted 5 lines
Quoted 1 line

git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git dra7-dss-arch

OK, since there are no other merge conflicts that I'm aware of, it's best that you merge the whole branch. I've acked the patches, so for this one too:

Ok, I can do that, but isn't this more linux-arm stuff? All the driver side code is already in the mainline.

Yes but we're getting so late into merge window that I'd rather not take it for v4.2 at this point. And it's all DSS related.

Please make sure you get an ack for the drivers/clk/omap change from Mike or Stephen though.

Regards,

Tony

maintainer
#27 lore raw

PATCH v4 10/10 arm/dts: am57xx-beagle-x15.dts: add HDMI

Quoted 24 lines · Tony Lindgren
Quoted 23 lines · Tomi Valkeinen
Quoted 19 lines · Tony Lindgren
Quoted 7 lines · Tomi Valkeinen
Quoted 4 lines · Tony Lindgren
Quoted 2 lines · Tomi Valkeinen

AM57xx Beagle X15 has a HDMI output. This patch adds the device tree nodes required for HDMI.

Quoted 7 lines
Quoted 2 lines

This one does not seem to apply to linux next, did not look further where it conflicts.

Looks like the change was also in -rc6. I've rebased my patches on -rc6, and added the acks:

git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git dra7-dss-arch

OK, since there are no other merge conflicts that I'm aware of, it's best that you merge the whole branch. I've acked the patches, so for this one too:

Quoted 8 lines
Quoted 2 lines

Ok, I can do that, but isn't this more linux-arm stuff? All the driver side code is already in the mainline.

Yes but we're getting so late into merge window that I'd rather not take it for v4.2 at this point. And it's all DSS related.

Please make sure you get an ack for the drivers/clk/omap change from Mike or Stephen though.

Naturally I mean "getting so close to the merge window" above :)

Regards,

Tony

#28 lore raw

PATCH v4 10/10 arm/dts: am57xx-beagle-x15.dts: add HDMI

Quoted 7 lines · Tony Lindgren
Quoted 7 lines
Quoted 6 lines
Quoted 3 lines

OK, since there are no other merge conflicts that I'm aware of, it's best that you merge the whole branch. I've acked the patches, so for this one too:

Ok, I can do that, but isn't this more linux-arm stuff? All the driver side code is already in the mainline.

Quoted 7 lines
Quoted 5 lines

Yes but we're getting so late into merge window that I'd rather not take it for v4.2 at this point. And it's all DSS related.

Please make sure you get an ack for the drivers/clk/omap change from Mike or Stephen though.

Naturally I mean "getting so close to the merge window" above :)

Thanks everyone. I've pushed this to fbdev for-next.

Tomi

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