arm64,hi6220: Enable Hisilicon Hi6220 SoC

This patch introduces ARCH_HISI to enable Hisilicon SoC family in Kconfig and defconfig.

Signed-off-by Bintian Wang <[email protected]>

Acked-by Haojian Zhuang <[email protected]>

Reviewed-by Wei Xu <[email protected]>

Tested-by Will Deacon <[email protected]>

Tested-by Tyler Baker <[email protected]>

Tested-by Kevin Hilman <[email protected]>

---
 arch/arm64/Kconfig           |    5 +++++
 arch/arm64/configs/defconfig |    1 +
 2 files changed, 6 insertions(+)

This patch adds documentation for the devicetree bindings used by the DT files of Hisilicon hi6220 SoC mobile platform.

Signed-off-by Bintian Wang <[email protected]>

Suggested-by Arnd Bergmann <[email protected]>

Acked-by Haojian Zhuang <[email protected]>

Acked-by Stephen Boyd <[email protected]>

---
 .../bindings/arm/hisilicon/hisilicon.txt           |   87 ++++++++++++++++++++
 1 file changed, 87 insertions(+)

Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +11 -0

index 35b1bd4..f67d0f3 100644
@@ -1,5 +1,8 @@
 Hisilicon Platforms Device Tree Bindings
 ----------------------------------------------------
+Hi6220 SoC
+Required root node properties:
+       - compatible = "hisilicon,hi6220";
 
 Hi4511 Board
 Required root node properties:

@@ -13,6 +16,9 @@ HiP01 ca9x2 Board
 Required root node properties:
        - compatible = "hisilicon,hip01-ca9x2";
 
+HiKey Board
+Required root node properties:
+       - compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
 
 Hisilicon system controller
 

@@ -41,6 +47,87 @@ Example:
        };
 
 -----------------------------------------------------------------------
+Hisilicon Hi6220 system controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-sysctrl"
+- reg : Register address and size

Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +66 -1

+               compatible = "hisilicon,hi6220-sysctrl", "syscon";
+               reg = <0x0 0xf7030000 0x0 0x2000>;
+               #clock-cells = <1>;
+       };
+
+
+Hisilicon Hi6220 Power Always ON domain controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-aoctrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, many clock registers are defined
+  under this controller and this property must be present.
+
+Hisilicon designs this system controller to control the power always
+on domain for mobile platform.
+
+Example:
+       /*for Hi6220*/
+       ao_ctrl: ao_ctrl {
+               compatible = "hisilicon,hi6220-aoctrl", "syscon";
+               reg = <0x0 0xf7800000 0x0 0x2000>;
+               #clock-cells = <1>;
+       };
+
+
+Hisilicon Hi6220 Media domain controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-mediactrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, many clock registers are defined
+  under this controller and this property must be present.
+
+Hisilicon designs this system controller to control the multimedia
+domain(e.g. codec, G3D ...) for mobile platform.
+
+Example:
+       /*for Hi6220*/
+       media_ctrl: media_ctrl {
+               compatible = "hisilicon,hi6220-mediactrl", "syscon";
+               reg = <0x0 0xf4410000 0x0 0x1000>;
+               #clock-cells = <1>;
+       };
+
+
+Hisilicon Hi6220 Power Management domain controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-pmctrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, some clock registers are define
+  under this controller and this property must be present.
+
+Hisilicon designs this system controller to control the power management
+domain for mobile platform.
+
+Example:
+       /*for Hi6220*/
+       pm_ctrl: pm_ctrl {
+               compatible = "hisilicon,hi6220-pmctrl", "syscon";
+               reg = <0x0 0xf7032000 0x0 0x1000>;
+               #clock-cells = <1>;
+       };
+
+-----------------------------------------------------------------------
 Hisilicon HiP01 system controller
 
 Required properties:
--

1.7.9.5

Quoted 3 lines · Bintian Wang

This patch adds documentation for the devicetree bindings used by the DT files of Hisilicon hi6220 SoC mobile platform.

Quoted 4 lines

Signed-off-by Bintian Wang <[email protected]>

Suggested-by Arnd Bergmann <[email protected]>

Acked-by Haojian Zhuang <[email protected]>

Acked-by Stephen Boyd <[email protected]>

Acked-by Rob Herring <[email protected]>

One minor comment below.

Quoted 36 lines

---
  .../bindings/arm/hisilicon/hisilicon.txt           |   87 ++++++++++++++++++++
  1 file changed, 87 insertions(+)

Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +11 -0

index 35b1bd4..f67d0f3 100644
@@ -1,5 +1,8 @@
  Hisilicon Platforms Device Tree Bindings
  ----------------------------------------------------
+Hi6220 SoC
+Required root node properties:
+       - compatible = "hisilicon,hi6220";
 
  Hi4511 Board
  Required root node properties:

@@ -13,6 +16,9 @@ HiP01 ca9x2 Board
  Required root node properties:
         - compatible = "hisilicon,hip01-ca9x2";
 
+HiKey Board
+Required root node properties:
+       - compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
 
  Hisilicon system controller
 

@@ -41,6 +47,87 @@ Example:
         };
 
  -----------------------------------------------------------------------
+Hisilicon Hi6220 system controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-sysctrl"
+- reg : Register address and size

Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt Example: · line 64

Quoted 10 lines

Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +10 -0

+- #clock-cells: should be set to 1, many clock registers are defined
+  under this controller and this property must be present.
+
+Hisilicon designs this controller as one of the system controllers,
+its main functions are the same as Hisilicon system controller, but
+the register offset of some core modules are different.
+
+Example:
+       /*for Hi6220*/
+       sys_ctrl: sys_ctrl {

You should have the unit address in the name here. Same with the follow examples.

Quoted 70 lines

Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +66 -1

+               compatible = "hisilicon,hi6220-sysctrl", "syscon";
+               reg = <0x0 0xf7030000 0x0 0x2000>;
+               #clock-cells = <1>;
+       };
+
+
+Hisilicon Hi6220 Power Always ON domain controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-aoctrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, many clock registers are defined
+  under this controller and this property must be present.
+
+Hisilicon designs this system controller to control the power always
+on domain for mobile platform.
+
+Example:
+       /*for Hi6220*/
+       ao_ctrl: ao_ctrl {
+               compatible = "hisilicon,hi6220-aoctrl", "syscon";
+               reg = <0x0 0xf7800000 0x0 0x2000>;
+               #clock-cells = <1>;
+       };
+
+
+Hisilicon Hi6220 Media domain controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-mediactrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, many clock registers are defined
+  under this controller and this property must be present.
+
+Hisilicon designs this system controller to control the multimedia
+domain(e.g. codec, G3D ...) for mobile platform.
+
+Example:
+       /*for Hi6220*/
+       media_ctrl: media_ctrl {
+               compatible = "hisilicon,hi6220-mediactrl", "syscon";
+               reg = <0x0 0xf4410000 0x0 0x1000>;
+               #clock-cells = <1>;
+       };
+
+
+Hisilicon Hi6220 Power Management domain controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-pmctrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, some clock registers are define
+  under this controller and this property must be present.
+
+Hisilicon designs this system controller to control the power management
+domain for mobile platform.
+
+Example:
+       /*for Hi6220*/
+       pm_ctrl: pm_ctrl {
+               compatible = "hisilicon,hi6220-pmctrl", "syscon";
+               reg = <0x0 0xf7032000 0x0 0x1000>;
+               #clock-cells = <1>;
+       };
+
+-----------------------------------------------------------------------
  Hisilicon HiP01 system controller
 
  Required properties:
--

Quoted 2 lines

1.7.9.5

.

Hisilicon does some performance enhancements based on PL011(e.g. larger FIFO length), so add one compatible string "hisilicon,hi6220-uart" for

future optimisations or workarounds works.

Signed-off-by Bintian Wang <[email protected]>

Suggested-by Mark Rutland <[email protected]>

Quoted 2 lines · Bintian Wang

Hisilicon does some performance enhancements based on PL011(e.g. larger FIFO length), so add one compatible string "hisilicon,hi6220-uart" for

That compatible string in the commit message is not even the same as in the patch.

Quoted 4 lines

future optimisations or workarounds works.

Signed-off-by Bintian Wang <[email protected]>

Suggested-by Mark Rutland <[email protected]>

Maybe I missed out on the earlier conversation, but do you mean that the PrimeCell ID has not been properly set up to something unique in this HiSilicon version of the PL011 block?

Even if so: do not override the compatible string like this, that is not the PrimeCell style.

Define an 8 bit vendor ID (like tha ASCII for 'H' 0x48 or whatever) and encode it for these variants, if the hardware is just using the ARM default PrimeCell ID, override it in the device tree like Broadcom are doing in arch/arm/boot/dts/bcm2835.dtsi:

arm,primecell-periphid = <0x00241011>;

Maybe yours would be:

arm,primecell-periphid = <0x00048011>;

For a first HiSilicon variant, then do some
<include/linux/amba/bus.h>:

enum amba_vendor {
        AMBA_VENDOR_ARM = 0x41,

+ AMBA_VENDOR_HISILICON = 0x48,

Then patch drivers/tty/serial/amba_pl011.c to add vendor_hisilicon and a match table for 0x00048011 just like everyone else.

That feels weird. This amba_vendor enum is not under control of the DT author, nor the kernel. This is a set of codes that are managed by a third party (probably ARM). What if some company with a name starting with 'H' (Hilarious Inc?) comes up with some actual HW and ends up conflicting with the above?

Quoted 4 lines · Linus Walleij

enum amba_vendor {
        AMBA_VENDOR_ARM = 0x41,

+ AMBA_VENDOR_HISILICON = 0x48,

Quoted 2 lines

Then patch drivers/tty/serial/amba_pl011.c to add vendor_hisilicon and a match table for 0x00048011 just like everyone else.

That feels weird. This amba_vendor enum is not under control of the DT author, nor the kernel. This is a set of codes that are managed by a third party (probably ARM). What if some company with a name starting with 'H' (Hilarious Inc?) comes up with some actual HW and ends up conflicting with the above?

Quoted 2 lines · Bintian Wang

Hisilicon does some performance enhancements based on PL011(e.g. larger FIFO length), so add one compatible string "hisilicon,hi6220-uart" for

That compatible string in the commit message is not even the same as in the patch.

Quoted 5 lines

future optimisations or workarounds works.

Signed-off-by Bintian Wang <[email protected]>

Suggested-by Mark Rutland <[email protected]>

Maybe I missed out on the earlier conversation, but do you mean that the PrimeCell ID has not been properly set up to something unique in this HiSilicon version of the PL011 block?

Even if so: do not override the compatible string like this, that is not the PrimeCell style.

Define an 8 bit vendor ID (like tha ASCII for 'H' 0x48 or whatever) and encode it for these variants, if the hardware is just using the ARM default PrimeCell ID, override it in the device tree like Broadcom are doing in arch/arm/boot/dts/bcm2835.dtsi:

arm,primecell-periphid = <0x00241011>;

Maybe yours would be:

arm,primecell-periphid = <0x00048011>;

For a first HiSilicon variant, then do some
<include/linux/amba/bus.h>:

enum amba_vendor {
         AMBA_VENDOR_ARM = 0x41,

+ AMBA_VENDOR_HISILICON = 0x48,

Then patch drivers/tty/serial/amba_pl011.c to add vendor_hisilicon and a match table for 0x00048011 just like everyone else.

Yours,
Linus Walleij

.

Quoted 7 lines · Linus Walleij

Quoted 2 lines · Bintian Wang

Hisilicon does some performance enhancements based on PL011(e.g. larger FIFO length), so add one compatible string "hisilicon,hi6220-uart" for

That compatible string in the commit message is not even the same as in the patch.

The UART0 is PL011 compatible, the UART1/2 have some performance enhancements features, so based on Mark's suggestion and I add this compatible string just for future use.

Quoted 11 lines · Bintian

Quoted 7 lines · Linus Walleij

Quoted 2 lines · Bintian Wang

Hisilicon does some performance enhancements based on PL011(e.g. larger FIFO length), so add one compatible string "hisilicon,hi6220-uart" for

That compatible string in the commit message is not even the same as in the patch.

The UART0 is PL011 compatible, the UART1/2 have some performance enhancements features, so based on Mark's suggestion and I add this compatible string just for future use.

Please don't submit it with this series.

This patch should not be part of this series, it should be part of the series which modifies the PL011 driver, so it can be reviewed along with those changes.

Until then, I'm going to NAK this patch.

The thing that worries me though is that the subject line says this is a "Hisilicon *designed* UART". If Hisilicon _designed_ this UART, presumably they have changed the *vendor* field of the UART ID _not_ to indicate that ARM Ltd designed it?

If they've merely modified the parameters, and given the ARM Ltd PL011 a larger fifo, then there isn't really much of a problem - we've been here before, except the vendor has had a real vendor ID for the field (in the case of ST), plus we've had different FIFO lengths for ARM hardware too (32 bytes instead of 16 for revision 3 and above.)

Lastly, if you're not having to modify the PL011 driver in any way, you don't need to have a compatible. In any case, you _shouldn't_ for AMBA devices. AMBA does not match drivers based on OF compatible strings, so using OF compatible strings with the AMBA bus is just wrong. The AMBA compatible strings are there so that the generic OF code knows how to create the devices.

Add initial dtsi file to support Hisilicon Hi6220 SoC with support of Octal core CPUs in two clusters and each cluster has quard Cortex-A53.

Also add dts file to support HiKey development board which based on Hi6220 SoC.

Signed-off-by Bintian Wang <[email protected]>

Acked-by Haojian Zhuang <[email protected]>

Reviewed-by Yiping Xu <[email protected]>

Tested-by Will Deacon <[email protected]>

Tested-by Tyler Baker <[email protected]>

Tested-by Kevin Hilman <[email protected]>

---
  arch/arm64/boot/dts/Makefile                   |    1 +
  arch/arm64/boot/dts/hisilicon/Makefile         |    5 +
  arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts |   31 +++++
  arch/arm64/boot/dts/hisilicon/hi6220.dtsi      |  172 ++++++++++++++++++++++++
  4 files changed, 209 insertions(+)

create mode 100644 arch/arm64/boot/dts/hisilicon/Makefile create mode 100644 arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts create mode 100644 arch/arm64/boot/dts/hisilicon/hi6220.dtsi

arch/arm64/boot/dts/Makefile +1 -0

index ad26a75..38913be 100644
@@ -4,6 +4,7 @@ dts-dirs += arm
  dts-dirs += cavium
  dts-dirs += exynos
  dts-dirs += freescale
+dts-dirs += hisilicon
  dts-dirs += mediatek
  dts-dirs += qcom
  dts-dirs += sprd

arch/arm64/boot/dts/hisilicon/Makefile new file +5 -0

new file mode 100644
index 0000000..fa81a6e
@@ -0,0 +1,5 @@
+dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
+
+always		:= $(dtb-y)
+subdir-y	:= $(dts-dirs)
+clean-files	:= *.dtb

arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts new file +31 -0

new file mode 100644
index 0000000..e36a539
@@ -0,0 +1,31 @@
+/*
+ * dts file for Hisilicon HiKey Development Board
+ *
+ * Copyright (C) 2015, Hisilicon Ltd.
+ *
+ */
+
+/dts-v1/;
+
+/*Reserved 1MB memory for MCU*/
+/memreserve/ 0x05e00000 0x00100000;
+
+#include "hi6220.dtsi"
+
+/ {
+	model = "HiKey Development Board";
+	compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory at 0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x40000000>;
+	};
+};

arch/arm64/boot/dts/hisilicon/hi6220.dtsi new file +172 -0

new file mode 100644
index 0000000..229937f
@@ -0,0 +1,172 @@
+/*
+ * dts file for Hisilicon Hi6220 SoC
+ *
+ * Copyright (C) 2015, Hisilicon Ltd.
+ */
+
+#include <dt-bindings/clock/hi6220-clock.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	compatible = "hisilicon,hi6220";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&cpu0>;
+				};
+				core1 {
+					cpu = <&cpu1>;
+				};
+				core2 {
+					cpu = <&cpu2>;
+				};
+				core3 {
+					cpu = <&cpu3>;
+				};
+			};
+			cluster1 {
+				core0 {
+					cpu = <&cpu4>;
+				};
+				core1 {
+					cpu = <&cpu5>;
+				};
+				core2 {
+					cpu = <&cpu6>;
+				};
+				core3 {
+					cpu = <&cpu7>;
+				};
+			};
+		};
+
+		cpu0: cpu at 0 {
+			compatible = "arm,cortex-a53", "arm,armv8";
+			device_type = "cpu";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+		};
+
+		cpu1: cpu at 1 {
+			compatible = "arm,cortex-a53", "arm,armv8";
+			device_type = "cpu";
+			reg = <0x0 0x1>;
+			enable-method = "psci";
+		};
+
+		cpu2: cpu at 2 {
+			compatible = "arm,cortex-a53", "arm,armv8";
+			device_type = "cpu";
+			reg = <0x0 0x2>;
+			enable-method = "psci";
+		};
+
+		cpu3: cpu at 3 {
+			compatible = "arm,cortex-a53", "arm,armv8";
+			device_type = "cpu";
+			reg = <0x0 0x3>;
+			enable-method = "psci";
+		};
+
+		cpu4: cpu at 100 {
+			compatible = "arm,cortex-a53", "arm,armv8";
+			device_type = "cpu";
+			reg = <0x0 0x100>;
+			enable-method = "psci";
+		};
+
+		cpu5: cpu at 101 {
+			compatible = "arm,cortex-a53", "arm,armv8";
+			device_type = "cpu";
+			reg = <0x0 0x101>;
+			enable-method = "psci";
+		};
+
+		cpu6: cpu at 102 {
+			compatible = "arm,cortex-a53", "arm,armv8";
+			device_type = "cpu";
+			reg = <0x0 0x102>;
+			enable-method = "psci";
+		};
+
+		cpu7: cpu at 103 {
+			compatible = "arm,cortex-a53", "arm,armv8";
+			device_type = "cpu";
+			reg = <0x0 0x103>;
+			enable-method = "psci";
+		};
+	};
+
+	gic: interrupt-controller at f6801000 {
+		compatible = "arm,gic-400";
+		reg = <0x0 0xf6801000 0 0x1000>, /* GICD */
+		      <0x0 0xf6802000 0 0x2000>, /* GICC */
+		      <0x0 0xf6804000 0 0x2000>, /* GICH */
+		      <0x0 0xf6806000 0 0x2000>; /* GICV */
+		#address-cells = <0>;
+		#interrupt-cells = <3>;
+		interrupt-controller;
+		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		ao_ctrl: ao_ctrl {
+			compatible = "hisilicon,hi6220-aoctrl", "syscon";
+			reg = <0x0 0xf7800000 0x0 0x2000>;
+			#clock-cells = <1>;
+		};
+
+		sys_ctrl: sys_ctrl {
+			compatible = "hisilicon,hi6220-sysctrl", "syscon";
+			reg = <0x0 0xf7030000 0x0 0x2000>;
+			#clock-cells = <1>;
+		};
+
+		media_ctrl: media_ctrl {
+			compatible = "hisilicon,hi6220-mediactrl", "syscon";
+			reg = <0x0 0xf4410000 0x0 0x1000>;
+			#clock-cells = <1>;
+		};
+
+		pm_ctrl: pm_ctrl {
+			compatible = "hisilicon,hi6220-pmctrl", "syscon";
+			reg = <0x0 0xf7032000 0x0 0x1000>;
+			#clock-cells = <1>;
+		};
+
+		uart0: uart at f8015000 {	/* console */
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x0 0xf8015000 0x0 0x1000>;
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ao_ctrl HI6220_UART0_PCLK>, <&ao_ctrl HI6220_UART0_PCLK>;
+			clock-names = "uartclk", "apb_pclk";
+		};
+	};
+};

arch/arm64/boot/dts/hisilicon/hi6220.dtsi new file +9 -0

+		ao_ctrl: ao_ctrl {
+			compatible = "hisilicon,hi6220-aoctrl", "syscon";
+			reg = <0x0 0xf7800000 0x0 0x2000>;
+			#clock-cells = <1>;
+		};
+
+		sys_ctrl: sys_ctrl {
+			compatible = "hisilicon,hi6220-sysctrl", "syscon";
+			reg = <0x0 0xf7030000 0x0 0x2000>;

arch/arm64/boot/dts/hisilicon/hi6220.dtsi new file +4 -0

+			compatible = "hisilicon,hi6220-pmctrl", "syscon";
+			reg = <0x0 0xf7032000 0x0 0x1000>;
+			#clock-cells = <1>;
+		};

A minor random comment below.

Quoted 14 lines · Bintian Wang

arch/arm64/boot/dts/hisilicon/hi6220.dtsi new file +14 -0

+		ao_ctrl: ao_ctrl {
+			compatible = "hisilicon,hi6220-aoctrl", "syscon";
+			reg = <0x0 0xf7800000 0x0 0x2000>;
+			#clock-cells = <1>;
+		};
+
+		sys_ctrl: sys_ctrl {
+			compatible = "hisilicon,hi6220-sysctrl", "syscon";
+			reg = <0x0 0xf7030000 0x0 0x2000>;
+			#clock-cells = <1>;
+		};
+
+		media_ctrl: media_ctrl {
+			compatible = "hisilicon,hi6220-mediactrl", "syscon";

arch/arm64/boot/dts/hisilicon/hi6220.dtsi line 158

Quoted 5 lines

arch/arm64/boot/dts/hisilicon/hi6220.dtsi new file +5 -0

+			reg = <0x0 0xf4410000 0x0 0x1000>;
+			#clock-cells = <1>;
+		};
+
+		pm_ctrl: pm_ctrl {

An unit-address should be coded in the node name, when it has a 'reg' property.

Shawn

arch/arm64/boot/dts/hisilicon/hi6220.dtsi line 162

Quoted 4 lines

arch/arm64/boot/dts/hisilicon/hi6220.dtsi new file +4 -0

+			compatible = "hisilicon,hi6220-pmctrl", "syscon";
+			reg = <0x0 0xf7032000 0x0 0x1000>;
+			#clock-cells = <1>;
+		};

.

Hello Shawn,

Quoted 17 lines · Shawn Guo

A minor random comment below.

Quoted 14 lines · Bintian Wang

arch/arm64/boot/dts/hisilicon/hi6220.dtsi new file +14 -0

+        ao_ctrl: ao_ctrl {
+            compatible = "hisilicon,hi6220-aoctrl", "syscon";
+            reg = <0x0 0xf7800000 0x0 0x2000>;
+            #clock-cells = <1>;
+        };
+
+        sys_ctrl: sys_ctrl {
+            compatible = "hisilicon,hi6220-sysctrl", "syscon";
+            reg = <0x0 0xf7030000 0x0 0x2000>;
+            #clock-cells = <1>;
+        };
+
+        media_ctrl: media_ctrl {
+            compatible = "hisilicon,hi6220-mediactrl", "syscon";

Quoted 8 lines

arch/arm64/boot/dts/hisilicon/hi6220.dtsi line 158

Quoted 5 lines

arch/arm64/boot/dts/hisilicon/hi6220.dtsi new file +5 -0

+            reg = <0x0 0xf4410000 0x0 0x1000>;
+            #clock-cells = <1>;
+        };
+
+        pm_ctrl: pm_ctrl {

An unit-address should be coded in the node name, when it has a 'reg' property.

Thanks for your suggestion, Rob also gives me the same suggestion :)

In fact, I added the reg to node name in the "[GIT PULL]Hisilicon 64-bit soc hi6220 DT changes for 4.2", but it seems the pull is too late for kernel 4.2, I will prepare it for 4.3.

Thanks,

Bintian

Quoted 10 lines

Shawn

arch/arm64/boot/dts/hisilicon/hi6220.dtsi line 162

Quoted 4 lines

arch/arm64/boot/dts/hisilicon/hi6220.dtsi new file +4 -0

+            compatible = "hisilicon,hi6220-pmctrl", "syscon";
+            reg = <0x0 0xf7032000 0x0 0x1000>;
+            #clock-cells = <1>;
+        };

.

.

Hi6220 is one mobile solution of Hisilicon, this patchset contains initial support for Hi6220 SoC and HiKey development board, which supports octal ARM Cortex A53 cores. Initial support is minimal and includes just the arch configuration, device tree configuration, the clock driver has been picked up by clock maintainers in clk tree.

PSCI is enabled in device tree and there is no problem to boot all the octal cores, and the CPU hotplug is also working now, you can download and compile the latest firmware based on the following link to run this patch set:
https://github.com/96boards/documentation/wiki/UEFI

Chnages v9:
* Rebase to linus/master 4.1-rc1
* Remove the clock driver from this version because the clock maintainers have queued up the clock driver:
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next-hi6220
* This version also includes clock header file:
[PATCH v9 6/6] dt-bindings: Add header file of hi6220 clock driver Although above patch is included in clock driver, I add to this series because the device tree file includes it, there will be compile error without it.
At last, we just need to keep one when merged together.

Hi6220 is one mobile solution of Hisilicon, this patchset contains initial support for Hi6220 SoC and HiKey development board, which supports octal ARM Cortex A53 cores. Initial support is minimal and includes just the arch configuration, device tree configuration, the clock driver has been picked up by clock maintainers in clk tree.

PSCI is enabled in device tree and there is no problem to boot all the octal cores, and the CPU hotplug is also working now, you can download and compile the latest firmware based on the following link to run this patch set:
https://github.com/96boards/documentation/wiki/UEFI

Chnages v9:
* Rebase to linus/master 4.1-rc1
* Remove the clock driver from this version because the clock maintainers have queued up the clock driver:

   git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next-hi6220

* This version also includes clock header file:
[PATCH v9 6/6] dt-bindings: Add header file of hi6220 clock driver Although above patch is included in clock driver, I add to this series because the device tree file includes it, there will be compile error without it.
At last, we just need to keep one when merged together.

Changes v6~v8:
This three versions only modified the clock drivers based on the Stephen's review advices.
* clk-hi6220.c:
** Split the clock header file from clock driver
** Delete setting the parents clock of UART1 to HI6220_150M in clock
driver, we can do that using assigned-clock in dts when enable UART1 in the future.
* clkdivider-hi6220.c:
** Reuse some functions exported by clk-divider.c
** Remove "pr_err" and CLK_IS_BASIC flag
** Fix some programing style problems
* hisilicon/clk.h: remove the "__init" markings on some funcition prototypes.

Changes v5:
* Rebase to kernel 4.1-rc2
* Add compatible string "hisilicon,hi6220-pl011" for Hisilicon designed UART
* clk-hi6220.c: use __initdata for non-const arrays based on the commit 692d8328e8c039f9497eb862c6cf835de922c061

Changes v4:
* Rebase to kernel 4.1-rc1
* Delete "arm,cortex-a15-gic" from the gic node in dts

Changes v3:
* Verified the CPU hotplug based on the new released firmware
* Redefined the compatible strings of four system controllers in dts
* Setting COMMON_CLK_HI6220 to a bool symbol
* Keep CONFGI_ARCH_HISI sorted alphabetically

Changes v2:
* Split the DT bindings documents into earlier patches
* Change SMP enable method from spin-table to PSCI in device tree
* Remove "clock-frequency" from armv8-timer device node in device tree
* Add more description about Hisilicon designed system controllers in DT bindings document
* Enable high speed clock on UART1 mux
* Other changes based on the discussion in the mailing list:

   https://lkml.org/lkml/2015/2/5/147

Bintian Wang (6):
arm64: Enable Hisilicon ARMv8 SoC family in Kconfig and defconfig
arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
clk: hi6220: Document devicetree bindings for hi6220 clock
Documentation: DT: PL011: hi6220: add compatible string for Hisilicon
designed UART
arm64: dts: Add dts files for Hisilicon Hi6220 SoC
dt-bindings: Add header file of hi6220 clock driver

  .../bindings/arm/hisilicon/hisilicon.txt           |   87 ++++++++++
  .../devicetree/bindings/clock/hi6220-clock.txt     |   34 ++++
  Documentation/devicetree/bindings/serial/pl011.txt |    4 +-
  arch/arm64/Kconfig                                 |    5 +
  arch/arm64/boot/dts/Makefile                       |    1 +
  arch/arm64/boot/dts/hisilicon/Makefile             |    5 +
  arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts     |   31 ++++
  arch/arm64/boot/dts/hisilicon/hi6220.dtsi          |  172 +++++++++++++++++++
  arch/arm64/configs/defconfig                       |    1 +
  include/dt-bindings/clock/hi6220-clock.h           |  173 ++++++++++++++++++++
  10 files changed, 512 insertions(+), 1 deletion(-)

create mode 100644 Documentation/devicetree/bindings/clock/hi6220-clock.txt create mode 100644 arch/arm64/boot/dts/hisilicon/Makefile create mode 100644 arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts create mode 100644 arch/arm64/boot/dts/hisilicon/hi6220.dtsi create mode 100644 include/dt-bindings/clock/hi6220-clock.h

Hi Will, Mark and other ARM64 DT maintainers,

Could you help ack this version? although Will, Kevin and Tyler have tested this patch set, I think also need an ack from you.

Quoted 4 lines · Bintian

Hi Will, Mark and other ARM64 DT maintainers,

Could you help ack this version? although Will, Kevin and Tyler have tested this patch set, I think also need an ack from you.

I'm not a DT maintainer, but Mark and/or Rob should be able to review the bindings.

I acked the Kconfig bits, FWIW, so I don't think you need any more on the arch side.

Will

.