x86 FPU changes for v4.2
Subsystems (12)
Linus,
Please pull the latest x86-fpu-for-linus git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-fpu-for-linus
# HEAD: a8424003679e90b9952e20adcd1ff1560d9dd3e9 x86/fpu: Fix double-increment in setup_xstate_features()
This tree contains two main changes:
- the big FPU code rewrite: wide reaching cleanups and reorganization that pulls all the FPU code together into a clean base in arch/x86/fpu/. The resulting code is leaner and faster, and much easier to understand. This enables future work to further simplify the FPU code (such as removing lazy FPU restores).
By its nature these changes have a substantial regression risk: FPU code related bugs are long lived, because races are often subtle and bugs mask as user-space failures that are difficult to track back to kernel side backs. I'm aware of no unfixed (or even suspected) FPU related regression so far.
- MPX support rework/fixes. As this is still not a released CPU feature, there were some buglets in the code - should be much more robust now. (Dave Hansen)
out-of-topic modifications in x86-fpu-for-linus:
--------------------------------------------------
drivers/char/hw_random/via-rng.c # df6b35f409af: x86/fpu: Rename i387.h to fp
drivers/crypto/padlock-aes.c # df6b35f409af: x86/fpu: Rename i387.h to fp
drivers/crypto/padlock-sha.c # df6b35f409af: x86/fpu: Rename i387.h to fp
drivers/lguest/x86/core.c # e1884d69f643: x86/fpu: Pass 'struct fpu' t
# 3c6dffa93be9: x86/fpu: Rename user_has_fpu
# 952f07ecbd4d: x86/fpu: Move various intern
# df6b35f409af: x86/fpu: Rename i387.h to fp
# 3a0aee4801d4: x86/fpu: Rename math_state_r kernel/sys.c # 46a6e0cf1c66: x86/mpx: Clean up the code b
lib/raid6/x86.h # df6b35f409af: x86/fpu: Rename i387.h to fp
Thanks,
Ingo
------------------>
[ Shortlog, diffstat and patch were hand-generated, because the pull request
scripting had troubles with my merge base. ]
Dave Hansen (19):
x86/fpu/xstate: Fix up bad get_xsave_addr() assumptions x86/fpu/xstate: Wrap get_xsave_addr() to make it safer
x86/mpx: Use the new get_xsave_field_ptr()API
x86/mpx: Clean up the code by not passing a task pointer around when unnecessary x86/mpx: Restrict the mmap() size check to bounds tables
x86/mpx: Introduce a boot-time disable flag
x86/mpx: Trace #BR exceptions
x86/mpx: Trace entry to bounds exception paths
x86/mpx: Trace the attempts to find bounds tables
x86/mpx: Trace allocation of new bounds tables
x86: Make is_64bit_mm() widely available
x86/mpx: Add temporary variable to reduce masking
x86/mpx: Introduce new 'directory entry' to 'addr' helper function x86/mpx: Use 32-bit-only cmpxchg() for 32-bit apps
x86/mpx: Support 32-bit binaries on 64-bit kernels
x86/mpx: Rewrite the unmap code
x86/mpx: Do not count MPX VMAs as neighbors when unmapping x86/mpx: Allow 32-bit binaries on 64-bit kernels again
x86/fpu: Fix double-increment in setup_xstate_features()
Ingo Molnar (232):
x86/fpu: Rename unlazy_fpu() to fpu__save()
x86/fpu: Add comments to fpu__save() and restrict its export
x86/fpu: Add debugging check to fpu__save()
x86/fpu: Rename fpu_detect() to fpu__detect()
x86/fpu: Remove stale init_fpu() prototype
x86/fpu: Split an fpstate_alloc_init() function out of init_fpu()
x86/fpu: Make init_fpu() static
x86/fpu: Rename init_fpu() to fpu__unlazy_stopped() and add debugging check x86/fpu: Optimize fpu__unlazy_stopped()
x86/fpu: Simplify fpu__unlazy_stopped()
x86/fpu: Remove fpu_allocated()
x86/fpu: Move fpu_alloc() out of line
x86/fpu: Rename fpu_alloc() to fpstate_alloc()
x86/fpu: Rename fpu_free() to fpstate_free()
x86/fpu: Rename fpu_finit() to fpstate_init()
x86/fpu: Rename fpu_init() to fpu__cpu_init()
x86/fpu: Rename init_thread_xstate() to fpstate_xstate_init_size()
x86/fpu: Move thread_info::fpu_counter into thread_info::fpu.counter
x86/fpu: Improve the comment for the fpu::counter field
x86/fpu: Move FPU data structures to asm/fpu_types.h
x86/fpu: Clean up asm/fpu/types.h
x86/fpu: Move i387.c and xsave.c to arch/x86/kernel/fpu/
x86/fpu: Fix header file dependencies of fpu-internal.h
x86/fpu: Split out the boot time FPU init code into fpu/init.c
x86/fpu: Remove unnecessary includes from core.c
x86/fpu: Move the no_387 handling and FPU detection code into init.c
x86/fpu: Remove the free_thread_xstate() complication
x86/fpu: Factor out fpu__flush_thread() from flush_thread()
x86/fpu: Move math_state_restore() to fpu/core.c
x86/fpu: Rename math_state_restore() to fpu__restore()
x86/fpu: Factor out the FPU bug detection code into fpu__init_check_bugs()
x86/fpu: Simplify the xsave_state*() methods
x86/fpu: Remove fpu_xsave()
x86/fpu: Move task_xstate_cachep handling to core.c
x86/fpu: Factor out fpu__copy()
x86/fpu: Uninline fpstate_free() and move it next to the allocation function x86/fpu: Make task_xstate_cachep static
x86/fpu: Make kernel_fpu_disable/enable() static
x86/fpu: Add debug check to kernel_fpu_disable()
x86/fpu: Add kernel_fpu_disabled()
x86/fpu: Remove __save_init_fpu()
x86/fpu: Move fpu_copy() to fpu/core.c
x86/fpu: Add debugging check to fpu_copy()
x86/fpu: Print out whether we are doing lazy/eager FPU context switches
x86/fpu: Eliminate the __thread_has_fpu() wrapper
x86/fpu: Change __thread_clear_has_fpu() to 'struct fpu' parameter
x86/fpu: Move 'PER_CPU(fpu_owner_task)' to fpu/core.c
x86/fpu: Change fpu_owner_task to fpu_fpregs_owner_ctx
x86/fpu: Remove 'struct task_struct' usage from __thread_set_has_fpu()
x86/fpu: Remove 'struct task_struct' usage from __thread_fpu_end()
x86/fpu: Remove 'struct task_struct' usage from __thread_fpu_begin()
x86/fpu: Open code PF_USED_MATH usages
x86/fpu: Document fpu__unlazy_stopped()
x86/fpu: Get rid of PF_USED_MATH usage, convert it to fpu->fpstate_active
x86/fpu: Remove 'struct task_struct' usage from drop_fpu()
x86/fpu: Remove task_disable_lazy_fpu_restore()
x86/fpu: Use 'struct fpu' in fpu_lazy_restore()
x86/fpu: Use 'struct fpu' in restore_fpu_checking()
x86/fpu: Use 'struct fpu' in fpu_reset_state()
x86/fpu: Use 'struct fpu' in switch_fpu_prepare()
x86/fpu: Use 'struct fpu' in switch_fpu_finish()
x86/fpu: Move __save_fpu() into fpu/core.c
x86/fpu: Use 'struct fpu' in __fpu_save()
x86/fpu: Use 'struct fpu' in fpu__save()
x86/fpu: Use 'struct fpu' in fpu_copy()
x86/fpu: Use 'struct fpu' in fpu__copy()
x86/fpu: Use 'struct fpu' in fpstate_alloc_init()
x86/fpu: Use 'struct fpu' in fpu__unlazy_stopped()
x86/fpu: Rename fpu__flush_thread() to fpu__clear()
x86/fpu: Clean up fpu__clear() a bit
x86/fpu: Rename i387.h to fpu/api.h
x86/fpu: Move xsave.h to fpu/xsave.h
x86/fpu: Rename fpu-internal.h to fpu/internal.h
x86/fpu: Move MXCSR_DEFAULT to fpu/internal.h
x86/fpu: Remove xsave_init() __init obfuscation
x86/fpu: Remove assembly guard from asm/fpu/api.h
x86/fpu: Improve FPU detection kernel messages
x86/fpu: Print supported xstate features in human readable way
x86/fpu: Rename 'pcntxt_mask' to 'xfeatures_mask'
x86/fpu: Rename 'xstate_features' to 'xfeatures_nr'
x86/fpu: Move XCR0 manipulation to the FPU code proper
x86/fpu: Clean up regset functions
x86/fpu: Rename 'xsave_hdr' to 'header'
x86/fpu: Rename xsave.header::xstate_bv to 'xfeatures'
x86/fpu: Clean up and fix MXCSR handling
x86/fpu: Rename regset FPU register accessors
x86/fpu: Explain the AVX register layout in the xsave area
x86/fpu: Improve the __sanitize_i387_state() documentation
x86/fpu: Rename fpu->has_fpu to fpu->fpregs_active
x86/fpu: Rename __thread_set_has_fpu() to __fpregs_activate()
x86/fpu: Rename __thread_clear_has_fpu() to __fpregs_deactivate()
x86/fpu: Rename __thread_fpu_begin() to fpregs_activate()
x86/fpu: Rename __thread_fpu_end() to fpregs_deactivate()
x86/fpu: Remove fpstate_xstate_init_size() boot quirk
x86/fpu: Remove xsave_init() bootmem allocations
x86/fpu: Make setup_init_fpu_buf() run-once explicitly
x86/fpu: Remove 'init_xstate_buf' bootmem allocation
x86/fpu: Split fpu__cpu_init() into early-boot and cpu-boot parts
x86/fpu: Make the system/cpu init distinction clear in the xstate code as well x86/fpu: Move CPU capability check into fpu__init_cpu_xstate()
x86/fpu: Move legacy check to fpu__init_system_xstate()
x86/fpu: Propagate once per boot quirk into fpu__init_system_xstate()
x86/fpu: Remove xsave_init()
x86/fpu: Do fpu__init_system_xstate only from fpu__init_system()
x86/fpu: Set up the legacy FPU init image from fpu__init_system()
x86/fpu: Remove setup_init_fpu_buf() call from eager_fpu_init()
x86/fpu: Move all eager-fpu setup code to eager_fpu_init()
x86/fpu: Move eager_fpu_init() to fpu/init.c
x86/fpu: Clean up eager_fpu_init() and rename it to fpu__ctx_switch_init()
x86/fpu: Split fpu__ctx_switch_init() into _cpu() and _system() portions
x86/fpu: Do CLTS fpu__init_system()
x86/fpu: Move the fpstate_xstate_init_size() call into fpu__init_system()
x86/fpu: Call fpu__init_cpu_ctx_switch() from fpu__init_cpu()
x86/fpu: Do system-wide setup from fpu__detect()
x86/fpu: Remove fpu__init_cpu_ctx_switch() call from fpu__init_system()
x86/fpu: Simplify fpu__cpu_init()
x86/fpu: Factor out fpu__init_cpu_generic()
x86/fpu: Factor out fpu__init_system_generic()
x86/fpu: Factor out fpu__init_system_early_generic()
x86/fpu: Move !FPU check ingo fpu__init_system_early_generic()
x86/fpu: Factor out FPU bug checks into fpu/bugs.c
x86/fpu: Make check_fpu() init ordering independent
x86/fpu: Move fpu__init_system_early_generic() out of fpu__detect()
x86/fpu: Remove the extra fpu__detect() layer
x86/fpu: Rename fpstate_xstate_init_size() to fpu__init_system_xstate_size_legacy() x86/fpu: Reorder init methods
x86/fpu: Add more comments to the FPU init code
x86/fpu: Move fpu__save() to fpu/internals.h
x86/fpu: Uninline kernel_fpu_begin()/end()
x86/fpu: Move various internal function prototypes to fpu/internal.h
x86/fpu: Uninline the irq_ts_save()/restore() functions
x86/fpu: Rename fpu_save_init() to copy_fpregs_to_fpstate()
x86/fpu: Optimize copy_fpregs_to_fpstate() by removing the FNCLEX synchronization with FP exceptions x86/fpu: Simplify FPU handling by embedding the fpstate in task_struct (again) x86/fpu: Remove failure paths from fpstate-alloc low level functions
x86/fpu: Remove failure return from fpstate_alloc_init()
x86/fpu: Rename fpstate_alloc_init() to fpstate_init_curr()
x86/fpu: Simplify fpu__unlazy_stopped() error handling
x86/fpu, kvm: Simplify fx_init()
x86/fpu: Simplify fpstate_init_curr() usage
x86/fpu: Rename fpu__unlazy_stopped() to fpu__activate_stopped()
x86/fpu: Factor out FPU hw activation/deactivation
x86/fpu: Simplify __save_fpu()
x86/fpu: Eliminate __save_fpu()
x86/fpu: Simplify fpu__save()
x86/fpu: Optimize fpu__save()
x86/fpu: Optimize fpu_copy()
x86/fpu: Optimize fpu_copy() some more on lazy switching systems
x86/fpu: Rename fpu/xsave.h to fpu/xstate.h
x86/fpu: Rename fpu/xsave.c to fpu/xstate.c
x86/fpu: Introduce cpu_has_xfeatures(xfeatures_mask, feature_name)
x86/fpu: Simplify print_xstate_features()
x86/fpu: Enumerate xfeature bits
x86/fpu: Move xfeature type enumeration to fpu/types.h
x86/fpu, crypto x86/camellia_aesni_avx: Simplify the camellia_aesni_init() xfeature checks x86/fpu, crypto x86/sha256_ssse3: Simplify the sha256_ssse3_mod_init() xfeature checks x86/fpu, crypto x86/camellia_aesni_avx2: Simplify the camellia_aesni_init() xfeature checks x86/fpu, crypto x86/twofish_avx: Simplify the twofish_init() xfeature checks x86/fpu, crypto x86/serpent_avx: Simplify the serpent_init() xfeature checks x86/fpu, crypto x86/cast5_avx: Simplify the cast5_init() xfeature checks
x86/fpu, crypto x86/sha512_ssse3: Simplify the sha512_ssse3_mod_init() xfeature checks x86/fpu, crypto x86/cast6_avx: Simplify the cast6_init() xfeature checks
x86/fpu, crypto x86/sha1_ssse3: Simplify the sha1_ssse3_mod_init() xfeature checks x86/fpu, crypto x86/serpent_avx2: Simplify the init() xfeature checks
x86/fpu, crypto x86/sha1_mb: Remove FPU internal headers from sha1_mb.c
x86/fpu: Move asm/xcr.h to asm/fpu/internal.h
x86/fpu: Rename sanitize_i387_state() to fpstate_sanitize_xstate()
x86/fpu: Simplify fpstate_sanitize_xstate() calls
x86/fpu: Pass 'struct fpu' to fpstate_sanitize_xstate()
x86/fpu: Rename save_xstate_sig() to copy_fpstate_to_sigframe()
x86/fpu: Rename save_user_xstate() to copy_fpregs_to_sigframe()
x86/fpu: Clarify ancient comments in fpu__restore()
x86/fpu: Rename user_has_fpu() to fpregs_active()
x86/fpu: Initialize fpregs in fpu__init_cpu_generic()
x86/fpu: Better document fpu__clear() state handling
x86/alternatives, x86/fpu: Add 'alternatives_patched' debug flag and use it in xsave_state() x86/fpu: Synchronize the naming of drop_fpu() and fpu_reset_state()
x86/fpu: Rename restore_fpu_checking() to copy_fpstate_to_fpregs()
x86/fpu: Move all the fpu__*() high level methods closer to each other
x86/fpu: Move fpu__clear() to 'struct fpu *' parameter passing
x86/fpu: Rename restore_xstate_sig() to fpu__restore_sig()
x86/fpu: Move the signal frame handling code closer to each other
x86/fpu: Merge fpu__reset() and fpu__clear()
x86/fpu: Move is_ia32*frame() helpers out of fpu/internal.h
x86/fpu: Split out fpu/signal.h from fpu/internal.h for signal frame handling functions x86/fpu: Factor out fpu/regset.h from fpu/internal.h
x86/fpu: Remove run-once init quirks
x86/fpu: Factor out the exception error code handling code
x86/fpu: Harmonize the names of the fpstate_init() helper functions
x86/fpu: Create 'union thread_xstate' helper for fpstate_init()
x86/fpu: Generalize 'init_xstate_ctx'
x86/fpu: Move restore_init_xstate() out of fpu/internal.h
x86/fpu: Rename all the fpregs, xregs, fxregs and fregs handling functions
x86/fpu: Factor out fpu/signal.c
x86/fpu: Factor out the FPU regset code into fpu/regset.c
x86/fpu: Harmonize FPU register state types
x86/fpu: Change fpu->fpregs_active from 'int' to 'char', add lazy switching comments x86/fpu: Document the various fpregs state formats
x86/fpu: Move debugging check from kernel_fpu_begin() to __kernel_fpu_begin() x86/fpu/xstate: Don't assume the first zero xfeatures zero bit means the end x86/fpu: Clean up xstate feature reservation
x86/fpu/xstate: Clean up setup_xstate_comp() call
x86/fpu/init: Propagate __init annotations
x86/fpu: Pass 'struct fpu' to fpu__restore()
x86/fpu: Fix the 'nofxsr' boot parameter to also clear X86_FEATURE_FXSR_OPT x86/fpu: Add CONFIG_X86_DEBUG_FPU=y FPU debugging code
x86/fpu: Reorganize fpu/internal.h
x86/fpu/xstate: Use explicit parameter in xstate_fault()
x86/fpu/init: Move __setup() functions to fpu/init.c
x86/fpu/init: Clean up and comment the __setup() functions
Merge branch 'x86/urgent' into x86/fpu, to resolve a conflict
x86/fpu, crypto: Fix AVX2 feature tests
x86/fpu: Fix FPU state save area alignment bug
x86/fpu: Move the xstate copying functions into fpu/internal.h
x86/fpu: Fix fpu__init_system_xstate() comments
x86/fpu: Rename xstate related 'fx' references to 'xstate'
x86/fpu: Improve xstate_fault() handling
x86/fpu: Improve the initialization logic of 'err' around xstate_fault() constraints x86/fpu: Micro-optimize the copy_xregs_to_kernel*() and copy_kernel_to_xregs*() functions x86/fpu: Fix FPU register read access to the current task
x86/fpu: Split out the fpu__activate_fpstate_read() method
x86/fpu: Optimize fpu__activate_fpstate_read()
x86/fpu: Rename fpu__activate_fpstate() to fpu__activate_fpstate_write()
x86/fpu: Optimize fpu__activate_fpstate_write()
x86/fpu: Add debugging check to fpu__restore()
x86/fpu: Add debugging checks to all copy_kernel_to_*() functions
x86/fpu: Rename copy_fpstate_to_fpregs() to copy_kernel_to_fpregs()
x86/fpu: Remove error return values from copy_kernel_to_*regs() functions
x86/fpu: Standardize the parameter type of copy_kernel_to_fpregs()
x86/fpu: Simplify copy_kernel_to_xregs_booting()
x86/fpu: Make WARN_ON_FPU() more robust in the !CONFIG_X86_DEBUG_FPU case
Merge branch 'x86-fpu-for-linus' into tmp.tmp3
Qiaowei Ren (1):
x86/mpx: Remove redundant MPX_BNDCFG_ADDR_MASK
Documentation/kernel-parameters.txt | 4 + Documentation/preempt-locking.txt | 2 +- arch/x86/Kconfig.debug | 12 + arch/x86/crypto/aesni-intel_glue.c | 2 +- arch/x86/crypto/camellia_aesni_avx2_glue.c | 10 +- arch/x86/crypto/camellia_aesni_avx_glue.c | 15 +- arch/x86/crypto/cast5_avx_glue.c | 15 +- arch/x86/crypto/cast6_avx_glue.c | 15 +- arch/x86/crypto/crc32-pclmul_glue.c | 2 +- arch/x86/crypto/crc32c-intel_glue.c | 3 +- arch/x86/crypto/crct10dif-pclmul_glue.c | 2 +- arch/x86/crypto/fpu.c | 2 +- arch/x86/crypto/ghash-clmulni-intel_glue.c | 2 +- arch/x86/crypto/serpent_avx2_glue.c | 11 +- arch/x86/crypto/serpent_avx_glue.c | 15 +- arch/x86/crypto/sha-mb/sha1_mb.c | 5 +- arch/x86/crypto/sha1_ssse3_glue.c | 16 +- arch/x86/crypto/sha256_ssse3_glue.c | 16 +- arch/x86/crypto/sha512_ssse3_glue.c | 16 +- arch/x86/crypto/twofish_avx_glue.c | 16 +- arch/x86/ia32/ia32_signal.c | 13 +- arch/x86/include/asm/alternative.h | 6 + arch/x86/include/asm/crypto/glue_helper.h | 2 +- arch/x86/include/asm/efi.h | 2 +- arch/x86/include/asm/fpu-internal.h | 626 ------------------------- arch/x86/include/asm/fpu/api.h | 48 ++ arch/x86/include/asm/fpu/internal.h | 694 +++++++++++++++++++++++++++ arch/x86/include/asm/fpu/regset.h | 21 + arch/x86/include/asm/fpu/signal.h | 33 ++ arch/x86/include/asm/fpu/types.h | 293 ++++++++++++ arch/x86/include/asm/fpu/xstate.h | 46 ++ arch/x86/include/asm/i387.h | 108 ----- arch/x86/include/asm/kvm_host.h | 2 - arch/x86/include/asm/mmu_context.h | 13 + arch/x86/include/asm/mpx.h | 74 ++- arch/x86/include/asm/processor.h | 160 +------ arch/x86/include/asm/simd.h | 2 +- arch/x86/include/asm/stackprotector.h | 2 + arch/x86/include/asm/suspend_32.h | 2 +- arch/x86/include/asm/suspend_64.h | 2 +- arch/x86/include/asm/trace/mpx.h | 132 ++++++ arch/x86/include/asm/user.h | 12 +- arch/x86/include/asm/xcr.h | 49 -- arch/x86/include/asm/xor.h | 2 +- arch/x86/include/asm/xor_32.h | 2 +- arch/x86/include/asm/xor_avx.h | 2 +- arch/x86/include/asm/xsave.h | 257 ---------- arch/x86/include/uapi/asm/sigcontext.h | 8 +- arch/x86/kernel/Makefile | 2 +- arch/x86/kernel/alternative.c | 5 + arch/x86/kernel/cpu/bugs.c | 55 +-- arch/x86/kernel/cpu/common.c | 47 +- arch/x86/kernel/fpu/Makefile | 5 + arch/x86/kernel/fpu/bugs.c | 71 +++ arch/x86/kernel/fpu/core.c | 523 +++++++++++++++++++++ arch/x86/kernel/fpu/init.c | 354 ++++++++++++++ arch/x86/kernel/fpu/regset.c | 356 ++++++++++++++ arch/x86/kernel/fpu/signal.c | 404 ++++++++++++++++ arch/x86/kernel/fpu/xstate.c | 461 ++++++++++++++++++ arch/x86/kernel/i387.c | 671 -------------------------- arch/x86/kernel/process.c | 54 +-- arch/x86/kernel/process_32.c | 15 +- arch/x86/kernel/process_64.c | 13 +- arch/x86/kernel/ptrace.c | 12 +- arch/x86/kernel/signal.c | 38 +- arch/x86/kernel/smpboot.c | 3 +- arch/x86/kernel/traps.c | 134 +----- arch/x86/kernel/uprobes.c | 10 +- arch/x86/kernel/xsave.c | 724 ----------------------------- arch/x86/kvm/cpuid.c | 4 +- arch/x86/kvm/vmx.c | 5 +- arch/x86/kvm/x86.c | 68 +-- arch/x86/lguest/boot.c | 2 +- arch/x86/lib/mmx_32.c | 2 +- arch/x86/math-emu/fpu_aux.c | 4 +- arch/x86/math-emu/fpu_entry.c | 20 +- arch/x86/math-emu/fpu_system.h | 2 +- arch/x86/mm/mpx.c | 519 +++++++++++++-------- arch/x86/power/cpu.c | 11 +- arch/x86/xen/enlighten.c | 2 +- drivers/char/hw_random/via-rng.c | 2 +- drivers/crypto/padlock-aes.c | 2 +- drivers/crypto/padlock-sha.c | 2 +- drivers/lguest/x86/core.c | 12 +- kernel/sys.c | 8 +- lib/raid6/x86.h | 2 +- 86 files changed, 4082 insertions(+), 3336 deletions(-)
Documentation/kernel-parameters.txt +4 -0
@@ -937,6 +937,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted. Enable debug messages at boot time. See Documentation/dynamic-debug-howto.txt for details. + nompx [X86] Disables Intel Memory Protection Extensions. + See Documentation/x86/intel_mpx.txt for more + information about the feature. + eagerfpu= [X86] on enable eager fpu restore off disable eager fpu restore
Documentation/preempt-locking.txt +1 -1
@@ -48,7 +48,7 @@ preemption must be disabled around such regions. Note, some FPU functions are already explicitly preempt safe. For example, kernel_fpu_begin and kernel_fpu_end will disable and enable preemption. -However, math_state_restore must be called with preemption disabled. +However, fpu__restore() must be called with preemption disabled. RULE #3: Lock acquire and release must be performed by same task
arch/x86/Kconfig.debug +12 -0
@@ -332,4 +332,16 @@ config X86_DEBUG_STATIC_CPU_HAS If unsure, say N. +config X86_DEBUG_FPU + bool "Debug the x86 FPU code" + depends on DEBUG_KERNEL + default y + ---help--- + If this option is enabled then there will be extra sanity + checks and (boot time) debug printouts added to the kernel. + This debugging adds some small amount of runtime overhead + to the kernel. + + If unsure, say N. + endmenu
arch/x86/crypto/aesni-intel_glue.c +1 -1
@@ -32,7 +32,7 @@#include <crypto/lrw.h> #include <crypto/xts.h> #include <asm/cpu_device_id.h> -#include <asm/i387.h> +#include <asm/fpu/api.h> #include <asm/crypto/aes.h> #include <crypto/ablk_helper.h> #include <crypto/scatterwalk.h>
arch/x86/crypto/camellia_aesni_avx2_glue.c +4 -6
@@ -19,8 +19,7 @@#include <crypto/ctr.h> #include <crypto/lrw.h> #include <crypto/xts.h> -#include <asm/xcr.h> -#include <asm/xsave.h> +#include <asm/fpu/api.h> #include <asm/crypto/camellia.h> #include <asm/crypto/glue_helper.h>
@@ -561,16 +560,15 @@ static struct crypto_alg cmll_algs[10] = { {static int __init camellia_aesni_init (void ) { -u64 xcr0; +const char *feature_name;if (!cpu_has_avx2 || !cpu_has_avx || !cpu_has_aes || !cpu_has_osxsave) {pr_info ("AVX2 or AES-NI instructions are not detected.\n" );return -ENODEV ; } - xcr0 =xgetbv (XCR_XFEATURE_ENABLED_MASK ); -if ((xcr0 & (XSTATE_SSE |XSTATE_YMM )) != (XSTATE_SSE |XSTATE_YMM )) { -pr_info ("AVX2 detected but unusable.\n" ); +if (!cpu_has_xfeatures (XSTATE_SSE |XSTATE_YMM , &feature_name)) { +pr_info ("CPU feature '%s' is not supported.\n" , feature_name);return -ENODEV ; }
arch/x86/crypto/camellia_aesni_avx_glue.c +4 -11
@@ -19,8 +19,7 @@#include <crypto/ctr.h> #include <crypto/lrw.h> #include <crypto/xts.h> -#include <asm/xcr.h> -#include <asm/xsave.h> +#include <asm/fpu/api.h> #include <asm/crypto/camellia.h> #include <asm/crypto/glue_helper.h>
@@ -553,16 +552,10 @@ static struct crypto_alg cmll_algs[10] = { {static int __init camellia_aesni_init (void ) { -u64 xcr0; +const char *feature_name; -if (!cpu_has_avx || !cpu_has_aes || !cpu_has_osxsave) { -pr_info ("AVX or AES-NI instructions are not detected.\n" ); -return -ENODEV ; - } - - xcr0 =xgetbv (XCR_XFEATURE_ENABLED_MASK ); -if ((xcr0 & (XSTATE_SSE |XSTATE_YMM )) != (XSTATE_SSE |XSTATE_YMM )) { -pr_info ("AVX detected but unusable.\n" ); +if (!cpu_has_xfeatures (XSTATE_SSE |XSTATE_YMM , &feature_name)) { +pr_info ("CPU feature '%s' is not supported.\n" , feature_name);return -ENODEV ; }
arch/x86/crypto/cast5_avx_glue.c +4 -11
@@ -31,8 +31,7 @@#include <crypto/cast5.h> #include <crypto/cryptd.h> #include <crypto/ctr.h> -#include <asm/xcr.h> -#include <asm/xsave.h> +#include <asm/fpu/api.h> #include <asm/crypto/glue_helper.h> #define CAST5_PARALLEL_BLOCKS 16
@@ -468,16 +467,10 @@ static struct crypto_alg cast5_algs[6] = { {static int __init cast5_init (void ) { -u64 xcr0; +const char *feature_name; -if (!cpu_has_avx || !cpu_has_osxsave) { -pr_info ("AVX instructions are not detected.\n" ); -return -ENODEV ; - } - - xcr0 =xgetbv (XCR_XFEATURE_ENABLED_MASK ); -if ((xcr0 & (XSTATE_SSE |XSTATE_YMM )) != (XSTATE_SSE |XSTATE_YMM )) { -pr_info ("AVX detected but unusable.\n" ); +if (!cpu_has_xfeatures (XSTATE_SSE |XSTATE_YMM , &feature_name)) { +pr_info ("CPU feature '%s' is not supported.\n" , feature_name);return -ENODEV ; }
arch/x86/crypto/cast6_avx_glue.c +4 -11
@@ -36,8 +36,7 @@#include <crypto/ctr.h> #include <crypto/lrw.h> #include <crypto/xts.h> -#include <asm/xcr.h> -#include <asm/xsave.h> +#include <asm/fpu/api.h> #include <asm/crypto/glue_helper.h> #define CAST6_PARALLEL_BLOCKS 8
@@ -590,16 +589,10 @@ static struct crypto_alg cast6_algs[10] = { {static int __init cast6_init (void ) { -u64 xcr0; +const char *feature_name; -if (!cpu_has_avx || !cpu_has_osxsave) { -pr_info ("AVX instructions are not detected.\n" ); -return -ENODEV ; - } - - xcr0 =xgetbv (XCR_XFEATURE_ENABLED_MASK ); -if ((xcr0 & (XSTATE_SSE |XSTATE_YMM )) != (XSTATE_SSE |XSTATE_YMM )) { -pr_info ("AVX detected but unusable.\n" ); +if (!cpu_has_xfeatures (XSTATE_SSE |XSTATE_YMM , &feature_name)) { +pr_info ("CPU feature '%s' is not supported.\n" , feature_name);return -ENODEV ; }
arch/x86/crypto/crc32-pclmul_glue.c +1 -1
@@ -35,7 +35,7 @@#include <asm/cpufeature.h> #include <asm/cpu_device_id.h> -#include <asm/i387.h> +#include <asm/fpu/api.h> #define CHKSUM_BLOCK_SIZE 1#define CHKSUM_DIGEST_SIZE 4
arch/x86/crypto/crc32c-intel_glue.c +1 -2
@@ -32,8 +32,7 @@#include <asm/cpufeature.h> #include <asm/cpu_device_id.h> -#include <asm/i387.h> -#include <asm/fpu-internal.h> +#include <asm/fpu/internal.h> #define CHKSUM_BLOCK_SIZE 1#define CHKSUM_DIGEST_SIZE 4
arch/x86/crypto/crct10dif-pclmul_glue.c +1 -1
@@ -29,7 +29,7 @@#include <linux/init.h> #include <linux/string.h> #include <linux/kernel.h> -#include <asm/i387.h> +#include <asm/fpu/api.h> #include <asm/cpufeature.h> #include <asm/cpu_device_id.h>
arch/x86/crypto/fpu.c +1 -1
@@ -18,7 +18,7 @@#include <linux/module.h> #include <linux/slab.h> #include <linux/crypto.h> -#include <asm/i387.h> +#include <asm/fpu/api.h> struct crypto_fpu_ctx {struct crypto_blkcipher *child;
arch/x86/crypto/ghash-clmulni-intel_glue.c +1 -1
@@ -19,7 +19,7 @@#include <crypto/cryptd.h> #include <crypto/gf128mul.h> #include <crypto/internal/hash.h> -#include <asm/i387.h> +#include <asm/fpu/api.h> #include <asm/cpu_device_id.h> #define GHASH_BLOCK_SIZE 16
arch/x86/crypto/serpent_avx2_glue.c +4 -7
@@ -20,8 +20,7 @@#include <crypto/lrw.h> #include <crypto/xts.h> #include <crypto/serpent.h> -#include <asm/xcr.h> -#include <asm/xsave.h> +#include <asm/fpu/api.h> #include <asm/crypto/serpent-avx.h> #include <asm/crypto/glue_helper.h>
@@ -537,16 +536,14 @@ static struct crypto_alg srp_algs[10] = { {static int __init init (void ) { -u64 xcr0; +const char *feature_name;if (!cpu_has_avx2 || !cpu_has_osxsave) {pr_info ("AVX2 instructions are not detected.\n" );return -ENODEV ; } - - xcr0 =xgetbv (XCR_XFEATURE_ENABLED_MASK ); -if ((xcr0 & (XSTATE_SSE |XSTATE_YMM )) != (XSTATE_SSE |XSTATE_YMM )) { -pr_info ("AVX detected but unusable.\n" ); +if (!cpu_has_xfeatures (XSTATE_SSE |XSTATE_YMM , &feature_name)) { +pr_info ("CPU feature '%s' is not supported.\n" , feature_name);return -ENODEV ; }
arch/x86/crypto/serpent_avx_glue.c +4 -11
@@ -36,8 +36,7 @@#include <crypto/ctr.h> #include <crypto/lrw.h> #include <crypto/xts.h> -#include <asm/xcr.h> -#include <asm/xsave.h> +#include <asm/fpu/api.h> #include <asm/crypto/serpent-avx.h> #include <asm/crypto/glue_helper.h>
@@ -596,16 +595,10 @@ static struct crypto_alg serpent_algs[10] = { {static int __init serpent_init (void ) { -u64 xcr0; +const char *feature_name; -if (!cpu_has_avx || !cpu_has_osxsave) { -printk (KERN_INFO "AVX instructions are not detected.\n" ); -return -ENODEV ; - } - - xcr0 =xgetbv (XCR_XFEATURE_ENABLED_MASK ); -if ((xcr0 & (XSTATE_SSE |XSTATE_YMM )) != (XSTATE_SSE |XSTATE_YMM )) { -printk (KERN_INFO "AVX detected but unusable.\n" ); +if (!cpu_has_xfeatures (XSTATE_SSE |XSTATE_YMM , &feature_name)) { +pr_info ("CPU feature '%s' is not supported.\n" , feature_name);return -ENODEV ; }
arch/x86/crypto/sha-mb/sha1_mb.c +1 -4
@@ -65,11 +65,8 @@#include <crypto/mcryptd.h> #include <crypto/crypto_wq.h> #include <asm/byteorder.h> -#include <asm/i387.h> -#include <asm/xcr.h> -#include <asm/xsave.h> #include <linux/hardirq.h> -#include <asm/fpu-internal.h> +#include <asm/fpu/api.h> #include "sha_mb_ctx.h" #define FLUSH_INTERVAL 1000/* in usec */
arch/x86/crypto/sha1_ssse3_glue.c +4 -12
@@ -29,9 +29,7 @@#include <linux/types.h> #include <crypto/sha.h> #include <crypto/sha1_base.h> -#include <asm/i387.h> -#include <asm/xcr.h> -#include <asm/xsave.h> +#include <asm/fpu/api.h> asmlinkage void sha1_transform_ssse3(u32 *digest, const char *data,
@@ -123,15 +121,9 @@ static struct shash_alg alg = {#ifdef CONFIG_AS_AVX static bool __init avx_usable (void ) { -u64 xcr0; - -if (!cpu_has_avx || !cpu_has_osxsave) -return false; - - xcr0 =xgetbv (XCR_XFEATURE_ENABLED_MASK ); -if ((xcr0 & (XSTATE_SSE |XSTATE_YMM )) != (XSTATE_SSE |XSTATE_YMM )) { -pr_info ("AVX detected but unusable.\n" ); - +if (!cpu_has_xfeatures (XSTATE_SSE |XSTATE_YMM ,NULL )) { +if (cpu_has_avx) +pr_info ("AVX detected but unusable.\n" );return false; }
arch/x86/crypto/sha256_ssse3_glue.c +4 -12
@@ -37,9 +37,7 @@#include <linux/types.h> #include <crypto/sha.h> #include <crypto/sha256_base.h> -#include <asm/i387.h> -#include <asm/xcr.h> -#include <asm/xsave.h> +#include <asm/fpu/api.h> #include <linux/string.h> asmlinkage void sha256_transform_ssse3(u32 *digest, const char *data,
@@ -132,15 +130,9 @@ static struct shash_alg algs[] = { {#ifdef CONFIG_AS_AVX static bool __init avx_usable (void ) { -u64 xcr0; - -if (!cpu_has_avx || !cpu_has_osxsave) -return false; - - xcr0 =xgetbv (XCR_XFEATURE_ENABLED_MASK ); -if ((xcr0 & (XSTATE_SSE |XSTATE_YMM )) != (XSTATE_SSE |XSTATE_YMM )) { -pr_info ("AVX detected but unusable.\n" ); - +if (!cpu_has_xfeatures (XSTATE_SSE |XSTATE_YMM ,NULL )) { +if (cpu_has_avx) +pr_info ("AVX detected but unusable.\n" );return false; }
arch/x86/crypto/sha512_ssse3_glue.c +4 -12
@@ -35,9 +35,7 @@#include <linux/types.h> #include <crypto/sha.h> #include <crypto/sha512_base.h> -#include <asm/i387.h> -#include <asm/xcr.h> -#include <asm/xsave.h> +#include <asm/fpu/api.h> #include <linux/string.h>
@@ -131,15 +129,9 @@ static struct shash_alg algs[] = { {#ifdef CONFIG_AS_AVX static bool __init avx_usable (void ) { -u64 xcr0; - -if (!cpu_has_avx || !cpu_has_osxsave) -return false; - - xcr0 =xgetbv (XCR_XFEATURE_ENABLED_MASK ); -if ((xcr0 & (XSTATE_SSE |XSTATE_YMM )) != (XSTATE_SSE |XSTATE_YMM )) { -pr_info ("AVX detected but unusable.\n" ); - +if (!cpu_has_xfeatures (XSTATE_SSE |XSTATE_YMM ,NULL )) { +if (cpu_has_avx) +pr_info ("AVX detected but unusable.\n" );return false; }
arch/x86/crypto/twofish_avx_glue.c +4 -12
@@ -36,9 +36,7 @@#include <crypto/ctr.h> #include <crypto/lrw.h> #include <crypto/xts.h> -#include <asm/i387.h> -#include <asm/xcr.h> -#include <asm/xsave.h> +#include <asm/fpu/api.h> #include <asm/crypto/twofish.h> #include <asm/crypto/glue_helper.h> #include <crypto/scatterwalk.h>
@@ -558,16 +556,10 @@ static struct crypto_alg twofish_algs[10] = { {static int __init twofish_init (void ) { -u64 xcr0; +const char *feature_name; -if (!cpu_has_avx || !cpu_has_osxsave) { -printk (KERN_INFO "AVX instructions are not detected.\n" ); -return -ENODEV ; - } - - xcr0 =xgetbv (XCR_XFEATURE_ENABLED_MASK ); -if ((xcr0 & (XSTATE_SSE |XSTATE_YMM )) != (XSTATE_SSE |XSTATE_YMM )) { -printk (KERN_INFO "AVX detected but unusable.\n" ); +if (!cpu_has_xfeatures (XSTATE_SSE |XSTATE_YMM , &feature_name)) { +pr_info ("CPU feature '%s' is not supported.\n" , feature_name);return -ENODEV ; }
arch/x86/ia32/ia32_signal.c +7 -6
@@ -21,8 +21,8 @@#include <linux/binfmts.h> #include <asm/ucontext.h> #include <asm/uaccess.h> -#include <asm/i387.h> -#include <asm/fpu-internal.h> +#include <asm/fpu/internal.h> +#include <asm/fpu/signal.h> #include <asm/ptrace.h> #include <asm/ia32_unistd.h> #include <asm/user32.h>
@@ -198,7 +198,7 @@ static int ia32_restore_sigcontext(struct pt_regs *regs, buf =compat_ptr (tmp); }get_user_catch (err); - err |=restore_xstate_sig (buf,1 ); + err |=fpu__restore_sig (buf,1 );force_iret ();
@@ -308,6 +308,7 @@ static void __user *get_sigframe(struct ksignal *ksig, struct pt_regs *regs,size_t frame_size, void __user **fpstate) { + struct fpu *fpu = ¤t->thread.fpu;unsigned long sp;/* Default to using normal stack */
@@ -322,12 +323,12 @@ static void __user *get_sigframe(struct ksignal *ksig, struct pt_regs *regs, ksig->ka.sa.sa_restorer) sp = (unsigned long ) ksig->ka.sa.sa_restorer; -if (used_math ()) { +if (fpu->fpstate_active) {unsigned long fx_aligned, math_size; - sp =alloc_mathframe (sp,1 , &fx_aligned, &math_size); + sp =fpu__alloc_mathframe (sp,1 , &fx_aligned, &math_size); *fpstate = (struct _fpstate_ia32 __user *) sp; -if (save_xstate_sig (*fpstate, (void __user *)fx_aligned, +if (copy_fpstate_to_sigframe (*fpstate, (void __user *)fx_aligned, math_size) <0 )return (void __user *)-1L ; }
arch/x86/include/asm/alternative.h +6 -0
@@ -52,6 +52,12 @@ struct alt_instr {u8 padlen;/* length of build-time padding */ } __packed; +/* +* Debug flag that can be tested to see whether alternative +* instructions were patched in already: +*/ +extern int alternatives_patched; +extern void alternative_instructions (void );extern void apply_alternatives (struct alt_instr *start,struct alt_instr *end);
arch/x86/include/asm/crypto/glue_helper.h +1 -1
@@ -7,7 +7,7 @@#include <linux/kernel.h> #include <linux/crypto.h> -#include <asm/i387.h> +#include <asm/fpu/api.h> #include <crypto/b128ops.h> typedef void (*common_glue_func_t )(void *ctx,u8 *dst,const u8 *src);
arch/x86/include/asm/efi.h +1 -1
@@ -1,7 +1,7 @@#ifndef _ASM_X86_EFI_H#define _ASM_X86_EFI_H -#include <asm/i387.h> +#include <asm/fpu/api.h> #include <asm/pgtable.h> /*
arch/x86/include/asm/fpu-internal.h deleted +0 -626
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arch/x86/include/asm/fpu/api.h new file +48 -0
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arch/x86/include/asm/fpu/internal.h new file +694 -0
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arch/x86/include/asm/fpu/regset.h new file +21 -0
@@ -0,0 +1,21 @@ +/* +* FPU regset handling methods: +*/ +#ifndef _ASM_X86_FPU_REGSET_H +#define _ASM_X86_FPU_REGSET_H + +#include <linux/regset.h> + +extern user_regset_active_fn regset_fpregs_active, regset_xregset_fpregs_active; +extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get, + xstateregs_get; +extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set, + xstateregs_set; + +/* +* xstateregs_active == regset_fpregs_active. Please refer to the comment +* at the definition of regset_fpregs_active. +*/ +#define xstateregs_active regset_fpregs_active + +#endif /* _ASM_X86_FPU_REGSET_H */
arch/x86/include/asm/fpu/signal.h new file +33 -0
@@ -0,0 +1,33 @@ +/* +* x86 FPU signal frame handling methods: +*/ +#ifndef _ASM_X86_FPU_SIGNAL_H +#define _ASM_X86_FPU_SIGNAL_H + +#ifdef CONFIG_X86_64 +# include <asm/sigcontext32.h> +# include <asm/user32.h> +struct ksignal ; +int ia32_setup_rt_frame (int sig,struct ksignal *ksig, +compat_sigset_t *set,struct pt_regs *regs); +int ia32_setup_frame (int sig,struct ksignal *ksig, +compat_sigset_t *set,struct pt_regs *regs); +#else +# define user_i387_ia32_struct user_i387_struct +# define user32_fxsr_struct user_fxsr_struct +# define ia32_setup_frame __setup_frame +# define ia32_setup_rt_frame __setup_rt_frame +#endif + +extern void convert_from_fxsr (struct user_i387_ia32_struct *env, +struct task_struct *tsk); +extern void convert_to_fxsr (struct task_struct *tsk, +const struct user_i387_ia32_struct *env); + +unsigned long +fpu__alloc_mathframe (unsigned long sp,int ia32_frame, +unsigned long *buf_fx,unsigned long *size); + +extern void fpu__init_prepare_fx_sw_frame (void ); + +#endif /* _ASM_X86_FPU_SIGNAL_H */
arch/x86/include/asm/fpu/types.h new file +293 -0
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arch/x86/include/asm/fpu/xstate.h new file +46 -0
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arch/x86/include/asm/i387.h deleted +0 -108
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arch/x86/include/asm/kvm_host.h +0 -2
@@ -1002,8 +1002,6 @@ void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);void kvm_inject_nmi (struct kvm_vcpu *vcpu); -int fx_init (struct kvm_vcpu *vcpu); -void kvm_mmu_pte_write (struct kvm_vcpu *vcpu,gpa_t gpa,const u8 *new,int bytes);int kvm_mmu_unprotect_page (struct kvm *kvm,gfn_t gfn);
arch/x86/include/asm/mmu_context.h +13 -0
@@ -142,6 +142,19 @@ static inline void arch_exit_mmap(struct mm_struct *mm)paravirt_arch_exit_mmap (mm); } +#ifdef CONFIG_X86_64 +static inline bool is_64bit_mm (struct mm_struct *mm) +{ +return !config_enabled (CONFIG_IA32_EMULATION ) || + !(mm->context.ia32_compat ==TIF_IA32 ); +} +#else +static inline bool is_64bit_mm (struct mm_struct *mm) +{ +return false; +} +#endif +static inline void arch_bprm_mm_init (struct mm_struct *mm,struct vm_area_struct *vma) {
arch/x86/include/asm/mpx.h +34 -40
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arch/x86/include/asm/processor.h +17 -143
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arch/x86/include/asm/simd.h +1 -1
@@ -1,5 +1,5 @@ -#include <asm/i387.h> +#include <asm/fpu/api.h> /* * may_use_simd - whether it is allowable at this time to issue SIMD
arch/x86/include/asm/stackprotector.h +2 -0
@@ -39,7 +39,9 @@#include <asm/processor.h> #include <asm/percpu.h> #include <asm/desc.h> +#include <linux/random.h> +#include <linux/sched.h> /* * 24 byte read-only segment initializer for stack canary. Linker
arch/x86/include/asm/suspend_32.h +1 -1
@@ -7,7 +7,7 @@#define _ASM_X86_SUSPEND_32_H#include <asm/desc.h> -#include <asm/i387.h> +#include <asm/fpu/api.h> /* image of the saved processor state */ struct saved_context {
arch/x86/include/asm/suspend_64.h +1 -1
@@ -7,7 +7,7 @@#define _ASM_X86_SUSPEND_64_H#include <asm/desc.h> -#include <asm/i387.h> +#include <asm/fpu/api.h> /* * Image of the saved processor state, used by the low level ACPI suspend to
arch/x86/include/asm/trace/mpx.h new file +132 -0
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arch/x86/include/asm/user.h +6 -6
@@ -14,8 +14,8 @@ struct user_ymmh_regs {__u32 ymmh_space[64 ]; }; -struct user_xsave_hdr { -__u64 xstate_bv; +struct user_xstate_header { +__u64 xfeatures;__u64 reserved1[2 ];__u64 reserved2[5 ]; };
@@ -41,11 +41,11 @@ struct user_xsave_hdr {* particular process/thread. * * Also when the user modifies certain state FP/SSE/etc through the -* ptrace interface, they must ensure that the xsave_hdr.xstate_bv +* ptrace interface, they must ensure that the header.xfeatures * bytes[512..519] of the memory layout are updated correspondingly. * i.e., for example when FP state is modified to a non-init state, -* xsave_hdr.xstate_bv's bit 0 must be set to '1', when SSE is modified to -* non-init state, xsave_hdr.xstate_bv's bit 1 must to be set to '1', etc. +* header.xfeatures's bit 0 must be set to '1', when SSE is modified to +* non-init state, header.xfeatures's bit 1 must to be set to '1', etc. */ #define USER_XSTATE_FX_SW_WORDS 6#define USER_XSTATE_XCR0_WORD 0
@@ -55,7 +55,7 @@ struct user_xstateregs {__u64 fpx_space[58 ];__u64 xstate_fx_sw[USER_XSTATE_FX_SW_WORDS ]; } i387; -struct user_xsave_hdr xsave_hdr; +struct user_xstate_header header;struct user_ymmh_regs ymmh;/* further processor state extensions go here */ };
arch/x86/include/asm/xcr.h deleted +0 -49
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arch/x86/include/asm/xor.h +1 -1
@@ -36,7 +36,7 @@* no advantages to be gotten from x86-64 here anyways. */ -#include <asm/i387.h> +#include <asm/fpu/api.h> #ifdef CONFIG_X86_32 /* reduce register pressure */
arch/x86/include/asm/xor_32.h +1 -1
@@ -26,7 +26,7 @@#define XO3 (x, y) " pxor 8*("#x")(%4), %%mm"#y" ;\n"#define XO4 (x, y) " pxor 8*("#x")(%5), %%mm"#y" ;\n" -#include <asm/i387.h> +#include <asm/fpu/api.h> static void xor_pII_mmx_2 (unsigned long bytes,unsigned long *p1,unsigned long *p2)
arch/x86/include/asm/xor_avx.h +1 -1
@@ -18,7 +18,7 @@#ifdef CONFIG_AS_AVX #include <linux/compiler.h> -#include <asm/i387.h> +#include <asm/fpu/api.h> #define BLOCK4 (i) \ BLOCK(32 * i, 0) \
arch/x86/include/asm/xsave.h deleted +0 -257
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arch/x86/kernel/cpu/bugs.c +2 -53
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arch/x86/kernel/cpu/common.c +12 -35
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arch/x86/kernel/fpu/bugs.c new file +71 -0
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arch/x86/kernel/fpu/core.c new file +523 -0
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arch/x86/kernel/fpu/init.c new file +354 -0
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arch/x86/kernel/fpu/regset.c new file +356 -0
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arch/x86/kernel/fpu/signal.c new file +404 -0
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arch/x86/kernel/fpu/xstate.c new file +461 -0
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arch/x86/kernel/i387.c deleted +0 -671
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arch/x86/kernel/process.c +5 -49
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