musb: sunxi: Add support for the Allwinner sunxi musb
Subsystems (4)
v5 cover musb: sunxi: Add support for the Allwinner sunxi musb
Hi Felipe,
Here is a patch series with all my oustanding musb-sunxi changes pending for merging into 4.3.
This includes the 5th iteration of the patch for adding the basic sunxi-glue, the major change in v5 is that it has been ported to the extcon API changes which are queued up for 4.2 from :
http://git.kernel.org/cgit/linux/kernel/git/chanwoo/extcon.git/log/?h=extcon-ne
which already merged in GKH's char-misc branch for 4.2, this means that this series now depends on those changes.
Besides that I've also squashed in a fix I send out recently which removes the need for the special MUSB_SUN4I flag + core changes checking for that flag which my original version has. Meaning that the changes are nowly soley confined to the addition of drivers/usb/musb/sunxi.c + matching Kconfig / Makefile changes.
Other than that this is a resend of some of the other feature addition patches I recently send rebased on top of v5 of the musb sunxi glue.
Please merge this series for 4.3.
Regards,
Hans
PATCH v5 1/3 musb: sunxi: Add support for the Allwinner sunxi musb controller
This is based on initial code to get the Allwinner sunxi musb controller supported by Chen-Yu Tsai and Roman Byshko.
This adds support for the Allwinner sunxi musb controller in both host only and otg mode. Peripheral only mode is not supported, as no boards use that.
This has been tested on a cubietruck (A20 SoC) and an UTOO P66 tablet (A13 SoC) with a variety of devices in host mode and with the g_serial gadget driver in peripheral mode, plugging otg / host cables in/out a lot of times in all possible imaginable plug orders.
---
Changes in v2:
-Move polling of id and vbus-det gpio-s to the phy driver
-Use extcon to get id (USB_HOST mode) status changes from the phy driver -Stop using syscon, instead use Maxime Ripard's sunxi SRAM controller driver Changes in v3:
-Check that USB_MUSB_FOO config is compatible with the dr_mode setting from dt Changes in v4:
-Squash in "musb: sunxi: Add pre/post root reset end platform functions" patch -Adjust for sunxi_sram controller driver changes
-Stop musb work from turning vbus off again when in host mode Changes in v5:
-Squash in "musb: sunxi: Remove special MUSB_SUN4I flag" patch, as it was
mostly revering changes done by this patch
-Adjust for extcon api changes landing in 4.2
--- .../bindings/usb/allwinner,sun4i-a10-musb.txt | 27 + drivers/usb/musb/Kconfig | 13 +- drivers/usb/musb/Makefile | 1 + drivers/usb/musb/sunxi.c | 703 +++++++++++++++++++++ 4 files changed, 743 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt create mode 100644 drivers/usb/musb/sunxi.c
Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt new file +27 -0
@@ -0,0 +1,27 @@ +Allwinner sun4i A10 musb DRC/OTG controller +------------------------------------------- + +Required properties: + - compatible : "allwinner,sun4i-a10-musb" + - reg : mmio address range of the musb controller + - clocks : clock specifier for the musb controller ahb gate clock + - interrupts : interrupt to which the musb controller is connected + - interrupt-names : must be "mc" + - phys : phy specifier for the otg phy + - phy-names : must be "usb" + - dr_mode : Dual-Role mode must be "host" or "otg" + - extcon : extcon specifier for the otg phy + +Example: + + usb_otg: usb at 01c13000 { + compatible = "allwinner,sun4i-a10-musb"; + reg = <0x01c13000 0x0400>; + clocks = <&ahb_gates 0>; + interrupts = <38>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; + status = "disabled"; + };
drivers/usb/musb/Kconfig +12 -1
@@ -5,7 +5,7 @@ # (M)HDRC = (Multipoint) Highspeed Dual-Role Controller config USB_MUSB_HDRC - tristate 'Inventra Highspeed Dual Role Controller (TI, ADI, ...)' + tristate 'Inventra Highspeed Dual Role Controller (TI, ADI, AW, ...)' depends on (USB || USB_GADGET) help Say Y here if your system has a dual role high speed USB
@@ -20,6 +20,8 @@ config USB_MUSB_HDRC Analog Devices parts using this IP include Blackfin BF54x, BF525 and BF527. + Allwinner SoCs using this IP include A10, A13, A20, ... + If you do not know what this is, please say N. To compile this driver as a module, choose M here; the
@@ -60,6 +62,15 @@ endchoice comment "Platform Glue Layer" +config USB_MUSB_SUNXI + tristate "Allwinner (sunxi)" + depends on ARCH_SUNXI + depends on NOP_USB_XCEIV + depends on PHY_SUN4I_USB + depends on EXTCON + depends on GENERIC_PHY + select SUNXI_SRAM + config USB_MUSB_DAVINCI tristate "DaVinci" depends on ARCH_DAVINCI_DMx
drivers/usb/musb/Makefile +1 -0
@@ -20,6 +20,7 @@ obj-$(CONFIG_USB_MUSB_DA8XX) += da8xx.o obj-$(CONFIG_USB_MUSB_BLACKFIN) += blackfin.o obj-$(CONFIG_USB_MUSB_UX500) += ux500.o obj-$(CONFIG_USB_MUSB_JZ4740) += jz4740.o +obj-$(CONFIG_USB_MUSB_SUNXI) += sunxi.o obj-$(CONFIG_USB_MUSB_AM335X_CHILD) += musb_am335x.o
drivers/usb/musb/sunxi.c new file +703 -0
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2.4.3
PATCH v5 1/3 musb: sunxi: Add support for the Allwinner sunxi musb controller
Quoted 24 lines · Hans de Goede
This is based on initial code to get the Allwinner sunxi musb controller supported by Chen-Yu Tsai and Roman Byshko.
This adds support for the Allwinner sunxi musb controller in both host only and otg mode. Peripheral only mode is not supported, as no boards use that.
This has been tested on a cubietruck (A20 SoC) and an UTOO P66 tablet (A13 SoC) with a variety of devices in host mode and with the
g_serialgadget driver in peripheral mode, plugging otg / host cables in/out a lot of times in all possible imaginable plug orders.Signed-off-by Hans de Goede <[email protected]>---
Changes in v2:(quoted diff) +0
-3-Move polling of id and vbus-det gpio-s to the phy driver -Use extcon to get id (USB_HOST mode) status changes from the phy driver -Stop using syscon, instead use Maxime Ripard's sunxi SRAM controller driverChanges in v3:
-Check thatUSB_MUSB_FOOconfig is compatible with thedr_modesetting from dt Changes in v4:(quoted diff) +0
-3-Squash in "musb: sunxi: Add pre/post root reset end platform functions" patch -Adjust for sunxi_sram controller driver changes -Stop musb work from turning vbus off again when in host modeChanges in v5:
Review
Quoted 3 lines
(quoted diff) +0
-2-Squash in "musb: sunxi: Remove special MUSB_SUN4I flag" patch, as it was mostly revering changes done by this patch -Adjust for extcon api changes landing in 4.2
drivers/usb/musb/sunxi.c:75:13: warning: symbol 'sunxi_musb' was not declared. Should it be static? drivers/usb/musb/sunxi.c:151:6: warning: symbol 'sunxi_musb_pre_root_reset_end' was not declared. Should it be static? drivers/usb/musb/sunxi.c:158:6: warning: symbol 'sunxi_musb_post_root_reset_end' was not declared. Should it be static?
please fix.
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PATCH v5 2/3 musb: sunxi: Add support for musb controller in A31 SoC
In reply to Hans de GoedeThe A31 SoC uses the same musb controller as found in earlier SoCs, but it is hooked up slightly different. Its SRAM is private and no longer controlled through the SRAM controller, and its reset is controlled via a separate reset controller. This commit adds support for this setup.
--- .../bindings/usb/allwinner,sun4i-a10-musb.txt | 3 +- drivers/usb/musb/sunxi.c | 50 +++++++++++++++++++--- 2 files changed, 46 insertions(+), 7 deletions(-)
Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt +2 -1
@@ -2,9 +2,10 @@ Allwinner sun4i A10 musb DRC/OTG controller ------------------------------------------- Required properties: - - compatible : "allwinner,sun4i-a10-musb" + - compatible : "allwinner,sun4i-a10-musb" or "allwinner,sun6i-a31-musb" - reg : mmio address range of the musb controller - clocks : clock specifier for the musb controller ahb gate clock + - reset : reset specifier for the ahb reset (A31 and newer only) - interrupts : interrupt to which the musb controller is connected - interrupt-names : must be "mc" - phys : phy specifier for the otg phy
drivers/usb/musb/sunxi.c +44 -6
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2.4.3
PATCH v5 3/3 musb: sunxi: Add support for musb controller in A33 SoC
In reply to Hans de GoedeThe A33 SoC uses the same musb controller as found on the A31 and later, but allwinner has removed the configdata register, this commit adds special handling for this.
--- .../devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt | 3 ++- drivers/usb/musb/sunxi.c | 15 +++++++++++++++ 2 files changed, 17 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt +2 -1
@@ -2,7 +2,8 @@ Allwinner sun4i A10 musb DRC/OTG controller ------------------------------------------- Required properties: - - compatible : "allwinner,sun4i-a10-musb" or "allwinner,sun6i-a31-musb" + - compatible : "allwinner,sun4i-a10-musb", "allwinner,sun6i-a31-musb" + or "allwinner,sun8i-a33-musb" - reg : mmio address range of the musb controller - clocks : clock specifier for the musb controller ahb gate clock - reset : reset specifier for the ahb reset (A31 and newer only)
drivers/usb/musb/sunxi.c +15 -0
@@ -73,6 +73,7 @@#define SUNXI_MUSB_FL_PHY_ON 4#define SUNXI_MUSB_FL_HAS_SRAM 5#define SUNXI_MUSB_FL_HAS_RESET 6 +#define SUNXI_MUSB_FL_NO_CONFIGDATA 7/* Our read/write methods need access and do not get passed in a musb ref :| */ struct musb *sunxi_musb;
@@ -370,6 +371,8 @@ static u32 sunxi_musb_busctl_offset(u8 epnum, u16 offset)static u8 sunxi_musb_readb (const void __iomem *addr,unsigned offset) { +struct sunxi_glue *glue; +if (addr == sunxi_musb->mregs) {/* generic control or fifo control reg access */ switch (offset) {
@@ -392,6 +395,12 @@ static u8 sunxi_musb_readb(const void __iomem *addr, unsigned offset)case MUSB_RXFIFOSZ :return readb (addr +SUNXI_MUSB_RXFIFOSZ );case MUSB_CONFIGDATA +0x10 :/* See musb_read_configdata() */ + glue =dev_get_drvdata (sunxi_musb->controller->parent); +/* A33 saves a reg, and we get to hardcode this */ +if (test_bit (SUNXI_MUSB_FL_NO_CONFIGDATA , + &glue->flags)) +return 0xde ; +return readb (addr +SUNXI_MUSB_CONFIGDATA );/* Offset for these is fixed by sunxi_musb_busctl_offset() */ case SUNXI_MUSB_TXFUNCADDR :
@@ -643,6 +652,11 @@ static int sunxi_musb_probe(struct platform_device *pdev)if (of_device_is_compatible (np,"allwinner,sun6i-a31-musb" ))set_bit (SUNXI_MUSB_FL_HAS_RESET , &glue->flags); +if (of_device_is_compatible (np,"allwinner,sun8i-a33-musb" )) { +set_bit (SUNXI_MUSB_FL_HAS_RESET , &glue->flags); +set_bit (SUNXI_MUSB_FL_NO_CONFIGDATA , &glue->flags); + } + glue->clk =devm_clk_get (&pdev->dev,NULL );if (IS_ERR (glue->clk)) { dev_err(&pdev->dev, "Error getting clock: %ld\n",
@@ -723,6 +737,7 @@ static int sunxi_musb_remove(struct platform_device *pdev)static const struct of_device_id sunxi_musb_match[] = { { .compatible ="allwinner,sun4i-a10-musb" , }, { .compatible ="allwinner,sun6i-a31-musb" , }, + { .compatible ="allwinner,sun8i-a33-musb" , }, {} };
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2.4.3