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This series implements fastboot on the "bcm28155_ap" boards.

PATCH Superseded Steve Rae 3 participants 14 messages Jul 6, 2015 – Jul 8, 2015

Subsystems (4)
Arm (32-bit) USB Broadcom BCM2711/BCM2835 Arm architecture Broadcom BCM281XX/BCM11XXX/BCM216XX Arm architecture

v2 of 3 Superseded Latest is v3 →

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Steve Rae

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#0 lore raw

v2 cover This series implements fastboot on the "bcm28155_ap" boards.

The OTG hardware is a DWC2 controller and this series uses the existing gadget driver ("s3c_udc_otg.c").

Changes in v2:
- rebased against u-boot-dfu

JD (Jiandong) Zheng and Steve Rae (2):
usb: gadget: bcm_udc_otg files
implement Fastboot via USB OTG on bcm28155_ap boards

Steve Rae (2):
g_dnl: add missing declaration
usb: s3c-otg: support 8-bit interface

 arch/arm/include/asm/arch-bcm281xx/sysmap.h |  7 ++++
 board/broadcom/bcm28155_ap/bcm28155_ap.c    | 40 +++++++++++++++++++++++
 drivers/usb/gadget/Makefile                 |  1 +
 drivers/usb/gadget/bcm_udc_otg.h            | 17 ++++++++++
 drivers/usb/gadget/bcm_udc_otg_phy.c        | 50 +++++++++++++++++++++++++++++
 drivers/usb/gadget/s3c_udc_otg.c            |  4 +++
 include/configs/bcm28155_ap.h               | 21 ++++++++++++
 include/g_dnl.h                             |  1 +
 8 files changed, 141 insertions(+)
 create mode 100644 drivers/usb/gadget/bcm_udc_otg.h
 create mode 100644 drivers/usb/gadget/bcm_udc_otg_phy.c
Signature · 1 line
1.8.5
author
#1 lore raw

PATCH v2 1/4 g_dnl: add missing declaration

Signed-off-by Steve Rae <[email protected]>

---

Changes in v2: None

 include/g_dnl.h | 1 +
 1 file changed, 1 insertion(+)
include/g_dnl.h +1 -0
index 4eeb5e4..ba49f1f 100644
@@ -34,6 +34,7 @@ struct g_dnl_bind_callback {
 };
 
 int g_dnl_bind_fixup(struct usb_device_descriptor *, const char *);
+int g_dnl_get_board_bcd_device_number(int gcnum);
 int g_dnl_board_usb_cable_connected(void);
 int g_dnl_register(const char *s);
 void g_dnl_unregister(void);
Signature · 1 line
1.8.5
#2 lore raw

PATCH v2 1/4 g_dnl: add missing declaration

Hi Steve,

Quoted 13 lines
Signed-off-by Steve Rae <[email protected]>

---

Changes in v2: None

 include/g_dnl.h | 1 +
 1 file changed, 1 insertion(+)
include/g_dnl.h +0 -0
index 4eeb5e4..ba49f1f 100644

include/g_dnl.h struct g_dnl_bind_callback { · line 40

Quoted 7 lines
include/g_dnl.h +1 -0
@@ -34,6 +34,7 @@ struct g_dnl_bind_callback {
 };
 
 int g_dnl_bind_fixup(struct usb_device_descriptor *, const char *);
+int g_dnl_get_board_bcd_device_number(int gcnum);
 int g_dnl_board_usb_cable_connected(void);
 int g_dnl_register(const char *s);
 void g_dnl_unregister(void);
Acked-by Lukasz Majewski <[email protected]>
Signature · 5 lines
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
author
#3 lore raw

PATCH v2 2/4 usb: s3c-otg: support 8-bit interface

In reply to Steve Rae
Signed-off-by Steve Rae <[email protected]>

---

Changes in v2: None

 drivers/usb/gadget/s3c_udc_otg.c | 4 ++++
 1 file changed, 4 insertions(+)
drivers/usb/gadget/s3c_udc_otg.c +4 -0
index 7a2d1e7..2e3b4f7 100644
@@ -414,7 +414,11 @@ static void reconfig_usbd(struct s3c_udc *dev)
 		|0<<7		/* Ulpi DDR sel*/
 		|0<<6		/* 0: high speed utmi+, 1: full speed serial*/
 		|0<<4		/* 0: utmi+, 1:ulpi*/
+#ifdef CONFIG_USB_GADGET_PHY_8_BIT
+		|0<<3		/* phy i/f  0:8bit, 1:16bit*/
+#else
 		|1<<3		/* phy i/f  0:8bit, 1:16bit*/
+#endif
 		|0x7<<0;	/* HS/FS Timeout**/
 
 	if (dev->pdata->usb_gusbcfg)
Signature · 1 line
1.8.5
#4 lore raw

PATCH v2 2/4 usb: s3c-otg: support 8-bit interface

Hi Steve,

Quoted 16 lines
Signed-off-by Steve Rae <[email protected]>

---

Changes in v2: None

 drivers/usb/gadget/s3c_udc_otg.c | 4 ++++
 1 file changed, 4 insertions(+)
(quoted diff) +0 -0

b/drivers/usb/gadget/s3c_udc_otg.c index 7a2d1e7..2e3b4f7 100644

drivers/usb/gadget/s3c_udc_otg.c +0 -0
@@ -414,7 +414,11 @@ static void reconfig_usbd(struct s3c_udc *dev)
 		|0<<7		/* Ulpi DDR sel*/
 		|0<<6		/* 0: high speed utmi+, 1: full

speed serial*/ |0<<4 /* 0: utmi+, 1:ulpi*/

drivers/usb/gadget/s3c_udc_otg.c static void reconfig_usbd(struct s3c_udc *dev) · line 421

Quoted 5 lines
drivers/usb/gadget/s3c_udc_otg.c +4 -0
+#ifdef CONFIG_USB_GADGET_PHY_8_BIT
+		|0<<3		/* phy i/f  0:8bit, 1:16bit*/
+#else
 		|1<<3		/* phy i/f  0:8bit, 1:16bit*/
+#endif

Is your board using also host phy? As fair as I remember, the upper 8 bits are for host interface.

drivers/usb/gadget/s3c_udc_otg.c static void reconfig_usbd(struct s3c_udc *dev) · line 424

Quoted 3 lines
drivers/usb/gadget/s3c_udc_otg.c +0 -0
 		|0x7<<0;	/* HS/FS Timeout**/
 
 	if (dev->pdata->usb_gusbcfg)

Despite my above question:

Acked-by Lukasz Majewski <[email protected]>
Signature · 5 lines
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
author
#5 lore raw

PATCH v2 2/4 usb: s3c-otg: support 8-bit interface

Quoted 10 lines · Lukasz Majewski

Hi Steve,

Quoted 8 lines
Signed-off-by Steve Rae <[email protected]>

---

Changes in v2: None

  drivers/usb/gadget/s3c_udc_otg.c | 4 ++++
  1 file changed, 4 insertions(+)
Quoted 16 lines

drivers/usb/gadget/s3c_udc_otg.c static void reconfig_usbd(struct s3c_udc *dev) · line 421

Quoted 13 lines
(quoted diff) +0 -0

b/drivers/usb/gadget/s3c_udc_otg.c index 7a2d1e7..2e3b4f7 100644

drivers/usb/gadget/s3c_udc_otg.c +0 -0
@@ -414,7 +414,11 @@ static void reconfig_usbd(struct s3c_udc *dev)
  		|0<<7		/* Ulpi DDR sel*/
  		|0<<6		/* 0: high speed utmi+, 1: full

speed serial*/ |0<<4 /* 0: utmi+, 1:ulpi*/

drivers/usb/gadget/s3c_udc_otg.c +4 -0
+#ifdef CONFIG_USB_GADGET_PHY_8_BIT
+		|0<<3		/* phy i/f  0:8bit, 1:16bit*/
+#else
  		|1<<3		/* phy i/f  0:8bit, 1:16bit*/
+#endif

Is your board using also host phy? As fair as I remember, the upper 8 bits are for host interface.

Hi Lukasz,
Are you suggesting that we define this as a 16-bit interface, and then only use the upper 8-bits (to achieve the 8-bit interface)? Please clarify, Thanks Steve

Quoted 10 lines
Quoted 5 lines

|0x7<<0; /* HS/FS Timeout**/

if (dev->pdata->usb_gusbcfg)

Despite my above question:

Acked-by Lukasz Majewski <[email protected]>
#6 lore raw

PATCH v2 2/4 usb: s3c-otg: support 8-bit interface

Hi Steve,

Quoted 29 lines · Lukasz Majewski
Quoted 10 lines

Hi Steve,

Quoted 8 lines
Signed-off-by Steve Rae <[email protected]>

---

Changes in v2: None

  drivers/usb/gadget/s3c_udc_otg.c | 4 ++++
  1 file changed, 4 insertions(+)
Quoted 16 lines
Quoted 12 lines
(quoted diff) +0 -0

b/drivers/usb/gadget/s3c_udc_otg.c index 7a2d1e7..2e3b4f7 100644

drivers/usb/gadget/s3c_udc_otg.c +0 -0
@@ -414,7 +414,11 @@ static void reconfig_usbd(struct s3c_udc *dev)
  		|0<<7		/* Ulpi DDR sel*/
  		|0<<6		/* 0: high speed utmi+, 1:

full speed serial*/ |0<<4 /* 0: utmi+, 1:ulpi*/

drivers/usb/gadget/s3c_udc_otg.c +3 -0
+#ifdef CONFIG_USB_GADGET_PHY_8_BIT
+		|0<<3		/* phy i/f  0:8bit, 1:16bit*/
+#else
  		|1<<3		/* phy i/f  0:8bit,
Quoted 1 line

1:16bit*/ +#endif

Is your board using also host phy? As fair as I remember, the upper 8 bits are for host interface.

Quoted 4 lines

Hi Lukasz,
Are you suggesting that we define this as a 16-bit interface, and then only use the upper 8-bits (to achieve the 8-bit interface)? Please clarify, Thanks Steve

As fair as I remember we use lower 8 bits for device PHY and upper for host.

Your board (with this Synopsys IP) should work with 16 bits as well.

Quoted 10 lines
Quoted 10 lines
Quoted 5 lines

|0x7<<0; /* HS/FS Timeout**/

if (dev->pdata->usb_gusbcfg)

Despite my above question:

Acked-by Lukasz Majewski <[email protected]>
Signature · 5 lines
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
author
#7 lore raw

PATCH v2 3/4 usb: gadget: bcm_udc_otg files

In reply to Steve Rae

From: "JD (Jiandong) Zheng" <[email protected]>

Add the required files for the Broadcom UDC OTG interface.

Signed-off-by Steve Rae <[email protected]>

---

Changes in v2: None

 arch/arm/include/asm/arch-bcm281xx/sysmap.h |  7 ++++
 drivers/usb/gadget/bcm_udc_otg.h            | 17 ++++++++++
 drivers/usb/gadget/bcm_udc_otg_phy.c        | 50 +++++++++++++++++++++++++++++
 3 files changed, 74 insertions(+)
 create mode 100644 drivers/usb/gadget/bcm_udc_otg.h
 create mode 100644 drivers/usb/gadget/bcm_udc_otg_phy.c
arch/arm/include/asm/arch-bcm281xx/sysmap.h +7 -0
index 93ebf34..dbcc88c 100644
@@ -27,4 +27,11 @@
 #define SECWD2_BASE_ADDR	0x35002f40
 #define TIMER_BASE_ADDR		0x3e00d000
 
+#define HSOTG_DCTL_OFFSET					0x00000804
+#define    HSOTG_DCTL_SFTDISCON_MASK				0x00000002
+
+#define HSOTG_CTRL_PHY_P1CTL_OFFSET				0x00000008
+#define    HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK			0x00000002
+#define    HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK		0x00000001
+
 #endif
drivers/usb/gadget/bcm_udc_otg.h new file +17 -0
new file mode 100644
index 0000000..81a1fc0
@@ -0,0 +1,17 @@
+/*
+ * Copyright 2015 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __BCM_UDC_OTG_H
+#define __BCM_UDC_OTG_H
+
+#include <linux/types.h>
+
+#define wfld_set(addr, fld_val, fld_mask) \
+		(writel(((readl(addr) & ~(fld_mask)) | (fld_val)), (addr)))
+#define wfld_clear(addr, fld_mask) \
+		(writel((readl(addr) & ~(fld_mask)), (addr)))
+
+#endif
drivers/usb/gadget/bcm_udc_otg_phy.c new file +50 -0

50 lines not on this page · raw message

Signature · 1 line
1.8.5
#8 lore raw

PATCH v2 3/4 usb: gadget: bcm_udc_otg files

Hi Steve,

Quoted 38 lines

From: "JD (Jiandong) Zheng" <[email protected]>

Add the required files for the Broadcom UDC OTG interface.

Signed-off-by Steve Rae <[email protected]>

---

Changes in v2: None

 arch/arm/include/asm/arch-bcm281xx/sysmap.h |  7 ++++
 drivers/usb/gadget/bcm_udc_otg.h            | 17 ++++++++++
 drivers/usb/gadget/bcm_udc_otg_phy.c        | 50
+++++++++++++++++++++++++++++ 3 files changed, 74 insertions(+)
 create mode 100644 drivers/usb/gadget/bcm_udc_otg.h
 create mode 100644 drivers/usb/gadget/bcm_udc_otg_phy.c
(quoted diff) +0 -0

b/arch/arm/include/asm/arch-bcm281xx/sysmap.h index 93ebf34..dbcc88c 100644 --- a/arch/arm/include/asm/arch-bcm281xx/sysmap.h +++ b/arch/arm/include/asm/arch-bcm281xx/sysmap.h

arch/arm/include/asm/arch-bcm281xx/sysmap.h +1 -0
@@ -27,4 +27,11 @@
 #define SECWD2_BASE_ADDR	0x35002f40
 #define TIMER_BASE_ADDR		0x3e00d000
 
+#define HSOTG_DCTL_OFFSET

0x00000804 +#define
HSOTG_DCTL_SFTDISCON_MASK 0x00000002 +
+#define HSOTG_CTRL_PHY_P1CTL_OFFSET 0x00000008 +#define HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK 0x00000002 +#define
HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK 0x00000001 +
#endif diff --git a/drivers/usb/gadget/bcm_udc_otg.h b/drivers/usb/gadget/bcm_udc_otg.h new file mode 100644 index 0000000..81a1fc0

drivers/usb/gadget/bcm_udc_otg.h line 2

Quoted 2 lines
drivers/usb/gadget/bcm_udc_otg.h new file +2 -0
@@ -0,0 +1,17 @@
+/*
+ * Copyright 2015 Broadcom Corporation.

--> Please also add the name of the code author.

drivers/usb/gadget/bcm_udc_otg.h line 15

Quoted 13 lines
drivers/usb/gadget/bcm_udc_otg.h new file +11 -0
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __BCM_UDC_OTG_H
+#define __BCM_UDC_OTG_H
+
+#include <linux/types.h>
+
+#define wfld_set(addr, fld_val, fld_mask) \
+		(writel(((readl(addr) & ~(fld_mask)) | (fld_val)),

(addr))) +#define wfld_clear(addr, fld_mask) \

drivers/usb/gadget/bcm_udc_otg.h new file +1 -0
+		(writel((readl(addr) & ~(fld_mask)), (addr)))

Maybe we could replace those preprocessor macros with static inline functions?

drivers/usb/gadget/bcm_udc_otg_phy.c line 2

Quoted 10 lines
drivers/usb/gadget/bcm_udc_otg.h new file +2 -0
+
+#endif
(quoted diff) +0 -0

b/drivers/usb/gadget/bcm_udc_otg_phy.c new file mode 100644 index 0000000..1aa9f91

drivers/usb/gadget/bcm_udc_otg_phy.c new file +2 -0
@@ -0,0 +1,50 @@
+/*
+ * Copyright 2015 Broadcom Corporation.

---> The same as above.

Quoted 28 lines
drivers/usb/gadget/bcm_udc_otg_phy.c new file +16 -0
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/sysmap.h>
+
+#include <usb/s3c_udc.h>
+#include "bcm_udc_otg.h"
+
+void otg_phy_init(struct s3c_udc *dev)
+{
+	/* set Phy to driving mode */
+	wfld_clear(HSOTG_CTRL_BASE_ADDR +

HSOTG_CTRL_PHY_P1CTL_OFFSET,

drivers/usb/gadget/bcm_udc_otg_phy.c new file +10 -0
+		   HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK);
+
+	udelay(100);
+
+	/* clear Soft Disconnect */
+	wfld_clear(HSOTG_BASE_ADDR + HSOTG_DCTL_OFFSET,
+		   HSOTG_DCTL_SFTDISCON_MASK);
+
+	/* invoke Reset (active low) */
+	wfld_clear(HSOTG_CTRL_BASE_ADDR +

HSOTG_CTRL_PHY_P1CTL_OFFSET,

drivers/usb/gadget/bcm_udc_otg_phy.c line 31

Quoted 3 lines
drivers/usb/gadget/bcm_udc_otg_phy.c new file +3 -0
+		   HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK);
+
+	udelay(10000);

	^^^^^^^^^^^^^^ -- would it be possible to add some comment
	regarding for what we are waiting here?
Quoted 19 lines
drivers/usb/gadget/bcm_udc_otg_phy.c new file +19 -0
+
+	/* release Reset */
+	wfld_set(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET,
+		 HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK,
+		 HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK);
+}
+
+void otg_phy_off(struct s3c_udc *dev)
+{
+	/* Soft Disconnect */
+	wfld_set(HSOTG_BASE_ADDR + HSOTG_DCTL_OFFSET,
+		 HSOTG_DCTL_SFTDISCON_MASK,
+		 HSOTG_DCTL_SFTDISCON_MASK);
+
+	/* set Phy to non-driving (reset) mode */
+	wfld_set(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET,
+		 HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK,
+		 HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK);
+}
Signature · 5 lines
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
author
#9 lore raw

PATCH v2 3/4 usb: gadget: bcm_udc_otg files

Hi, Lukasz

Quoted 36 lines · Lukasz Majewski

Hi Steve,

Quoted 34 lines

From: "JD (Jiandong) Zheng" <[email protected]>

Add the required files for the Broadcom UDC OTG interface.

Signed-off-by Steve Rae <[email protected]>

---

Changes in v2: None

  arch/arm/include/asm/arch-bcm281xx/sysmap.h |  7 ++++
  drivers/usb/gadget/bcm_udc_otg.h            | 17 ++++++++++
  drivers/usb/gadget/bcm_udc_otg_phy.c        | 50

+++++++++++++++++++++++++++++ 3 files changed, 74 insertions(+)
create mode 100644 drivers/usb/gadget/bcm_udc_otg.h create mode 100644 drivers/usb/gadget/bcm_udc_otg_phy.c

(quoted diff) +0 -0

b/arch/arm/include/asm/arch-bcm281xx/sysmap.h index 93ebf34..dbcc88c 100644 --- a/arch/arm/include/asm/arch-bcm281xx/sysmap.h +++ b/arch/arm/include/asm/arch-bcm281xx/sysmap.h

arch/arm/include/asm/arch-bcm281xx/sysmap.h +1 -0
@@ -27,4 +27,11 @@
  #define SECWD2_BASE_ADDR	0x35002f40
  #define TIMER_BASE_ADDR		0x3e00d000
 
+#define HSOTG_DCTL_OFFSET

0x00000804 +#define
HSOTG_DCTL_SFTDISCON_MASK 0x00000002 +
+#define HSOTG_CTRL_PHY_P1CTL_OFFSET 0x00000008 +#define HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK 0x00000002 +#define
HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK 0x00000001 +
#endif diff --git a/drivers/usb/gadget/bcm_udc_otg.h b/drivers/usb/gadget/bcm_udc_otg.h new file mode 100644

Quoted 8 lines

drivers/usb/gadget/bcm_udc_otg.h line 2

Quoted 6 lines

index 0000000..81a1fc0

drivers/usb/gadget/bcm_udc_otg.h new file +2 -0
@@ -0,0 +1,17 @@
+/*
+ * Copyright 2015 Broadcom Corporation.

--> Please also add the name of the code author.

this is not standard practice at Broadcom....
and it seems that at least five (5) people have contributed to the code in this commit....
What would you suggest? The most recent author, or ???

Quoted 17 lines
Quoted 13 lines
drivers/usb/gadget/bcm_udc_otg.h new file +11 -0
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __BCM_UDC_OTG_H
+#define __BCM_UDC_OTG_H
+
+#include <linux/types.h>
+
+#define wfld_set(addr, fld_val, fld_mask) \
+		(writel(((readl(addr) & ~(fld_mask)) | (fld_val)),

(addr))) +#define wfld_clear(addr, fld_mask) \

drivers/usb/gadget/bcm_udc_otg.h line 15

Quoted 1 line
drivers/usb/gadget/bcm_udc_otg.h new file +1 -0
+		(writel((readl(addr) & ~(fld_mask)), (addr)))

Maybe we could replace those preprocessor macros with static inline functions?

Hmmm - since writel() and readl() are also macros, it makes it difficult to make these into functions....
I guess we could use "uintprt_t" and "uint32_t"
Would you agree?

Quoted 39 lines

drivers/usb/gadget/bcm_udc_otg_phy.c line 2

Quoted 11 lines
drivers/usb/gadget/bcm_udc_otg.h new file +2 -0
+
+#endif
(quoted diff) +0 -0

b/drivers/usb/gadget/bcm_udc_otg_phy.c new file mode 100644 index 0000000..1aa9f91

drivers/usb/gadget/bcm_udc_otg_phy.c new file +2 -0
@@ -0,0 +1,50 @@
+/*
+ * Copyright 2015 Broadcom Corporation.

---> The same as above.

Quoted 25 lines
drivers/usb/gadget/bcm_udc_otg_phy.c new file +16 -0
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/sysmap.h>
+
+#include <usb/s3c_udc.h>
+#include "bcm_udc_otg.h"
+
+void otg_phy_init(struct s3c_udc *dev)
+{
+	/* set Phy to driving mode */
+	wfld_clear(HSOTG_CTRL_BASE_ADDR +

HSOTG_CTRL_PHY_P1CTL_OFFSET,

drivers/usb/gadget/bcm_udc_otg_phy.c new file +8 -0
+		   HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK);
+
+	udelay(100);
+
+	/* clear Soft Disconnect */
+	wfld_clear(HSOTG_BASE_ADDR + HSOTG_DCTL_OFFSET,
+		   HSOTG_DCTL_SFTDISCON_MASK);
+
Quoted 8 lines

drivers/usb/gadget/bcm_udc_otg_phy.c line 31

Quoted 6 lines
drivers/usb/gadget/bcm_udc_otg_phy.c new file +2 -0
+	/* invoke Reset (active low) */
+	wfld_clear(HSOTG_CTRL_BASE_ADDR +

HSOTG_CTRL_PHY_P1CTL_OFFSET,

drivers/usb/gadget/bcm_udc_otg_phy.c new file +3 -0
+		   HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK);
+
+	udelay(10000);

	^^^^^^^^^^^^^^ -- would it be possible to add some comment
	regarding for what we are waiting here?

OK

Quoted 11 lines
Quoted 11 lines
drivers/usb/gadget/bcm_udc_otg_phy.c new file +11 -0
+
+	/* release Reset */
+	wfld_set(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET,
+		 HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK,
+		 HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK);
+}
+
+void otg_phy_off(struct s3c_udc *dev)
+{
+	/* Soft Disconnect */
+	wfld_set(HSOTG_BASE_ADDR + HSOTG_DCTL_OFFSET,
Quoted 11 lines

drivers/usb/gadget/bcm_udc_otg_phy.c line 50

Quoted 8 lines
drivers/usb/gadget/bcm_udc_otg_phy.c new file +8 -0
+		 HSOTG_DCTL_SFTDISCON_MASK,
+		 HSOTG_DCTL_SFTDISCON_MASK);
+
+	/* set Phy to non-driving (reset) mode */
+	wfld_set(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET,
+		 HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK,
+		 HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK);
+}

Thanks, Steve

#10 lore raw

PATCH v2 3/4 usb: gadget: bcm_udc_otg files

Hi Steve,

Quoted 47 lines

Hi, Lukasz

Quoted 36 lines · Lukasz Majewski

Hi Steve,

Quoted 34 lines

From: "JD (Jiandong) Zheng" <[email protected]>

Add the required files for the Broadcom UDC OTG interface.

Signed-off-by Steve Rae <[email protected]>

---

Changes in v2: None

  arch/arm/include/asm/arch-bcm281xx/sysmap.h |  7 ++++
  drivers/usb/gadget/bcm_udc_otg.h            | 17 ++++++++++
  drivers/usb/gadget/bcm_udc_otg_phy.c        | 50

+++++++++++++++++++++++++++++ 3 files changed, 74 insertions(+)
create mode 100644 drivers/usb/gadget/bcm_udc_otg.h create mode 100644 drivers/usb/gadget/bcm_udc_otg_phy.c

(quoted diff) +0 -0

b/arch/arm/include/asm/arch-bcm281xx/sysmap.h index 93ebf34..dbcc88c 100644 --- a/arch/arm/include/asm/arch-bcm281xx/sysmap.h +++ b/arch/arm/include/asm/arch-bcm281xx/sysmap.h @@ -27,4 +27,11 @@
#define SECWD2_BASE_ADDR 0x35002f40
#define TIMER_BASE_ADDR 0x3e00d000

+#define HSOTG_DCTL_OFFSET
0x00000804 +#define
HSOTG_DCTL_SFTDISCON_MASK
0x00000002 + +#define HSOTG_CTRL_PHY_P1CTL_OFFSET 0x00000008 +#define HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK 0x00000002 +#define
HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK 0x00000001 +
#endif diff --git a/drivers/usb/gadget/bcm_udc_otg.h b/drivers/usb/gadget/bcm_udc_otg.h new file mode 100644

Quoted 8 lines

drivers/usb/gadget/bcm_udc_otg.h line 2

Quoted 6 lines

index 0000000..81a1fc0

drivers/usb/gadget/bcm_udc_otg.h new file +2 -0
@@ -0,0 +1,17 @@
+/*
+ * Copyright 2015 Broadcom Corporation.

--> Please also add the name of the code author.

Quoted 4 lines

this is not standard practice at Broadcom....
and it seems that at least five (5) people have contributed to the code in this commit....
What would you suggest? The most recent author, or ???

I will not push you to add names if it is not mandatory in your company.

I just wanted to stress here that putting ones name is some kind of reward when working with community.

Quoted 18 lines
Quoted 18 lines
Quoted 14 lines
drivers/usb/gadget/bcm_udc_otg.h new file +11 -0
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __BCM_UDC_OTG_H
+#define __BCM_UDC_OTG_H
+
+#include <linux/types.h>
+
+#define wfld_set(addr, fld_val, fld_mask) \
+		(writel(((readl(addr) & ~(fld_mask)) | (fld_val)),

(addr))) +#define wfld_clear(addr, fld_mask) \

drivers/usb/gadget/bcm_udc_otg.h line 15

Quoted 1 line
drivers/usb/gadget/bcm_udc_otg.h new file +1 -0
+		(writel((readl(addr) & ~(fld_mask)), (addr)))

Maybe we could replace those preprocessor macros with static inline functions?

Quoted 2 lines

Hmmm - since writel() and readl() are also macros, it makes it difficult to make these into functions....

I think that it would be doable to embed writel() and readl() in a static inline function.

Quoted 2 lines

I guess we could use "uintprt_t" and "uint32_t"
Would you agree?

We can give it a try.

Quoted 74 lines
Quoted 39 lines

drivers/usb/gadget/bcm_udc_otg_phy.c line 2

Quoted 11 lines
drivers/usb/gadget/bcm_udc_otg.h new file +2 -0
+
+#endif
(quoted diff) +0 -0

b/drivers/usb/gadget/bcm_udc_otg_phy.c new file mode 100644 index 0000000..1aa9f91

drivers/usb/gadget/bcm_udc_otg_phy.c new file +2 -0
@@ -0,0 +1,50 @@
+/*
+ * Copyright 2015 Broadcom Corporation.

---> The same as above.

Quoted 25 lines
drivers/usb/gadget/bcm_udc_otg_phy.c new file +16 -0
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/sysmap.h>
+
+#include <usb/s3c_udc.h>
+#include "bcm_udc_otg.h"
+
+void otg_phy_init(struct s3c_udc *dev)
+{
+	/* set Phy to driving mode */
+	wfld_clear(HSOTG_CTRL_BASE_ADDR +

HSOTG_CTRL_PHY_P1CTL_OFFSET,

drivers/usb/gadget/bcm_udc_otg_phy.c new file +8 -0
+		   HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK);
+
+	udelay(100);
+
+	/* clear Soft Disconnect */
+	wfld_clear(HSOTG_BASE_ADDR + HSOTG_DCTL_OFFSET,
+		   HSOTG_DCTL_SFTDISCON_MASK);
+
Quoted 8 lines

drivers/usb/gadget/bcm_udc_otg_phy.c line 31

Quoted 6 lines
drivers/usb/gadget/bcm_udc_otg_phy.c new file +2 -0
+	/* invoke Reset (active low) */
+	wfld_clear(HSOTG_CTRL_BASE_ADDR +

HSOTG_CTRL_PHY_P1CTL_OFFSET,

drivers/usb/gadget/bcm_udc_otg_phy.c new file +3 -0
+		   HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK);
+
+	udelay(10000);

	^^^^^^^^^^^^^^ -- would it be possible to add some comment
	regarding for what we are waiting here?

OK

Quoted 13 lines
Quoted 13 lines
drivers/usb/gadget/bcm_udc_otg_phy.c new file +3 -0
+
+	/* release Reset */
+	wfld_set(HSOTG_CTRL_BASE_ADDR +

HSOTG_CTRL_PHY_P1CTL_OFFSET,

drivers/usb/gadget/bcm_udc_otg_phy.c new file +9 -0
+		 HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK,
+		 HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK);
+}
+
+void otg_phy_off(struct s3c_udc *dev)
+{
+	/* Soft Disconnect */
+	wfld_set(HSOTG_BASE_ADDR + HSOTG_DCTL_OFFSET,
+		 HSOTG_DCTL_SFTDISCON_MASK,
Quoted 11 lines

drivers/usb/gadget/bcm_udc_otg_phy.c line 50

Quoted 8 lines
drivers/usb/gadget/bcm_udc_otg_phy.c new file +4 -0
+		 HSOTG_DCTL_SFTDISCON_MASK);
+
+	/* set Phy to non-driving (reset) mode */
+	wfld_set(HSOTG_CTRL_BASE_ADDR +

HSOTG_CTRL_PHY_P1CTL_OFFSET,

drivers/usb/gadget/bcm_udc_otg_phy.c new file +3 -0
+		 HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK,
+		 HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK);
+}

Thanks, Steve

Signature · 5 lines
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
#11 lore raw

PATCH v2 3/4 usb: gadget: bcm_udc_otg files

Quoted 1 line · Lukasz Majewski

Hi Steve,

Hi!

Quoted 15 lines
Quoted 10 lines
Quoted 9 lines

drivers/usb/gadget/bcm_udc_otg.h line 2

Quoted 7 lines

b/drivers/usb/gadget/bcm_udc_otg.h new file mode 100644 index 0000000..81a1fc0

drivers/usb/gadget/bcm_udc_otg.h new file +2 -0
@@ -0,0 +1,17 @@
+/*
+ * Copyright 2015 Broadcom Corporation.

--> Please also add the name of the code author.

Quoted 4 lines

this is not standard practice at Broadcom....
and it seems that at least five (5) people have contributed to the code in this commit....
What would you suggest? The most recent author, or ???

Quoted 4 lines

I will not push you to add names if it is not mandatory in your company.

I just wanted to stress here that putting ones name is some kind of reward when working with community.

And it's also much easier to point fingers if something goes wrong :-) (and contact the author, but that's in git log too, so whatever)

[...]

Best regards,
Marek Vasut

author
#12 lore raw

PATCH v2 4/4 implement Fastboot via USB OTG on bcm28155_ap boards

In reply to Steve Rae

From: "JD (Jiandong) Zheng" <[email protected]>

Signed-off-by Steve Rae <[email protected]>

---

Changes in v2:
- rebased against u-boot-dfu

 board/broadcom/bcm28155_ap/bcm28155_ap.c | 40 ++++++++++++++++++++++++++++++++
 drivers/usb/gadget/Makefile              |  1 +
 include/configs/bcm28155_ap.h            | 21 +++++++++++++++++
 3 files changed, 62 insertions(+)
board/broadcom/bcm28155_ap/bcm28155_ap.c +40 -0
index 940a1c2..20eb191 100644
@@ -12,12 +12,20 @@
 #include <asm/kona-common/clk.h>
 #include <asm/arch/sysmap.h>
 
+#include <usb.h>
+#include <usb/s3c_udc.h>
+#include <g_dnl.h>
+
 #define SECWATCHDOG_SDOGCR_OFFSET	0x00000000
 #define SECWATCHDOG_SDOGCR_EN_SHIFT	27
 #define SECWATCHDOG_SDOGCR_SRSTEN_SHIFT	26
 #define SECWATCHDOG_SDOGCR_CLKS_SHIFT	20
 #define SECWATCHDOG_SDOGCR_LD_SHIFT	0
 
+#ifndef CONFIG_USB_SERIALNO
+#define CONFIG_USB_SERIALNO "1234567890"
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*

@@ -85,3 +93,35 @@ int board_mmc_init(bd_t *bis)
 	return ret;
 }
 #endif
+
+#ifdef CONFIG_USB_GADGET
+static struct s3c_plat_otg_data bcm_otg_data = {
+	.regs_otg	= HSOTG_BASE_ADDR
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	debug("%s: performing s3c_udc_probe\n", __func__);
+	return s3c_udc_probe(&bcm_otg_data);
+}
+
+int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
+{
+	debug("%s\n", __func__);
+	if (!getenv("serial#"))
+		g_dnl_set_serialnumber(CONFIG_USB_SERIALNO);
+	return 0;
+}
+
+int g_dnl_get_board_bcd_device_number(int gcnum)
+{
+	debug("%s\n", __func__);
+	return 1;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	debug("%s\n", __func__);
+	return 0;
+}
+#endif
drivers/usb/gadget/Makefile +1 -0
index 4e15323..4c11a7e 100644
@@ -11,6 +11,7 @@ obj-$(CONFIG_USB_ETHER) += epautoconf.o config.o usbstring.o
 # new USB gadget layer dependencies
 ifdef CONFIG_USB_GADGET
 obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o
+obj-$(CONFIG_USB_GADGET_BCM_UDC_OTG_PHY) += bcm_udc_otg_phy.o
 obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o
 obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += s3c_udc_otg_phy.o
 obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o
include/configs/bcm28155_ap.h +21 -0
index 900dc42..46920a1 100644
@@ -109,6 +109,7 @@
  * for example.
  */
 #define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
 
 /* version string, parser, etc */
 #define CONFIG_VERSION_VARIABLE

@@ -136,4 +137,24 @@
 
 #undef CONFIG_CMD_NFS
 
+/* Fastboot and USB OTG */
+#define CONFIG_USB_FUNCTION_FASTBOOT
+#define CONFIG_CMD_FASTBOOT
+#define CONFIG_FASTBOOT_FLASH
+#define CONFIG_FASTBOOT_FLASH_MMC_DEV	0
+#define CONFIG_SYS_CACHELINE_SIZE	64
+#define CONFIG_USB_FASTBOOT_BUF_SIZE	(CONFIG_SYS_SDRAM_SIZE - (1024 * 1024))
+#define CONFIG_USB_FASTBOOT_BUF_ADDR	CONFIG_SYS_SDRAM_BASE
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_VBUS_DRAW	0
+#define CONFIG_USB_GADGET_S3C_UDC_OTG
+#define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY
+#define CONFIG_USB_GADGET_PHY_8_BIT
+#define CONFIG_USB_GADGET_DOWNLOAD
+#define CONFIG_USBID_ADDR		0x34052c46
+#define CONFIG_G_DNL_VENDOR_NUM		0x18d1	/* google */
+#define CONFIG_G_DNL_PRODUCT_NUM	0x0d02	/* nexus one */
+#define CONFIG_G_DNL_MANUFACTURER	"Broadcom Corporation"
+
 #endif /* __BCM28155_AP_H */
Signature · 1 line
1.8.5
#13 lore raw

PATCH v2 4/4 implement Fastboot via USB OTG on bcm28155_ap boards

Hi Steve,

Quoted 110 lines

From: "JD (Jiandong) Zheng" <[email protected]>

Signed-off-by Steve Rae <[email protected]>

---

Changes in v2:
- rebased against u-boot-dfu

 board/broadcom/bcm28155_ap/bcm28155_ap.c | 40

++++++++++++++++++++++++++++++++
drivers/usb/gadget/Makefile | 1 +
include/configs/bcm28155_ap.h | 21 +++++++++++++++++ 3
files changed, 62 insertions(+)

(quoted diff) +0 -0

b/board/broadcom/bcm28155_ap/bcm28155_ap.c index 940a1c2..20eb191 100644 --- a/board/broadcom/bcm28155_ap/bcm28155_ap.c +++ b/board/broadcom/bcm28155_ap/bcm28155_ap.c

board/broadcom/bcm28155_ap/bcm28155_ap.c +21 -0
@@ -12,12 +12,20 @@
 #include <asm/kona-common/clk.h>
 #include <asm/arch/sysmap.h>
 
+#include <usb.h>
+#include <usb/s3c_udc.h>
+#include <g_dnl.h>
+
 #define SECWATCHDOG_SDOGCR_OFFSET	0x00000000
 #define SECWATCHDOG_SDOGCR_EN_SHIFT	27
 #define SECWATCHDOG_SDOGCR_SRSTEN_SHIFT	26
 #define SECWATCHDOG_SDOGCR_CLKS_SHIFT	20
 #define SECWATCHDOG_SDOGCR_LD_SHIFT	0
 
+#ifndef CONFIG_USB_SERIALNO
+#define CONFIG_USB_SERIALNO "1234567890"
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*

@@ -85,3 +93,35 @@ int board_mmc_init(bd_t *bis)
 	return ret;
 }
 #endif
+
+#ifdef CONFIG_USB_GADGET
+static struct s3c_plat_otg_data bcm_otg_data = {
+	.regs_otg	= HSOTG_BASE_ADDR
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	debug("%s: performing s3c_udc_probe\n", __func__);
+	return s3c_udc_probe(&bcm_otg_data);
+}
+
+int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char

*name) +{

board/broadcom/bcm28155_ap/bcm28155_ap.c +18 -0
+	debug("%s\n", __func__);
+	if (!getenv("serial#"))
+		g_dnl_set_serialnumber(CONFIG_USB_SERIALNO);
+	return 0;
+}
+
+int g_dnl_get_board_bcd_device_number(int gcnum)
+{
+	debug("%s\n", __func__);
+	return 1;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	debug("%s\n", __func__);
+	return 0;
+}
+#endif
drivers/usb/gadget/Makefile +0 -0
index 4e15323..4c11a7e 100644
@@ -11,6 +11,7 @@ obj-$(CONFIG_USB_ETHER) += epautoconf.o config.o

usbstring.o # new USB gadget layer dependencies
ifdef CONFIG_USB_GADGET obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o

drivers/usb/gadget/Makefile +1 -0
+obj-$(CONFIG_USB_GADGET_BCM_UDC_OTG_PHY) += bcm_udc_otg_phy.o
 obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o
 obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += s3c_udc_otg_phy.o
 obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o
(quoted diff) +0 -0

b/include/configs/bcm28155_ap.h index 900dc42..46920a1 100644

include/configs/bcm28155_ap.h +8 -0
@@ -109,6 +109,7 @@
  * for example.
  */
 #define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
 
 /* version string, parser, etc */
 #define CONFIG_VERSION_VARIABLE

@@ -136,4 +137,24 @@
 
 #undef CONFIG_CMD_NFS
 
+/* Fastboot and USB OTG */
+#define CONFIG_USB_FUNCTION_FASTBOOT
+#define CONFIG_CMD_FASTBOOT
+#define CONFIG_FASTBOOT_FLASH
+#define CONFIG_FASTBOOT_FLASH_MMC_DEV	0
+#define CONFIG_SYS_CACHELINE_SIZE	64
+#define CONFIG_USB_FASTBOOT_BUF_SIZE	(CONFIG_SYS_SDRAM_SIZE -
Quoted 1 line

(1024 * 1024)) +#define CONFIG_USB_FASTBOOT_BUF_ADDR

^^^^^^^^^^^ Here you can use SZ_1M

Quoted 13 lines

CONFIG_SYS_SDRAM_BASE +#define CONFIG_USB_GADGET

include/configs/bcm28155_ap.h +8 -0
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_VBUS_DRAW	0
+#define CONFIG_USB_GADGET_S3C_UDC_OTG
+#define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY
+#define CONFIG_USB_GADGET_PHY_8_BIT
+#define CONFIG_USB_GADGET_DOWNLOAD
+#define CONFIG_USBID_ADDR		0x34052c46
+#define CONFIG_G_DNL_VENDOR_NUM		0x18d1	/*

google */ +#define CONFIG_G_DNL_PRODUCT_NUM 0x0d02 /*
nexus one */ +#define CONFIG_G_DNL_MANUFACTURER "Broadcom
Corporation" +
#endif /* __BCM28155_AP_H */

Signature · 5 lines
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group