powerpc: Interrupt cleanups and API change preparation
Subsystems (4)
cover powerpc: Interrupt cleanups and API change preparation
The following patch series contains the following changes:
- Consolidation of chained interrupt handler setup/removal
- Switch to functions which avoid a redundant interrupt descriptor lookup
- Preparation of interrupt flow handlers for the 'irq' argument removal
The series has no dependencies and is also available as a git branch for your convenience:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/arm
If you want me to carry the patches in the irq/core branch of tip, please let me know.
Thanks,
tglx
PATCH 1/20 powerpc/media5200: Consolidate chained IRQ handler install/remove
Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one.
Search and conversion was done with coccinelle.
--- arch/powerpc/platforms/52xx/media5200.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/powerpc/platforms/52xx/media5200.c +2 -2
@@ -179,8 +179,8 @@ static void __init media5200_init_irq(vo goto out;pr_debug ("%s: allocated irqhost\n" , __func__); -irq_set_handler_data (cascade_virq, &media5200_irq); -irq_set_chained_handler (cascade_virq, media5200_irq_cascade); +irq_set_chained_handler_and_data (cascade_virq, media5200_irq_cascade, + &media5200_irq);return ;
PATCH 2/20 powerpc/52xx: Consolidate chained IRQ handler install/remove
In reply to Thomas GleixnerChained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one.
Search and conversion was done with coccinelle.
--- arch/powerpc/platforms/52xx/mpc52xx_gpt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/powerpc/platforms/52xx/mpc52xx_gpt.c +2 -2
@@ -258,8 +258,8 @@ mpc52xx_gpt_irq_setup(struct mpc52xx_gptreturn ; } -irq_set_handler_data (cascade_virq, gpt); -irq_set_chained_handler (cascade_virq, mpc52xx_gpt_irq_cascade); +irq_set_chained_handler_and_data (cascade_virq, + mpc52xx_gpt_irq_cascade, gpt);/* If the GPT is currently disabled, then change it to be in Input * Capture mode. If the mode is non-zero, then the pin could be
PATCH 3/20 powerpc/pq2ads: Consolidate chained IRQ handler install/remove
In reply to Thomas GleixnerChained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one.
Search and conversion was done with coccinelle.
--- arch/powerpc/platforms/82xx/pq2ads-pci-pic.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
arch/powerpc/platforms/82xx/pq2ads-pci-pic.c +1 -2
@@ -162,8 +162,7 @@ int __init pq2ads_pci_init_irq(void) } priv->host = host; -irq_set_handler_data (irq, priv); -irq_set_chained_handler (irq, pq2ads_pci_irq_demux); +irq_set_chained_handler_and_data (irq, pq2ads_pci_irq_demux, priv);of_node_put (np);return 0 ;
PATCH 4/20 powerpc/axon_msi: Consolidate chained IRQ handler install/remove
In reply to Thomas GleixnerChained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one.
Search and conversion was done with coccinelle.
--- arch/powerpc/platforms/cell/axon_msi.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
arch/powerpc/platforms/cell/axon_msi.c +1 -2
@@ -390,8 +390,7 @@ static int axon_msi_probe(struct platfor goto out_free_fifo; } -irq_set_handler_data (virq, msic); -irq_set_chained_handler (virq, axon_msi_cascade); +irq_set_chained_handler_and_data (virq, axon_msi_cascade, msic);pr_devel ("axon_msi: irq 0x%x setup for axon_msi\n" , virq);/* Enable the MSIC hardware */
PATCH 5/20 powerpc/cell: Consolidate chained IRQ handler install/remove
In reply to Thomas GleixnerChained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one.
Search and conversion was done with coccinelle.
--- arch/powerpc/platforms/cell/interrupt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/powerpc/platforms/cell/interrupt.c +2 -2
@@ -357,8 +357,8 @@ static int __init setup_iic(void)* irq_data is a generic pointer that gets passed back * to us later, so the forced cast is fine. */ -irq_set_handler_data (cascade, (void __force *)node_iic); -irq_set_chained_handler (cascade, iic_ioexc_cascade); +irq_set_chained_handler_and_data (cascade, iic_ioexc_cascade, + (void __force *)node_iic); out_be64(&node_iic->iic_ir, (1 << 12) /* priority */ | (node << 4) /* dest node */ |
PATCH 6/20 powerpc/spider-pic: Consolidate chained IRQ handler install/remove
In reply to Thomas GleixnerChained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one.
Search and conversion was done with coccinelle.
--- arch/powerpc/platforms/cell/spider-pic.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
arch/powerpc/platforms/cell/spider-pic.c +1 -2
@@ -317,8 +317,7 @@ static void __init spider_init_one(struc virq =spider_find_cascade_and_node (pic);if (virq ==NO_IRQ )return ; -irq_set_handler_data (virq, pic); -irq_set_chained_handler (virq, spider_irq_cascade); +irq_set_chained_handler_and_data (virq, spider_irq_cascade, pic);printk (KERN_INFO "spider_pic: node %d, addr: 0x%lx %s\n" , pic->node_id, addr, of_node->full_name);
PATCH 7/20 powerpc/hlwd-pic: Consolidate chained IRQ handler install/remove
In reply to Thomas GleixnerChained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one.
Search and conversion was done with coccinelle.
--- arch/powerpc/platforms/embedded6xx/hlwd-pic.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
arch/powerpc/platforms/embedded6xx/hlwd-pic.c +3 -3
@@ -212,9 +212,9 @@ void hlwd_pic_probe(void) host =hlwd_pic_init (np);BUG_ON (!host); cascade_virq =irq_of_parse_and_map (np,0 ); -irq_set_handler_data (cascade_virq, host); -irq_set_chained_handler (cascade_virq, - hlwd_pic_irq_cascade); +irq_set_chained_handler_and_data (cascade_virq, + hlwd_pic_irq_cascade, + host); hlwd_irq_host = host;break ; }
PATCH 8/20 powerpc/holly: Consolidate chained IRQ handler install/remove
In reply to Thomas GleixnerChained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one.
Search and conversion was done with coccinelle.
--- arch/powerpc/platforms/embedded6xx/holly.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/powerpc/platforms/embedded6xx/holly.c +2 -2
@@ -180,8 +180,8 @@ static void __init holly_init_IRQ(void) cascade_pci_irq =irq_of_parse_and_map (tsi_pci,0 );pr_debug ("%s: tsi108 cascade_pci_irq = 0x%x\n" , __func__, (u32 ) cascade_pci_irq);tsi108_pci_int_init (cascade_node); -irq_set_handler_data (cascade_pci_irq, mpic); -irq_set_chained_handler (cascade_pci_irq, tsi108_irq_cascade); +irq_set_chained_handler_and_data (cascade_pci_irq, tsi108_irq_cascade, + mpic);#endif /* Configure MPIC outputs to CPU0 */ tsi108_write_reg (TSI108_MPIC_OFFSET +0x30c ,0 );
PATCH 9/20 powerpc/mpc7448: Consolidate chained IRQ handler install/remove
In reply to Thomas GleixnerChained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one.
Search and conversion was done with coccinelle.
--- arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c +2 -2
@@ -134,8 +134,8 @@ static void __init mpc7448_hpc2_init_IRQDBG ("%s: tsi108 cascade_pci_irq = 0x%x\n" , __func__, (u32 ) cascade_pci_irq);tsi108_pci_int_init (cascade_node); -irq_set_handler_data (cascade_pci_irq, mpic); -irq_set_chained_handler (cascade_pci_irq, tsi108_irq_cascade); +irq_set_chained_handler_and_data (cascade_pci_irq, tsi108_irq_cascade, + mpic);#endif /* Configure MPIC outputs to CPU0 */ tsi108_write_reg (TSI108_MPIC_OFFSET +0x30c ,0 );
PATCH 10/20 powerpc/mpic: Consolidate chained IRQ handler install/remove
In reply to Thomas GleixnerChained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one.
Search and conversion was done with coccinelle.
--- arch/powerpc/sysdev/mpic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/powerpc/sysdev/mpic.c +2 -2
@@ -1665,8 +1665,8 @@ void __init mpic_init(struct mpic *mpic)if (virq !=NO_IRQ ) {printk (KERN_INFO "%s: hooking up to IRQ %d\n" , mpic->node->full_name, virq); -irq_set_handler_data (virq, mpic); -irq_set_chained_handler (virq, &mpic_cascade); +irq_set_chained_handler_and_data (virq, &mpic_cascade, + mpic); } }
PATCH 11/20 powerpc/qe_ic: Consolidate chained IRQ handler install/remove
In reply to Thomas GleixnerChained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one.
Search and conversion was done with coccinelle.
--- arch/powerpc/sysdev/qe_lib/qe_ic.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-)
arch/powerpc/sysdev/qe_lib/qe_ic.c +3 -4
@@ -368,13 +368,12 @@ void __init qe_ic_init(struct device_nodqe_ic_write (qe_ic->regs,QEIC_CICR , temp); -irq_set_handler_data (qe_ic->virq_low, qe_ic); -irq_set_chained_handler (qe_ic->virq_low, low_handler); +irq_set_chained_handler_and_data (qe_ic->virq_low, low_handler, qe_ic);if (qe_ic->virq_high !=NO_IRQ && qe_ic->virq_high != qe_ic->virq_low) { -irq_set_handler_data (qe_ic->virq_high, qe_ic); -irq_set_chained_handler (qe_ic->virq_high, high_handler); +irq_set_chained_handler_and_data (qe_ic->virq_high, + high_handler, qe_ic); } }
PATCH 12/20 powerpc/uic: Consolidate chained IRQ handler install/remove
In reply to Thomas GleixnerChained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one.
Search and conversion was done with coccinelle.
--- arch/powerpc/sysdev/uic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/powerpc/sysdev/uic.c +2 -2
@@ -311,8 +311,8 @@ void __init uic_init_tree(void) cascade_virq =irq_of_parse_and_map (np,0 ); -irq_set_handler_data (cascade_virq, uic); -irq_set_chained_handler (cascade_virq, uic_irq_cascade); +irq_set_chained_handler_and_data (cascade_virq, + uic_irq_cascade, uic);/* FIXME: setup critical cascade?? */ }
PATCH 13/20 powerpc/irq: Use access helper irq_data_get_affinity_mask()
In reply to Thomas GleixnerFrom: Jiang Liu <[email protected]>
This is a preparatory patch for moving irq_data struct members.
--- arch/powerpc/kernel/irq.c | 2 +- arch/powerpc/sysdev/xics/ics-opal.c | 2 +- arch/powerpc/sysdev/xics/ics-rtas.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-)
arch/powerpc/kernel/irq.c +1 -1
@@ -441,7 +441,7 @@ void migrate_irqs(void) chip =irq_data_get_irq_chip (data); -cpumask_and (mask, data->affinity, map); +cpumask_and (mask,irq_data_get_affinity_mask (data), map);if (cpumask_any (mask) >= nr_cpu_ids) {pr_warn ("Breaking affinity for irq %i\n" , irq);cpumask_copy (mask, map);
arch/powerpc/sysdev/xics/ics-opal.c +1 -1
@@ -54,7 +54,7 @@ static void ics_opal_unmask_irq(struct iif (hw_irq ==XICS_IPI || hw_irq ==XICS_IRQ_SPURIOUS )return ; - server =xics_get_irq_server (d->irq, d->affinity,0 ); + server =xics_get_irq_server (d->irq,irq_data_get_affinity_mask (d),0 ); server =ics_opal_mangle_server (server); rc =opal_set_xive (hw_irq, server,DEFAULT_PRIORITY );
arch/powerpc/sysdev/xics/ics-rtas.c +1 -1
@@ -47,7 +47,7 @@ static void ics_rtas_unmask_irq(struct iif (hw_irq ==XICS_IPI || hw_irq ==XICS_IRQ_SPURIOUS )return ; - server =xics_get_irq_server (d->irq, d->affinity,0 ); + server =xics_get_irq_server (d->irq,irq_data_get_affinity_mask (d),0 ); call_status =rtas_call (ibm_set_xive,3 ,1 ,NULL , hw_irq, server,DEFAULT_PRIORITY );
PATCH 14/20 powerpc/mpc52xx: Use irq_set_handler_locked()
In reply to Thomas GleixnerUse irq_set_handler_locked() as it avoids a redundant lookup of the irq descriptor.
Search and replacement was done with coccinelle.
--- arch/powerpc/platforms/52xx/mpc52xx_pic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/powerpc/platforms/52xx/mpc52xx_pic.c +1 -1
@@ -196,7 +196,7 @@ static int mpc52xx_extirq_set_type(struc ctrl_reg |= (type << (22 - (l2irq *2 )));out_be32 (&intr->ctrl, ctrl_reg); -__irq_set_handler_locked (d->irq, handler); +irq_set_handler_locked (d, handler);return 0 ; }
PATCH 15/20 powerpc/cpm2: Use irq_set_handler_locked()
In reply to Thomas GleixnerUse irq_set_handler_locked() as it avoids a redundant lookup of the irq descriptor.
Search and replacement was done with coccinelle.
--- arch/powerpc/sysdev/cpm2_pic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/powerpc/sysdev/cpm2_pic.c +2 -2
@@ -155,9 +155,9 @@ static int cpm2_set_irq_type(struct irq_irqd_set_trigger_type (d, flow_type);if (flow_type &IRQ_TYPE_LEVEL_LOW ) -__irq_set_handler_locked (d->irq, handle_level_irq); +irq_set_handler_locked (d, handle_level_irq);else -__irq_set_handler_locked (d->irq, handle_edge_irq); +irq_set_handler_locked (d, handle_edge_irq);/* internal IRQ senses are LEVEL_LOW * EXT IRQ and Port C IRQ senses are programmable
PATCH 16/20 powerpc/ipic: Use irq_set_handler_locked()
In reply to Thomas GleixnerUse irq_set_handler_locked() as it avoids a redundant lookup of the irq descriptor.
Search and replacement was done with coccinelle.
--- arch/powerpc/sysdev/ipic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/powerpc/sysdev/ipic.c +2 -2
@@ -624,10 +624,10 @@ static int ipic_set_irq_type(struct irq_irqd_set_trigger_type (d, flow_type);if (flow_type &IRQ_TYPE_LEVEL_LOW ) { -__irq_set_handler_locked (d->irq, handle_level_irq); +irq_set_handler_locked (d, handle_level_irq); d->chip = &ipic_level_irq_chip; }else { -__irq_set_handler_locked (d->irq, handle_edge_irq); +irq_set_handler_locked (d, handle_edge_irq); d->chip = &ipic_edge_irq_chip; }
PATCH 17/20 powerpc/mpc8xx: Use irq_set_handler_locked()
In reply to Thomas GleixnerUse irq_set_handler_locked() as it avoids a redundant lookup of the irq descriptor.
Search and replacement was done with coccinelle.
--- arch/powerpc/sysdev/mpc8xx_pic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/powerpc/sysdev/mpc8xx_pic.c +1 -1
@@ -55,7 +55,7 @@ static int mpc8xx_set_irq_type(struct irunsigned int siel =in_be32 (&siu_reg->sc_siel); siel |=mpc8xx_irqd_to_bit (d);out_be32 (&siu_reg->sc_siel, siel); -__irq_set_handler_locked (d->irq, handle_edge_irq); +irq_set_handler_locked (d, handle_edge_irq); }return 0 ; }
PATCH 18/20 powerpc/mpc5121: Prepare cpld_pic_cascade for irq argument removal
In reply to Thomas GleixnerThe irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor.
Search and update was done with coccinelle and the invaluable help of Julia Lawall.
--- arch/powerpc/platforms/512x/mpc5121_ads_cpld.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
arch/powerpc/platforms/512x/mpc5121_ads_cpld.c +3 -1
@@ -105,8 +105,10 @@ cpld_pic_get_irq(int offset, u8 ignore, }static void -cpld_pic_cascade (unsigned int irq,struct irq_desc *desc) +cpld_pic_cascade (unsigned int __irq,struct irq_desc *desc) { +unsigned int irq; + irq =cpld_pic_get_irq (0 ,PCI_IGNORE , &cpld_regs->pci_status, &cpld_regs->pci_mask);if (irq !=NO_IRQ ) {
PATCH 19/20 powerpc/85xx: Prepare cascade handlers for irq argument removal
In reply to Thomas GleixnerThe irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor.
Search and update was done with coccinelle and the invaluable help of Julia Lawall.
--- arch/powerpc/platforms/85xx/mpc85xx_cds.c | 3 ++- arch/powerpc/platforms/85xx/socrates_fpga_pic.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-)
arch/powerpc/platforms/85xx/mpc85xx_cds.c +2 -1
@@ -192,9 +192,10 @@ void mpc85xx_cds_fixup_bus(struct pci_bu }#ifdef CONFIG_PPC_I8259 -static void mpc85xx_8259_cascade_handler (unsigned int irq, +static void mpc85xx_8259_cascade_handler (unsigned int __irq,struct irq_desc *desc) { +unsigned int irq =irq_desc_get_irq (desc);unsigned int cascade_irq =i8259_irq ();if (cascade_irq !=NO_IRQ )
arch/powerpc/platforms/85xx/socrates_fpga_pic.c +2 -1
@@ -91,8 +91,9 @@ static inline unsigned int socrates_fpga (irq_hw_number_t)i); } -void socrates_fpga_pic_cascade (unsigned int irq,struct irq_desc *desc) +void socrates_fpga_pic_cascade (unsigned int __irq,struct irq_desc *desc) { +unsigned int irq =irq_desc_get_irq (desc);struct irq_chip *chip =irq_desc_get_chip (desc);unsigned int cascade_irq;
PATCH 20/20 powerpc/cell: Prepare iic_ioexc_cascade for irq argument removal
In reply to Thomas GleixnerThe irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor.
Search and update was done with coccinelle and the invaluable help of Julia Lawall.
--- arch/powerpc/platforms/cell/interrupt.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
arch/powerpc/platforms/cell/interrupt.c +2 -1
@@ -99,8 +99,9 @@ static void iic_ioexc_eoi(struct irq_dat { } -static void iic_ioexc_cascade (unsigned int irq,struct irq_desc *desc) +static void iic_ioexc_cascade (unsigned int __irq,struct irq_desc *desc) { +unsigned int irq =irq_desc_get_irq (desc);struct irq_chip *chip =irq_desc_get_chip (desc);struct cbe_iic_regs __iomem *node_iic = (void __iomem *)irq_desc_get_handler_data (desc);
Michael Ellerman
reviewerQuoted 11 lines · Thomas Gleixner
The following patch series contains the following changes:
- Consolidation of chained interrupt handler setup/removal
- Switch to functions which avoid a redundant interrupt descriptor lookup
- Preparation of interrupt flow handlers for the 'irq' argument removal
The series has no dependencies ...
But I assume you have work that will depend on it? So you're going to merge it via your tree at least I assume?
Quoted 3 lines
... and is also available as a git branch for your convenience:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.gitirq/arm
I can't find this.
Did you mean irq/ppc or irq/powerpc maybe? I can't find those either.
Quoted 2 lines
If you want me to carry the patches in the irq/core branch of tip, please let me know.
cheers
On Thu, 16 Jul 2015, Michael Ellerman wrote:
Sorry I missed your reply ...
Quoted 8 lines · Thomas Gleixner
Quoted 7 lines
The following patch series contains the following changes:
- Consolidation of chained interrupt handler setup/removal
- Switch to functions which avoid a redundant interrupt descriptor lookup
Quoted 7 lines
Quoted 4 lines
- Preparation of interrupt flow handlers for the 'irq' argument removal
The series has no dependencies ...
But I assume you have work that will depend on it? So you're going to merge it via your tree at least I assume?
Can be done either way. The last step will happen when the merge window closes. So all I care it that it lands in 4.3
Quoted 7 lines
Quoted 3 lines
... and is also available as a git branch for your convenience:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.gitirq/armI can't find this.
Did you mean irq/ppc or irq/powerpc maybe? I can't find those either.
Gah.
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git queue/irq/powerpc
Sorry for the confusion.
Thanks,
tglx