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serial: 8250_omap: workaround for IP errata

PATCH In review Sekhar Nori 4 participants 14 messages Jul 14, 2015 – Jul 24, 2015 5 messages not in the archive

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#0 lore raw

v2 cover serial: 8250_omap: workaround for IP errata

This series works around "Advisory 21" as documented in AM437x SoC errata[1]. This errata prevents UART module from idling after DMA is used. AM335x and DRA7x also suffer from the same errata and chip design team is in the process of updating the errata documents of those devices as well.

Patch 1/7 fixes a related bug but can be applied independently.

[1] http://www.ti.com/lit/er/sprz408b/sprz408b.pdf

v2:
- Updated according to comments from Peter Hurley. See each patch for change details.

Sekhar Nori (7):
serial: 8250_omap: fix kernel crash in suspend-to-ram
Documentation: DT: omap_serial: document missing compatible
serial: 8250_omap: refactor mdr1 update
serial: 8250_omap: introduce "ti,am3352-uart" compatible property
serial: 8250_omap: workaround errata around idling UART after using
DMA
serial: 8250_omap: workaround module disable errata on dra7x SoCs
ARM: dts: dra7: workaround UART module disable errata

 .../devicetree/bindings/serial/omap_serial.txt     |   3 +
 arch/arm/boot/dts/am33xx.dtsi                      |  12 +--
 arch/arm/boot/dts/dra7.dtsi                        |  20 ++--
 drivers/tty/serial/8250/8250_omap.c                | 117 +++++++++++++++++----
 4 files changed, 113 insertions(+), 39 deletions(-)
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#2 lore raw

PATCH v2 1/7 serial: 8250_omap: fix kernel crash in suspend-to-ram

omap_device infrastructure has a suspend_noirq hook which runtime suspends all devices late in the suspend cycle (see _od_suspend_noirq() in arch/arm/mach-omap2/omap_device.c)

This leads to a NULL pointer exception in 8250_omap driver since by the time omap8250_runtime_suspend() is called, 8250_dma driver has already set rxchan to NULL via serial8250_release_dma().

Make an explicit check to see if rxchan is NULL in runtime_{suspend|resume} hooks to fix this.

---
v2:
- updated subject line according to subsystem conventions

 drivers/tty/serial/8250/8250_omap.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/tty/serial/8250/8250_omap.c +2 -2
index d75a66c72750..20c5b9c4c288 100644
@@ -1285,7 +1285,7 @@ static int omap8250_runtime_suspend(struct device *dev)
 			return -EBUSY;
 	}
 
-	if (up->dma)
+	if (up->dma && up->dma->rxchan)
 		omap_8250_rx_dma(up, UART_IIR_RX_TIMEOUT);
 
 	priv->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
@@ -1310,7 +1310,7 @@ static int omap8250_runtime_resume(struct device *dev)
 	if (loss_cntx)
 		omap8250_restore_regs(up);
 
-	if (up->dma)
+	if (up->dma && up->dma->rxchan)
 		omap_8250_rx_dma(up, 0);
 
 	priv->latency = priv->calc_latency;
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#3 lore raw

PATCH v2 2/7 Documentation: DT: omap_serial: document missing compatible

In reply to a message not in the archive

The compatible "ti,am4372-uart" is used in arch/arm/boot/dts/am4372.dtsi but not documented. Add necessary documentation.

---
v2:
- No changes.

 Documentation/devicetree/bindings/serial/omap_serial.txt | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/serial/omap_serial.txt +1 -0
index 54c2a155c783..d3bd2b1ec401 100644
@@ -4,6 +4,7 @@ Required properties:
 - compatible : should be "ti,omap2-uart" for OMAP2 controllers
 - compatible : should be "ti,omap3-uart" for OMAP3 controllers
 - compatible : should be "ti,omap4-uart" for OMAP4 controllers
+- compatible : should be "ti,am4372-uart" for AM437x controllers
 - reg : address and length of the register space
 - interrupts or interrupts-extended : Should contain the uart interrupt
                                       specifier or both the interrupt
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#4 lore raw

PATCH v2 3/7 serial: 8250_omap: refactor mdr1 update

In reply to a message not in the archive

The silicon errata[1] workaround implemented in a follow-on patch, "serial: 8250_omap: workaround errata on disabling UART after using DMA", requires MDR1 register programming.

Extract MDR1 register update into helper function, omap8250_update_mdr1() to help with that.

[1] Advisory 21 in http://www.ti.com/lit/er/sprz408b/sprz408b.pdf

---
v2:
- Updated subject line and description according
to comments received.

 drivers/tty/serial/8250/8250_omap.c | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)
drivers/tty/serial/8250/8250_omap.c +12 -5
index 20c5b9c4c288..d9c96b993a84 100644
@@ -232,6 +232,15 @@ static void omap8250_update_scr(struct uart_8250_port *up,
 	serial_out(up, UART_OMAP_SCR, priv->scr);
 }
 
+static void omap8250_update_mdr1(struct uart_8250_port *up,
+				 struct omap8250_priv *priv)
+{
+	if (priv->habit & UART_ERRATA_i202_MDR1_ACCESS)
+		omap_8250_mdr1_errataset(up, priv);
+	else
+		serial_out(up, UART_OMAP_MDR1, priv->mdr1);
+}
+
 static void omap8250_restore_regs(struct uart_8250_port *up)
 {
 	struct omap8250_priv *priv = up->port.private_data;
@@ -282,11 +291,9 @@ static void omap8250_restore_regs(struct uart_8250_port *up)
 	serial_out(up, UART_XOFF1, priv->xoff);
 
 	serial_out(up, UART_LCR, up->lcr);
-	/* need mode A for FCR */
-	if (priv->habit & UART_ERRATA_i202_MDR1_ACCESS)
-		omap_8250_mdr1_errataset(up, priv);
-	else
-		serial_out(up, UART_OMAP_MDR1, priv->mdr1);
+
+	omap8250_update_mdr1(up, priv);
+
 	up->port.ops->set_mctrl(&up->port, up->port.mctrl);
 }
 
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#5 lore raw

PATCH v2 4/7 serial: 8250_omap: introduce "ti,am3352-uart" compatible property

In reply to a message not in the archive

Use of of_machine_is_compatible() for handling AM335x specific "DMA kick" quirk in 8250_omap driver makes it ugly to extend the quirk for other platforms. Instead use a new compatible.

The new compatible will also make it easier to take care of other quirks on AM335x and like SoCs.

In order to not break backward DTB compatibility for users of 8250_omap driver on AM335x based boards, existing use of of_machine_is_compatible() has not been removed.

---
v2:
- prevent dtb backward compatibility breakage

 .../devicetree/bindings/serial/omap_serial.txt     |  1 +
 arch/arm/boot/dts/am33xx.dtsi                      | 12 ++++----
 drivers/tty/serial/8250/8250_omap.c                | 32 ++++++++++++++--------
 3 files changed, 28 insertions(+), 17 deletions(-)
Documentation/devicetree/bindings/serial/omap_serial.txt +1 -0
index d3bd2b1ec401..0ee88209b341 100644
@@ -5,6 +5,7 @@ Required properties:
 - compatible : should be "ti,omap3-uart" for OMAP3 controllers
 - compatible : should be "ti,omap4-uart" for OMAP4 controllers
 - compatible : should be "ti,am4372-uart" for AM437x controllers
+- compatible : should be "ti,am3352-uart" for AM335x controllers
 - reg : address and length of the register space
 - interrupts or interrupts-extended : Should contain the uart interrupt
                                       specifier or both the interrupt
arch/arm/boot/dts/am33xx.dtsi +6 -6
index 21fcc440fc1a..b76f9a2ce05d 100644
@@ -210,7 +210,7 @@
 		};
 
 		uart0: serial@44e09000 {
-			compatible = "ti,omap3-uart";
+			compatible = "ti,am3352-uart", "ti,omap3-uart";
 			ti,hwmods = "uart1";
 			clock-frequency = <48000000>;
 			reg = <0x44e09000 0x2000>;
@@ -221,7 +221,7 @@
 		};
 
 		uart1: serial@48022000 {
-			compatible = "ti,omap3-uart";
+			compatible = "ti,am3352-uart", "ti,omap3-uart";
 			ti,hwmods = "uart2";
 			clock-frequency = <48000000>;
 			reg = <0x48022000 0x2000>;
@@ -232,7 +232,7 @@
 		};
 
 		uart2: serial@48024000 {
-			compatible = "ti,omap3-uart";
+			compatible = "ti,am3352-uart", "ti,omap3-uart";
 			ti,hwmods = "uart3";
 			clock-frequency = <48000000>;
 			reg = <0x48024000 0x2000>;
@@ -243,7 +243,7 @@
 		};
 
 		uart3: serial@481a6000 {
-			compatible = "ti,omap3-uart";
+			compatible = "ti,am3352-uart", "ti,omap3-uart";
 			ti,hwmods = "uart4";
 			clock-frequency = <48000000>;
 			reg = <0x481a6000 0x2000>;
@@ -252,7 +252,7 @@
 		};
 
 		uart4: serial@481a8000 {
-			compatible = "ti,omap3-uart";
+			compatible = "ti,am3352-uart", "ti,omap3-uart";
 			ti,hwmods = "uart5";
 			clock-frequency = <48000000>;
 			reg = <0x481a8000 0x2000>;
@@ -261,7 +261,7 @@
 		};
 
 		uart5: serial@481aa000 {
-			compatible = "ti,omap3-uart";
+			compatible = "ti,am3352-uart", "ti,omap3-uart";
 			ti,hwmods = "uart6";
 			clock-frequency = <48000000>;
 			reg = <0x481aa000 0x2000>;
drivers/tty/serial/8250/8250_omap.c +21 -11
index d9c96b993a84..fff026f3d0bb 100644
@@ -16,6 +16,7 @@
 #include <linux/platform_device.h>
 #include <linux/slab.h>
 #include <linux/of.h>
+#include <linux/of_device.h>
 #include <linux/of_gpio.h>
 #include <linux/of_irq.h>
 #include <linux/delay.h>
@@ -537,14 +538,14 @@ static void omap_serial_fill_features_erratas(struct uart_8250_port *up,
 
 	switch (revision) {
 	case OMAP_UART_REV_46:
-		priv->habit = UART_ERRATA_i202_MDR1_ACCESS;
+		priv->habit |= UART_ERRATA_i202_MDR1_ACCESS;
 		break;
 	case OMAP_UART_REV_52:
-		priv->habit = UART_ERRATA_i202_MDR1_ACCESS |
+		priv->habit |= UART_ERRATA_i202_MDR1_ACCESS |
 				OMAP_UART_WER_HAS_TX_WAKEUP;
 		break;
 	case OMAP_UART_REV_63:
-		priv->habit = UART_ERRATA_i202_MDR1_ACCESS |
+		priv->habit |= UART_ERRATA_i202_MDR1_ACCESS |
 			OMAP_UART_WER_HAS_TX_WAKEUP;
 		break;
 	default:
@@ -1061,6 +1062,17 @@ static int omap8250_no_handle_irq(struct uart_port *port)
 	return 0;
 }
 
+static const u8 am3352_habit = OMAP_DMA_TX_KICK;
+
+static const struct of_device_id omap8250_dt_ids[] = {
+	{ .compatible = "ti,omap2-uart" },
+	{ .compatible = "ti,omap3-uart" },
+	{ .compatible = "ti,omap4-uart" },
+	{ .compatible = "ti,am3352-uart", .data = &am3352_habit, },
+	{},
+};
+MODULE_DEVICE_TABLE(of, omap8250_dt_ids);
+
 static int omap8250_probe(struct platform_device *pdev)
 {
 	struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1125,11 +1137,17 @@ static int omap8250_probe(struct platform_device *pdev)
 	up.port.unthrottle = omap_8250_unthrottle;
 
 	if (pdev->dev.of_node) {
+		const struct of_device_id *id;
+
 		ret = of_alias_get_id(pdev->dev.of_node, "serial");
 
 		of_property_read_u32(pdev->dev.of_node, "clock-frequency",
 				     &up.port.uartclk);
 		priv->wakeirq = irq_of_parse_and_map(pdev->dev.of_node, 1);
+
+		id = of_match_device(of_match_ptr(omap8250_dt_ids), &pdev->dev);
+		if (id && id->data)
+			priv->habit |= *(u8 *)id->data;
 	} else {
 		ret = pdev->id;
 	}
@@ -1374,14 +1392,6 @@ static const struct dev_pm_ops omap8250_dev_pm_ops = {
 	.complete       = omap8250_complete,
 };
 
-static const struct of_device_id omap8250_dt_ids[] = {
-	{ .compatible = "ti,omap2-uart" },
-	{ .compatible = "ti,omap3-uart" },
-	{ .compatible = "ti,omap4-uart" },
-	{},
-};
-MODULE_DEVICE_TABLE(of, omap8250_dt_ids);
-
 static struct platform_driver omap8250_platform_driver = {
 	.driver = {
 		.name		= "omap8250",
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#6 lore raw

PATCH v2 5/7 serial: 8250_omap: workaround errata around idling UART after using DMA

In reply to a message not in the archive

AM335x, AM437x and DRA7x SoCs have an errata[1] due to which UART cannot be idled after it has been used with DMA.

OMAP3 has a similar sounding errata which has been worked around in a2fc36613ac1af2e9 ("ARM: OMAP3: Use manual idle for UARTs because of DMA errata"). But the workaround used there does not apply to AM335x, AM437x SoCs.

After using DMA, the UART module on these SoCs must be soft reset to go to idle.

This patch implements that errata workaround. It is expected that UART will be used with DMA so no explicit check for DMA usage has been added for errata applicability.

MDR1 register needs to be restored right after soft-reset because "UART mode" must be set in that register for module wake-up on AM335x to work. As a result, SCR register is now used to determine if context was lost during sleep.

[1] See Advisory 21 in AM437x errata SPRZ408B, updated April 2015.

    http://www.ti.com/lit/er/sprz408b/sprz408b.pdf

---
v2:
- introduce a new function to do the UART softreset
- restore MDR1 unconditionally
- update subject line and description according to comments received.

 drivers/tty/serial/8250/8250_omap.c | 65 +++++++++++++++++++++++++++++++++----
 1 file changed, 59 insertions(+), 6 deletions(-)
drivers/tty/serial/8250/8250_omap.c +59 -6
index fff026f3d0bb..a2ee75dee070 100644
@@ -33,6 +33,11 @@
 #define UART_ERRATA_i202_MDR1_ACCESS	(1 << 0)
 #define OMAP_UART_WER_HAS_TX_WAKEUP	(1 << 1)
 #define OMAP_DMA_TX_KICK		(1 << 2)
+/*
+ * See Advisory 21 in AM437x errata SPRZ408B, updated April 2015.
+ * The same errata is applicable to AM335x and DRA7x processors too.
+ */
+#define UART_ERRATA_CLOCK_DISABLE	(1 << 3)
 
 #define OMAP_UART_FCR_RX_TRIG		6
 #define OMAP_UART_FCR_TX_TRIG		4
@@ -54,6 +59,12 @@
 #define OMAP_UART_MVR_MAJ_SHIFT		8
 #define OMAP_UART_MVR_MIN_MASK		0x3f
 
+/* SYSC register bitmasks */
+#define OMAP_UART_SYSC_SOFTRESET	(1 << 1)
+
+/* SYSS register bitmasks */
+#define OMAP_UART_SYSS_RESETDONE	(1 << 0)
+
 #define UART_TI752_TLR_TX	0
 #define UART_TI752_TLR_RX	4
 
@@ -1062,13 +1073,15 @@ static int omap8250_no_handle_irq(struct uart_port *port)
 	return 0;
 }
 
-static const u8 am3352_habit = OMAP_DMA_TX_KICK;
+static const u8 am3352_habit = OMAP_DMA_TX_KICK | UART_ERRATA_CLOCK_DISABLE;
+static const u8 am4372_habit = UART_ERRATA_CLOCK_DISABLE;
 
 static const struct of_device_id omap8250_dt_ids[] = {
 	{ .compatible = "ti,omap2-uart" },
 	{ .compatible = "ti,omap3-uart" },
 	{ .compatible = "ti,omap4-uart" },
 	{ .compatible = "ti,am3352-uart", .data = &am3352_habit, },
+	{ .compatible = "ti,am4372-uart", .data = &am4372_habit, },
 	{},
 };
 MODULE_DEVICE_TABLE(of, omap8250_dt_ids);
@@ -1282,17 +1295,46 @@ static int omap8250_lost_context(struct uart_8250_port *up)
 {
 	u32 val;
 
-	val = serial_in(up, UART_OMAP_MDR1);
+	val = serial_in(up, UART_OMAP_SCR);
 	/*
-	 * If we lose context, then MDR1 is set to its reset value which is
-	 * UART_OMAP_MDR1_DISABLE. After set_termios() we set it either to 13x
-	 * or 16x but never to disable again.
+	 * If we lose context, then SCR is set to its reset value of zero.
+	 * After set_termios() we set bit 3 of SCR (TX_EMPTY_CTL_IT) to 1,
+	 * among other bits, to never set the register back to zero again.
 	 */
-	if (val == UART_OMAP_MDR1_DISABLE)
+	if (!val)
 		return 1;
 	return 0;
 }
 
+/* TODO: in future, this should happen via API in drivers/reset/ */
+static int omap8250_soft_reset(struct device *dev)
+{
+	struct omap8250_priv *priv = dev_get_drvdata(dev);
+	struct uart_8250_port *up = serial8250_get_port(priv->line);
+	int timeout = 100;
+	int sysc;
+	int syss;
+
+	sysc = serial_in(up, UART_OMAP_SYSC);
+
+	/* softreset the UART */
+	sysc |= OMAP_UART_SYSC_SOFTRESET;
+	serial_out(up, UART_OMAP_SYSC, sysc);
+
+	/* By experiments, 1us enough for reset complete on AM335x */
+	do {
+		udelay(1);
+		syss = serial_in(up, UART_OMAP_SYSS);
+	} while (--timeout && !(syss & OMAP_UART_SYSS_RESETDONE));
+
+	if (!timeout) {
+		dev_err(dev, "timed out waiting for reset done\n");
+		return -ETIMEDOUT;
+	}
+
+	return 0;
+}
+
 static int omap8250_runtime_suspend(struct device *dev)
 {
 	struct omap8250_priv *priv = dev_get_drvdata(dev);
@@ -1310,6 +1352,17 @@ static int omap8250_runtime_suspend(struct device *dev)
 			return -EBUSY;
 	}
 
+	if (priv->habit & UART_ERRATA_CLOCK_DISABLE) {
+		int ret;
+
+		ret = omap8250_soft_reset(dev);
+		if (ret)
+			return ret;
+
+		/* Restore to UART mode after reset (for wakeup) */
+		omap8250_update_mdr1(up, priv);
+	}
+
 	if (up->dma && up->dma->rxchan)
 		omap_8250_rx_dma(up, UART_IIR_RX_TIMEOUT);
 
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#7 lore raw

PATCH v2 6/7 serial: 8250_omap: workaround module disable errata on dra7x SoCs

In reply to a message not in the archive

Due to Advisory 21 as documented in AM437x errata document, UART module cannot be disabled once DMA is used. The only workaround is to softreset the module before disabling it.

DRA7x UARTs are compatible to AM437x UARTs in terms of this errata and prescribed workaround.

Enable usage of workaround for this errata on DRA7x SoCs.

---
v2:
- subject line updated according to subsystem conventions

 Documentation/devicetree/bindings/serial/omap_serial.txt | 1 +
 drivers/tty/serial/8250/8250_omap.c                      | 1 +
 2 files changed, 2 insertions(+)
Documentation/devicetree/bindings/serial/omap_serial.txt +1 -0
index 0ee88209b341..7a71b5de77d6 100644
@@ -6,6 +6,7 @@ Required properties:
 - compatible : should be "ti,omap4-uart" for OMAP4 controllers
 - compatible : should be "ti,am4372-uart" for AM437x controllers
 - compatible : should be "ti,am3352-uart" for AM335x controllers
+- compatible : should be "ti,dra742-uart" for DRA7x controllers
 - reg : address and length of the register space
 - interrupts or interrupts-extended : Should contain the uart interrupt
                                       specifier or both the interrupt
drivers/tty/serial/8250/8250_omap.c +1 -0
index a2ee75dee070..d9a37191a1ae 100644
@@ -1082,6 +1082,7 @@ static const struct of_device_id omap8250_dt_ids[] = {
 	{ .compatible = "ti,omap4-uart" },
 	{ .compatible = "ti,am3352-uart", .data = &am3352_habit, },
 	{ .compatible = "ti,am4372-uart", .data = &am4372_habit, },
+	{ .compatible = "ti,dra742-uart", .data = &am4372_habit, },
 	{},
 };
 MODULE_DEVICE_TABLE(of, omap8250_dt_ids);
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#8 lore raw

PATCH v2 7/7 ARM: dts: dra7: workaround UART module disable errata

In reply to a message not in the archive

Add "ti,dra742-uart" to the compatible list so the driver workaround for UART module disable errata is enabled.

This does not break backward compatibility as existing DTBs should continue to work with newer kernels albeit without the capability to idle the UART module when DMA is used.

---
v2:
- no change.

 arch/arm/boot/dts/dra7.dtsi | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)
arch/arm/boot/dts/dra7.dtsi +10 -10
index 8f1e25bcecbd..49940e516f0f 100644
@@ -397,7 +397,7 @@
 		};
 
 		uart1: serial@4806a000 {
-			compatible = "ti,omap4-uart";
+			compatible = "ti,dra742-uart", "ti,omap4-uart";
 			reg = <0x4806a000 0x100>;
 			interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "uart1";
@@ -408,7 +408,7 @@
 		};
 
 		uart2: serial@4806c000 {
-			compatible = "ti,omap4-uart";
+			compatible = "ti,dra742-uart", "ti,omap4-uart";
 			reg = <0x4806c000 0x100>;
 			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "uart2";
@@ -419,7 +419,7 @@
 		};
 
 		uart3: serial@48020000 {
-			compatible = "ti,omap4-uart";
+			compatible = "ti,dra742-uart", "ti,omap4-uart";
 			reg = <0x48020000 0x100>;
 			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "uart3";
@@ -430,7 +430,7 @@
 		};
 
 		uart4: serial@4806e000 {
-			compatible = "ti,omap4-uart";
+			compatible = "ti,dra742-uart", "ti,omap4-uart";
 			reg = <0x4806e000 0x100>;
 			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "uart4";
@@ -441,7 +441,7 @@
 		};
 
 		uart5: serial@48066000 {
-			compatible = "ti,omap4-uart";
+			compatible = "ti,dra742-uart", "ti,omap4-uart";
 			reg = <0x48066000 0x100>;
 			interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "uart5";
@@ -452,7 +452,7 @@
 		};
 
 		uart6: serial@48068000 {
-			compatible = "ti,omap4-uart";
+			compatible = "ti,dra742-uart", "ti,omap4-uart";
 			reg = <0x48068000 0x100>;
 			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "uart6";
@@ -463,7 +463,7 @@
 		};
 
 		uart7: serial@48420000 {
-			compatible = "ti,omap4-uart";
+			compatible = "ti,dra742-uart", "ti,omap4-uart";
 			reg = <0x48420000 0x100>;
 			interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "uart7";
@@ -472,7 +472,7 @@
 		};
 
 		uart8: serial@48422000 {
-			compatible = "ti,omap4-uart";
+			compatible = "ti,dra742-uart", "ti,omap4-uart";
 			reg = <0x48422000 0x100>;
 			interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "uart8";
@@ -481,7 +481,7 @@
 		};
 
 		uart9: serial@48424000 {
-			compatible = "ti,omap4-uart";
+			compatible = "ti,dra742-uart", "ti,omap4-uart";
 			reg = <0x48424000 0x100>;
 			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "uart9";
@@ -490,7 +490,7 @@
 		};
 
 		uart10: serial@4ae2b000 {
-			compatible = "ti,omap4-uart";
+			compatible = "ti,dra742-uart", "ti,omap4-uart";
 			reg = <0x4ae2b000 0x100>;
 			interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "uart10";
Signature · 6 lines
2.4.4.408.g16da57c

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Acked-by
#10 lore raw

Re: [PATCH v2 7/7] ARM: dts: dra7: workaround UART module disable errata

Quoted 6 lines · Sekhar Nori

Add "ti,dra742-uart" to the compatible list so the driver workaround for UART module disable errata is enabled.

This does not break backward compatibility as existing DTBs should continue to work with newer kernels albeit without the capability to idle the UART module when DMA is used.

Looks like this won't cause any merge conflicts for v4.3, please feel free to apply along with the serial driver patches:

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Reviewed-by
#11 lore raw
In reply to a message not in the archive
Quoted 7 lines · Sekhar Nori

This series works around "Advisory 21" as documented in AM437x SoC errata[1]. This errata prevents UART module from idling after DMA is used. AM335x and DRA7x also suffer from the same errata and chip design team is in the process of updating the errata documents of those devices as well.

Patch 1/7 fixes a related bug but can be applied independently.

Looks good. Thanks Sekhar!

For series,

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Acked-by
#13 lore raw
Quoted 7 lines · Peter Hurley
Quoted 6 lines · Sekhar Nori

This series works around "Advisory 21" as documented in AM437x SoC errata[1]. This errata prevents UART module from idling after DMA is used. AM335x and DRA7x also suffer from the same errata and chip design team is in the process of updating the errata documents of those devices as well.

Quoted 7 lines
Quoted 1 line

Patch 1/7 fixes a related bug but can be applied independently.

Looks good. Thanks Sekhar!

For series,

Also things still work for me, and the dts changes should not cause merge conflicts during v4.3 merge window based on what I have queued. So please feel free to queue these all via the tty tree and add:

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#15 lore raw

Hi Greg,

Quoted 14 lines · Tony Lindgren
Quoted 13 lines · Peter Hurley
Quoted 7 lines · Sekhar Nori

This series works around "Advisory 21" as documented in AM437x SoC errata[1]. This errata prevents UART module from idling after DMA is used. AM335x and DRA7x also suffer from the same errata and chip design team is in the process of updating the errata documents of those devices as well.

Patch 1/7 fixes a related bug but can be applied independently.

Looks good. Thanks Sekhar!

For series,

Quoted 8 lines
Quoted 1 line

Also things still work for me, and the dts changes should not cause merge conflicts during v4.3 merge window based on what I have queued. So please feel free to queue these all via the tty tree and add:

Looks like you have queued the first 6 patches of this series but left out 7/7 which is a DTS update. Based on above, Tony is okay with you going ahead and queuing that DTS patch too. Can you please go ahead and queue 7/7 as well?

Thanks,
Sekhar
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#17 lore raw
Quoted 24 lines · Sekhar Nori

Hi Greg,

Quoted 21 lines · Tony Lindgren
Quoted 7 lines · Peter Hurley
Quoted 6 lines · Sekhar Nori

This series works around "Advisory 21" as documented in AM437x SoC errata[1]. This errata prevents UART module from idling after DMA is used. AM335x and DRA7x also suffer from the same errata and chip design team is in the process of updating the errata documents of those devices as well.

Quoted 7 lines
Quoted 1 line

Patch 1/7 fixes a related bug but can be applied independently.

Looks good. Thanks Sekhar!

For series,

Also things still work for me, and the dts changes should not cause merge conflicts during v4.3 merge window based on what I have queued. So please feel free to queue these all via the tty tree and add:

Quoted 6 lines
Quoted 1 line

Looks like you have queued the first 6 patches of this series but left out 7/7 which is a DTS update. Based on above, Tony is okay with you going ahead and queuing that DTS patch too. Can you please go ahead and queue 7/7 as well?

OK seems it won't cause merge conflicts so I've acked it.

Regards,

Tony
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#18 lore raw
In reply to a message not in the archive
Quoted 24 lines · Sekhar Nori

Hi Greg,

Quoted 21 lines · Tony Lindgren
Quoted 7 lines · Peter Hurley
Quoted 6 lines · Sekhar Nori

This series works around "Advisory 21" as documented in AM437x SoC errata[1]. This errata prevents UART module from idling after DMA is used. AM335x and DRA7x also suffer from the same errata and chip design team is in the process of updating the errata documents of those devices as well.

Quoted 7 lines
Quoted 1 line

Patch 1/7 fixes a related bug but can be applied independently.

Looks good. Thanks Sekhar!

For series,

Also things still work for me, and the dts changes should not cause merge conflicts during v4.3 merge window based on what I have queued. So please feel free to queue these all via the tty tree and add:

Quoted 6 lines
Quoted 1 line

Looks like you have queued the first 6 patches of this series but left out 7/7 which is a DTS update. Based on above, Tony is okay with you going ahead and queuing that DTS patch too. Can you please go ahead and queue 7/7 as well?

Can you please resend it? My queue is now empty.
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