Add support for hi6220 SoC and HiKey 96boards CE board.

This patch adds support for the GPIO perif found on hi6220 SoC.

Signed-off-by Peter Griffin <[email protected]>

---
 arch/arm/include/asm/arch-hi6220/gpio.h | 29 ++++++++++
 drivers/gpio/Makefile                   |  2 +
 drivers/gpio/hi6220_gpio.c              | 95 +++++++++++++++++++++++++++++++++
 3 files changed, 126 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-hi6220/gpio.h
 create mode 100644 drivers/gpio/hi6220_gpio.c

arch/arm/include/asm/arch-hi6220/gpio.h new file +4 -0

new file mode 100644
index 0000000..98122a2
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2015 Linaro
+ * Peter Griffin <[email protected]>
+ *

arch/arm/include/asm/arch-hi6220/gpio.h new file +8 -0

+
+/* Information about a GPIO bank */
+struct hikey_gpio_platdata {
+       int bank_index;
+       unsigned int base;     /* address of registers in physical memory */
+};
+
+#endif /* _HI6220_GPIO_H_ */

drivers/gpio/Makefile +2 -0

index 5864850..b470bab 100644
@@ -46,3 +46,5 @@ obj-$(CONFIG_LPC32XX_GPIO)    += lpc32xx_gpio.o
 obj-$(CONFIG_STM32_GPIO)       += stm32_gpio.o
 obj-$(CONFIG_ZYNQ_GPIO)                += zynq_gpio.o
 obj-$(CONFIG_VYBRID_GPIO)      += vybrid_gpio.o
+obj-$(CONFIG_HIKEY_GPIO)       += hi6220_gpio.o
+

drivers/gpio/hi6220_gpio.c new file +11 -0

new file mode 100644
index 0000000..3f41bff
@@ -0,0 +1,95 @@
+/*
+ * Copyright (C) 2015 Linaro
+ * Peter Griffin <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/gpio.h>
+#include <asm/io.h>

drivers/gpio/hi6220_gpio.c new file +32 -0

+       return 0;
+}
+
+static int hi6220_gpio_direction_output(struct udevice *dev, unsigned gpio,
+                                       int value)
+{
+       struct gpio_bank *bank = dev_get_priv(dev);
+       u8 data;
+
+       data = readb(bank->base + HI6220_GPIO_DIR);
+       data |= 1 << gpio;
+       writeb(data, bank->base + HI6220_GPIO_DIR);
+
+       hi6220_gpio_set_value(dev, gpio, value);
+
+       return 0;
+}
+
+static int hi6220_gpio_get_value(struct udevice *dev, unsigned gpio)
+{
+       struct gpio_bank *bank = dev_get_priv(dev);
+
+       return !!readb(bank->base + (BIT(gpio + 2)));
+}
+
+
+
+static const struct dm_gpio_ops gpio_hi6220_ops = {
+       .direction_input        = hi6220_gpio_direction_input,
+       .direction_output       = hi6220_gpio_direction_output,
+       .get_value              = hi6220_gpio_get_value,
+       .set_value              = hi6220_gpio_set_value,

drivers/gpio/hi6220_gpio.c new file +22 -1

+
+       str = strdup(name);
+       if (!str)
+               return -ENOMEM;
+
+       uc_priv->bank_name = str;
+       uc_priv->gpio_count = HI6220_GPIO_PER_BANK;
+
+       bank->base = (u8 *)plat->base;
+
+       return 0;
+}
+
+U_BOOT_DRIVER(gpio_hi6220) = {
+       .name   = "gpio_hi6220",
+       .id     = UCLASS_GPIO,
+       .ops    = &gpio_hi6220_ops,
+       .probe  = hi6220_gpio_probe,
+       .priv_auto_alloc_size = sizeof(struct gpio_bank),
+};
+
+
--

1.9.1

This patch adds the header files which will be used in the subsquent board / drivers to enable support for hi6220 hikey board.

Signed-off-by Peter Griffin <[email protected]>

---
 arch/arm/include/asm/arch-hi6220/hi6220.h          | 324 +++++++++++++++++++
 .../include/asm/arch-hi6220/hi6220_regs_alwayson.h | 349 +++++++++++++++++++++
 2 files changed, 673 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-hi6220/hi6220.h
 create mode 100644 arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h

arch/arm/include/asm/arch-hi6220/hi6220.h new file +11 -0

new file mode 100644
index 0000000..3ddec91
@@ -0,0 +1,324 @@
+/*
+ * (C) Copyright 2015 Linaro
+ * Peter Griffin <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __HI6220_H__
+#define __HI6220_H__
+
+#include "hi6220_regs_alwayson.h"

arch/arm/include/asm/arch-hi6220/hi6220.h new file +28 -0

+#define PERI_CTRL1_ETR_AXI_CSYSREQ_N                   (1 << 0)
+#define PERI_CTRL1_HIFI_INT_MASK                       (1 << 1)
+#define PERI_CTRL1_HIFI_ALL_INT_MASK                   (1 << 2)
+#define PERI_CTRL1_ETR_AXI_CSYSREQ_N_MSK               (1 << 16)
+#define PERI_CTRL1_HIFI_INT_MASK_MSK                   (1 << 17)
+#define PERI_CTRL1_HIFI_ALL_INT_MASK_MSK               (1 << 18)
+
+
+#define PERI_SC_PERIPH_CTRL2                   (HI6220_PERI_BASE + 0x004)
+
+#define PERI_CTRL2_MMC_CLK_PHASE_BYPASS_EN_MMC0                (1 << 0)
+#define PERI_CTRL2_MMC_CLK_PHASE_BYPASS_EN_MMC1                (1 << 2)
+#define PERI_CTRL2_NAND_SYS_MEM_SEL                    (1 << 6)
+#define PERI_CTRL2_G3D_DDRT_AXI_SEL                    (1 << 7)
+#define PERI_CTRL2_GU_MDM_BBP_TESTPIN_SEL              (1 << 8)
+#define PERI_CTRL2_CODEC_SSI_MASTER_CHECK              (1 << 9)
+#define PERI_CTRL2_FUNC_TEST_SOFT                      (1 << 12)
+#define PERI_CTRL2_CSSYS_TS_ENABLE                     (1 << 15)
+#define PERI_CTRL2_HIFI_RAMCTRL_S_EMA                  (1 << 16)
+#define PERI_CTRL2_HIFI_RAMCTRL_S_EMAW                 (1 << 20)
+#define PERI_CTRL2_HIFI_RAMCTRL_S_EMAS                 (1 << 22)
+#define PERI_CTRL2_HIFI_RAMCTRL_S_RET1N                        (1 << 26)
+#define PERI_CTRL2_HIFI_RAMCTRL_S_RET2N                        (1 << 27)
+#define PERI_CTRL2_HIFI_RAMCTRL_S_PGEN                 (1 << 28)
+
+#define PERI_SC_PERIPH_CTRL3                   (HI6220_PERI_BASE + 0x008)
+
+#define PERI_CTRL3_HIFI_DDR_HARQMEM_ADDR               (1 << 0)

Hi Peter,

Quoted 6 lines · Peter Griffin

This patch adds the header files which will be used in the subsquent board / drivers to enable support for hi6220 hikey board.

Signed-off-by Peter Griffin <[email protected]>

---
 arch/arm/include/asm/arch-hi6220/hi6220.h          | 324

+++++++++++++++++++

Quoted 1 line

 .../include/asm/arch-hi6220/hi6220_regs_alwayson.h | 349

+++++++++++++++++++++

Quoted 3 lines

 2 files changed, 673 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-hi6220/hi6220.h
 create mode 100644

arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h

Review

Quoted 2 lines

(quoted diff) +0 -0

b/arch/arm/include/asm/arch-hi6220/hi6220.h

Quoted 15 lines

new file mode 100644
index 0000000..3ddec91

arch/arm/include/asm/arch-hi6220/hi6220.h new file +10 -0

@@ -0,0 +1,324 @@
+/*
+ * (C) Copyright 2015 Linaro
+ * Peter Griffin <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __HI6220_H__
+#define __HI6220_H__
+

arch/arm/include/asm/arch-hi6220/hi6220.h line 20

Quoted 10 lines

arch/arm/include/asm/arch-hi6220/hi6220.h new file +10 -0

+#include "hi6220_regs_alwayson.h"
+
+#define HI6220_MMC0_BASE                       0xF723D000
+#define HI6220_MMC1_BASE                       0xF723E000
+
+#define HI6220_PMUSSI_BASE                     0xF8000000
+
+#define HI6220_PERI_BASE                       0xF7030000
+
+#define PERI_SC_PERIPH_CTRL1                   (HI6220_PERI_BASE +

0x000)

arch/arm/include/asm/arch-hi6220/hi6220.h line 21

Quoted 1 line

arch/arm/include/asm/arch-hi6220/hi6220.h new file +1 -0

+

I think you should have:

struct peri_sc_regs {
   u32 ctrl1;
   u32 ctrl2;

...
};

U-Boot uses structs for I/O access.

This pmic is used on the 96boards consumer edition HiKey board.

Signed-off-by Peter Griffin <[email protected]>

---
 arch/arm/include/asm/arch-hi6220/hi6553.h | 75 +++++++++++++++++++++++++++++++
 1 file changed, 75 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-hi6220/hi6553.h

arch/arm/include/asm/arch-hi6220/hi6553.h new file +75 -1

new file mode 100644
index 0000000..d0770e1
@@ -0,0 +1,75 @@
+/*
+ * (C) Copyright 2015 Linaro
+ * Peter Griffin <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __HI6553_PMIC_H__
+#define __HI6553_PMIC_H__
+
+#define HI6553_DISABLE6_XO_CLK                 0x036
+
+#define HI6553_DISABLE6_XO_CLK_BB              (1 << 0)
+#define HI6553_DISABLE6_XO_CLK_CONN            (1 << 1)
+#define HI6553_DISABLE6_XO_CLK_NFC             (1 << 2)
+#define HI6553_DISABLE6_XO_CLK_RF1             (1 << 3)
+#define HI6553_DISABLE6_XO_CLK_RF2             (1 << 4)
+
+#define HI6553_VERSION_REG                     0x000
+#define HI6553_ENABLE2_LDO1_8                  0x029
+#define HI6553_DISABLE2_LDO1_8                 0x02a
+#define HI6553_ONOFF_STATUS2_LDO1_8            0x02b
+#define HI6553_ENABLE3_LDO9_16                 0x02c
+#define HI6553_DISABLE3_LDO9_16                        0x02d
+#define HI6553_ONOFF_STATUS3_LDO9_16           0x02e
+#define HI6553_PERI_EN_MARK                    0x040
+#define HI6553_BUCK2_REG1                      0x04a
+#define HI6553_BUCK2_REG5                      0x04e
+#define HI6553_BUCK2_REG6                      0x04f
+#define HI6553_BUCK3_REG3                      0x054
+#define HI6553_BUCK3_REG5                      0x056
+#define HI6553_BUCK3_REG6                      0x057
+#define HI6553_BUCK4_REG2                      0x05b
+#define HI6553_BUCK4_REG5                      0x05e
+#define HI6553_BUCK4_REG6                      0x05f
+#define HI6553_CLK_TOP0                                0x063
+#define HI6553_CLK_TOP3                                0x066
+#define HI6553_CLK_TOP4                                0x067
+#define HI6553_VSET_BUCK2_ADJ                  0x06d
+#define HI6553_VSET_BUCK3_ADJ                  0x06e
+#define HI6553_LDO7_REG_ADJ                    0x078
+#define HI6553_LDO10_REG_ADJ                   0x07b
+#define HI6553_LDO19_REG_ADJ                   0x084
+#define HI6553_LDO20_REG_ADJ                   0x085
+#define HI6553_DR_LED_CTRL                     0x098
+#define HI6553_DR_OUT_CTRL                     0x099
+#define HI6553_DR3_ISET                                0x09a
+#define HI6553_DR3_START_DEL                   0x09b
+#define HI6553_DR4_ISET                                0x09c
+#define HI6553_DR4_START_DEL                   0x09d
+#define HI6553_DR345_TIM_CONF0                 0x0a0
+#define HI6553_NP_REG_ADJ1                     0x0be
+#define HI6553_NP_REG_CHG                      0x0c0
+#define HI6553_BUCK01_CTRL2                    0x0d9
+#define HI6553_BUCK0_CTRL1                     0x0dd
+#define HI6553_BUCK0_CTRL5                     0x0e1
+#define HI6553_BUCK0_CTRL7                     0x0e3
+#define HI6553_BUCK1_CTRL1                     0x0e8
+#define HI6553_BUCK1_CTRL5                     0x0ec
+#define HI6553_BUCK1_CTRL7                     0x0ef
+#define HI6553_CLK19M2_600_586_EN              0x0fe
+
+#define HI6553_LED_START_DELAY_TIME            0x00
+#define HI6553_LED_ELEC_VALUE                  0x07
+#define HI6553_LED_LIGHT_TIME                  0xf0
+#define HI6553_LED_GREEN_ENABLE                        (1 << 1)
+#define HI6553_LED_OUT_CTRL                    0x00
+
+#define HI6553_PMU_V300                                0x30
+#define HI6553_PMU_V310                                0x31
+
+unsigned char hi6553_read_8(unsigned int offset);
+void hi6553_write_8(unsigned int offset, unsigned char value);
+
+#endif /* __HI6553_PMIC_H__ */
--

1.9.1

Hi Peter,

Quoted 5 lines · Peter Griffin

This pmic is used on the 96boards consumer edition HiKey board.

Signed-off-by Peter Griffin <[email protected]>

---
 arch/arm/include/asm/arch-hi6220/hi6553.h | 75

+++++++++++++++++++++++++++++++

Quoted 2 lines

 1 file changed, 75 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-hi6220/hi6553.h

Should be in drivers/power/pmic I think. Also use struct for reg access. Should probably use the new PMIC uclass (we can convert it later if you don't have a device tree yet).

This patch adds the glue code for hi6220 SoC which has 2x synopsis dw_mmc controllers. This will be used by the hikey board support in subsequent patches.

Signed-off-by Peter Griffin <[email protected]>

---
 arch/arm/include/asm/arch-hi6220/dwmmc.h |  8 +++++
 drivers/mmc/Makefile                     |  1 +
 drivers/mmc/hi6220_dw_mmc.c              | 56 ++++++++++++++++++++++++++++++++
 3 files changed, 65 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-hi6220/dwmmc.h
 create mode 100644 drivers/mmc/hi6220_dw_mmc.c

arch/arm/include/asm/arch-hi6220/dwmmc.h new file +8 -0

new file mode 100644
index 0000000..c747383
@@ -0,0 +1,8 @@
+/*
+ * (C) Copyright 2015 Linaro
+ * Peter Griffin <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width);

drivers/mmc/Makefile +1 -0

index ed73687..81a1a8f 100644
@@ -11,6 +11,7 @@ obj-$(CONFIG_BFIN_SDH) += bfin_sdh.o
 obj-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o
 obj-$(CONFIG_DWMMC) += dw_mmc.o
 obj-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o
+obj-$(CONFIG_HIKEY_DWMMC) += hi6220_dw_mmc.o
 obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
 obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o
 obj-$(CONFIG_FTSDC021) += ftsdc021_sdhci.o

drivers/mmc/hi6220_dw_mmc.c new file +6 -0

new file mode 100644
index 0000000..106f673
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2015 Linaro
+ * peter.griffin <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */

drivers/mmc/hi6220_dw_mmc.c new file +18 -0

+
+static int hi6220_dwmci_core_init(struct dwmci_host *host, int index)
+{
+	host->name = "HiKey DWMMC";
+
+	host->dev_index = index;
+
+	/* Add the mmc channel to be registered with mmc core */
+	if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) {
+		printf("DWMMC%d registration failed\n", index);
+		return -1;
+	}
+	return 0;
+}
+
+/*
+ * This function adds the mmc channel to be registered with mmc core.
+ * index -	mmc channel number.

drivers/mmc/hi6220_dw_mmc.c new file +9 -0

+		return -ENOMEM;
+	}
+
+	host->ioaddr = (void *)regbase;
+	host->buswidth = bus_width;
+	host->bus_hz = MMC0_DEFAULT_FREQ;
+
+	return hi6220_dwmci_core_init(host, index);
+}

This patch adds the glue code for hi6220 SoC which has 2x synopsis dw_mmc controllers. This will be used by the hikey board support in subsequent patches.

Signed-off-by Peter Griffin <[email protected]>

---

 arch/arm/include/asm/arch-hi6220/dwmmc.h |  8 +++++
 drivers/mmc/Makefile                     |  1 +
 drivers/mmc/hi6220_dw_mmc.c              | 56 ++++++++++++++++++++++++++++++++
 3 files changed, 65 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-hi6220/dwmmc.h
 create mode 100644 drivers/mmc/hi6220_dw_mmc.c

arch/arm/include/asm/arch-hi6220/dwmmc.h new file +8 -0

new file mode 100644
index 0000000..c747383
@@ -0,0 +1,8 @@
+/*
+ * (C) Copyright 2015 Linaro
+ * Peter Griffin <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width);

drivers/mmc/Makefile +1 -0

index ed73687..81a1a8f 100644
@@ -11,6 +11,7 @@ obj-$(CONFIG_BFIN_SDH) += bfin_sdh.o
 obj-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o
 obj-$(CONFIG_DWMMC) += dw_mmc.o
 obj-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o
+obj-$(CONFIG_HIKEY_DWMMC) += hi6220_dw_mmc.o
 obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
 obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o
 obj-$(CONFIG_FTSDC021) += ftsdc021_sdhci.o

drivers/mmc/hi6220_dw_mmc.c new file +8 -0

new file mode 100644
index 0000000..106f673
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2015 Linaro
+ * peter.griffin <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>

drivers/mmc/hi6220_dw_mmc.c new file +38 -1

+#define MMC0_DEFAULT_FREQ              100000000
+
+static int hi6220_dwmci_core_init(struct dwmci_host *host, int index)
+{
+       host->name = "HiKey DWMMC";
+
+       host->dev_index = index;
+
+       /* Add the mmc channel to be registered with mmc core */
+       if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) {
+               printf("DWMMC%d registration failed\n", index);
+               return -1;
+       }
+       return 0;
+}
+
+/*
+ * This function adds the mmc channel to be registered with mmc core.
+ * index -     mmc channel number.
+ * regbase -   register base address of mmc channel specified in 'index'.
+ * bus_width - operating bus width of mmc channel specified in 'index'.
+ */
+int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width)
+{
+       struct dwmci_host *host = NULL;
+
+       host = calloc(1, sizeof(struct dwmci_host));
+       if (!host) {
+               error("dwmci_host malloc fail!\n");
+               return -ENOMEM;
+       }
+
+       host->ioaddr = (void *)regbase;
+       host->buswidth = bus_width;
+       host->bus_hz = MMC0_DEFAULT_FREQ;
+
+       return hi6220_dwmci_core_init(host, index);
+}
--

1.9.1

Quoted 6 lines

This patch adds the glue code for hi6220 SoC which has 2x synopsis dw_mmc controllers. This will be used by the hikey board support in subsequent patches.

Signed-off-by Peter Griffin <[email protected]>

---

Reviewed-by Simon Glass <[email protected]>

(see nit below - this could be moved to device tree once you have it)

Quoted 3 lines

 arch/arm/include/asm/arch-hi6220/dwmmc.h |  8 +++++
 drivers/mmc/Makefile                     |  1 +
 drivers/mmc/hi6220_dw_mmc.c              | 56

++++++++++++++++++++++++++++++++

Review

Quoted 5 lines

 3 files changed, 65 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-hi6220/dwmmc.h
 create mode 100644 drivers/mmc/hi6220_dw_mmc.c

(quoted diff) +0 -0

b/arch/arm/include/asm/arch-hi6220/dwmmc.h

Quoted 43 lines

new file mode 100644
index 0000000..c747383

arch/arm/include/asm/arch-hi6220/dwmmc.h new file +8 -0

@@ -0,0 +1,8 @@
+/*
+ * (C) Copyright 2015 Linaro
+ * Peter Griffin <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width);

drivers/mmc/Makefile +1 -0

index ed73687..81a1a8f 100644
@@ -11,6 +11,7 @@ obj-$(CONFIG_BFIN_SDH) += bfin_sdh.o
 obj-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o
 obj-$(CONFIG_DWMMC) += dw_mmc.o
 obj-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o
+obj-$(CONFIG_HIKEY_DWMMC) += hi6220_dw_mmc.o
 obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
 obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o
 obj-$(CONFIG_FTSDC021) += ftsdc021_sdhci.o

drivers/mmc/hi6220_dw_mmc.c new file +12 -0

new file mode 100644
index 0000000..106f673
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2015 Linaro
+ * peter.griffin <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <dwmmc.h>
+#include <malloc.h>
+#include <asm-generic/errno.h>
+

drivers/mmc/hi6220_dw_mmc.c line 18

Quoted 6 lines

drivers/mmc/hi6220_dw_mmc.c new file +6 -0

+#define        DWMMC_MAX_CH_NUM                4
+
+#define        DWMMC_MAX_FREQ                  50000000
+#define        DWMMC_MIN_FREQ                  378000
+
+/* Source clock is configured to 100Mhz by ATF bl1*/

nit: MHz

Hi Simon,

Quoted 11 lines · Peter Griffin

Quoted 6 lines

This patch adds the glue code for hi6220 SoC which has 2x synopsis dw_mmc controllers. This will be used by the hikey board support in subsequent patches.

Signed-off-by Peter Griffin <[email protected]>

---

Reviewed-by Simon Glass <[email protected]>

(see nit below - this could be moved to device tree once you have it)

Thanks for reviewing :)

My plan regarding DT was to wait for it to land in the kernel, and then convert
over to using it in u-boot.

I saw some of your patches converting Raspberry Pi to DM and DT which should make migrating HiKey board fairly straight forward, as it shares the same Synopsis IP for MMC and USB :)

HiKey is the first 96boards consumer edition compliant board. It features a hi6220 SoC which has eight ARM A53 cpu's.

This initial port adds support for: -
1) Serial
2) eMMC / sd card

3) USB
4) GPIO

It has been tested with Arm Trusted Firmware running u-boot as the BL33 executable.

Notes:

eMMC has been tested with basic reading of eMMC partition intto DDR. I have not

tested writing / erasing. Due to lack of clock control it won't be running in the most performant high speed mode.

SD card slot has been tested for reading and booting kernels into DDR. It is also currently used for saving the u-boot enviroment.

USB has been tested with ASIX networking adapter to tftpboot kernels into DDR. On v2015.07-rc2 dhcp now works, and also usb mass storage

is enumerated correctly.

GPIO has been tested using gpio toggle GPIO4_1-3 to flash LEDs.

Basic SoC datasheet can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf

Board schematic can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
96Boards-Hikey-Rev-A1.pdf

Signed-off-by Peter Griffin <[email protected]>

---
 arch/arm/Kconfig               |   8 +
 board/hisilicon/hikey/Kconfig  |  15 ++
 board/hisilicon/hikey/Makefile |   8 +
 board/hisilicon/hikey/hikey.c  | 415 +++++++++++++++++++++++++++++++++++++++++
 configs/hikey_defconfig        |   5 +
 include/configs/hikey.h        | 168 +++++++++++++++++
 6 files changed, 619 insertions(+)
 create mode 100644 board/hisilicon/hikey/Kconfig
 create mode 100644 board/hisilicon/hikey/Makefile
 create mode 100644 board/hisilicon/hikey/hikey.c
 create mode 100644 configs/hikey_defconfig
 create mode 100644 include/configs/hikey.h

board/hisilicon/hikey/hikey.c new file +68 -0

+
+       return 0;
+}
+
+#ifdef CONFIG_GENERIC_MMC
+
+static int init_dwmmc(void)
+{
+       int ret;
+
+#ifdef CONFIG_DWMMC
+       /* mmc0 pinmux and clocks are already configured by ATF */
+       ret = hi6220_dwmci_add_port(0, HI6220_MMC0_BASE, 8);
+
+       if (ret)
+               printf("%s: Error adding eMMC port\n", __func__);
+
+       /* take mmc1 (sd slot) out of reset, configure clocks and pinmuxing */
+
+       mmc1_init_pll();
+       mmc1_reset_clk();
+       mmc1_setup_pinmux();
+
+       ret |= hi6220_dwmci_add_port(1, HI6220_MMC1_BASE, 4);
+
+       if (ret)
+               printf("%s: Error adding SD port\n", __func__);
+#endif
+       return ret;
+}
+
+int board_mmc_init(bd_t *bis)
+{
+       int ret;
+
+       /* init the pmussi ip */
+       hi6220_pmussi_init();
+
+       /* init the hi6553 pmic */
+       hikey_hi6553_init();
+
+       /* add the eMMC and sd ports */
+       ret = init_dwmmc();
+
+       if (ret)
+               debug("init_dwmmc failed\n");
+
+       return ret;
+}
+#endif
+
+int dram_init(void)
+{
+       gd->ram_size = PHYS_SDRAM_1_SIZE;
+       return 0;
+}
+
+void dram_init_banksize(void)
+{
+       gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+       gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+/* Use the Watchdog to cause reset */
+void reset_cpu(ulong addr)
+{
+       /* TODO program the watchdog */
+}

configs/hikey_defconfig new file +5 -0

new file mode 100644
index 0000000..50baf22
@@ -0,0 +1,5 @@
+# 96boards HiKey
+CONFIG_ARM=y
+CONFIG_TARGET_HIKEY=y
+CONFIG_SHOW_BOOT_PROGRESS=y
+CONFIG_NET=y

include/configs/hikey.h new file +3 -0

new file mode 100644
index 0000000..303b857
@@ -0,0 +1,168 @@
+/*
+ * (C) Copyright 2015 Linaro
+ *

include/configs/hikey.h new file +43 -0

+
+/* We use generic board for hikey */
+#define CONFIG_SYS_GENERIC_BOARD
+
+#define CONFIG_REMAKE_ELF
+
+#define CONFIG_SUPPORT_RAW_INITRD
+
+/* Cache Definitions */
+#define CONFIG_SYS_DCACHE_OFF
+
+#define CONFIG_IDENT_STRING            "hikey"
+
+/* Flat Device Tree Definitions */
+#define CONFIG_OF_LIBFDT
+
+/* Physical Memory Map */
+
+/* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */
+#define CONFIG_SYS_TEXT_BASE           0x35000000
+
+#define CONFIG_NR_DRAM_BANKS           1
+#define PHYS_SDRAM_1                   0x00000000
+
+/* 1008 MB (the last 16Mb are secured for TrustZone by ATF*/
+#define PHYS_SDRAM_1_SIZE              0x3f000000
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+
+#define CONFIG_SYS_INIT_RAM_SIZE       0x1000
+
+#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
+
+#define CONFIG_SYS_LOAD_ADDR           (CONFIG_SYS_SDRAM_BASE + 0x80000)
+
+/* Generic Timer Definitions */
+#define COUNTER_FREQUENCY              (19000000)
+
+/* Generic Interrupt Controller Definitions */
+#define GICD_BASE                      (0xf6801000)
+#define GICC_BASE                      (0xf6802000)
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + (8 << 20))

include/configs/hikey.h new file +20 -0

+
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_DWC2
+#define CONFIG_USB_DWC2_REG_ADDR 0xF72C0000
+/*#define CONFIG_DWC2_DFLT_SPEED_FULL*/
+#define CONFIG_DWC2_ENABLE_DYNAMIC_FIFO
+
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_MISC_INIT_R
+#endif
+
+#define CONFIG_HIKEY_GPIO
+#define CONFIG_DM_GPIO
+#define CONFIG_CMD_GPIO
+#define CONFIG_DM
+

include/configs/hikey.h new file +7 -0

+
+/* BOOTP options */
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+#define CONFIG_CMD_NET
+
+#include <config_distro_defaults.h>

Quoted 6 lines · Peter Griffin

HiKey is the first 96boards consumer edition compliant board. It features a hi6220 SoC which has eight ARM A53 cpu's.

This initial port adds support for: -
1) Serial
2) eMMC / sd card

s/sd/SD/

Quoted 9 lines

3) USB
4) GPIO

It has been tested with Arm Trusted Firmware running u-boot as the BL33 executable.

Notes:

eMMC has been tested with basic reading of eMMC partition intto DDR. I have not

s/intto/into/

Quoted 6 lines

tested writing / erasing. Due to lack of clock control it won't be running in the most performant high speed mode.

SD card slot has been tested for reading and booting kernels into DDR. It is also currently used for saving the u-boot enviroment.

s/enviroment/environment/

Quoted 3 lines

USB has been tested with ASIX networking adapter to tftpboot kernels into DDR. On v2015.07-rc2 dhcp now works, and also usb mass storage

s/usb/USB/

Quoted 14 lines

is enumerated correctly.

GPIO has been tested using gpio toggle GPIO4_1-3 to flash LEDs.

Basic SoC datasheet can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf

Board schematic can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
96Boards-Hikey-Rev-A1.pdf

Signed-off-by Peter Griffin <[email protected]>

Quoted 13 lines

---
 arch/arm/Kconfig               |   8 +
 board/hisilicon/hikey/Kconfig  |  15 ++
 board/hisilicon/hikey/Makefile |   8 +
 board/hisilicon/hikey/hikey.c  | 415 +++++++++++++++++++++++++++++++++++++++++
 configs/hikey_defconfig        |   5 +
 include/configs/hikey.h        | 168 +++++++++++++++++
 6 files changed, 619 insertions(+)
 create mode 100644 board/hisilicon/hikey/Kconfig
 create mode 100644 board/hisilicon/hikey/Makefile
 create mode 100644 board/hisilicon/hikey/hikey.c
 create mode 100644 configs/hikey_defconfig
 create mode 100644 include/configs/hikey.h

[...]

board/hisilicon/hikey/hikey.c line 338

Quoted 4 lines

board/hisilicon/hikey/hikey.c new file +4 -0

+
+int misc_init_r(void)
+{
+       init_usb_and_picophy();

Can board_usb_init or usb_lowlevel_init be used here?

board/hisilicon/hikey/hikey.c line 347

Quoted 10 lines

board/hisilicon/hikey/hikey.c new file +9 -0

+
+       return 0;
+}
+
+int board_init(void)
+{
+       gd->flags = 0;
+
+       icache_enable();

The enable_caches call in board_r.c should do this for you.

Quoted 93 lines

board/hisilicon/hikey/hikey.c new file +68 -0

+
+       return 0;
+}
+
+#ifdef CONFIG_GENERIC_MMC
+
+static int init_dwmmc(void)
+{
+       int ret;
+
+#ifdef CONFIG_DWMMC
+       /* mmc0 pinmux and clocks are already configured by ATF */
+       ret = hi6220_dwmci_add_port(0, HI6220_MMC0_BASE, 8);
+
+       if (ret)
+               printf("%s: Error adding eMMC port\n", __func__);
+
+       /* take mmc1 (sd slot) out of reset, configure clocks and pinmuxing */
+
+       mmc1_init_pll();
+       mmc1_reset_clk();
+       mmc1_setup_pinmux();
+
+       ret |= hi6220_dwmci_add_port(1, HI6220_MMC1_BASE, 4);
+
+       if (ret)
+               printf("%s: Error adding SD port\n", __func__);
+#endif
+       return ret;
+}
+
+int board_mmc_init(bd_t *bis)
+{
+       int ret;
+
+       /* init the pmussi ip */
+       hi6220_pmussi_init();
+
+       /* init the hi6553 pmic */
+       hikey_hi6553_init();
+
+       /* add the eMMC and sd ports */
+       ret = init_dwmmc();
+
+       if (ret)
+               debug("init_dwmmc failed\n");
+
+       return ret;
+}
+#endif
+
+int dram_init(void)
+{
+       gd->ram_size = PHYS_SDRAM_1_SIZE;
+       return 0;
+}
+
+void dram_init_banksize(void)
+{
+       gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+       gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+/* Use the Watchdog to cause reset */
+void reset_cpu(ulong addr)
+{
+       /* TODO program the watchdog */
+}

configs/hikey_defconfig new file +5 -0

new file mode 100644
index 0000000..50baf22
@@ -0,0 +1,5 @@
+# 96boards HiKey
+CONFIG_ARM=y
+CONFIG_TARGET_HIKEY=y
+CONFIG_SHOW_BOOT_PROGRESS=y
+CONFIG_NET=y

include/configs/hikey.h new file +7 -0

new file mode 100644
index 0000000..303b857
@@ -0,0 +1,168 @@
+/*
+ * (C) Copyright 2015 Linaro
+ *
+ * Peter Griffin <[email protected]>
+ *
+ * Configuration for HiKey 96boards CE. Parts were derived from other ARM
+ * configurations.

include/configs/hikey.h line 13

Quoted 6 lines

include/configs/hikey.h new file +6 -0

+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __HIKEY_AEMV8A_H
+#define __HIKEY_AEMV8A_H

Drop the AEMV8A.

Quoted 44 lines

include/configs/hikey.h new file +43 -0

+
+/* We use generic board for hikey */
+#define CONFIG_SYS_GENERIC_BOARD
+
+#define CONFIG_REMAKE_ELF
+
+#define CONFIG_SUPPORT_RAW_INITRD
+
+/* Cache Definitions */
+#define CONFIG_SYS_DCACHE_OFF
+
+#define CONFIG_IDENT_STRING            "hikey"
+
+/* Flat Device Tree Definitions */
+#define CONFIG_OF_LIBFDT
+
+/* Physical Memory Map */
+
+/* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */
+#define CONFIG_SYS_TEXT_BASE           0x35000000
+
+#define CONFIG_NR_DRAM_BANKS           1
+#define PHYS_SDRAM_1                   0x00000000
+
+/* 1008 MB (the last 16Mb are secured for TrustZone by ATF*/
+#define PHYS_SDRAM_1_SIZE              0x3f000000
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+
+#define CONFIG_SYS_INIT_RAM_SIZE       0x1000
+
+#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
+
+#define CONFIG_SYS_LOAD_ADDR           (CONFIG_SYS_SDRAM_BASE + 0x80000)
+
+/* Generic Timer Definitions */
+#define COUNTER_FREQUENCY              (19000000)
+
+/* Generic Interrupt Controller Definitions */
+#define GICD_BASE                      (0xf6801000)
+#define GICC_BASE                      (0xf6802000)
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + (8 << 20))

include/configs/hikey.h line 66

Quoted 10 lines

include/configs/hikey.h new file +10 -0

+
+/* PL011 Serial Configuration */
+#define CONFIG_PL011_SERIAL
+
+#define CONFIG_PL011_CLOCK             19200000
+#define CONFIG_PL01x_PORTS             {(void *)CONFIG_SYS_SERIAL0}
+#define CONFIG_CONS_INDEX              0
+
+#define CONFIG_BAUDRATE                        115200
+#define CONFIG_SYS_SERIAL0             0xF8015000

Just do:

#define CONFIG_PL01x_PORTS {(void *)0xf8015000}

You are probably going to want to setup multiple serial consoles (debug + LS header). That can come later, but I've figured out how to enable that if you are interested.

Quoted 25 lines

include/configs/hikey.h new file +24 -0

+
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_DWC2
+#define CONFIG_USB_DWC2_REG_ADDR 0xF72C0000
+/*#define CONFIG_DWC2_DFLT_SPEED_FULL*/
+#define CONFIG_DWC2_ENABLE_DYNAMIC_FIFO
+
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_MISC_INIT_R
+#endif
+
+#define CONFIG_HIKEY_GPIO
+#define CONFIG_DM_GPIO
+#define CONFIG_CMD_GPIO
+#define CONFIG_DM
+
+/* SD/MMC configuration */
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MMC
+#define CONFIG_DWMMC

include/configs/hikey.h line 96

Quoted 6 lines

include/configs/hikey.h new file +6 -0

+#define CONFIG_HIKEY_DWMMC
+#define CONFIG_BOUNCE_BUFFER
+#define CONFIG_CMD_MMC
+
+#define CONFIG_FS_EXT4
+#define CONFIG_FS_FAT

distro config should set this.

include/configs/hikey.h line 103

Quoted 8 lines

include/configs/hikey.h new file +7 -0

+
+/* Command line configuration */
+#define CONFIG_MENU
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_UNZIP
+#define CONFIG_CMD_PXE

and this.

include/configs/hikey.h line 114

Quoted 12 lines

include/configs/hikey.h new file +11 -0

+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_SAVEENV
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_SOURCE
+
+#define CONFIG_MAC_PARTITION

Supporting Mac partitions, really?

include/configs/hikey.h line 115

Quoted 1 line

include/configs/hikey.h new file +1 -0

+#define CONFIG_MTD_PARTITIONS

On what MTD device?

Quoted 12 lines

include/configs/hikey.h new file +11 -0

+
+/* BOOTP options */
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+#define CONFIG_CMD_NET
+
+#include <config_distro_defaults.h>
+
+/* Initial environment variables */
+
+/*

include/configs/hikey.h line 132

Quoted 6 lines

include/configs/hikey.h new file +6 -0

+ * Defines where the kernel and FDT exist in NOR flash and where it will
+ * be copied into DRAM
+ */
+#define CONFIG_EXTRA_ENV_SETTINGS      \
+                               "kernel_name=Image\0"   \
+                               "kernel_addr=0x0000000\0" \

Shouldn't this be 0x80000 to avoid copying from 0x0 to 0x80000.

include/configs/hikey.h line 135

Quoted 4 lines

include/configs/hikey.h new file +3 -0

+                               "fdt_name=hi6220-hikey.dtb\0" \
+                               "fdt_addr=0x0300000\0" \
+                               "max_fdt=0x100000\0" \

I don't think this is needed.

include/configs/hikey.h line 140

Quoted 6 lines

include/configs/hikey.h new file +5 -0

+                               "fdt_high=0xffffffffffffffff\0" \
+                               "initrd_high=0xffffffffffffffff\0" \
+
+/* Assume we boot with root on the first partition of a USB stick */
+#define CONFIG_BOOTARGS                "console=ttyAMA0,115200n8 /dev/mmcblk0p7 rw "

/dev/mmcblk0p7 doesn't look right. You mean "root=/dev/..."?

include/configs/hikey.h line 143

Quoted 4 lines

include/configs/hikey.h new file +3 -0

+
+/* Copy the kernel and FDT to DRAM memory and boot */
+#define CONFIG_BOOTCOMMAND     "booti $kernel_addr_r - $fdt_addr_r"

Don't you need to set these variables?

Also, don't you need to load the kernel and dtb first?

include/configs/hikey.h line 150

Quoted 8 lines

include/configs/hikey.h new file +7 -0

+
+#define CONFIG_BOOTDELAY               2
+
+/* Preserve enviroment onto sd card */
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV         1
+#define CONFIG_SYS_MMC_ENV_PART                0

Don't you have these reversed? The first MMC device is 0 and I think partition numbering starts at 1.

include/configs/hikey.h line 154

Quoted 5 lines

include/configs/hikey.h new file +4 -0

+#define CONFIG_ENV_OFFSET               0x0
+#define CONFIG_ENV_SIZE                        0x1000
+#define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT

Is redundant env necessary? It seems like this was more for raw NAND and shouldn't really be needed for MMC.

Hi Rob,

Quoted 4 lines · Rob Herring

Quoted 3 lines · Peter Griffin

HiKey is the first 96boards consumer edition compliant board. It features a hi6220 SoC which has eight ARM A53 cpu's.

Quoted 6 lines

include/configs/hikey.h line 66

Quoted 2 lines

include/configs/hikey.h new file +2 -0

+#define CONFIG_BAUDRATE                        115200
+#define CONFIG_SYS_SERIAL0             0xF8015000

Just do:

#define CONFIG_PL01x_PORTS {(void *)0xf8015000}

Ok, fixed in V3

Quoted 4 lines

You are probably going to want to setup multiple serial consoles (debug + LS header). That can come later, but I've figured out how to enable that if you are interested.

Yes I'm interested, please do let me know :)

Quoted 5 lines

include/configs/hikey.h line 132

Quoted 3 lines

include/configs/hikey.h new file +3 -0

+#define CONFIG_EXTRA_ENV_SETTINGS      \
+                               "kernel_name=Image\0"   \
+                               "kernel_addr=0x0000000\0" \

Shouldn't this be 0x80000 to avoid copying from 0x0 to 0x80000.

I've updated this. Kernel boot time is much reduced with this and also the icache being enabled.

Quoted 4 lines

include/configs/hikey.h line 134

Quoted 4 lines

include/configs/hikey.h new file +2 -0

+                               "fdt_name=hi6220-hikey.dtb\0" \
+                               "fdt_addr=0x0300000\0" \

Quoted 3 lines

Quoted 1 line

+ "max_fdt=0x100000\0" \

I don't think this is needed.

Removed in V3

Quoted 8 lines

include/configs/hikey.h line 140

Quoted 6 lines

include/configs/hikey.h new file +5 -0

+                               "fdt_high=0xffffffffffffffff\0" \
+                               "initrd_high=0xffffffffffffffff\0" \
+
+/* Assume we boot with root on the first partition of a USB stick */
+#define CONFIG_BOOTARGS                "console=ttyAMA0,115200n8 /dev/mmcblk0p7 rw "

/dev/mmcblk0p7 doesn't look right. You mean "root=/dev/..."?

Good spot, yes your right. Plus now you highlight it the comment above also needs updating.

Will fix in V3.

Quoted 8 lines

include/configs/hikey.h line 143

Quoted 4 lines

include/configs/hikey.h new file +3 -0

+
+/* Copy the kernel and FDT to DRAM memory and boot */
+#define CONFIG_BOOTCOMMAND     "booti $kernel_addr_r - $fdt_addr_r"

Don't you need to set these variables?

Also, don't you need to load the kernel and dtb first?

Yes, but I'm not sure quite what to make the default here. My personal workflow is: -

"usb start; dhcp; tftp $kernel_addr $kernel_name; tftp $fdt_addr $fdt_name;
booti $kernel_addr - $fdt_addr"

So I could use that unless you have a better idea?

Quoted 7 lines

include/configs/hikey.h line 150

Quoted 4 lines

include/configs/hikey.h new file +4 -0

+/* Preserve enviroment onto sd card */
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV         1
+#define CONFIG_SYS_MMC_ENV_PART                0

Don't you have these reversed? The first MMC device is 0 and I think partition numbering starts at 1.

Having CONFIG_SYS_MMC_ENV_DEV 1 was deliberate, as the first device is eMMC, and I don't have a "official" partition to save the u-boot enviroment in. So as not to corrupt anything folks may have flashed into eMMC from the official builds I opted to save the u-boot env to SD card which is device 1.

However that seems to have been working by luck with ENC_PART being 0, and it was actually corrupting the partition table of the SD card. Looking more closely I think what I should of used is

#define CONFIG_ENV_IS_IN_FAT

#define FAT_ENV_INTERFACE               "mmc"
#define FAT_ENV_DEVICE_AND_PART         "1:1"
#define FAT_ENV_FILE                    "uboot.env"

This then saves the enviroment on a fat formatted SD card with the filename u-boot.env. This is what I plan on using for v3.

Maybe I should additionally request some space in the official eMMC parition table and then we could switch over to using that.

Quoted 8 lines

include/configs/hikey.h line 154

Quoted 5 lines

include/configs/hikey.h new file +4 -0

+#define CONFIG_ENV_OFFSET               0x0
+#define CONFIG_ENV_SIZE                        0x1000
+#define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT

Is redundant env necessary? It seems like this was more for raw NAND and shouldn't really be needed for MMC.

README file documents it as being valid for CONFIG_ENV_IS_IN_MMC, and a bunch of boards declare it with their CONFIG_ENV_IS_IN_MMC such as omap5_uevm.h, dra7xx_evm.h, am335x_evm.h. Whilst using managed NAND should be more reliable, I think it is still used in case there is a power failure whilst issuing 'saveenv'.

Anyways with moving to CONFIG_ENV_IS_IN_FAT I won't need it anymore so it will be removed in V3.

On Wed, Jul 15, 2015 at 7:41 PM, Peter Griffin <[email protected]> wrote:

Quoted 8 lines

Quoted 7 lines

include/configs/hikey.h line 154

Quoted 4 lines

include/configs/hikey.h new file +4 -0

+#define CONFIG_ENV_OFFSET               0x0
+#define CONFIG_ENV_SIZE                        0x1000
+#define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT

Is redundant env necessary? It seems like this was more for raw NAND and shouldn't really be needed for MMC.

Quoted 4 lines

README file documents it as being valid for CONFIG_ENV_IS_IN_MMC, and a bunch of boards declare it with their CONFIG_ENV_IS_IN_MMC such as omap5_uevm.h, dra7xx_evm.h, am335x_evm.h. Whilst using managed NAND should be more reliable, I think it is still used in case there is a power failure whilst issuing 'saveenv'.

Perhaps a bunch of cut and paste. I'd guess there are many more platforms that use MMC and don't enable redundant.

Quoted 2 lines

Anyways with moving to CONFIG_ENV_IS_IN_FAT I won't need it anymore so it will be removed in V3.

Storing in FAT probably only increases your chance of failure from power failure. :)

Quoted 5 lines · Peter Griffin

Hi Rob,

Quoted 1 line · Rob Herring

On Wed, Jul 8, 2015 at 10:57 AM, Peter Griffin <

Quoted 1 line · peter.griffin at linaro.org> wrote:

Quoted 1 line

Quoted 1 line

HiKey is the first 96boards consumer edition compliant board. It

features a hi6220

Quoted 2 lines

Quoted 2 lines

Quoted 2 lines

SoC which has eight ARM A53 cpu's.

[...]

Quoted 5 lines

Quoted 3 lines

You are probably going to want to setup multiple serial consoles (debug + LS header). That can come later, but I've figured out how to enable that if you are interested.

Yes I'm interested, please do let me know :)

See this commit:

https://git.linaro.org/people/rob.herring/u-boot.git/commitdiff/f1d0aef06ae7fe09793d46589bd94fa36c45bbc0

This may be 8250 specific and require more work for pl011 driver. The mixture of 0 and 1 based indexing makes it fun too.

Quoted 4 lines

Quoted 4 lines

Quoted 3 lines

include/configs/hikey.h new file +3 -0

+#define CONFIG_EXTRA_ENV_SETTINGS      \
+                               "kernel_name=Image\0"   \
+                               "kernel_addr=0x0000000\0" \

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Shouldn't this be 0x80000 to avoid copying from 0x0 to 0x80000.

I've updated this. Kernel boot time is much reduced with this and also

the

Quoted 1 line

icache being enabled.

Also, this should be kernel_addr_r

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include/configs/hikey.h line 134

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include/configs/hikey.h new file +2 -0

+                               "fdt_name=hi6220-hikey.dtb\0" \
+                               "fdt_addr=0x0300000\0" \

and fdt_addr_r

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+ "max_fdt=0x100000\0" \

I don't think this is needed.

Quoted 7 lines

Removed in V3

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include/configs/hikey.h

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include/configs/hikey.h new file +5 -0

+                               "fdt_high=0xffffffffffffffff\0" \
+                               "initrd_high=0xffffffffffffffff\0" \
+
+/* Assume we boot with root on the first partition of a USB stick */
+#define CONFIG_BOOTARGS                "console=ttyAMA0,115200n8

/dev/mmcblk0p7 rw "

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/dev/mmcblk0p7 doesn't look right. You mean "root=/dev/..."?

Good spot, yes your right. Plus now you highlight it the comment above

also needs updating.

Quoted 10 lines

Will fix in V3.

Quoted 7 lines

include/configs/hikey.h line 143

Quoted 4 lines

include/configs/hikey.h new file +3 -0

+
+/* Copy the kernel and FDT to DRAM memory and boot */
+#define CONFIG_BOOTCOMMAND     "booti $kernel_addr_r - $fdt_addr_r"

Don't you need to set these variables?

Quoted 6 lines

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Also, don't you need to load the kernel and dtb first?

Yes, but I'm not sure quite what to make the default here. My personal workflow is: -

"usb start; dhcp; tftp $kernel_addr $kernel_name; tftp $fdt_addr

$fdt_name;

Quoted 3 lines

booti $kernel_addr - $fdt_addr"

So I could use that unless you have a better idea?

Not really as everyone has their own preferences. I have some thing like this:

#define CONFIG_BOOTCOMMAND \
"while true; do " \
"mmc read ${fdt_addr_r} 0x10000 0x1000; " \
"fastboot; " \
"mmc read ${fdt_addr_r} 0x10000 0x1000; " \
"mmc read ${kernel_addr_r} 0x8000 0x8000 && " \
"bootm ${kernel_addr_r} ${kernel_addr_r} ${fdt_addr_r};" \
"done"

This relies on fastboot doing USB cable detection and it exits if no USB connection.

USB ethernet is as good a default as any. Otherwise reading Image and dtb from the 1st or bootable partition (the default) would be reasonable.

Quoted 9 lines

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+/* Preserve enviroment onto sd card */

include/configs/hikey.h line 150

Quoted 3 lines

include/configs/hikey.h new file +3 -0

+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV         1
+#define CONFIG_SYS_MMC_ENV_PART                0

Don't you have these reversed? The first MMC device is 0 and I think partition numbering starts at 1.

Having CONFIG_SYS_MMC_ENV_DEV 1 was deliberate, as the first device is

eMMC, and

Quoted 2 lines

I don't have a "official" partition to save the u-boot enviroment in. So as not to corrupt anything folks may have flashed into eMMC from the

official

Quoted 1 line

builds I opted to save the u-boot env to SD card which is device 1.

Okay, but don't you have spare space in the partition with u-boot? I have a single bootloader partition 1MB in size and the last 8? KB is the env.

Quoted 2 lines

However that seems to have been working by luck with ENC_PART being 0,

and it was

Quoted 1 line

actually corrupting the partition table of the SD card. Looking more

closely I think

Quoted 8 lines

what I should of used is

#define CONFIG_ENV_IS_IN_FAT

#define FAT_ENV_INTERFACE               "mmc"
#define FAT_ENV_DEVICE_AND_PART         "1:1"
#define FAT_ENV_FILE                    "uboot.env"

This then saves the enviroment on a fat formatted SD card with the

filename

Quoted 3 lines

u-boot.env. This is what I plan on using for v3.

Maybe I should additionally request some space in the official eMMC

parition

Quoted 6 lines

table and then we could switch over to using that.

Quoted 4 lines

include/configs/hikey.h

Quoted 4 lines

include/configs/hikey.h new file +3 -0

+#define CONFIG_ENV_OFFSET               0x0
+#define CONFIG_ENV_SIZE                        0x1000
+#define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET +

CONFIG_ENV_SIZE)

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+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT

Is redundant env necessary? It seems like this was more for raw NAND and shouldn't really be needed for MMC.

README file documents it as being valid for CONFIG_ENV_IS_IN_MMC, and a

bunch of boards

Quoted 1 line

declare it with their CONFIG_ENV_IS_IN_MMC such as omap5_uevm.h,

dra7xx_evm.h,

Quoted 1 line

am335x_evm.h. Whilst using managed NAND should be more reliable, I think

it

Quoted 1 line

is still used in case there is a power failure whilst issuing 'saveenv'.

Perhaps a bunch of cut and paste. I'd guess there are many more platforms that use MMC and don't enable redundant.

Quoted 2 lines

Anyways with moving to CONFIG_ENV_IS_IN_FAT I won't need it anymore so

it will be

Quoted 1 line

removed in V3.

Storing in FAT probably only increases your chance of failure from power failure. :)

Ha, yes maybe :)

HiKey is the first 96boards consumer edition compliant board. It features a hi6220 SoC which has eight ARM A53 cpu's.

This initial port adds support for: -
1) Serial
2) eMMC / sd card
3) USB
4) GPIO

It has been tested with Arm Trusted Firmware running u-boot as the BL33 executable.

Notes:

eMMC has been tested with basic reading of eMMC partition intto DDR. I have not tested writing / erasing. Due to lack of clock control it won't be running in the most performant high speed mode.

SD card slot has been tested for reading and booting kernels into DDR. It is also currently used for saving the u-boot enviroment.

USB has been tested with ASIX networking adapter to tftpboot kernels into DDR. On v2015.07-rc2 dhcp now works, and also usb mass storage is enumerated correctly.

GPIO has been tested using gpio toggle GPIO4_1-3 to flash LEDs.

Basic SoC datasheet can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf

Board schematic can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
96Boards-Hikey-Rev-A1.pdf

Signed-off-by Peter Griffin <[email protected]>

---
 arch/arm/Kconfig               |   8 +
 board/hisilicon/hikey/Kconfig  |  15 ++
 board/hisilicon/hikey/Makefile |   8 +
 board/hisilicon/hikey/hikey.c  | 415 +++++++++++++++++++++++++++++++++++++++++
 configs/hikey_defconfig        |   5 +
 include/configs/hikey.h        | 168 +++++++++++++++++
 6 files changed, 619 insertions(+)
 create mode 100644 board/hisilicon/hikey/Kconfig
 create mode 100644 board/hisilicon/hikey/Makefile
 create mode 100644 board/hisilicon/hikey/hikey.c
 create mode 100644 configs/hikey_defconfig
 create mode 100644 include/configs/hikey.h

arch/arm/Kconfig +8 -0

index 2985e6e..d0b7939 100644
@@ -721,6 +721,13 @@ config TARGET_LS2085ARDB
          development platform that supports the QorIQ LS2085A
          Layerscape Architecture processor.
 
+config TARGET_HIKEY
+       bool "Support HiKey 96boards Consumer Edition Platform"
+       select ARM64
+         help
+         Support for HiKey 96boards platform. It features a HI6220
+         SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
+
 config TARGET_LS1021AQDS
        bool "Support ls1021aqds"
        select CPU_V7

@@ -865,6 +872,7 @@ source "board/Marvell/gplugd/Kconfig"
 source "board/armadeus/apf27/Kconfig"
 source "board/armltd/vexpress/Kconfig"
 source "board/armltd/vexpress64/Kconfig"
+source "board/hisilicon/hikey/Kconfig"
 source "board/bachmann/ot1200/Kconfig"
 source "board/balloon3/Kconfig"
 source "board/barco/platinum/Kconfig"

board/hisilicon/hikey/Kconfig new file +15 -0

new file mode 100644
index 0000000..f7f1055
@@ -0,0 +1,15 @@
+if TARGET_HIKEY
+
+config SYS_BOARD
+       default "hikey"
+
+config SYS_VENDOR
+       default "hisilicon"
+
+config SYS_SOC
+       default "hi6220"
+
+config SYS_CONFIG_NAME
+       default "hikey"
+
+endif

board/hisilicon/hikey/Makefile new file +8 -0

new file mode 100644
index 0000000..d4ec8c7
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y  := hikey.o

board/hisilicon/hikey/hikey.c new file +0 -0

new file mode 100644
index 0000000..bd5c409

board/hisilicon/hikey/hikey.c new file +123 -0

+static const struct hikey_gpio_platdata hi6220_gpio[] = {
+       { 0, HI6220_GPIO_BASE(0)},
+       { 1, HI6220_GPIO_BASE(1)},
+       { 2, HI6220_GPIO_BASE(2)},
+       { 3, HI6220_GPIO_BASE(3)},
+       { 4, HI6220_GPIO_BASE(4)},
+       { 5, HI6220_GPIO_BASE(5)},
+       { 6, HI6220_GPIO_BASE(6)},
+       { 7, HI6220_GPIO_BASE(7)},
+       { 8, HI6220_GPIO_BASE(8)},
+       { 9, HI6220_GPIO_BASE(9)},
+       { 10, HI6220_GPIO_BASE(10)},
+       { 11, HI6220_GPIO_BASE(11)},
+       { 12, HI6220_GPIO_BASE(12)},
+       { 13, HI6220_GPIO_BASE(13)},
+       { 14, HI6220_GPIO_BASE(14)},
+       { 15, HI6220_GPIO_BASE(15)},
+       { 16, HI6220_GPIO_BASE(16)},
+       { 17, HI6220_GPIO_BASE(17)},
+       { 18, HI6220_GPIO_BASE(18)},
+       { 19, HI6220_GPIO_BASE(19)},
+
+};
+
+U_BOOT_DEVICES(hi6220_gpios) = {
+       { "gpio_hi6220", &hi6220_gpio[0] },
+       { "gpio_hi6220", &hi6220_gpio[1] },
+       { "gpio_hi6220", &hi6220_gpio[2] },
+       { "gpio_hi6220", &hi6220_gpio[3] },
+       { "gpio_hi6220", &hi6220_gpio[4] },
+       { "gpio_hi6220", &hi6220_gpio[5] },
+       { "gpio_hi6220", &hi6220_gpio[6] },
+       { "gpio_hi6220", &hi6220_gpio[7] },
+       { "gpio_hi6220", &hi6220_gpio[8] },
+       { "gpio_hi6220", &hi6220_gpio[9] },
+       { "gpio_hi6220", &hi6220_gpio[10] },
+       { "gpio_hi6220", &hi6220_gpio[11] },
+       { "gpio_hi6220", &hi6220_gpio[12] },
+       { "gpio_hi6220", &hi6220_gpio[13] },
+       { "gpio_hi6220", &hi6220_gpio[14] },
+       { "gpio_hi6220", &hi6220_gpio[15] },
+       { "gpio_hi6220", &hi6220_gpio[16] },
+       { "gpio_hi6220", &hi6220_gpio[17] },
+       { "gpio_hi6220", &hi6220_gpio[18] },
+       { "gpio_hi6220", &hi6220_gpio[19] },
+};
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define EYE_PATTERN    0x70533483
+
+static void init_usb_and_picophy(void)
+{
+       unsigned int data;
+
+       /* enable USB clock */
+       writel(PERI_CLK0_USBOTG, PERI_SC_PERIPH_CLK0_EN);
+       do {
+               data = readl(PERI_SC_PERIPH_CLK0_STAT);
+       } while ((data & PERI_CLK0_USBOTG) == 0);
+
+       /* take usb IPs out of reset */
+       writel(PERI_RST0_USBOTG_BUS | PERI_RST0_POR_PICOPHY |
+               PERI_RST0_USBOTG | PERI_RST0_USBOTG_32K,
+               PERI_SC_PERIPH_RST0_DIS);
+       do {
+               data = readl(PERI_SC_PERIPH_RST0_STAT);
+               data &= PERI_RST0_USBOTG_BUS | PERI_RST0_POR_PICOPHY |
+                       PERI_RST0_USBOTG | PERI_RST0_USBOTG_32K;
+       } while (data);
+
+       /*CTRL 5*/
+       data = readl(PERI_SC_PERIPH_CTRL5);
+       data &= ~PERI_CTRL5_PICOPHY_BC_MODE;
+       data |= PERI_CTRL5_USBOTG_RES_SEL | PERI_CTRL5_PICOPHY_ACAENB;
+       data |= 0x300;
+       writel(data, PERI_SC_PERIPH_CTRL5);
+
+       /*CTRL 4*/
+
+       /* configure USB PHY */
+       data = readl(PERI_SC_PERIPH_CTRL4);
+
+       /* make PHY out of low power mode */
+       data &= ~PERI_CTRL4_PICO_SIDDQ;
+       data &= ~PERI_CTRL4_PICO_OGDISABLE;
+       data |= PERI_CTRL4_PICO_VBUSVLDEXTSEL | PERI_CTRL4_PICO_VBUSVLDEXT;
+       writel(data, PERI_SC_PERIPH_CTRL4);
+
+       writel(EYE_PATTERN, PERI_SC_PERIPH_CTRL8);
+
+       mdelay(5);
+}
+
+static int sd_card_detect(void)
+{
+       int ret;
+
+       /* configure GPIO8 as nopull */
+       writel(0, 0xf8001830);
+
+       gpio_request(8, "SD CD");
+
+       gpio_direction_input(8);
+       ret = gpio_get_value(8);
+
+       if (!ret) {
+               printf("%s: SD card present\n", __func__);
+               return 1;
+       }
+
+       printf("%s: SD card not present\n", __func__);
+       return 0;
+}
+
+static void mmc1_setup_pinmux(void)
+{
+       /* switch pinmux to SD */
+       writel(0, 0xf701000c);
+       writel(0, 0xf7010010);
+       writel(0, 0xf7010014);
+       writel(0, 0xf7010018);

board/hisilicon/hikey/hikey.c new file +151 -0

+
+       writel((1 << 1), PERI_SC_PERIPH_CLK0_EN);
+       do {
+               data = readl(PERI_SC_PERIPH_CLK0_STAT);
+       } while (!(data & (1 << 1)));
+
+       data = readl(PERI_SC_PERIPH_CLK12_EN);
+       data |= 1 << 2;
+       writel(data, PERI_SC_PERIPH_CLK12_EN);
+
+       do {
+               /* 1.2GHz / 50 = 24MHz */
+               writel(0x31 | (1 << 7), PERI_SC_CLKCFG8BIT2);
+               data = readl(PERI_SC_CLKCFG8BIT2);
+       } while ((data & 0x31) != 0x31);
+}
+
+static void mmc1_reset_clk(void)
+{
+       unsigned int data;
+
+       /* disable mmc1 bus clock */
+       writel(PERI_CLK0_MMC1, PERI_SC_PERIPH_CLK0_DIS);
+       do {
+               data = readl(PERI_SC_PERIPH_CLK0_STAT);
+       } while (data & PERI_CLK0_MMC1);
+
+       /* enable mmc1 bus clock */
+       writel(PERI_CLK0_MMC1, PERI_SC_PERIPH_CLK0_EN);
+       do {
+               data = readl(PERI_SC_PERIPH_CLK0_STAT);
+       } while (!(data & PERI_CLK0_MMC1));
+
+       /* reset mmc1 clock domain */
+       writel(PERI_RST0_MMC1, PERI_SC_PERIPH_RST0_EN);
+
+       /* bypass mmc1 clock phase */
+       data = readl(PERI_SC_PERIPH_CTRL2);
+       data |= 3 << 2;
+       writel(data, PERI_SC_PERIPH_CTRL2);
+
+       /* disable low power */
+       data = readl(PERI_SC_PERIPH_CTRL13);
+       data |= 1 << 4;
+       writel(data, PERI_SC_PERIPH_CTRL13);
+       do {
+               data = readl(PERI_SC_PERIPH_RST0_STAT);
+       } while (!(data & PERI_RST0_MMC1));
+
+       /* unreset mmc0 clock domain */
+       writel(PERI_RST0_MMC1, PERI_SC_PERIPH_RST0_DIS);
+       do {
+               data = readl(PERI_SC_PERIPH_RST0_STAT);
+       } while (data & PERI_RST0_MMC1);
+}
+
+/* PMU SSI is the IP that maps the external PMU hi6553 registers as IO */
+static void hi6220_pmussi_init(void)
+{
+       uint32_t data;
+
+       /* Take PMUSSI out of reset */
+       writel(ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_PMUSSI_N,
+              ALWAYSON_SC_PERIPH_RST4_DIS);
+       do {
+               data = readl(ALWAYSON_SC_PERIPH_RST4_STAT);
+       } while (data & ALWAYSON_SC_PERIPH_RST4_DIS_PRESET_PMUSSI_N);
+
+       /* set PMU SSI clock latency for read operation */
+       data = readl(ALWAYSON_SC_MCU_SUBSYS_CTRL3);
+       data &= ~ALWAYSON_SC_MCU_SUBSYS_CTRL3_RCLK_MASK;
+       data |= ALWAYSON_SC_MCU_SUBSYS_CTRL3_RCLK_3;
+       writel(data, ALWAYSON_SC_MCU_SUBSYS_CTRL3);
+
+       /* enable PMUSSI clock */
+       data = ALWAYSON_SC_PERIPH_CLK5_EN_PCLK_PMUSSI_CCPU |
+              ALWAYSON_SC_PERIPH_CLK5_EN_PCLK_PMUSSI_MCU;
+       writel(data, ALWAYSON_SC_PERIPH_CLK5_EN);
+       data = ALWAYSON_SC_PERIPH_CLK4_EN_PCLK_PMUSSI;
+       writel(data, ALWAYSON_SC_PERIPH_CLK4_EN);
+
+       /* Output high to PMIC on PWR_HOLD_GPIO0_0 */
+       gpio_request(0, "PWR_HOLD_GPIO0_0");
+       gpio_direction_output(0, 1);
+}
+
+uint8_t hi6553_readb(unsigned int offset)
+{
+       return readb((u8 *)(unsigned long)HI6220_PMUSSI_BASE + (offset << 2));
+}
+
+void hi6553_writeb(unsigned int offset, uint8_t value)
+{
+       writeb(value, (u8 *)(unsigned long)HI6220_PMUSSI_BASE + (offset << 2));
+}
+
+static void hikey_hi6553_init(void)
+{
+       int data;
+
+       hi6553_writeb(HI6553_PERI_EN_MARK, 0x1e);
+       hi6553_writeb(HI6553_NP_REG_ADJ1, 0);
+       data = HI6553_DISABLE6_XO_CLK_CONN | HI6553_DISABLE6_XO_CLK_NFC |
+               HI6553_DISABLE6_XO_CLK_RF1 | HI6553_DISABLE6_XO_CLK_RF2;
+       hi6553_writeb(HI6553_DISABLE6_XO_CLK, data);
+
+       /* configure BUCK0 & BUCK1 */
+       hi6553_writeb(HI6553_BUCK01_CTRL2, 0x5e);
+       hi6553_writeb(HI6553_BUCK0_CTRL7, 0x10);
+       hi6553_writeb(HI6553_BUCK1_CTRL7, 0x10);
+       hi6553_writeb(HI6553_BUCK0_CTRL5, 0x1e);
+       hi6553_writeb(HI6553_BUCK1_CTRL5, 0x1e);
+       hi6553_writeb(HI6553_BUCK0_CTRL1, 0xfc);
+       hi6553_writeb(HI6553_BUCK1_CTRL1, 0xfc);
+
+       /* configure BUCK2 */
+       hi6553_writeb(HI6553_BUCK2_REG1, 0x4f);
+       hi6553_writeb(HI6553_BUCK2_REG5, 0x99);
+       hi6553_writeb(HI6553_BUCK2_REG6, 0x45);
+       mdelay(1);
+       hi6553_writeb(HI6553_VSET_BUCK2_ADJ, 0x22);
+       mdelay(1);
+
+       /* configure BUCK3 */
+       hi6553_writeb(HI6553_BUCK3_REG3, 0x02);
+       hi6553_writeb(HI6553_BUCK3_REG5, 0x99);
+       hi6553_writeb(HI6553_BUCK3_REG6, 0x41);
+       hi6553_writeb(HI6553_VSET_BUCK3_ADJ, 0x02);
+       mdelay(1);
+
+       /* configure BUCK4 */
+       hi6553_writeb(HI6553_BUCK4_REG2, 0x9a);
+       hi6553_writeb(HI6553_BUCK4_REG5, 0x99);
+       hi6553_writeb(HI6553_BUCK4_REG6, 0x45);
+
+       /* configure LDO20 */
+       hi6553_writeb(HI6553_LDO20_REG_ADJ, 0x50);
+
+       hi6553_writeb(HI6553_NP_REG_CHG, 0x0f);
+       hi6553_writeb(HI6553_CLK_TOP0, 0x06);
+       hi6553_writeb(HI6553_CLK_TOP3, 0xc0);
+       hi6553_writeb(HI6553_CLK_TOP4, 0x00);
+
+       /* configure LDO7 & LDO10 for SD slot */
+       data = hi6553_readb(HI6553_LDO7_REG_ADJ);
+       data = (data & 0xf8) | 0x2;
+       hi6553_writeb(HI6553_LDO7_REG_ADJ, data);
+       mdelay(5);
+       /* enable LDO7 */
+       hi6553_writeb(HI6553_ENABLE2_LDO1_8, 1 << 6);
+       mdelay(5);

board/hisilicon/hikey/hikey.c new file +68 -0

+
+       return 0;
+}
+
+#ifdef CONFIG_GENERIC_MMC
+
+static int init_dwmmc(void)
+{
+       int ret;
+
+#ifdef CONFIG_DWMMC
+       /* mmc0 pinmux and clocks are already configured by ATF */
+       ret = hi6220_dwmci_add_port(0, HI6220_MMC0_BASE, 8);
+
+       if (ret)
+               printf("%s: Error adding eMMC port\n", __func__);
+
+       /* take mmc1 (sd slot) out of reset, configure clocks and pinmuxing */
+
+       mmc1_init_pll();
+       mmc1_reset_clk();
+       mmc1_setup_pinmux();
+
+       ret |= hi6220_dwmci_add_port(1, HI6220_MMC1_BASE, 4);
+
+       if (ret)
+               printf("%s: Error adding SD port\n", __func__);
+#endif
+       return ret;
+}
+
+int board_mmc_init(bd_t *bis)
+{
+       int ret;
+
+       /* init the pmussi ip */
+       hi6220_pmussi_init();
+
+       /* init the hi6553 pmic */
+       hikey_hi6553_init();
+
+       /* add the eMMC and sd ports */
+       ret = init_dwmmc();
+
+       if (ret)
+               debug("init_dwmmc failed\n");
+
+       return ret;
+}
+#endif
+
+int dram_init(void)
+{
+       gd->ram_size = PHYS_SDRAM_1_SIZE;
+       return 0;
+}
+
+void dram_init_banksize(void)
+{
+       gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+       gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+/* Use the Watchdog to cause reset */
+void reset_cpu(ulong addr)
+{
+       /* TODO program the watchdog */
+}

configs/hikey_defconfig new file +0 -0

new file mode 100644
index 0000000..50baf22

configs/hikey_defconfig new file +1 -0

+CONFIG_NET=y

include/configs/hikey.h new file +42 -0

new file mode 100644
index 0000000..303b857
@@ -0,0 +1,168 @@
+/*
+ * (C) Copyright 2015 Linaro
+ *
+ * Peter Griffin <[email protected]>
+ *
+ * Configuration for HiKey 96boards CE. Parts were derived from other ARM
+ * configurations.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __HIKEY_AEMV8A_H
+#define __HIKEY_AEMV8A_H
+
+/* We use generic board for hikey */
+#define CONFIG_SYS_GENERIC_BOARD
+
+#define CONFIG_REMAKE_ELF
+
+#define CONFIG_SUPPORT_RAW_INITRD
+
+/* Cache Definitions */
+#define CONFIG_SYS_DCACHE_OFF
+
+#define CONFIG_IDENT_STRING            "hikey"
+
+/* Flat Device Tree Definitions */
+#define CONFIG_OF_LIBFDT
+
+/* Physical Memory Map */
+
+/* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */
+#define CONFIG_SYS_TEXT_BASE           0x35000000
+
+#define CONFIG_NR_DRAM_BANKS           1
+#define PHYS_SDRAM_1                   0x00000000
+
+/* 1008 MB (the last 16Mb are secured for TrustZone by ATF*/
+#define PHYS_SDRAM_1_SIZE              0x3f000000
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+
+#define CONFIG_SYS_INIT_RAM_SIZE       0x1000

include/configs/hikey.h new file +105 -1

+
+#define CONFIG_BAUDRATE                        115200
+#define CONFIG_SYS_SERIAL0             0xF8015000
+
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_DWC2
+#define CONFIG_USB_DWC2_REG_ADDR 0xF72C0000
+/*#define CONFIG_DWC2_DFLT_SPEED_FULL*/
+#define CONFIG_DWC2_ENABLE_DYNAMIC_FIFO
+
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_MISC_INIT_R
+#endif
+
+#define CONFIG_HIKEY_GPIO
+#define CONFIG_DM_GPIO
+#define CONFIG_CMD_GPIO
+#define CONFIG_DM
+
+/* SD/MMC configuration */
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MMC
+#define CONFIG_DWMMC
+#define CONFIG_HIKEY_DWMMC
+#define CONFIG_BOUNCE_BUFFER
+#define CONFIG_CMD_MMC
+
+#define CONFIG_FS_EXT4
+#define CONFIG_FS_FAT
+
+/* Command line configuration */
+#define CONFIG_MENU
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_UNZIP
+#define CONFIG_CMD_PXE
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_SAVEENV
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_SOURCE
+
+#define CONFIG_MAC_PARTITION
+#define CONFIG_MTD_PARTITIONS
+
+/* BOOTP options */
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+#define CONFIG_CMD_NET
+
+#include <config_distro_defaults.h>
+
+/* Initial environment variables */
+
+/*
+ * Defines where the kernel and FDT exist in NOR flash and where it will
+ * be copied into DRAM
+ */
+#define CONFIG_EXTRA_ENV_SETTINGS      \
+                               "kernel_name=Image\0"   \
+                               "kernel_addr=0x0000000\0" \
+                               "fdt_name=hi6220-hikey.dtb\0" \
+                               "fdt_addr=0x0300000\0" \
+                               "max_fdt=0x100000\0" \
+                               "fdt_high=0xffffffffffffffff\0" \
+                               "initrd_high=0xffffffffffffffff\0" \
+
+/* Assume we boot with root on the first partition of a USB stick */
+#define CONFIG_BOOTARGS                "console=ttyAMA0,115200n8 /dev/mmcblk0p7 rw "
+
+/* Copy the kernel and FDT to DRAM memory and boot */
+#define CONFIG_BOOTCOMMAND     "booti $kernel_addr_r - $fdt_addr_r"
+
+#define CONFIG_BOOTDELAY               2
+
+/* Preserve enviroment onto sd card */
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV         1
+#define CONFIG_SYS_MMC_ENV_PART                0
+#define CONFIG_ENV_OFFSET               0x0
+#define CONFIG_ENV_SIZE                        0x1000
+#define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+
+/* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE              512     /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE + \
+                                       sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_MAXARGS             64      /* max command args */
+
+#define CONFIG_SYS_NO_FLASH
+
+#endif /* __HIKEY_AEMV8A_H */
--