Skip to contentSkip to conversation

u-boot-socfpga/master

GIT PULL Marek Vasut 2 participants 3 messages Aug 8, 2015 – Aug 9, 2015

lore
Share & tools
lore
#0 lore raw

The following changes since commit ae27120c31d58b8bb694d9155bcffdcfae8552a6:

Merge git://git.denx.de/u-boot-dm (2015-08-06 19:56:03 -0400)

are available in the git repository at:

git://git.denx.de/u-boot-socfpga.git HEAD

for you to fetch changes up to bd48c0617b5c7212e5bf22169e716da878842da4:

arm: socfpga: misc: Add support for printing FPGA type (2015-08-08 14:14:30
+0200)

----------------------------------------------------------------
Dinh Nguyen (6):
driver/ddr/altera: Add DDR driver for Altera's SDRAM controller driver/ddr/altera: Add the sdram calibration portion
arm: socfpga: enable the Altera SDRAM controller driver
ddr: altera: sequencer: add RW_MGR_MEM_NUMBER_OF_RANKS
arm: socfpga: scan: Add code to get FPGA ID
arm: socfpga: misc: Add support for printing FPGA type

Marek Vasut (223):
arm: socfpga: Fix FPGA bitstream programming routine
arm: dts: socfpga: Fix SPI aliases
arm: dts: socfpga: Add mmc alias
arm: socfpga: Move generated files into qts subdir
net: designware: Add SoCFPGA GMAC DT compatible string
net: designware: Rename the driver var name to eth_designware
arm: socfpga: Move sdram_config.h to board dir
ddr: altera: Move struct sdram_prot_rule prototype
ddr: altera: Fix typo in mp_threshold1 programming
ddr: altera: Fix debug message format in sequencer
arm: socfpga: reset: Add missing reset manager regs
arm: socfpga: reset: Start reworking the SoCFPGA reset manager
arm: socfpga: reset: Implement unified function to toggle reset
arm: socfpga: reset: Replace ad-hoc reset functions
arm: socfpga: reset: Repair bridge reset handling
arm: socfpga: reset: Add function to reset add peripherals
arm: socfpga: reset: Add SDMMC, QSPI and DMA defines
arm: socfpga: clock: Get rid of cm_config_t typedef
arm: socfpga: clock: Clean up pll_config.h
arm: socfpga: scan: Staticize scan_mgr_io_scan_chain_prg()
arm: socfpga: scan: Zap redundant params in scan_mgr_io_scan_chain_prg()
arm: socfpga: scan: Zap iocsr_scan_chain*_table()
arm: socfpga: system: Rework sysmgr_enable_warmrstcfgio()
arm: socfpga: system: Clean up pinmux_config.c
arm: socfpga: spl: Toggle warm reset config I/O bit
arm: socfpga: spl: Configure SCU and NIC-301 early
arm: socfpga: spl: Add missing reset logic
arm: socfpga: spl: Merge spl_board_init() into board_init_f()
arm: socfpga: spl: Remove custom linker script
arm: socfpga: spl: Add support for booting from SD/MMC
arm: socfpga: spl: Add support for booting from QSPI
arm: socfpga: spl: Add support for selecting boot device from BSEL
arm: socfpga: misc: Fix warm reset
arm: socfpga: misc: Add support for printing boot mode
arm: socfpga: misc: Export bootmode into environment variable
arm: socfpga: misc: Probe ethernet GMAC from OF
arm: socfpga: misc: Reset ethernet from OF
arm: socfpga: config: Move SPL GD and malloc to RAM
arm: socfpga: config: Zap incorrect config options
arm: socfpga: config: Exclude CONFIG_SPI_FLASH_MTD from SPL build
arm: socfpga: config: Enable CONFIG_SPI_FLASH_BAR
arm: socfpga: config: Fix LOADADDR
arm: socfpga: config: Make CONFIG_SPI_FLASH_MTD useful
Makefile: Add target for building bootable SPL image for SoCFPGA
ddr: altera: Minor indent fix in set_rank_and_odt_mask()
ddr: altera: Clean up ugly casts in sdram_calibration_full()
ddr: altera: Zap invocation of sdr_get_addr((u32 *)BASE_RW_MGR)"
ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_reg_file->.*)
ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_scc_mgr->.*)
ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_rw_load.*->.*)
ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_mgr_.*->.*)
ddr: altera: Pluck out remaining sdr_get_addr() calls
ddr: altera: Wrap SOCFPGA_SDR_ADDRESS into SDR_PHYGRP.*ADDRESS
ddr: altera: Stop using SDR_CTRLGRP_ADDRESS directly
ddr: altera: Massage addr into I/O accessors
ddr: altera: Clean up hc_initialize_rom_data()
ddr: altera: Clean up initialize_reg_file()
ddr: altera: Clean up initialize_hps_phy()
ddr: altera: Clean up reg_file_set*()
ddr: altera: Clean up scc manager function args
ddr: altera: Reorder scc manager functions
ddr: altera: Implement universal scc manager config function
ddr: altera: Clean up scc_mgr_initialize()
ddr: altera: Shuffle around scc_mgr_set_*all_ranks()
ddr: altera: Implement universal scc_mgr_set_all_ranks()
ddr: altera: Clean up scc_mgr_load_dqs_for_write_group()
ddr: altera: Clean up scc_set_bypass_mode()
ddr: altera: Clean up scc_mgr_set_oct_out1_delay()
ddr: altera: Clean up scc_mgr_apply_group_dq_out1_delay()
ddr: altera: Clean up scc_mgr_*_delay() args
ddr: altera: Clean up scc_mgr_set_hhp_extras()
ddr: altera: Extract scc_mgr_set_hhp_extras()
ddr: altera: Clean up scc_mgr_zero_all()
ddr: altera: Clean up scc_mgr_zero_group()
ddr: altera: Internal scc_mgr_apply_group_all_out_delay_add() cleanup part
1
ddr: altera: Internal scc_mgr_apply_group_all_out_delay_add() cleanup part
2
ddr: altera: Clean up scc_mgr_apply_group_all_out_delay_add_all_ranks()
ddr: altera: Factor out instruction loading from rw_mgr_mem_initialize()
ddr: altera: Factor out common code
ddr: altera: Minor clean up of set_jump_as_return()
ddr: altera: Fix ad-hoc iterative division implementation
ddr: altera: Rework initialize_tracking()
ddr: altera: Init my_param and my_gbl
ddr: altera: Rename initialize() to phy_mgr_initialize()
ddr: altera: Clean up run_mem_calibrate()
ddr: altera: Clean up phy_mgr_initialize()
ddr: altera: Clean up mem_config()
ddr: altera: Clean up mem_precharge_and_activate()
ddr: altera: Clean up set_rank_and_odt_mask() part 1
ddr: altera: Clean up set_rank_and_odt_mask() part 2
ddr: altera: Clean up set_rank_and_odt_mask() part 3
ddr: altera: Minor clean up of mem_skip_calibrate()
ddr: altera: Trivial mem_calibrate() indent cleanup
ddr: altera: Internal mem_calibrate() cleanup part 1
ddr: altera: Internal mem_calibrate() cleanup part 2
ddr: altera: Internal mem_calibrate() cleanup part 3
ddr: altera: Internal mem_calibrate() cleanup part 4
ddr: altera: Internal mem_calibrate() cleanup part 5
ddr: altera: Internal mem_calibrate() cleanup part 6
ddr: altera: Minor clean up of rw_mgr_mem_initialize()
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 1
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 2
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 3
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 4
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 5
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 6
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 7
ddr: altera: Extract guaranteed write from rw_mgr_mem_calibrate_vfifo()
ddr: altera: Extract DQS enable calibration from
rw_mgr_mem_calibrate_vfifo()
ddr: altera: Extract Centering DQ/DQS from rw_mgr_mem_calibrate_vfifo()
ddr: altera: Minor rw_mgr_mem_calibrate_read_load_patterns() cleanup
ddr: altera: Zap rw_mgr_mem_calibrate_read_test_patterns_all_ranks()
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test_patterns()
ddr: altera: Clean up
rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 1
ddr: altera: Clean up
rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 2
ddr: altera: Clean up
rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 3
ddr: altera: Clean up
rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 4
ddr: altera: Clean up sdr_find_window_centre() part 1
ddr: altera: Clean up sdr_find_window_centre() part 2
ddr: altera: Clean up sdr_find_window_centre() part 3
ddr: altera: Clean up sdr_*_phase() part 1
ddr: altera: Clean up sdr_*_phase() part 2
ddr: altera: Clean up sdr_*_phase() part 3
ddr: altera: Clean up sdr_*_phase() part 4
ddr: altera: Clean up sdr_*_phase() part 5
ddr: altera: Clean up sdr_*_phase() part 6
ddr: altera: Clean up sdr_*_phase() part 7
ddr: altera: Clean up sdr_*_phase() part 8
ddr: altera: Clean up sdr_*_phase() part 9
ddr: altera: Clean up sdr_*_phase() part 10
ddr: altera: Clean up rw_mgr_*_vfifo() part 1
ddr: altera: Clean up rw_mgr_*_vfifo() part 2
ddr: altera: Clean up find_vfifo_read()
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part
1
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part
2
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part
3
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part
4
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part
5
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part
6
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part
7
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test_all_ranks()
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 1
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 2
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 3
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 4
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 5
ddr: altera: Clean up rw_mgr_mem_calibrate_writes()
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 1
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 2
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 3
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 4
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 5
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 6
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 7
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 8
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 9
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 10
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 11
ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 1
ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 2
ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 3
ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 4
ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 5
ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 1
ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 2
ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 3
ddr: altera: Clean up rw_mgr_mem_calibrate_write_test_issue()
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_end()
ddr: altera: Clean up rw_mgr_mem_calibrate_lfifo()
ddr: altera: Minor clean up of rw_mgr_mem_handoff()
ddr: altera: Clean up of delay_for_n_mem_clocks() part 1
ddr: altera: Clean up of delay_for_n_mem_clocks() part 2
ddr: altera: Clean up of delay_for_n_mem_clocks() part 3
ddr: altera: Clean up of delay_for_n_mem_clocks() part 4
ddr: altera: Clean up of delay_for_n_mem_clocks() part 5
arm: socfpga: Add temporary workaround for missing SD/MMC patches
ddr: altera: sdram: Switch to generic_hweight32()
ddr: altera: sdram: Clean up compute_errata_rows() part 1
ddr: altera: sdram: Clean up compute_errata_rows() part 2
ddr: altera: sdram: Clean up set_sdr_ctrlcfg()
ddr: altera: sdram: Clean up set_sdr_dram_timing*()
ddr: altera: sdram: Clean up set_sdr_addr_rw()
ddr: altera: sdram: Clean up set_sdr_static_cfg()
ddr: altera: sdram: Clean up set_sdr_fifo_cfg()
ddr: altera: sdram: Clean up set_sdr_mp_weight()
ddr: altera: sdram: Clean up set_sdr_mp_pacing()
ddr: altera: sdram: Clean up set_sdr_mp_threshold()
ddr: altera: sdram: Introduce socfpga_sdram_config() structure
ddr: altera: sdram: Clean up sdram_mmr_init_full() part 1
ddr: altera: sdram: Clean up sdram_mmr_init_full() part 2
ddr: altera: sdram: Clean up sdram_mmr_init_full() part 3
ddr: altera: sdram: Clean up sdram_mmr_init_full() part 4
ddr: altera: sdram: Clean up sdram_mmr_init_full() part 5
ddr: altera: sdram: Clean up sdram_mmr_init_full() part 6
ddr: altera: sdram: Clean up sdram_mmr_init_full() part 7
ddr: altera: sdram: Clean up sdram_mmr_init_full() part 8
ddr: altera: sdram: Introduce socfpga_sdram_get_config()
ddr: altera: sdram: Clean up sdram_calculate_size() part 1
ddr: altera: sdram: Clean up sdram_calculate_size() part 2
ddr: altera: sdram: Clean up sdram_write_verify()
ddr: altera: sdram: Add missing kerneldoc
ddr: altera: sdram: Minor cleanup in sdram_set_rule()
ddr: altera: sdram: Minor cleanup in sdram_get_rule()
ddr: altera: sdram: Make sdram_start and sdram_end into u32
ddr: altera: sequencer: Move qts-generated files to board dir
ddr: altera: sequencer: Clean up mach/sdram.h
ddr: altera: sequencer: Zap unused params and macros
ddr: altera: sequencer: Zap bogus redefinition of
RW_MGR_MEM_NUMBER_OF_RANKS
ddr: altera: sequencer: Wrap ac_rom_init and inst_rom_init
ddr: altera: sequencer: Wrap RW_MGR_* macros
ddr: altera: sequencer: Pluck out RW_MGR_* macros from code
ddr: altera: sequencer: Wrap IO_* macros
ddr: altera: sequencer: Pluck out IO_* macros from code
ddr: altera: sequencer: Wrap misc remaining macros
ddr: altera: sequencer: Zap VFIFO_SIZE
ddr: altera: sequencer: Zap SEQ_T(INIT|RESET)_CNTR._VAL
ddr: altera: sequencer: Pluck out misc macros from code
ddr: altera: sequencer: Clean data types
ddr: altera: sequencer: Clean checkpatch issues
arm: socfpga: scan: Clean up scan_chain_engine_is_idle()
arm: socfpga: scan: Introduce generic JTAG accessor
arm: socfpga: scan: Clean up horrible macros
arm: socfpga: scan: Factor out IO chain programming

 Makefile                                            |   13 +
 arch/arm/dts/socfpga.dtsi                           |    4 +
 arch/arm/dts/socfpga_arria5_socdk.dts               |    8 +-
 arch/arm/dts/socfpga_cyclone5_socdk.dts             |    4 -
 arch/arm/dts/socfpga_cyclone5_socrates.dts          |    6 -
 arch/arm/mach-socfpga/Makefile                      |    4 +-
 arch/arm/mach-socfpga/clock_manager.c               |   28 +-
 arch/arm/mach-socfpga/include/mach/clock_manager.h  |   12 +-
 arch/arm/mach-socfpga/include/mach/reset_manager.h  |   60 +-
 arch/arm/mach-socfpga/include/mach/scan_manager.h   |   75 +-
 arch/arm/mach-socfpga/include/mach/sdram.h          |  441 +++++++++-
 arch/arm/mach-socfpga/include/mach/system_manager.h |    7 +-
 arch/arm/mach-socfpga/misc.c                        |  184 ++++-
 arch/arm/mach-socfpga/reset_manager.c               |   99 +--
 arch/arm/mach-socfpga/scan_manager.c                |  335 ++++----
 arch/arm/mach-socfpga/spl.c                         |  220 ++---
 arch/arm/mach-socfpga/system_manager.c              |   16 +-
 arch/arm/mach-socfpga/u-boot-spl.lds                |   45 -
 board/altera/socfpga/Makefile                       |    5 +-
 board/altera/socfpga/{ => qts}/iocsr_config.c       |    0
 board/altera/socfpga/{ => qts}/iocsr_config.h       |    0
 board/altera/socfpga/{ => qts}/pinmux_config.c      |    0
 board/altera/socfpga/{ => qts}/pinmux_config.h      |    0
 board/altera/socfpga/{ => qts}/pll_config.h         |    0
 board/altera/socfpga/qts/sdram_config.h             |  100 +++
 board/altera/socfpga/qts/sequencer_auto.h           |  128 +++
 board/altera/socfpga/qts/sequencer_auto_ac_init.h   |   84 ++
 board/altera/socfpga/qts/sequencer_auto_inst_init.h |  268 ++++++
 board/altera/socfpga/qts/sequencer_defines.h        |  122 +++
 board/altera/socfpga/wrap_iocsr_config.c            |   41 +
 board/altera/socfpga/wrap_pinmux_config.c           |   35 +
 board/altera/socfpga/wrap_pll_config.c              |  144 ++++
 board/altera/socfpga/wrap_sdram_config.c            |  316 ++++++++
 configs/socfpga_arria5_defconfig                    |   10 +
 configs/socfpga_cyclone5_defconfig                  |   11 +
 configs/socfpga_socrates_defconfig                  |   12 +-
 drivers/ddr/altera/Makefile                         |   11 +
 drivers/ddr/altera/sdram.c                          |  535 ++++++++++++
 drivers/ddr/altera/sequencer.c                      | 3783 
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/ddr/altera/sequencer.h                      |  227 ++++++
 drivers/fpga/socfpga.c                              |    3 +
 drivers/net/designware.c                            |    3 +-
 include/configs/socfpga_arria5.h                    |    7 +-
 include/configs/socfpga_common.h                    |   63 +-
 include/configs/socfpga_cyclone5.h                  |    7 +-
 include/fdtdec.h                                    |    1 +
 lib/fdtdec.c                                        |    1 +
 scripts/Makefile.spl                                |   11 +
 48 files changed, 6913 insertions(+), 576 deletions(-)
 delete mode 100644 arch/arm/mach-socfpga/u-boot-spl.lds
 rename board/altera/socfpga/{ => qts}/iocsr_config.c (100%)
 rename board/altera/socfpga/{ => qts}/iocsr_config.h (100%)
 rename board/altera/socfpga/{ => qts}/pinmux_config.c (100%)
 rename board/altera/socfpga/{ => qts}/pinmux_config.h (100%)
 rename board/altera/socfpga/{ => qts}/pll_config.h (100%)
 create mode 100644 board/altera/socfpga/qts/sdram_config.h
 create mode 100644 board/altera/socfpga/qts/sequencer_auto.h
 create mode 100644 board/altera/socfpga/qts/sequencer_auto_ac_init.h
 create mode 100644 board/altera/socfpga/qts/sequencer_auto_inst_init.h
 create mode 100644 board/altera/socfpga/qts/sequencer_defines.h
 create mode 100644 board/altera/socfpga/wrap_iocsr_config.c
 create mode 100644 board/altera/socfpga/wrap_pinmux_config.c
 create mode 100644 board/altera/socfpga/wrap_pll_config.c
 create mode 100644 board/altera/socfpga/wrap_sdram_config.c
 create mode 100644 drivers/ddr/altera/Makefile
 create mode 100644 drivers/ddr/altera/sdram.c
 create mode 100644 drivers/ddr/altera/sequencer.c
 create mode 100644 drivers/ddr/altera/sequencer.h
#1 lore raw
Quoted 4 lines · Marek Vasut

The following changes since commit ae27120c31d58b8bb694d9155bcffdcfae8552a6:

Merge git://git.denx.de/u-boot-dm (2015-08-06 19:56:03 -0400)

Quoted 9 lines

are available in the git repository at:

git://git.denx.de/u-boot-socfpga.git HEAD

for you to fetch changes up to bd48c0617b5c7212e5bf22169e716da878842da4:

arm: socfpga: misc: Add support for printing FPGA type (2015-08-08 14:14:30
+0200)

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20150808/1fb32ac7/attachment.sig>
#2 lore raw
Quoted 7 lines · Tom Rini
Quoted 6 lines · Marek Vasut

The following changes since commit ae27120c31d58b8bb694d9155bcffdcfae8552a6:
Merge git://git.denx.de/u-boot-dm (2015-08-06 19:56:03 -0400)

are available in the git repository at:
git://git.denx.de/u-boot-socfpga.git HEAD

Quoted 7 lines
Quoted 5 lines

for you to fetch changes up to bd48c0617b5c7212e5bf22169e716da878842da4:
arm: socfpga: misc: Add support for printing FPGA type (2015-08-08 14:14:30

+0200)

Applied to u-boot/master, thanks!

Woohoo! Thanks :)

Best regards,
Marek Vasut