dma: lpc32xx: add DMA driver
Subsystems (3)
PATCH v6 1/5 dma: lpc32xx: add DMA driver
From: Sylvain Lemieux <[email protected]>
Incorporate DMA driver from legacy LPCLinux NXP BSP. The files taken from the legacy patch are:
- lpc32xx DMA driver
- lpc3250 header file DMA registers definition.
The legacy driver was updated and clean-up as part of the integration with the latest u-boot.
---
Changes from v5 to v6:
* Addressed Marek's comments on LPC32xx DMA driver:
- return "-ETIMEDOUT" on timeout.
* Addressed Vladimir's comments on LPC32xx DMA driver:
- follow alphabetic order when adding "lpc32xx_dma_init()".
- use "writel()" when enabling DMA clock.
- move DMAC registers definitions from NAND SLC to "dma.h".
- remove support to release DMA channel.
- update the API to use an unsigned type for the channel.
- return an error instead of generating a fatal BUG when doing a transfer on an unallocated channel.
- add an explanatory error when returning with a failure.
Changes from v4 to v5:
* Addressed Marek's comments on LPC32xx DMA driver:
- Move macro use by the DMA client to write the next DMA linked list item address to NAND SLC driver.
- updated "lpc32xx_dma_wait_status()" implementation to make if stetement easier to read.
- updated multiline comments style.
Changes from v3 to v4:
* Addressed Marek's comments on LPC32xx DMA driver:
- updated multiline comments style.
- use "u32" instead of "uint32_t".
- fixed unbounded loop.
Changes from v2 to v3:
* Addressed Marek's comments on LPC32xx DMA driver:
- use defined in header file instead of local definition.
- remove for loop and use "ffz()".
* Provide define to assign next DMA linked list item address to removed typecast in DMA client (ex. NAND SLC).
Changes from v1 to v2:
* Moved the DMA patch as the first patch of the series.
* The NAND SLC patch (link below) is applied before this
patch: https://patchwork.ozlabs.org/patch/497308/
Update to the legacy driver to integrate with the latest u-boot:
1) Fixed checkpatch script output in legacy code.
2) Use LPC32xx definition from "cpu.h" and "clk.h".
3) Incorporate DMA specific register definition from "lpc3250.h" header file from legacy BSP patch from LPCLinux.
4) Use u-boot API for register access to remove the volatile in register definition taken from "lpc3250.h" header file.
5) Add DMA interface to "dma.h".
6) Add dma clock control register bits (clk.h).
7) Add functions to initialize the DMA clock.
The legacy BSP patch (u-boot-2009.03_lpc32x0-v1.07.patch.tar.bz2) was downloaded from the LPCLinux Web site.
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 7 ++ arch/arm/include/asm/arch-lpc32xx/clk.h | 3 + arch/arm/include/asm/arch-lpc32xx/dma.h | 67 ++++++++++++ arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 1 + drivers/dma/Makefile | 1 + drivers/dma/lpc32xx_dma.c | 147 ++++++++++++++++++++++++++ 6 files changed, 226 insertions(+) create mode 100644 arch/arm/include/asm/arch-lpc32xx/dma.h create mode 100644 drivers/dma/lpc32xx_dma.c
arch/arm/cpu/arm926ejs/lpc32xx/devices.c +7 -0
@@ -41,6 +41,13 @@ void lpc32xx_uart_init(unsigned int uart_id) &clk->u3clk + (uart_id - 3)); } +void lpc32xx_dma_init (void ) +{ +/* Enable DMA interface */ +writel (DMA_CLK_ENABLE , &clk->dmaclk_ctrl); + +} +void lpc32xx_mac_init (void ) {/* Enable MAC interface */
arch/arm/include/asm/arch-lpc32xx/clk.h +3 -0
@@ -158,6 +158,9 @@ struct clk_pm_regs {#define CLK_NAND_SLC_SELECT (1 << 2)#define CLK_NAND_MLC_INT (1 << 5) +/* DMA Clock Control Register bits */ +#define DMA_CLK_ENABLE (1 << 0) +/* SSP Clock Control Register bits */ #define CLK_SSP0_ENABLE_CLOCK (1 << 0)
arch/arm/include/asm/arch-lpc32xx/dma.h new file +67 -0
67 lines not on this page · raw message
arch/arm/include/asm/arch-lpc32xx/sys_proto.h +1 -0
@@ -10,6 +10,7 @@#include <asm/arch/emc.h> void lpc32xx_uart_init (unsigned int uart_id); +void lpc32xx_dma_init (void );void lpc32xx_mac_init (void );void lpc32xx_mlc_nand_init (void );void lpc32xx_slc_nand_init (void );
drivers/dma/Makefile +1 -0
@@ -10,3 +10,4 @@ obj-$(CONFIG_APBH_DMA) += apbh_dma.o obj-$(CONFIG_FSL_DMA) += fsl_dma.o obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o obj-$(CONFIG_TI_EDMA3) += ti-edma3.o +obj-$(CONFIG_DMA_LPC32XX) += lpc32xx_dma.o
drivers/dma/lpc32xx_dma.c new file +147 -0
147 lines not on this page · raw message
Signature · 1 line
1.8.3.1
PATCH v6 1/5 dma: lpc32xx: add DMA driver
Quoted 11 lines · slemieux.tyco at gmail.com
From: Sylvain Lemieux <[email protected]>
Incorporate DMA driver from legacy LPCLinux NXP BSP. The files taken from the legacy patch are:
- lpc32xx DMA driver
- lpc3250 header file DMA registers definition.The legacy driver was updated and clean-up as part of the integration with the latest u-boot.
Signed-off-by Sylvain Lemieux <[email protected]>
Best regards,
Marek Vasut
Vladimir Zapolskiy
maintainerPATCH v6 1/5 dma: lpc32xx: add DMA driver
In reply to slemieux.tyco at gmail.comHi Sylvain,
Quoted 97 lines · slemieux.tyco at gmail.com
From: Sylvain Lemieux <[email protected]>
Incorporate DMA driver from legacy LPCLinux NXP BSP. The files taken from the legacy patch are:
- lpc32xx DMA driver
- lpc3250 header file DMA registers definition.The legacy driver was updated and clean-up as part of the integration with the latest u-boot.
Signed-off-by Sylvain Lemieux <[email protected]>---
Changes from v5 to v6:
* Addressed Marek's comments on LPC32xx DMA driver:
- return "-ETIMEDOUT" on timeout.
* Addressed Vladimir's comments on LPC32xx DMA driver:
- follow alphabetic order when adding "lpc32xx_dma_init()".
- use "writel()" when enabling DMA clock.
- move DMAC registers definitions from NAND SLC to "dma.h".
- remove support to release DMA channel.
- update the API to use an unsigned type for the channel.
- return an error instead of generating a fatal BUG when doing a transfer on an unallocated channel.
- add an explanatory error when returning with a failure.Changes from v4 to v5:
* Addressed Marek's comments on LPC32xx DMA driver:
- Move macro use by the DMA client to write the next DMA linked list item address to NAND SLC driver.
- updated "lpc32xx_dma_wait_status()" implementation to make if stetement easier to read.
- updated multiline comments style.Changes from v3 to v4:
* Addressed Marek's comments on LPC32xx DMA driver:
- updated multiline comments style.
- use "u32" instead of "uint32_t".
- fixed unbounded loop.Changes from v2 to v3:
* Addressed Marek's comments on LPC32xx DMA driver:
- use defined in header file instead of local definition.
- remove for loop and use "ffz()".
* Provide define to assign next DMA linked list item address to removed typecast in DMA client (ex. NAND SLC).Changes from v1 to v2:
* Moved the DMA patch as the first patch of the series.
* The NAND SLC patch (link below) is applied before this
patch: https://patchwork.ozlabs.org/patch/497308/Update to the legacy driver to integrate with the latest u-boot:
1) Fixed checkpatch script output in legacy code.
2) Use LPC32xx definition from "cpu.h" and "clk.h".
3) Incorporate DMA specific register definition from "lpc3250.h" header file from legacy BSP patch from LPCLinux.
4) Use u-boot API for register access to remove the volatile in register definition taken from "lpc3250.h" header file.
5) Add DMA interface to "dma.h".
6) Add dma clock control register bits (clk.h).
7) Add functions to initialize the DMA clock.The legacy BSP patch (u-boot-2009.03_lpc32x0-v1.07.patch.tar.bz2) was downloaded from the LPCLinux Web site.
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 7 ++ arch/arm/include/asm/arch-lpc32xx/clk.h | 3 + arch/arm/include/asm/arch-lpc32xx/dma.h | 67 ++++++++++++ arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 1 + drivers/dma/Makefile | 1 + drivers/dma/lpc32xx_dma.c | 147 ++++++++++++++++++++++++++ 6 files changed, 226 insertions(+) create mode 100644 arch/arm/include/asm/arch-lpc32xx/dma.h create mode 100644 drivers/dma/lpc32xx_dma.carch/arm/cpu/arm926ejs/lpc32xx/devices.c +7
-0@@ -41,6 +41,13 @@ void lpc32xx_uart_init(unsigned int uart_id) &clk->u3clk + (uart_id - 3)); } +void lpc32xx_dma_init (void ) +{ +/* Enable DMA interface */ +writel (DMA_CLK_ENABLE , &clk->dmaclk_ctrl); + +} +void lpc32xx_mac_init (void ) {/* Enable MAC interface */ arch/arm/include/asm/arch-lpc32xx/clk.h +0
-0
arch/arm/include/asm/arch-lpc32xx/clk.h struct clk_pm_regs { · line 163
Quoted 6 lines
arch/arm/include/asm/arch-lpc32xx/clk.h +3
-0@@ -158,6 +158,9 @@ struct clk_pm_regs {#define CLK_NAND_SLC_SELECT (1 << 2)#define CLK_NAND_MLC_INT (1 << 5) +/* DMA Clock Control Register bits */ +#define DMA_CLK_ENABLE (1 << 0) +
for sake of consistency with all the rest clock name bits, please rename DMA_CLK_ENABLE to CLK_DMA_ENABLE
drivers/dma/Makefile obj-$(CONFIG_APBH_DMA) += apbh_dma.o · line 13
Quoted 9 lines
drivers/dma/Makefile +1
-0@@ -10,3 +10,4 @@ obj-$(CONFIG_APBH_DMA) += apbh_dma.o obj-$(CONFIG_FSL_DMA) += fsl_dma.o obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o obj-$(CONFIG_TI_EDMA3) += ti-edma3.o +obj-$(CONFIG_DMA_LPC32XX) += lpc32xx_dma.o
Not sure about the ordering policy here, probably appending is good enough.
Tested on non-SPL build with hardware NAND SLC ECC, feel free to add
--
With best wishes,
Vladimir
PATCH v6 1/5 dma: lpc32xx: add DMA driver
In reply to slemieux.tyco at gmail.comQuoted 7 lines · slemieux.tyco at gmail.com
From: Sylvain Lemieux <[email protected]>
Incorporate DMA driver from legacy LPCLinux NXP BSP. The files taken from the legacy patch are:
- lpc32xx DMA driver
- lpc3250 header file DMA registers definition.
Quoted 5 lines
The legacy driver was updated and clean-up as part of the integration with the latest u-boot.
Signed-off-by Sylvain Lemieux <[email protected]>Acked-by Marek Vasut <[email protected]>Tested-by Vladimir Zapolskiy <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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