ARM & m68k: cache: add weak cache code then enable usb cache support

PATCH New Josh Wu 3 participants 17 messages Jul 27, 2015 – Aug 13, 2015

Subsystems (4)

Arm (32-bit) USB m68k architecture USB ohci driver

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Josh Wu

author

2015-07-27 03:40 UTC #0 lore raw

v3 cover ARM & m68k: cache: add weak cache code then enable usb cache support

This series add empty stub for invalidate/flush dcache functions, so that usb driver can enable cache support.

Also it include patch to clean up the ARM cache code:
- add weak functions for flush_cache().
- make them use the weak function flush_cache().
- remove not used code in flush_cache() in lib/cache.c.

Changes in v3:
- add Angelo's Acked-by.
- remove the same functions in the cpu/ files as they will use the weak function provided in lib/cache.c

Changes in v2:
- CONFIG_DM_USB in periodic_unlink() should be remove as well. This version remove it.
- Add Hans de Goede's acked-by.

Josh Wu (4):
m68k: cache: add an empty stub functions for invalidate/flush dcache
ARM: cache: add an empty stub function for invalidate/flush dcache
ARM: cache: implement a default weak flush_cache() function
usb: ohci: enable cache support

 arch/arm/cpu/arm1136/cpu.c     | 17 -----------------
 arch/arm/cpu/arm926ejs/cache.c | 17 -----------------
 arch/arm/cpu/armv7/cache_v7.c  | 21 ---------------------
 arch/arm/cpu/armv8/cache_v8.c  | 16 ----------------
 arch/arm/lib/cache.c           | 35 ++++++++++++++---------------------
 arch/m68k/lib/cache.c          |  9 +++++++++
 drivers/usb/host/ohci-hcd.c    | 12 +-----------
 drivers/usb/host/ohci.h        |  2 +-
 8 files changed, 25 insertions(+), 104 deletions(-)

Signature · 1 line

1.9.1

Josh Wu

author

2015-07-27 03:40 UTC #1 lore raw

PATCH v3 1/4 m68k: cache: add an empty stub functions for invalidate/flush dcache

Since some driver like ohci, lcd used dcache functions. But m68k don't implement the invalidate_dcache_range()/flush_dcache_range() functions.

To avoid compiling errors this patch adds an weak empty stub function for all m68k cpu.

Also each cpu can implement its own implementation. If not implemented then by default is using an empty function.

Signed-off-by Josh Wu <[email protected]>

Acked-by Angelo Dureghello <[email protected]>

---

Changes in v3:
- add Angelo's Acked-by.

Changes in v2:
- new added.

 arch/m68k/lib/cache.c | 9 +++++++++
 1 file changed, 9 insertions(+)

arch/m68k/lib/cache.c +9 -0

index 21daf3d..ace791b 100644
@@ -132,3 +132,12 @@ void dcache_invalid(void)
 	__asm__ __volatile__("movec %0, %%cacr"::"r"(temp));
 #endif
 }
+
+__weak void invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+	/* An empty stub, real implementation should be in platform code */
+}
+__weak void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+	/* An empty stub, real implementation should be in platform code */
+}

Signature · 1 line

1.9.1

Tom Rini

2015-08-13 13:20 UTC #2 lore raw

PATCH v3 1/4 m68k: cache: add an empty stub functions for invalidate/flush dcache

Quoted 11 lines · Josh

Since some driver like ohci, lcd used dcache functions. But m68k don't implement the invalidate_dcache_range()/flush_dcache_range() functions.
To avoid compiling errors this patch adds an weak empty stub function for all m68k cpu.
Also each cpu can implement its own implementation. If not implemented then by default is using an empty function.
Signed-off-by Josh Wu <[email protected]>
Acked-by Angelo Dureghello <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines

Tom
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Josh Wu

author

2015-07-27 03:40 UTC #3 lore raw

PATCH v3 2/4 ARM: cache: add an empty stub function for invalidate/flush dcache

In reply to Josh Wu

Since some driver like ohci, lcd used dcache functions. But some ARM cpu don't implement the invalidate_dcache_range()/flush_dcache_range() functions.

To avoid compiling errors this patch adds an weak empty stub function for all ARM cpu in arch/arm/lib/cache.c.
And ARM cpu still can implemnt its own cache functions on the cpu folder.

Signed-off-by Josh Wu <[email protected]>

---

Changes in v3:
- remove the same functions in the cpu/ files as they will use the weak function provided in lib/cache.c

Changes in v2:
- new added.

 arch/arm/cpu/arm1136/cpu.c     | 8 --------
 arch/arm/cpu/arm926ejs/cache.c | 8 --------
 arch/arm/cpu/armv7/cache_v7.c  | 8 --------
 arch/arm/cpu/armv8/cache_v8.c  | 8 --------
 arch/arm/lib/cache.c           | 9 +++++++++
 5 files changed, 9 insertions(+), 32 deletions(-)

arch/arm/cpu/arm1136/cpu.c +0 -8

index a7aed4b..b4d1d54 100644
@@ -134,14 +134,6 @@ void flush_dcache_all(void)
 {
 }
 
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
 void flush_cache(unsigned long start, unsigned long size)
 {
 }

arch/arm/cpu/arm926ejs/cache.c +0 -8

index 8d7873c..99d1a13 100644
@@ -83,14 +83,6 @@ void flush_dcache_all(void)
 {
 }
 
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
 void flush_cache(unsigned long start, unsigned long size)
 {
 }

arch/arm/cpu/armv7/cache_v7.c +0 -8

index e8ee875..4f0e406 100644
@@ -304,14 +304,6 @@ void flush_dcache_all(void)
 {
 }
 
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
 void arm_init_before_mmu(void)
 {
 }

arch/arm/cpu/armv8/cache_v8.c +0 -8

index c5ec529..f8c17cc 100644
@@ -149,14 +149,6 @@ void flush_dcache_all(void)
 {
 }
 
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
 void dcache_enable(void)
 {
 }

arch/arm/lib/cache.c +9 -0

index 74cfde6..bc48f53 100644
@@ -53,6 +53,15 @@ __weak void enable_caches(void)
 	puts("WARNING: Caches not enabled\n");
 }
 
+__weak void invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+	/* An empty stub, real implementation should be in platform code */
+}
+__weak void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+	/* An empty stub, real implementation should be in platform code */
+}
+
 #ifdef CONFIG_SYS_NONCACHED_MEMORY
 /*
  * Reserve one MMU section worth of address space below the malloc() area that

Signature · 1 line

1.9.1

York Sun

2015-07-27 16:31 UTC #4 lore raw

PATCH v3 2/4 ARM: cache: add an empty stub function for invalidate/flush dcache

Quoted 18 lines · Josh Wu

Since some driver like ohci, lcd used dcache functions. But some ARM cpu don't implement the invalidate_dcache_range()/flush_dcache_range() functions.
To avoid compiling errors this patch adds an weak empty stub function for all ARM cpu in arch/arm/lib/cache.c.
And ARM cpu still can implemnt its own cache functions on the cpu folder.
Signed-off-by Josh Wu <[email protected]>
---
Changes in v3:
- remove the same functions in the cpu/ files as they will use the weak function provided in lib/cache.c
Changes in v2:
- new added.

<snip>

Quoted 9 lines

arch/arm/cpu/armv8/cache_v8.c +0 -1

index c5ec529..f8c17cc 100644
@@ -149,14 +149,6 @@ void flush_dcache_all(void)
 {
 }
 
-void invalidate_dcache_range(unsigned long start, unsigned long stop)

arch/arm/cpu/armv8/cache_v8.c void flush_dcache_all(void) · line 154

Quoted 10 lines

arch/arm/cpu/armv8/cache_v8.c +0 -7

-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
 void dcache_enable(void)
 {
 }

Are you sure about this change? You are probably changing the wrong leg of the #if conditional code.

York

Josh Wu

author

2015-07-28 02:17 UTC #5 lore raw

PATCH v3 2/4 ARM: cache: add an empty stub function for invalidate/flush dcache

Hi, York

Quoted 30 lines · York Sun

Quoted 18 lines · Josh Wu
Since some driver like ohci, lcd used dcache functions. But some ARM cpu don't implement the invalidate_dcache_range()/flush_dcache_range() functions.
To avoid compiling errors this patch adds an weak empty stub function for all ARM cpu in arch/arm/lib/cache.c.
And ARM cpu still can implemnt its own cache functions on the cpu folder.
Signed-off-by Josh Wu <[email protected]>
---
Changes in v3:
- remove the same functions in the cpu/ files as they will use the weak function provided in lib/cache.c
Changes in v2:
- new added.
<snip>
Quoted 8 lines
arch/arm/cpu/armv8/cache_v8.c +0 -0
index c5ec529..f8c17cc 100644
@@ -149,14 +149,6 @@ void flush_dcache_all(void)
  {
  }
 

Quoted 12 lines

arch/arm/cpu/armv8/cache_v8.c void flush_dcache_all(void) · line 154
Quoted 11 lines
arch/arm/cpu/armv8/cache_v8.c +0 -8
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
  void dcache_enable(void)
  {
  }
Are you sure about this change?

This patch deletes those above empty functions so that the driver will use the same weak empty functions in arch/arm/lib/cache.c, which is added by this patch as well.

Quoted 2 lines

You are probably changing the wrong leg of the
#if conditional code.

I don't think so. Could give me more details about this? Thanks.

Best Regards,
Josh Wu

Quoted 2 lines

York

York Sun

2015-07-28 04:24 UTC #6 lore raw

PATCH v3 2/4 ARM: cache: add an empty stub function for invalidate/flush dcache

Please search the same name function in the same file.

York

Sent from my cellphone

-------- Original message --------
From: Josh Wu
Date:07/27/2015 19:17 (GMT-08:00)
To: Sun York-R58495 , U-Boot Mailing List , Marek Vasut , Tom Rini
Cc: Masahiro Yamada , Jeroen Hofstee , Valentine Barshak , Simon Glass , Thierry Reding , Masahiro Yamada , Heiko Schocher , Albert Aribaud , Nobuhiro Iwamatsu
Subject: Re: [PATCH v3 2/4] ARM: cache: add an empty stub function for invalidate/flush dcache

Hi, York

Quoted 30 lines · York Sun

Quoted 18 lines · Josh Wu
Since some driver like ohci, lcd used dcache functions. But some ARM cpu don't implement the invalidate_dcache_range()/flush_dcache_range() functions.
To avoid compiling errors this patch adds an weak empty stub function for all ARM cpu in arch/arm/lib/cache.c.
And ARM cpu still can implemnt its own cache functions on the cpu folder.
Signed-off-by Josh Wu <[email protected]>
---
Changes in v3:
- remove the same functions in the cpu/ files as they will use the weak function provided in lib/cache.c
Changes in v2:
- new added.
<snip>
Quoted 8 lines
arch/arm/cpu/armv8/cache_v8.c +0 -0
index c5ec529..f8c17cc 100644
@@ -149,14 +149,6 @@ void flush_dcache_all(void)
  {
  }
 

Quoted 12 lines

arch/arm/cpu/armv8/cache_v8.c void flush_dcache_all(void) · line 154
Quoted 11 lines
arch/arm/cpu/armv8/cache_v8.c +0 -8
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
  void dcache_enable(void)
  {
  }
Are you sure about this change?

This patch deletes those above empty functions so that the driver will use the same weak empty functions in arch/arm/lib/cache.c, which is added by this patch as well.

Quoted 2 lines

You are probably changing the wrong leg of the
#if conditional code.

I don't think so. Could give me more details about this? Thanks.

Best Regards,
Josh Wu

Quoted 2 lines

York

Josh Wu

author

2015-07-28 05:06 UTC #7 lore raw

PATCH v3 2/4 ARM: cache: add an empty stub function for invalidate/flush dcache

Hi, York

Quoted 1 line · York Sun

Please search the same name function in the same file.

yes, there still have flush_dcache_range() & invalidate_dcache_range() function defined in case of DCACHE is enabled (CONFIG_SYS_DCACHE_OFF is not defined).
And in that case, the empty weak functions flush_dcache_range() & invalidate_dcache_range() in arch/arm/lib/cache.c will be ignored. It is an expect behavior.

or did I miss something?

Best Regards,
Josh Wu

Quoted 79 lines

York
Sent from my cellphone
-------- Original message --------
From: Josh Wu
Date:07/27/2015 19:17 (GMT-08:00)
To: Sun York-R58495 , U-Boot Mailing List , Marek Vasut , Tom Rini
Cc: Masahiro Yamada , Jeroen Hofstee , Valentine Barshak , Simon Glass , Thierry Reding , Masahiro Yamada , Heiko Schocher , Albert Aribaud , Nobuhiro Iwamatsu
Subject: Re: [PATCH v3 2/4] ARM: cache: add an empty stub function for invalidate/flush dcache
Hi, York
Quoted 9 lines · York Sun
Quoted 7 lines · Josh Wu
Since some driver like ohci, lcd used dcache functions. But some ARM cpu don't implement the invalidate_dcache_range()/flush_dcache_range() functions.
To avoid compiling errors this patch adds an weak empty stub function for all ARM cpu in arch/arm/lib/cache.c.
And ARM cpu still can implemnt its own cache functions on the cpu
folder.
Quoted 8 lines
Quoted 8 lines
Signed-off-by Josh Wu <[email protected]>
---
Changes in v3:
- remove the same functions in the cpu/ files as they will use the weak function provided in lib/cache.c
Quoted 6 lines
Quoted 3 lines
Changes in v2:
- new added.
<snip>
Review
Quoted 1 line
(quoted diff) +0 -0
b/arch/arm/cpu/armv8/cache_v8.c
Quoted 7 lines
Quoted 7 lines
index c5ec529..f8c17cc 100644
arch/arm/cpu/armv8/cache_v8.c +0 -0
@@ -149,14 +149,6 @@ void flush_dcache_all(void)
  {
  }
 
Quoted 12 lines
arch/arm/cpu/armv8/cache_v8.c void flush_dcache_all(void) · line 154
Quoted 11 lines
arch/arm/cpu/armv8/cache_v8.c +0 -8
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
  void dcache_enable(void)
  {
  }
Are you sure about this change?
This patch deletes those above empty functions so that the driver will use the same weak empty functions in arch/arm/lib/cache.c, which is added by this patch as well.
Quoted 2 lines
You are probably changing the wrong leg of the
#if conditional code.
I don't think so. Could give me more details about this? Thanks.
Best Regards,
Josh Wu
Quoted 2 lines
York

York Sun

2015-07-28 05:21 UTC #8 lore raw

PATCH v3 2/4 ARM: cache: add an empty stub function for invalidate/flush dcache

Josh,

No you didn't miss. I think you are right on this file.

York

Sent from my cellphone

-------- Original message --------
From: Josh Wu
Date:07/27/2015 22:07 (GMT-08:00)
To: Sun York-R58495 , U-Boot Mailing List , Marek Vasut , Tom Rini
Cc: Masahiro Yamada , Jeroen Hofstee , Valentine Barshak , Simon Glass , Thierry Reding , Masahiro Yamada , Heiko Schocher , Albert Aribaud , Nobuhiro Iwamatsu
Subject: Re: [PATCH v3 2/4] ARM: cache: add an empty stub function for invalidate/flush dcache

Hi, York

On 7/28/2015 12:24 PM, York Sun wrote:
Please search the same name function in the same file.

yes, there still have flush_dcache_range() & invalidate_dcache_range() function defined in case of DCACHE is enabled (CONFIG_SYS_DCACHE_OFF is not defined). And in that case, the empty weak functions flush_dcache_range() & invalidate_dcache_range() in arch/arm/lib/cache.c will be ignored. It is an expect behavior.

or did I miss something?

Best Regards,
Josh Wu

York

Sent from my cellphone

Hi, York

Quoted 30 lines · York Sun

Quoted 18 lines · Josh Wu
Since some driver like ohci, lcd used dcache functions. But some ARM cpu don't implement the invalidate_dcache_range()/flush_dcache_range() functions.
To avoid compiling errors this patch adds an weak empty stub function for all ARM cpu in arch/arm/lib/cache.c.
And ARM cpu still can implemnt its own cache functions on the cpu folder.
Signed-off-by Josh Wu <[email protected]><mailto:[email protected]>
---
Changes in v3:
- remove the same functions in the cpu/ files as they will use the weak function provided in lib/cache.c
Changes in v2:
- new added.
<snip>
Quoted 8 lines
arch/arm/cpu/armv8/cache_v8.c +0 -0
index c5ec529..f8c17cc 100644
@@ -149,14 +149,6 @@ void flush_dcache_all(void)
  {
  }
 

Quoted 12 lines

arch/arm/cpu/armv8/cache_v8.c void flush_dcache_all(void) · line 154
Quoted 11 lines
arch/arm/cpu/armv8/cache_v8.c +0 -8
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
  void dcache_enable(void)
  {
  }
Are you sure about this change?

This patch deletes those above empty functions so that the driver will use the same weak empty functions in arch/arm/lib/cache.c, which is added by this patch as well.

Quoted 2 lines

You are probably changing the wrong leg of the
#if conditional code.

I don't think so. Could give me more details about this? Thanks.

Best Regards,
Josh Wu

Quoted 2 lines

York

Josh Wu

author

2015-08-04 06:50 UTC #9 lore raw

PATCH v3 2/4 ARM: cache: add an empty stub function for invalidate/flush dcache

Hi, York

Quoted 3 lines · York Sun

Josh,
No you didn't miss. I think you are right on this file.

Thanks for the review, Could I have your reviewed-by tag for this patch?

Best Regards,
Josh Wu

Quoted 114 lines

York
Sent from my cellphone
-------- Original message --------
From: Josh Wu
Date:07/27/2015 22:07 (GMT-08:00)
To: Sun York-R58495 , U-Boot Mailing List , Marek Vasut , Tom Rini
Cc: Masahiro Yamada , Jeroen Hofstee , Valentine Barshak , Simon Glass , Thierry Reding , Masahiro Yamada , Heiko Schocher , Albert Aribaud , Nobuhiro Iwamatsu
Subject: Re: [PATCH v3 2/4] ARM: cache: add an empty stub function for invalidate/flush dcache
Hi, York
Quoted 1 line · York Sun
Please search the same name function in the same file.
yes, there still have flush_dcache_range() & invalidate_dcache_range() function defined in case of DCACHE is enabled (CONFIG_SYS_DCACHE_OFF is not defined).
And in that case, the empty weak functions flush_dcache_range() & invalidate_dcache_range() in arch/arm/lib/cache.c will be ignored. It is an expect behavior.
or did I miss something?
Best Regards,
Josh Wu
Quoted 80 lines
York
Sent from my cellphone
-------- Original message --------
From: Josh Wu
Date:07/27/2015 19:17 (GMT-08:00)
To: Sun York-R58495 , U-Boot Mailing List , Marek Vasut , Tom Rini
Cc: Masahiro Yamada , Jeroen Hofstee , Valentine Barshak , Simon Glass , Thierry Reding , Masahiro Yamada , Heiko Schocher , Albert Aribaud , Nobuhiro Iwamatsu
Subject: Re: [PATCH v3 2/4] ARM: cache: add an empty stub function for invalidate/flush dcache
Hi, York
Quoted 9 lines · York Sun
Quoted 7 lines · Josh Wu
Since some driver like ohci, lcd used dcache functions. But some ARM cpu don't implement the invalidate_dcache_range()/flush_dcache_range() functions.
To avoid compiling errors this patch adds an weak empty stub function for all ARM cpu in arch/arm/lib/cache.c.
And ARM cpu still can implemnt its own cache functions on the cpu
folder.
Quoted 6 lines
Quoted 6 lines
Signed-off-by Josh Wu <[email protected]>
---
Changes in v3:
- remove the same functions in the cpu/ files as they will use the
weak
Quoted 8 lines
Quoted 5 lines
function provided in lib/cache.c
Changes in v2:
- new added.
<snip>
Review
Quoted 1 line
(quoted diff) +0 -0
b/arch/arm/cpu/armv8/cache_v8.c
Quoted 7 lines
Quoted 7 lines
index c5ec529..f8c17cc 100644
arch/arm/cpu/armv8/cache_v8.c +0 -0
@@ -149,14 +149,6 @@ void flush_dcache_all(void)
  {
  }
 
Quoted 12 lines
arch/arm/cpu/armv8/cache_v8.c void flush_dcache_all(void) · line 154
Quoted 11 lines
arch/arm/cpu/armv8/cache_v8.c +0 -8
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
  void dcache_enable(void)
  {
  }
Are you sure about this change?
This patch deletes those above empty functions so that the driver will use the same weak empty functions in arch/arm/lib/cache.c, which is added by this patch as well.
Quoted 2 lines
You are probably changing the wrong leg of the
#if conditional code.
I don't think so. Could give me more details about this? Thanks.
Best Regards,
Josh Wu
Quoted 2 lines
York

York Sun

2015-08-04 15:30 UTC #10 lore raw

PATCH v3 2/4 ARM: cache: add an empty stub function for invalidate/flush dcache

In reply to Josh Wu

Quoted 112 lines · Josh Wu

Since some driver like ohci, lcd used dcache functions. But some ARM cpu don't implement the invalidate_dcache_range()/flush_dcache_range() functions.

To avoid compiling errors this patch adds an weak empty stub function for all ARM cpu in arch/arm/lib/cache.c.
And ARM cpu still can implemnt its own cache functions on the cpu folder.

Signed-off-by Josh Wu <[email protected]>

---

Changes in v3:
- remove the same functions in the cpu/ files as they will use the weak function provided in lib/cache.c

Changes in v2:
- new added.

 arch/arm/cpu/arm1136/cpu.c     | 8 --------
 arch/arm/cpu/arm926ejs/cache.c | 8 --------
 arch/arm/cpu/armv7/cache_v7.c  | 8 --------
 arch/arm/cpu/armv8/cache_v8.c  | 8 --------
 arch/arm/lib/cache.c           | 9 +++++++++
 5 files changed, 9 insertions(+), 32 deletions(-)

arch/arm/cpu/arm1136/cpu.c +0 -8

index a7aed4b..b4d1d54 100644
@@ -134,14 +134,6 @@ void flush_dcache_all(void)
 {
 }
 
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
 void flush_cache(unsigned long start, unsigned long size)
 {
 }

arch/arm/cpu/arm926ejs/cache.c +0 -8

index 8d7873c..99d1a13 100644
@@ -83,14 +83,6 @@ void flush_dcache_all(void)
 {
 }
 
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
 void flush_cache(unsigned long start, unsigned long size)
 {
 }

arch/arm/cpu/armv7/cache_v7.c +0 -8

index e8ee875..4f0e406 100644
@@ -304,14 +304,6 @@ void flush_dcache_all(void)
 {
 }
 
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
 void arm_init_before_mmu(void)
 {
 }

arch/arm/cpu/armv8/cache_v8.c +0 -8

index c5ec529..f8c17cc 100644
@@ -149,14 +149,6 @@ void flush_dcache_all(void)
 {
 }
 
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
 void dcache_enable(void)
 {
 }

arch/arm/lib/cache.c +2 -0

index 74cfde6..bc48f53 100644
@@ -53,6 +53,15 @@ __weak void enable_caches(void)
 	puts("WARNING: Caches not enabled\n");
 }
 
+__weak void invalidate_dcache_range(unsigned long start, unsigned long stop)
+{

arch/arm/lib/cache.c __weak void enable_caches(void) · line 67

Quoted 10 lines

arch/arm/lib/cache.c +7 -0

+	/* An empty stub, real implementation should be in platform code */
+}
+__weak void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+	/* An empty stub, real implementation should be in platform code */
+}
+
 #ifdef CONFIG_SYS_NONCACHED_MEMORY
 /*
  * Reserve one MMU section worth of address space below the malloc() area that

Reviewed-by York Sun <[email protected]>

Josh Wu

author

2015-08-05 07:32 UTC #11 lore raw

PATCH v3 2/4 ARM: cache: add an empty stub function for invalidate/flush dcache

Hi, York

Quoted 111 lines · York Sun

Quoted 109 lines · Josh Wu

Since some driver like ohci, lcd used dcache functions. But some ARM cpu don't implement the invalidate_dcache_range()/flush_dcache_range() functions.

To avoid compiling errors this patch adds an weak empty stub function for all ARM cpu in arch/arm/lib/cache.c.
And ARM cpu still can implemnt its own cache functions on the cpu folder.

Signed-off-by Josh Wu <[email protected]>

---

Changes in v3:
- remove the same functions in the cpu/ files as they will use the weak function provided in lib/cache.c

Changes in v2:
- new added.

  arch/arm/cpu/arm1136/cpu.c     | 8 --------
  arch/arm/cpu/arm926ejs/cache.c | 8 --------
  arch/arm/cpu/armv7/cache_v7.c  | 8 --------
  arch/arm/cpu/armv8/cache_v8.c  | 8 --------
  arch/arm/lib/cache.c           | 9 +++++++++
  5 files changed, 9 insertions(+), 32 deletions(-)

arch/arm/cpu/arm1136/cpu.c +0 -8

index a7aed4b..b4d1d54 100644
@@ -134,14 +134,6 @@ void flush_dcache_all(void)
  {
  }
 
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
  void flush_cache(unsigned long start, unsigned long size)
  {
  }

arch/arm/cpu/arm926ejs/cache.c +0 -8

index 8d7873c..99d1a13 100644
@@ -83,14 +83,6 @@ void flush_dcache_all(void)
  {
  }
 
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
  void flush_cache(unsigned long start, unsigned long size)
  {
  }

arch/arm/cpu/armv7/cache_v7.c +0 -8

index e8ee875..4f0e406 100644
@@ -304,14 +304,6 @@ void flush_dcache_all(void)
  {
  }
 
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
  void arm_init_before_mmu(void)
  {
  }

arch/arm/cpu/armv8/cache_v8.c +0 -8

index c5ec529..f8c17cc 100644
@@ -149,14 +149,6 @@ void flush_dcache_all(void)
  {
  }
 
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
  void dcache_enable(void)
  {
  }

arch/arm/lib/cache.c +0 -0

index 74cfde6..bc48f53 100644
@@ -53,6 +53,15 @@ __weak void enable_caches(void)
  	puts("WARNING: Caches not enabled\n");
  }

Quoted 14 lines

arch/arm/lib/cache.c __weak void enable_caches(void) · line 67

Quoted 13 lines

arch/arm/lib/cache.c +9 -0

+__weak void invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+	/* An empty stub, real implementation should be in platform code */
+}
+__weak void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+	/* An empty stub, real implementation should be in platform code */
+}
+
  #ifdef CONFIG_SYS_NONCACHED_MEMORY
  /*
   * Reserve one MMU section worth of address space below the malloc() area that

Reviewed-by York Sun <[email protected]>

Thank you.

Best Regards,
Josh Wu

Tom Rini

2015-08-13 13:20 UTC #12 lore raw

PATCH v3 2/4 ARM: cache: add an empty stub function for invalidate/flush dcache

In reply to Josh Wu

Quoted 10 lines · Josh

Since some driver like ohci, lcd used dcache functions. But some ARM cpu don't implement the invalidate_dcache_range()/flush_dcache_range() functions.
To avoid compiling errors this patch adds an weak empty stub function for all ARM cpu in arch/arm/lib/cache.c.
And ARM cpu still can implemnt its own cache functions on the cpu folder.
Signed-off-by Josh Wu <[email protected]>
Reviewed-by York Sun <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines

Tom
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Josh Wu

author

2015-07-27 03:40 UTC #13 lore raw

PATCH v3 3/4 ARM: cache: implement a default weak flush_cache() function

In reply to Josh Wu

Current many cpu use the same flush_cache() function, which just call the flush_dcache_range().
So implement a weak flush_cache() for all the cpus to use.

In original weak flush_cache() in arch/arm/lib/cache.c, there has some code for ARM1136 & ARM926ejs. But in the arch/arm/cpu/arm1136/cpu.c and arch/arm/cpu/arm926ejs/cache.c, there implements a real flush_cache() function as well. That means the original code for ARM1136 & ARM926ejs in weak flush_cache() of arch/arm/lib/cache.c is totally useless.

So in this patch remove such code in flush_cache() and only call flush_dcache_range().

Signed-off-by Josh Wu <[email protected]>

---

Changes in v3:
- new added.

 arch/arm/cpu/arm1136/cpu.c     |  9 ---------
 arch/arm/cpu/arm926ejs/cache.c |  9 ---------
 arch/arm/cpu/armv7/cache_v7.c  | 13 -------------
 arch/arm/cpu/armv8/cache_v8.c  |  8 --------
 arch/arm/lib/cache.c           | 26 +++++---------------------
 5 files changed, 5 insertions(+), 60 deletions(-)

arch/arm/cpu/arm1136/cpu.c +0 -9

index b4d1d54..f092ffc 100644
@@ -120,11 +120,6 @@ void flush_dcache_range(unsigned long start, unsigned long stop)
 	asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
 }
 
-void flush_cache(unsigned long start, unsigned long size)
-{
-	flush_dcache_range(start, start + size);
-}
-
 #else /* #ifndef CONFIG_SYS_DCACHE_OFF */
 void invalidate_dcache_all(void)
 {

@@ -133,10 +128,6 @@ void invalidate_dcache_all(void)
 void flush_dcache_all(void)
 {
 }
-
-void flush_cache(unsigned long start, unsigned long size)
-{
-}
 #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
 
 #if !defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF)

arch/arm/cpu/arm926ejs/cache.c +0 -9

index 99d1a13..e5c1a6a 100644
@@ -69,11 +69,6 @@ void flush_dcache_range(unsigned long start, unsigned long stop)
 
 	asm volatile("mcr p15, 0, %0, c7, c10, 4\n" : : "r"(0));
 }
-
-void flush_cache(unsigned long start, unsigned long size)
-{
-	flush_dcache_range(start, start + size);
-}
 #else /* #ifndef CONFIG_SYS_DCACHE_OFF */
 void invalidate_dcache_all(void)
 {

@@ -82,10 +77,6 @@ void invalidate_dcache_all(void)
 void flush_dcache_all(void)
 {
 }
-
-void flush_cache(unsigned long start, unsigned long size)
-{
-}
 #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
 
 /*

arch/arm/cpu/armv7/cache_v7.c +0 ~~-13~~

index 4f0e406..a5aa4fa 100644
@@ -286,15 +286,6 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop)
 	flush_dcache_range(start, stop);
 	v7_inval_tlb();
 }
-
-/*
- * Flush range from all levels of d-cache/unified-cache used:
- * Affects the range [start, start + size - 1]
- */
-void  flush_cache(unsigned long start, unsigned long size)
-{
-	flush_dcache_range(start, start + size);
-}
 #else /* #ifndef CONFIG_SYS_DCACHE_OFF */
 void invalidate_dcache_all(void)
 {

@@ -308,10 +299,6 @@ void arm_init_before_mmu(void)
 {
 }
 
-void  flush_cache(unsigned long start, unsigned long size)
-{
-}
-
 void mmu_page_table_flush(unsigned long start, unsigned long stop)
 {
 }

arch/arm/cpu/armv8/cache_v8.c +0 -8

index f8c17cc..92b66c3 100644
@@ -217,11 +217,3 @@ void __weak enable_caches(void)
 	icache_enable();
 	dcache_enable();
 }
-
-/*
- * Flush range from all levels of d-cache/unified-cache
- */
-void flush_cache(unsigned long start, unsigned long size)
-{
-	flush_dcache_range(start, start + size);
-}

arch/arm/lib/cache.c +5 ~~-21~~

index bc48f53..cd13db3 100644
@@ -10,29 +10,13 @@
 #include <common.h>
 #include <malloc.h>
 
+/*
+ * Flush range from all levels of d-cache/unified-cache.
+ * Affects the range [start, start + size - 1].
+ */
 __weak void flush_cache(unsigned long start, unsigned long size)
 {
-#if defined(CONFIG_CPU_ARM1136)
-
-#if !defined(CONFIG_SYS_ICACHE_OFF)
-	asm("mcr p15, 0, r1, c7, c5, 0"); /* invalidate I cache */
-#endif
-
-#if !defined(CONFIG_SYS_DCACHE_OFF)
-	asm("mcr p15, 0, r1, c7, c14, 0"); /* Clean+invalidate D cache */
-#endif
-
-#endif /* CONFIG_CPU_ARM1136 */
-
-#ifdef CONFIG_CPU_ARM926EJS
-#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
-	/* test and clean, page 2-23 of arm926ejs manual */
-	asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
-	/* disable write buffer as well (page 2-22) */
-	asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
-#endif
-#endif /* CONFIG_CPU_ARM926EJS */
-	return;
+	flush_dcache_range(start, start + size);
 }
 
 /*

Signature · 1 line

1.9.1

Tom Rini

2015-08-13 13:20 UTC #14 lore raw

PATCH v3 3/4 ARM: cache: implement a default weak flush_cache() function

Quoted 10 lines · Josh

Current many cpu use the same flush_cache() function, which just call the flush_dcache_range().
So implement a weak flush_cache() for all the cpus to use.
In original weak flush_cache() in arch/arm/lib/cache.c, there has some code for ARM1136 & ARM926ejs. But in the arch/arm/cpu/arm1136/cpu.c and arch/arm/cpu/arm926ejs/cache.c, there implements a real flush_cache() function as well. That means the original code for ARM1136 & ARM926ejs in weak flush_cache() of arch/arm/lib/cache.c is totally useless.

Quoted 4 lines

So in this patch remove such code in flush_cache() and only call flush_dcache_range().
Signed-off-by Josh Wu <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines

Tom
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Josh Wu

author

2015-07-27 03:40 UTC #15 lore raw

PATCH v3 4/4 usb: ohci: enable cache support

In reply to Josh Wu

Remove the CONFIG_DM_USB limitation to enable cache support functions. Tested on SAMA5D3x-EK board.

Signed-off-by Josh Wu <[email protected]>

Acked-by Hans de Goede <[email protected]>

---

Changes in v3: None
Changes in v2:
- CONFIG_DM_USB in periodic_unlink() should be remove as well. This version remove it.
- Add Hans de Goede's acked-by.

 drivers/usb/host/ohci-hcd.c | 12 +-----------
 drivers/usb/host/ohci.h     |  2 +-
 2 files changed, 2 insertions(+), 12 deletions(-)

drivers/usb/host/ohci-hcd.c +1 ~~-11~~

index 691ed1c..0ffd838 100644
@@ -105,21 +105,13 @@ static struct pci_device_id ehci_pci_ids[] = {
 # define m32_swap(x) cpu_to_le32(x)
 #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
 
-#ifdef CONFIG_DM_USB
-/*
- * We really should do proper cache flushing everywhere, but for now we only
- * do it for new (driver-model) usb code to avoid regressions.
- */
+/* We really should do proper cache flushing everywhere */
 #define flush_dcache_buffer(addr, size) \
 	flush_dcache_range((unsigned long)(addr), \
 		ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
 #define invalidate_dcache_buffer(addr, size) \
 	invalidate_dcache_range((unsigned long)(addr), \
 		ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
-#else
-#define flush_dcache_buffer(addr, size)
-#define invalidate_dcache_buffer(addr, size)
-#endif
 
 /* Do not use sizeof(ed / td) as our ed / td structs contain extra members */
 #define flush_dcache_ed(addr) flush_dcache_buffer(addr, 16)

@@ -763,12 +755,10 @@ static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
 			if (((struct ed *)
 					m32_swap((unsigned long)ed_p)) == ed) {
 				*ed_p = ed->hwNextED;
-#ifdef CONFIG_DM_USB
 				aligned_ed_p = (unsigned long)ed_p;
 				aligned_ed_p &= ~(ARCH_DMA_MINALIGN - 1);
 				flush_dcache_range(aligned_ed_p,
 					aligned_ed_p + ARCH_DMA_MINALIGN);
-#endif
 				break;
 			}
 			ed_p = &(((struct ed *)

drivers/usb/host/ohci.h +1 -1

index f1526d4..9b0c4a2 100644
@@ -18,7 +18,7 @@
 # define ohci_writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
 #endif /* CONFIG_SYS_OHCI_SWAP_REG_ACCESS */
 
-#if defined CONFIG_DM_USB && ARCH_DMA_MINALIGN > 16
+#if ARCH_DMA_MINALIGN > 16
 #define ED_ALIGNMENT ARCH_DMA_MINALIGN
 #else
 #define ED_ALIGNMENT 16

Signature · 1 line

1.9.1

Tom Rini

2015-08-13 13:20 UTC #16 lore raw

PATCH v3 4/4 usb: ohci: enable cache support

Quoted 5 lines · Josh

Remove the CONFIG_DM_USB limitation to enable cache support functions. Tested on SAMA5D3x-EK board.
Signed-off-by Josh Wu <[email protected]>
Acked-by Hans de Goede <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines

Tom
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