Add support for hi6220 SoC and HiKey 96boards CE board.

PATCH New Peter Griffin 3 participants 22 messages Jul 30, 2015 – Sep 9, 2015

Subsystems (4)

Arm (32-bit) USB GPIO MMC, SD and SDIO

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Peter Griffin

author

2015-07-30 17:55 UTC #0 lore raw

v4 cover Add support for hi6220 SoC and HiKey 96boards CE board.

Hi Albert / Tom,

This series adds support for the first 96boards consumer edition HiKey board.

More information can be found about this board at the following link
https://www.96boards.org/products/hikey/.

This initial port adds support for: -
1) Serial
2) eMMC and sd card
3) USB
4) GPIO

It has been tested with Arm Trusted Firmware running u-boot as the BL33 executable.

Some instructions on exactly how to compile everything (l-loader,
with Arm Trusted Firmware, which then loads u-boot) is documented in the README found in the board/hisilicon/hikey directory.

A basic SoC datasheet can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf

Board schematic can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
96Boards-Hikey-Rev-A1.pdf

A rather pleasant side effect of rebasing to v2015.07-rc2 is that the two main bugs with the v1 series (that I new about at least) are resolved. DHCP now works correctly, and USB mass storage devices are also enumerated).

The plan is once basic support is merged to u-boot, and upstream Linux kernel has DT which supports GPIO, UART and MMC, we can migrate this u-boot port over to using DT for configuration.

Changes since v3:
- Update to use config_distro_bootcmd.h (Sjoerd)
- Remove CONFIG_BOOTDELAY (Sjoerd)

Changes since v2:
- errno.h should go above malloc.h (Simon)
- drop #ifdef CONFIG_DM_GPIO and add TODO (Simon)
- remove gd->flags = 0; (Simon)
- Remove icache_enable() (Simon / Rob)

- Added a pinmux driver for hi6220 (Simon)
- Added a pmic driver for hi6553 (Simon)
- Convert to structs for register I/O (Simon)
- Remove () around simple constants (Simon)

- Update default bootcmd (Rob)
- user kernel_addr_r etc in default env (Rob)
- Various typo's (Rob)
- use board_usb_init() to configure phy/clocks (Rob)
- Remove some more unnecessary CONFIG_FS* options (Rob)
- Update default kernel load address (Rob)
- Update default kernel cmdline (Rob)

Changes since v1:
- Rename vendor to hisilicon not 96boards (Rob)
- Get rid of aemv8a vexpress leftover (Rob)
- Remove __weak on misc_init_r (Rob)
- Remove unnecessary LINUX_BOOT_PARAM_ADDR (Rob)
- COUNTER_FREQUENCY in decimal to avoid comment (Rob)
- Remove leftover V2M* from vexpress (Rob)
- Migrate configs/hikey.h over to use config_distro_defaults.h (Rob)
- Remove custom u-boot prompt (Rob)
- Enable icache
- Remove custom delay function, as mdelay/udelay work fine (Rob)
- Update CONFIG_SYS_LOAD_ADDR to 0x80000 (Rob)

- Use suggested macro for declaring gpio addresses (Marek)
- Zap dead Macros (Marek)
- Use calloc instead of malloc (Marek)

- Reduce PHYS_RAM by 16Mb to accomodate OPTEE in latest ATF code (Peter)
- Rebase on v2015.07-rc2 (Peter)
- Add CONFIG_NET=y so that env callbacks work (Peter)

- Add a README on how to build / flash u-boot (Simon)

kind regards,

Peter.

Peter Griffin (9):
usb: dwc2: Call board_usb_init() from usb_lowlevel_init()
dm: gpio: hi6220: Add a hi6220 GPIO driver model driver.
ARM: hi6220: Add register and bitfield definition header files.
hisilicon: hi6220: Add a hi6220 pinmux driver.
pmic: pmic_hi6553: Add a driver for the hi6553 pmic found on hikey
board.
mmc: hi6220_dw_mmc: Add hi6220 glue code for dw_mmc controller.
ARM64: hikey: hi6220: Add u-boot support for the 96boards CE HiKey
board.
ARM64: hikey: Add a README for this board.
hikey: Add hikey-u-boot.mak

 arch/arm/Kconfig                                   |   8 +
 arch/arm/cpu/armv8/Makefile                        |   1 +
 arch/arm/cpu/armv8/hisilicon/Makefile              |   9 +
 arch/arm/cpu/armv8/hisilicon/pinmux.c              | 184 +++++++++
 arch/arm/include/asm/arch-hi6220/dwmmc.h           |   8 +
 arch/arm/include/asm/arch-hi6220/gpio.h            |  29 ++
 arch/arm/include/asm/arch-hi6220/hi6220.h          | 387 +++++++++++++++++++
 .../include/asm/arch-hi6220/hi6220_regs_alwayson.h | 420 +++++++++++++++++++++
 arch/arm/include/asm/arch-hi6220/periph.h          |  30 ++
 arch/arm/include/asm/arch-hi6220/pinmux.h          |  83 ++++
 board/hisilicon/hikey/Kconfig                      |  15 +
 board/hisilicon/hikey/Makefile                     |   8 +
 board/hisilicon/hikey/README                       | 160 ++++++++
 board/hisilicon/hikey/hikey.c                      | 356 +++++++++++++++++
 configs/hikey_defconfig                            |   5 +
 drivers/gpio/Makefile                              |   2 +
 drivers/gpio/hi6220_gpio.c                         |  95 +++++
 drivers/mmc/Makefile                               |   1 +
 drivers/mmc/hi6220_dw_mmc.c                        |  56 +++
 drivers/power/pmic/Makefile                        |   1 +
 drivers/power/pmic/pmic_hi6553.c                   | 133 +++++++
 drivers/usb/host/dwc2.c                            |   4 +
 hikey-u-boot.mak                                   |  33 ++
 include/configs/hikey.h                            | 159 ++++++++
 include/power/hi6553_pmic.h                        |  79 ++++
 25 files changed, 2266 insertions(+)
 create mode 100644 arch/arm/cpu/armv8/hisilicon/Makefile
 create mode 100644 arch/arm/cpu/armv8/hisilicon/pinmux.c
 create mode 100644 arch/arm/include/asm/arch-hi6220/dwmmc.h
 create mode 100644 arch/arm/include/asm/arch-hi6220/gpio.h
 create mode 100644 arch/arm/include/asm/arch-hi6220/hi6220.h
 create mode 100644 arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h
 create mode 100644 arch/arm/include/asm/arch-hi6220/periph.h
 create mode 100644 arch/arm/include/asm/arch-hi6220/pinmux.h
 create mode 100644 board/hisilicon/hikey/Kconfig
 create mode 100644 board/hisilicon/hikey/Makefile
 create mode 100644 board/hisilicon/hikey/README
 create mode 100644 board/hisilicon/hikey/hikey.c
 create mode 100644 configs/hikey_defconfig
 create mode 100644 drivers/gpio/hi6220_gpio.c
 create mode 100644 drivers/mmc/hi6220_dw_mmc.c
 create mode 100644 drivers/power/pmic/pmic_hi6553.c
 create mode 100644 hikey-u-boot.mak
 create mode 100644 include/configs/hikey.h
 create mode 100644 include/power/hi6553_pmic.h

Signature · 1 line

1.9.1

Peter Griffin

author

2015-07-30 17:55 UTC #1 lore raw

PATCH v4 1/9 usb: dwc2: Call board_usb_init() from usb_lowlevel_init()

This patch makes the dwc2 controller like ehci / ohci / xhci controllers by calling the board_usb_init() function from usb_lowlevel_init.

This can then be implemented by specific platforms to initialise their USB hardware (phys / clocks etc).

Signed-off-by Peter Griffin <[email protected]>

---
 drivers/usb/host/dwc2.c | 4 ++++
 1 file changed, 4 insertions(+)

drivers/usb/host/dwc2.c +4 -0

index eee60a2..ad35841 100644
@@ -929,6 +929,10 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
 
 	root_hub_devnum = 0;
 
+	/*  board dependant init */
+	if (board_usb_init(index, USB_INIT_HOST))
+		return -1;
+
 	snpsid = readl(&regs->gsnpsid);
 	printf("Core Release: %x.%03x\n", snpsid >> 12 & 0xf, snpsid & 0xfff);

Signature · 1 line

1.9.1

Tom Rini

2015-08-13 12:13 UTC #2 lore raw

PATCH v4 1/9 usb: dwc2: Call board_usb_init() from usb_lowlevel_init()

Quoted 7 lines · Peter Griffin

This patch makes the dwc2 controller like ehci / ohci / xhci controllers by calling the board_usb_init() function from usb_lowlevel_init.
This can then be implemented by specific platforms to initialise their USB hardware (phys / clocks etc).
Signed-off-by Peter Griffin <[email protected]>

This change as been done now by another patch, dropping. Thanks!

Signature · 8 lines

Tom
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Peter Griffin

author

2015-07-30 17:55 UTC #3 lore raw

PATCH v4 2/9 dm: gpio: hi6220: Add a hi6220 GPIO driver model driver.

In reply to Peter Griffin

This patch adds support for the GPIO perif found on hi6220 SoC.

Signed-off-by Peter Griffin <[email protected]>

---
 arch/arm/include/asm/arch-hi6220/gpio.h | 29 ++++++++++
 drivers/gpio/Makefile                   |  2 +
 drivers/gpio/hi6220_gpio.c              | 95 +++++++++++++++++++++++++++++++++
 3 files changed, 126 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-hi6220/gpio.h
 create mode 100644 drivers/gpio/hi6220_gpio.c

arch/arm/include/asm/arch-hi6220/gpio.h new file +29 -0

new file mode 100644
index 0000000..98122a2
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2015 Linaro
+ * Peter Griffin <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _HI6220_GPIO_H_
+#define _HI6220_GPIO_H_
+
+#define HI6220_GPIO_BASE(bank)	(((bank < 4) ? 0xf8011000 : \
+				0xf7020000 - 0x4000) + (0x1000 * bank))
+
+#define BIT(x)			(1 << (x))
+
+#define HI6220_GPIO_PER_BANK	8
+#define HI6220_GPIO_DIR		0x400
+
+struct gpio_bank {
+	u8 *base;	/* address of registers in physical memory */
+};
+
+/* Information about a GPIO bank */
+struct hikey_gpio_platdata {
+	int bank_index;
+	unsigned int base;     /* address of registers in physical memory */
+};
+
+#endif /* _HI6220_GPIO_H_ */

drivers/gpio/Makefile +2 -0

index 5864850..b470bab 100644
@@ -46,3 +46,5 @@ obj-$(CONFIG_LPC32XX_GPIO)	+= lpc32xx_gpio.o
 obj-$(CONFIG_STM32_GPIO)	+= stm32_gpio.o
 obj-$(CONFIG_ZYNQ_GPIO)		+= zynq_gpio.o
 obj-$(CONFIG_VYBRID_GPIO)	+= vybrid_gpio.o
+obj-$(CONFIG_HIKEY_GPIO)	+= hi6220_gpio.o
+

drivers/gpio/hi6220_gpio.c new file +95 -0

95 lines not on this page · raw message

Signature · 1 line

1.9.1

Tom Rini

2015-08-13 13:21 UTC #4 lore raw

PATCH v4 2/9 dm: gpio: hi6220: Add a hi6220 GPIO driver model driver.

Quoted 4 lines · Peter Griffin

This patch adds support for the GPIO perif found on hi6220 SoC.
Signed-off-by Peter Griffin <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines

Tom
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Peter Griffin

author

2015-07-30 17:55 UTC #5 lore raw

PATCH v4 3/9 ARM: hi6220: Add register and bitfield definition header files.

In reply to Peter Griffin

This patch adds the header files which will be used in the subsquent board / drivers to enable support for hi6220 hikey board.

Signed-off-by Peter Griffin <[email protected]>

---
 arch/arm/include/asm/arch-hi6220/hi6220.h          | 387 +++++++++++++++++++
 .../include/asm/arch-hi6220/hi6220_regs_alwayson.h | 420 +++++++++++++++++++++
 2 files changed, 807 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-hi6220/hi6220.h
 create mode 100644 arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h

arch/arm/include/asm/arch-hi6220/hi6220.h new file +387 -0

new file mode 100644
index 0000000..4b987c2
@@ -0,0 +1,387 @@
+/*
+ * (C) Copyright 2015 Linaro
+ * Peter Griffin <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __HI6220_H__
+#define __HI6220_H__
+
+#include "hi6220_regs_alwayson.h"
+
+#define HI6220_MMC0_BASE			0xF723D000
+#define HI6220_MMC1_BASE			0xF723E000
+
+#define HI6220_PMUSSI_BASE			0xF8000000
+
+#define HI6220_PERI_BASE			0xF7030000
+
+struct peri_sc_periph_regs {
+	u32 ctrl1;		/*0x0*/
+	u32 ctrl2;
+	u32 ctrl3;
+	u32 ctrl4;
+	u32 ctrl5;
+	u32 ctrl6;
+	u32 ctrl8;
+	u32 ctrl9;
+	u32 ctrl10;
+	u32 ctrl12;
+	u32 ctrl13;
+	u32 ctrl14;
+
+	u32 unknown_1[8];
+
+	u32 ddr_ctrl0;		/*0x50*/
+
+	u32 unknown_2[16];
+
+	u32 stat1;		/*0x94*/
+
+	u32 unknown_3[90];
+
+	u32 clk0_en;		/*0x200*/
+	u32 clk0_dis;
+	u32 clk0_stat;
+
+	u32 unknown_4;
+
+	u32 clk1_en;		/*0x210*/
+	u32 clk1_dis;
+	u32 clk1_stat;
+
+	u32 unknown_5;
+
+	u32 clk2_en;		/*0x220*/
+	u32 clk2_dis;
+	u32 clk2_stat;
+
+	u32 unknown_6;
+
+	u32 clk3_en;		/*0x230*/
+	u32 clk3_dis;
+	u32 clk3_stat;
+
+	u32 unknown_7;
+
+	u32 clk8_en;		/*0x240*/
+	u32 clk8_dis;
+	u32 clk8_stat;
+
+	u32 unknown_8;
+
+	u32 clk9_en;		/*0x250*/
+	u32 clk9_dis;
+	u32 clk9_stat;
+
+	u32 unknown_9;
+
+	u32 clk10_en;		/*0x260*/
+	u32 clk10_dis;
+	u32 clk10_stat;
+
+	u32 unknown_10;
+
+	u32 clk12_en;		/*0x270*/
+	u32 clk12_dis;
+	u32 clk12_stat;
+
+	u32 unknown_11[33];
+
+	u32 rst0_en;		/*0x300*/
+	u32 rst0_dis;
+	u32 rst0_stat;
+
+	u32 unknown_12;
+
+	u32 rst1_en;		/*0x310*/
+	u32 rst1_dis;
+	u32 rst1_stat;
+
+	u32 unknown_13;
+
+	u32 rst2_en;		/*0x320*/
+	u32 rst2_dis;
+	u32 rst2_stat;
+
+	u32 unknown_14;
+
+	u32 rst3_en;		/*0x330*/
+	u32 rst3_dis;
+	u32 rst3_stat;
+
+	u32 unknown_15;
+
+	u32 rst8_en;		/*0x340*/
+	u32 rst8_dis;
+	u32 rst8_stat;
+
+	u32 unknown_16[45];
+
+	u32 clk0_sel;		/*0x400*/
+
+	u32 unknown_17[36];
+
+	u32 clkcfg8bit1;	/*0x494*/
+	u32 clkcfg8bit2;
+
+	u32 unknown_18[538];
+
+	u32 reserved8_addr;	/*0xd04*/
+};
+
+
+/* CTRL1 bit definitions */
+
+#define PERI_CTRL1_ETR_AXI_CSYSREQ_N			(1 << 0)
+#define PERI_CTRL1_HIFI_INT_MASK			(1 << 1)
+#define PERI_CTRL1_HIFI_ALL_INT_MASK			(1 << 2)
+#define PERI_CTRL1_ETR_AXI_CSYSREQ_N_MSK		(1 << 16)
+#define PERI_CTRL1_HIFI_INT_MASK_MSK			(1 << 17)
+#define PERI_CTRL1_HIFI_ALL_INT_MASK_MSK		(1 << 18)
+
+
+/* CTRL2 bit definitions */
+
+#define PERI_CTRL2_MMC_CLK_PHASE_BYPASS_EN_MMC0		(1 << 0)
+#define PERI_CTRL2_MMC_CLK_PHASE_BYPASS_EN_MMC1		(1 << 2)
+#define PERI_CTRL2_NAND_SYS_MEM_SEL			(1 << 6)
+#define PERI_CTRL2_G3D_DDRT_AXI_SEL			(1 << 7)
+#define PERI_CTRL2_GU_MDM_BBP_TESTPIN_SEL		(1 << 8)
+#define PERI_CTRL2_CODEC_SSI_MASTER_CHECK		(1 << 9)
+#define PERI_CTRL2_FUNC_TEST_SOFT			(1 << 12)
+#define PERI_CTRL2_CSSYS_TS_ENABLE			(1 << 15)
+#define PERI_CTRL2_HIFI_RAMCTRL_S_EMA			(1 << 16)
+#define PERI_CTRL2_HIFI_RAMCTRL_S_EMAW			(1 << 20)
+#define PERI_CTRL2_HIFI_RAMCTRL_S_EMAS			(1 << 22)
+#define PERI_CTRL2_HIFI_RAMCTRL_S_RET1N			(1 << 26)
+#define PERI_CTRL2_HIFI_RAMCTRL_S_RET2N			(1 << 27)
+#define PERI_CTRL2_HIFI_RAMCTRL_S_PGEN			(1 << 28)
+
+/* CTRL3 bit definitions */
+
+#define PERI_CTRL3_HIFI_DDR_HARQMEM_ADDR		(1 << 0)
+#define PERI_CTRL3_HIFI_HARQMEMRMP_EN			(1 << 12)
+#define PERI_CTRL3_HARQMEM_SYS_MED_SEL			(1 << 13)
+#define PERI_CTRL3_SOC_AP_OCCUPY_GRP1			(1 << 14)
+#define PERI_CTRL3_SOC_AP_OCCUPY_GRP2			(1 << 16)
+#define PERI_CTRL3_SOC_AP_OCCUPY_GRP3			(1 << 18)
+#define PERI_CTRL3_SOC_AP_OCCUPY_GRP4			(1 << 20)
+#define PERI_CTRL3_SOC_AP_OCCUPY_GRP5			(1 << 22)
+#define PERI_CTRL3_SOC_AP_OCCUPY_GRP6			(1 << 24)
+
+/* CTRL4 bit definitions */
+
+#define PERI_CTRL4_PICO_FSELV				(1 << 0)
+#define PERI_CTRL4_FPGA_EXT_PHY_SEL			(1 << 3)
+#define PERI_CTRL4_PICO_REFCLKSEL			(1 << 4)
+#define PERI_CTRL4_PICO_SIDDQ				(1 << 6)
+#define PERI_CTRL4_PICO_SUSPENDM_SLEEPM			(1 << 7)
+#define PERI_CTRL4_PICO_OGDISABLE			(1 << 8)
+#define PERI_CTRL4_PICO_COMMONONN			(1 << 9)
+#define PERI_CTRL4_PICO_VBUSVLDEXT			(1 << 10)
+#define PERI_CTRL4_PICO_VBUSVLDEXTSEL			(1 << 11)
+#define PERI_CTRL4_PICO_VATESTENB			(1 << 12)
+#define PERI_CTRL4_PICO_SUSPENDM			(1 << 14)
+#define PERI_CTRL4_PICO_SLEEPM				(1 << 15)
+#define PERI_CTRL4_BC11_C				(1 << 16)
+#define PERI_CTRL4_BC11_B				(1 << 17)
+#define PERI_CTRL4_BC11_A				(1 << 18)
+#define PERI_CTRL4_BC11_GND				(1 << 19)
+#define PERI_CTRL4_BC11_FLOAT				(1 << 20)
+#define PERI_CTRL4_OTG_PHY_SEL				(1 << 21)
+#define PERI_CTRL4_USB_OTG_SS_SCALEDOWN_MODE		(1 << 22)
+#define PERI_CTRL4_OTG_DM_PULLDOWN			(1 << 24)
+#define PERI_CTRL4_OTG_DP_PULLDOWN			(1 << 25)
+#define PERI_CTRL4_OTG_IDPULLUP				(1 << 26)
+#define PERI_CTRL4_OTG_DRVBUS				(1 << 27)
+#define PERI_CTRL4_OTG_SESSEND				(1 << 28)
+#define PERI_CTRL4_OTG_BVALID				(1 << 29)
+#define PERI_CTRL4_OTG_AVALID				(1 << 30)
+#define PERI_CTRL4_OTG_VBUSVALID			(1 << 31)
+
+/* CTRL5 bit definitions */
+
+#define PERI_CTRL5_USBOTG_RES_SEL			(1 << 3)
+#define PERI_CTRL5_PICOPHY_ACAENB			(1 << 4)
+#define PERI_CTRL5_PICOPHY_BC_MODE			(1 << 5)
+#define PERI_CTRL5_PICOPHY_CHRGSEL			(1 << 6)
+#define PERI_CTRL5_PICOPHY_VDATSRCEND			(1 << 7)
+#define PERI_CTRL5_PICOPHY_VDATDETENB			(1 << 8)
+#define PERI_CTRL5_PICOPHY_DCDENB			(1 << 9)
+#define PERI_CTRL5_PICOPHY_IDDIG			(1 << 10)
+#define PERI_CTRL5_DBG_MUX				(1 << 11)
+
+/* CTRL6 bit definitions */
+
+#define PERI_CTRL6_CSSYSOFF_RAMCTRL_S_EMA		(1 << 0)
+#define PERI_CTRL6_CSSYSOFF_RAMCTRL_S_EMAW		(1 << 4)
+#define PERI_CTRL6_CSSYSOFF_RAMCTRL_S_EMAS		(1 << 6)
+#define PERI_CTRL6_CSSYSOFF_RAMCTRL_S_RET1N		(1 << 10)
+#define PERI_CTRL6_CSSYSOFF_RAMCTRL_S_RET2N		(1 << 11)
+#define PERI_CTRL6_CSSYSOFF_RAMCTRL_S_PGEN		(1 << 12)
+
+/* CTRL8 bit definitions */
+
+#define PERI_CTRL8_PICOPHY_TXRISETUNE0			(1 << 0)
+#define PERI_CTRL8_PICOPHY_TXPREEMPAMPTUNE0		(1 << 2)
+#define PERI_CTRL8_PICOPHY_TXRESTUNE0			(1 << 4)
+#define PERI_CTRL8_PICOPHY_TXHSSVTUNE0			(1 << 6)
+#define PERI_CTRL8_PICOPHY_COMPDISTUNE0			(1 << 8)
+#define PERI_CTRL8_PICOPHY_TXPREEMPPULSETUNE0		(1 << 11)
+#define PERI_CTRL8_PICOPHY_OTGTUNE0			(1 << 12)
+#define PERI_CTRL8_PICOPHY_SQRXTUNE0			(1 << 16)
+#define PERI_CTRL8_PICOPHY_TXVREFTUNE0			(1 << 20)
+#define PERI_CTRL8_PICOPHY_TXFSLSTUNE0			(1 << 28)
+
+/* CTRL9 bit definitions */
+
+#define PERI_CTRL9_PICOPLY_TESTCLKEN			(1 << 0)
+#define PERI_CTRL9_PICOPLY_TESTDATAOUTSEL		(1 << 1)
+#define PERI_CTRL9_PICOPLY_TESTADDR			(1 << 4)
+#define PERI_CTRL9_PICOPLY_TESTDATAIN			(1 << 8)
+
+/* CLK0 EN/DIS/STAT bit definitions */
+
+#define PERI_CLK0_MMC0					(1 << 0)
+#define PERI_CLK0_MMC1					(1 << 1)
+#define PERI_CLK0_MMC2					(1 << 2)
+#define PERI_CLK0_NANDC					(1 << 3)
+#define PERI_CLK0_USBOTG				(1 << 4)
+#define PERI_CLK0_PICOPHY				(1 << 5)
+#define PERI_CLK0_PLL					(1 << 6)
+
+/* CLK1 EN/DIS/STAT bit definitions */
+
+#define PERI_CLK1_HIFI					(1 << 0)
+#define PERI_CLK1_DIGACODEC				(1 << 5)
+
+/* CLK2 EN/DIS/STAT bit definitions */
+
+#define PERI_CLK2_IPF					(1 << 0)
+#define PERI_CLK2_SOCP					(1 << 1)
+#define PERI_CLK2_DMAC					(1 << 2)
+#define PERI_CLK2_SECENG				(1 << 3)
+#define PERI_CLK2_HPM0					(1 << 5)
+#define PERI_CLK2_HPM1					(1 << 6)
+#define PERI_CLK2_HPM2					(1 << 7)
+#define PERI_CLK2_HPM3					(1 << 8)
+
+/* CLK8 EN/DIS/STAT bit definitions */
+
+#define PERI_CLK8_RS0					(1 << 0)
+#define PERI_CLK8_RS2					(1 << 1)
+#define PERI_CLK8_RS3					(1 << 2)
+#define PERI_CLK8_MS0					(1 << 3)
+#define PERI_CLK8_MS2					(1 << 5)
+#define PERI_CLK8_XG2RAM0				(1 << 6)
+#define PERI_CLK8_X2SRAM				(1 << 7)
+#define PERI_CLK8_SRAM					(1 << 8)
+#define PERI_CLK8_ROM					(1 << 9)
+#define PERI_CLK8_HARQ					(1 << 10)
+#define PERI_CLK8_MMU					(1 << 11)
+#define PERI_CLK8_DDRC					(1 << 12)
+#define PERI_CLK8_DDRPHY				(1 << 13)
+#define PERI_CLK8_DDRPHY_REF				(1 << 14)
+#define PERI_CLK8_X2X_SYSNOC				(1 << 15)
+#define PERI_CLK8_X2X_CCPU				(1 << 16)
+#define PERI_CLK8_DDRT					(1 << 17)
+#define PERI_CLK8_DDRPACK_RS				(1 << 18)
+
+/* CLK9 EN/DIS/STAT bit definitions */
+
+#define PERI_CLK9_CARM_DAP				(1 << 0)
+#define PERI_CLK9_CARM_ATB				(1 << 1)
+#define PERI_CLK9_CARM_LBUS				(1 << 2)
+#define PERI_CLK9_CARM_KERNEL				(1 << 3)
+
+/* CLK10 EN/DIS/STAT bit definitions */
+
+#define PERI_CLK10_IPF_CCPU				(1 << 0)
+#define PERI_CLK10_SOCP_CCPU				(1 << 1)
+#define PERI_CLK10_SECENG_CCPU				(1 << 2)
+#define PERI_CLK10_HARQ_CCPU				(1 << 3)
+#define PERI_CLK10_IPF_MCU				(1 << 16)
+#define PERI_CLK10_SOCP_MCU				(1 << 17)
+#define PERI_CLK10_SECENG_MCU				(1 << 18)
+#define PERI_CLK10_HARQ_MCU				(1 << 19)
+
+/* CLK12 EN/DIS/STAT bit definitions */
+
+#define PERI_CLK12_HIFI_SRC				(1 << 0)
+#define PERI_CLK12_MMC0_SRC				(1 << 1)
+#define PERI_CLK12_MMC1_SRC				(1 << 2)
+#define PERI_CLK12_MMC2_SRC				(1 << 3)
+#define PERI_CLK12_SYSPLL_DIV				(1 << 4)
+#define PERI_CLK12_TPIU_SRC				(1 << 5)
+#define PERI_CLK12_MMC0_HF				(1 << 6)
+#define PERI_CLK12_MMC1_HF				(1 << 7)
+#define PERI_CLK12_PLL_TEST_SRC				(1 << 8)
+#define PERI_CLK12_CODEC_SOC				(1 << 9)
+#define PERI_CLK12_MEDIA				(1 << 10)
+
+/* RST0 EN/DIS/STAT bit definitions */
+
+#define PERI_RST0_MMC0					(1 << 0)
+#define PERI_RST0_MMC1					(1 << 1)
+#define PERI_RST0_MMC2					(1 << 2)
+#define PERI_RST0_NANDC					(1 << 3)
+#define PERI_RST0_USBOTG_BUS				(1 << 4)
+#define PERI_RST0_POR_PICOPHY				(1 << 5)
+#define PERI_RST0_USBOTG				(1 << 6)
+#define PERI_RST0_USBOTG_32K				(1 << 7)
+
+/* RST1 EN/DIS/STAT bit definitions */
+
+#define PERI_RST1_HIFI					(1 << 0)
+#define PERI_RST1_DIGACODEC				(1 << 5)
+
+/* RST2 EN/DIS/STAT bit definitions */
+
+#define PERI_RST2_IPF					(1 << 0)
+#define PERI_RST2_SOCP					(1 << 1)
+#define PERI_RST2_DMAC					(1 << 2)
+#define PERI_RST2_SECENG				(1 << 3)
+#define PERI_RST2_ABB					(1 << 4)
+#define PERI_RST2_HPM0					(1 << 5)
+#define PERI_RST2_HPM1					(1 << 6)
+#define PERI_RST2_HPM2					(1 << 7)
+#define PERI_RST2_HPM3					(1 << 8)
+
+/* RST3 EN/DIS/STAT bit definitions */
+
+#define PERI_RST3_CSSYS					(1 << 0)
+#define PERI_RST3_I2C0					(1 << 1)
+#define PERI_RST3_I2C1					(1 << 2)
+#define PERI_RST3_I2C2					(1 << 3)
+#define PERI_RST3_I2C3					(1 << 4)
+#define PERI_RST3_UART1					(1 << 5)
+#define PERI_RST3_UART2					(1 << 6)
+#define PERI_RST3_UART3					(1 << 7)
+#define PERI_RST3_UART4					(1 << 8)
+#define PERI_RST3_SSP					(1 << 9)
+#define PERI_RST3_PWM					(1 << 10)
+#define PERI_RST3_BLPWM					(1 << 11)
+#define PERI_RST3_TSENSOR				(1 << 12)
+#define PERI_RST3_DAPB					(1 << 18)
+#define PERI_RST3_HKADC					(1 << 19)
+#define PERI_RST3_CODEC					(1 << 20)
+
+/* RST8 EN/DIS/STAT bit definitions */
+
+#define PERI_RST8_RS0					(1 << 0)
+#define PERI_RST8_RS2					(1 << 1)
+#define PERI_RST8_RS3					(1 << 2)
+#define PERI_RST8_MS0					(1 << 3)
+#define PERI_RST8_MS2					(1 << 5)
+#define PERI_RST8_XG2RAM0				(1 << 6)
+#define PERI_RST8_X2SRAM_TZMA				(1 << 7)
+#define PERI_RST8_SRAM					(1 << 8)
+#define PERI_RST8_HARQ					(1 << 10)
+#define PERI_RST8_DDRC					(1 << 12)
+#define PERI_RST8_DDRC_APB				(1 << 13)
+#define PERI_RST8_DDRPACK_APB				(1 << 14)
+#define PERI_RST8_DDRT					(1 << 17)
+
+#endif /*__HI62220_H__*/

arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h new file +420 -0

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Signature · 1 line

1.9.1

Tom Rini

2015-08-13 13:21 UTC #6 lore raw

PATCH v4 3/9 ARM: hi6220: Add register and bitfield definition header files.

Quoted 4 lines · Peter Griffin

This patch adds the header files which will be used in the subsquent board / drivers to enable support for hi6220 hikey board.
Signed-off-by Peter Griffin <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines

Tom
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Peter Griffin

author

2015-07-30 17:55 UTC #7 lore raw

PATCH v4 4/9 hisilicon: hi6220: Add a hi6220 pinmux driver.

In reply to Peter Griffin

This patch adds basic pinmux support for the hi6220 SoC, which is found on the hikey board.

Signed-off-by Peter Griffin <[email protected]>

---
 arch/arm/cpu/armv8/Makefile               |   1 +
 arch/arm/cpu/armv8/hisilicon/Makefile     |   9 ++
 arch/arm/cpu/armv8/hisilicon/pinmux.c     | 184 ++++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-hi6220/periph.h |  30 +++++
 arch/arm/include/asm/arch-hi6220/pinmux.h |  83 ++++++++++++++
 5 files changed, 307 insertions(+)
 create mode 100644 arch/arm/cpu/armv8/hisilicon/Makefile
 create mode 100644 arch/arm/cpu/armv8/hisilicon/pinmux.c
 create mode 100644 arch/arm/include/asm/arch-hi6220/periph.h
 create mode 100644 arch/arm/include/asm/arch-hi6220/pinmux.h

arch/arm/cpu/armv8/Makefile +1 -0

index dee5e25..c90e018 100644
@@ -17,3 +17,4 @@ obj-y	+= transition.o
 
 obj-$(CONFIG_FSL_LSCH3) += fsl-lsch3/
 obj-$(CONFIG_TARGET_XILINX_ZYNQMP) += zynqmp/
+obj-$(CONFIG_TARGET_HIKEY) += hisilicon/

arch/arm/cpu/armv8/hisilicon/Makefile new file +9 -0

new file mode 100644
index 0000000..552dbcf
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2015 Linaro
+# Peter Griffin <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	+= pinmux.o
+

arch/arm/cpu/armv8/hisilicon/pinmux.c new file +184 -0

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arch/arm/include/asm/arch-hi6220/periph.h new file +30 -0

new file mode 100644
index 0000000..7155f60
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2015 Linaro
+ * Peter Griffin <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ASM_ARM_ARCH_PERIPH_H
+#define __ASM_ARM_ARCH_PERIPH_H
+
+/*
+ * Peripherals required for pinmux configuration. List will
+ * grow with support for more devices getting added.
+ * Numbering based on interrupt table.
+ *
+ */
+enum periph_id {
+	PERIPH_ID_UART0 = 36,
+	PERIPH_ID_UART1,
+	PERIPH_ID_UART2,
+	PERIPH_ID_UART3,
+	PERIPH_ID_UART4,
+	PERIPH_ID_UART5,
+	PERIPH_ID_SDMMC0 = 72,
+	PERIPH_ID_SDMMC1,
+
+	PERIPH_ID_NONE = -1,
+};
+
+#endif /* __ASM_ARM_ARCH_PERIPH_H */

arch/arm/include/asm/arch-hi6220/pinmux.h new file +83 -0

83 lines not on this page · raw message

Signature · 1 line

1.9.1

Tom Rini

2015-08-13 13:21 UTC #8 lore raw

PATCH v4 4/9 hisilicon: hi6220: Add a hi6220 pinmux driver.

Quoted 4 lines · Peter Griffin

This patch adds basic pinmux support for the hi6220 SoC, which is found on the hikey board.
Signed-off-by Peter Griffin <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines

Tom
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Peter Griffin

author

2015-07-30 17:55 UTC #9 lore raw

PATCH v4 5/9 pmic: pmic_hi6553: Add a driver for the hi6553 pmic found on hikey board.

In reply to Peter Griffin

This adds a simple pmic driver for the hi6553 pmic which is used in conjunction with the hi6220 SoC on the hikey board. Eventually this driver will be updated to be a proper UCLASS PMIC driver which can parse the voltages direct from device tree.

Signed-off-by Peter Griffin <[email protected]>

---
 drivers/power/pmic/Makefile      |   1 +
 drivers/power/pmic/pmic_hi6553.c | 133 +++++++++++++++++++++++++++++++++++++++
 include/power/hi6553_pmic.h      |  79 +++++++++++++++++++++++
 3 files changed, 213 insertions(+)
 create mode 100644 drivers/power/pmic/pmic_hi6553.c
 create mode 100644 include/power/hi6553_pmic.h

drivers/power/pmic/Makefile +1 -0

index ae86f04..21e9535 100644
@@ -20,3 +20,4 @@ obj-$(CONFIG_POWER_TPS65217) += pmic_tps65217.o
 obj-$(CONFIG_POWER_TPS65218) += pmic_tps62362.o
 obj-$(CONFIG_POWER_TPS65218) += pmic_tps65218.o
 obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o
+obj-$(CONFIG_POWER_HI6553) += pmic_hi6553.o

drivers/power/pmic/pmic_hi6553.c new file +133 -0

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include/power/hi6553_pmic.h new file +79 -0

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Signature · 1 line

1.9.1

Tom Rini

2015-08-13 13:22 UTC #10 lore raw

PATCH v4 5/9 pmic: pmic_hi6553: Add a driver for the hi6553 pmic found on hikey board.

Quoted 6 lines · Peter Griffin

This adds a simple pmic driver for the hi6553 pmic which is used in conjunction with the hi6220 SoC on the hikey board. Eventually this driver will be updated to be a proper UCLASS PMIC driver which can parse the voltages direct from device tree.
Signed-off-by Peter Griffin <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines

Tom
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Peter Griffin

author

2015-07-30 17:55 UTC #11 lore raw

PATCH v4 6/9 mmc: hi6220_dw_mmc: Add hi6220 glue code for dw_mmc controller.

In reply to Peter Griffin

This patch adds the glue code for hi6220 SoC which has 2x synopsis dw_mmc controllers. This will be used by the hikey board support in subsequent patches.

Signed-off-by Peter Griffin <[email protected]>

Reviewed-by Simon Glass <[email protected]>

---
 arch/arm/include/asm/arch-hi6220/dwmmc.h |  8 +++++
 drivers/mmc/Makefile                     |  1 +
 drivers/mmc/hi6220_dw_mmc.c              | 56 ++++++++++++++++++++++++++++++++
 3 files changed, 65 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-hi6220/dwmmc.h
 create mode 100644 drivers/mmc/hi6220_dw_mmc.c

arch/arm/include/asm/arch-hi6220/dwmmc.h new file +8 -0

new file mode 100644
index 0000000..c747383
@@ -0,0 +1,8 @@
+/*
+ * (C) Copyright 2015 Linaro
+ * Peter Griffin <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width);

drivers/mmc/Makefile +1 -0

index ed73687..81a1a8f 100644
@@ -11,6 +11,7 @@ obj-$(CONFIG_BFIN_SDH) += bfin_sdh.o
 obj-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o
 obj-$(CONFIG_DWMMC) += dw_mmc.o
 obj-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o
+obj-$(CONFIG_HIKEY_DWMMC) += hi6220_dw_mmc.o
 obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
 obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o
 obj-$(CONFIG_FTSDC021) += ftsdc021_sdhci.o

drivers/mmc/hi6220_dw_mmc.c new file +56 -0

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Signature · 1 line

1.9.1

Tom Rini

2015-08-13 13:22 UTC #12 lore raw

PATCH v4 6/9 mmc: hi6220_dw_mmc: Add hi6220 glue code for dw_mmc controller.

Quoted 6 lines · Peter Griffin

This patch adds the glue code for hi6220 SoC which has 2x synopsis dw_mmc controllers. This will be used by the hikey board support in subsequent patches.
Signed-off-by Peter Griffin <[email protected]>
Reviewed-by Simon Glass <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines

Tom
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Peter Griffin

author

2015-07-30 17:55 UTC #13 lore raw

PATCH v4 7/9 ARM64: hikey: hi6220: Add u-boot support for the 96boards CE HiKey board.

In reply to Peter Griffin

HiKey is the first 96boards consumer edition compliant board. It features a hi6220 SoC which has eight ARM A53 cpu's.

This initial port adds support for: -
1) Serial
2) eMMC / SD card
3) USB
4) GPIO

It has been tested with Arm Trusted Firmware running u-boot as the BL33 executable.

Notes:

eMMC has been tested with basic reading of eMMC partition into DDR. I have not tested writing / erasing. Due to lack of clock control it won't be running in the most performant high speed mode.

SD card slot has been tested for reading and booting kernels into DDR. It is also currently configured to save the u-boot environment to the SD card.

USB has been tested with ASIX networking adapter to tftpboot kernels into DDR. On v2015.07-rc2 dhcp now works, and also USB mass storage are correctly enumerated.

GPIO has been tested using gpio toggle GPIO4_1-3 to flash the LEDs.

Basic SoC datasheet can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf

Board schematic can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
96Boards-Hikey-Rev-A1.pdf

Signed-off-by Peter Griffin <[email protected]>

---
 arch/arm/Kconfig               |   8 +
 board/hisilicon/hikey/Kconfig  |  15 ++
 board/hisilicon/hikey/Makefile |   8 +
 board/hisilicon/hikey/hikey.c  | 356 +++++++++++++++++++++++++++++++++++++++++
 configs/hikey_defconfig        |   5 +
 include/configs/hikey.h        | 159 ++++++++++++++++++
 6 files changed, 551 insertions(+)
 create mode 100644 board/hisilicon/hikey/Kconfig
 create mode 100644 board/hisilicon/hikey/Makefile
 create mode 100644 board/hisilicon/hikey/hikey.c
 create mode 100644 configs/hikey_defconfig
 create mode 100644 include/configs/hikey.h

arch/arm/Kconfig +8 -0

index 9908b43..767f0d8 100644
@@ -735,6 +735,13 @@ config TARGET_LS2085ARDB
 	  development platform that supports the QorIQ LS2085A
 	  Layerscape Architecture processor.
 
+config TARGET_HIKEY
+	bool "Support HiKey 96boards Consumer Edition Platform"
+	select ARM64
+	  help
+	  Support for HiKey 96boards platform. It features a HI6220
+	  SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
+
 config TARGET_LS1021AQDS
 	bool "Support ls1021aqds"
 	select CPU_V7

@@ -880,6 +887,7 @@ source "board/Marvell/gplugd/Kconfig"
 source "board/armadeus/apf27/Kconfig"
 source "board/armltd/vexpress/Kconfig"
 source "board/armltd/vexpress64/Kconfig"
+source "board/hisilicon/hikey/Kconfig"
 source "board/bachmann/ot1200/Kconfig"
 source "board/balloon3/Kconfig"
 source "board/barco/platinum/Kconfig"

board/hisilicon/hikey/Kconfig new file +15 -0

new file mode 100644
index 0000000..f7f1055
@@ -0,0 +1,15 @@
+if TARGET_HIKEY
+
+config SYS_BOARD
+	default "hikey"
+
+config SYS_VENDOR
+	default "hisilicon"
+
+config SYS_SOC
+	default "hi6220"
+
+config SYS_CONFIG_NAME
+	default "hikey"
+
+endif

board/hisilicon/hikey/Makefile new file +8 -0

new file mode 100644
index 0000000..d4ec8c7
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= hikey.o

board/hisilicon/hikey/hikey.c new file +356 -0

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configs/hikey_defconfig new file +5 -0

new file mode 100644
index 0000000..aa4fb0d
@@ -0,0 +1,5 @@
+# 96boards HiKey
+CONFIG_ARM=y
+CONFIG_TARGET_HIKEY=y
+CONFIG_NET=y
+# CONFIG_CMD_IMLS is not set

include/configs/hikey.h new file +159 -0

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Signature · 1 line

1.9.1

Tom Rini

2015-08-13 13:22 UTC #14 lore raw

PATCH v4 7/9 ARM64: hikey: hi6220: Add u-boot support for the 96boards CE HiKey board.

Quoted 31 lines · Peter Griffin

HiKey is the first 96boards consumer edition compliant board. It features a hi6220 SoC which has eight ARM A53 cpu's.
This initial port adds support for: -
1) Serial
2) eMMC / SD card
3) USB
4) GPIO
It has been tested with Arm Trusted Firmware running u-boot as the BL33 executable.
Notes:
eMMC has been tested with basic reading of eMMC partition into DDR. I have not tested writing / erasing. Due to lack of clock control it won't be running in the most performant high speed mode.
SD card slot has been tested for reading and booting kernels into DDR. It is also currently configured to save the u-boot environment to the SD card.
USB has been tested with ASIX networking adapter to tftpboot kernels into DDR. On v2015.07-rc2 dhcp now works, and also USB mass storage are correctly enumerated.
GPIO has been tested using gpio toggle GPIO4_1-3 to flash the LEDs.
Basic SoC datasheet can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf

Quoted 5 lines

Board schematic can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
96Boards-Hikey-Rev-A1.pdf
Signed-off-by Peter Griffin <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines

Tom
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Peter Griffin

author

2015-07-30 17:55 UTC #15 lore raw

PATCH v4 8/9 ARM64: hikey: Add a README for this board.

In reply to Peter Griffin

To help others with compiling and flashing ATF and u-boot add a README for this board.

Signed-off-by Peter Griffin <[email protected]>

---
 board/hisilicon/hikey/README | 160 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 160 insertions(+)
 create mode 100644 board/hisilicon/hikey/README

board/hisilicon/hikey/README new file +160 -0

new file mode 100644
index 0000000..25c8143
@@ -0,0 +1,160 @@
+Introduction
+============
+
+HiKey is the first certified 96Boards Consumer Edition board. The board/SoC has: -
+* HiSilicon Kirin 6220 eight-core ARM Cortex-A53 64-bit SoC running at 1.2GHz.
+* ARM Mali 450-MP4 GPU
+* 1GB 800MHz LPDDR3 DRAM
+* 4GB eMMC Flash Storage
+* microSD
+* 802.11a/b/g/n WiFi, Bluetooth
+
+The HiKey schematic can be found here: -
+https://github.com/96boards/documentation/blob/master/hikey/96Boards-Hikey-Rev-A1.pdf
+
+A SoC datasheet can be found here: -
+https://github.com/96boards/documentation/blob/master/hikey/
+Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf
+
+Currently the u-boot port supports: -
+* USB
+* eMMC
+* SD card
+* GPIO
+
+Compile u-boot
+==============
+
+make CROSS_COMPILE=aarch64-linux-gnu- hikey_config
+make CROSS_COMPILE=aarch64-linux-gnu-
+
+ARM Trusted Firmware (ATF) & l-loader
+=====================================
+
+This u-boot port has been tested with l-loader, booting ATF, which then boots
+u-boot as the bl33.bin executable.
+
+1. Get ATF source code
+git clone https://github.com/96boards/arm-trusted-firmware.git
+
+2. Compile ATF I use the makefile here
+http://people.linaro.org/~peter.griffin/hikey/hikey-u-boot-release_r1/build-tf.mak
+
+3. Get l-loader
+git clone https://github.com/96boards/l-loader.git
+
+4. Make sym links to ATF bip / fip binaries
+ln -s /home/griffinp/aarch64/bl1-hikey.bin bl1.bin
+ln -s /home/griffinp/aarch64/fip-hikey.bin fip.bin
+
+arm-linux-gnueabihf-gcc -c -o start.o start.S
+arm-linux-gnueabihf-gcc -c -o debug.o debug.S
+arm-linux-gnueabihf-ld -Bstatic -Tl-loader.lds -Ttext 0xf9800800 start.o debug.o -o loader
+arm-linux-gnueabihf-objcopy -O binary loader temp
+
+python gen_loader.py -o l-loader.bin --img_loader=temp --img_bl1=bl1.bin
+sudo bash -x generate_ptable.sh
+python gen_loader.py -o ptable.img --img_prm_ptable=prm_ptable.img --img_sec_ptable=sec_ptable.img
+
+These instructions are adapted from
+https://github.com/96boards/documentation/wiki/HiKeyUEFI
+
+FLASHING
+========
+
+1. Connect jumper J2 to go into recovery mode and flash l-loader.bin with
+   fastboot using the hisi-idt.py utility
+
+> git clone https://github.com/96boards/burn-boot.git
+> sudo python /home/griffinp/Software/hikey/burn-boot/hisi-idt.py -d /dev/ttyUSB0 --img1=/tmp/l-loader.bin
+
+2. Once LED 0 comes on solid, it should be detected as a fastboot device
+   (on some boards I've found this to be unreliable)
+
+sudo fastboot devices
+
+3. Flash the images
+wget https://builds.96boards.org/releases/hikey/nvme.img
+sudo fastboot flash ptable ptable.img
+sudo fastboot flash fastboot fip.bin
+sudo fastboot flash nvme nvme.img
+
+4. Disconnect jumper J2, and reset the board and you will now (hopefully)
+   have ATF, booting u-boot from eMMC. On 'new' boards I've had to do the
+   flashing twice in the past to avoid an ATF error.
+
+See working boot trace below: -
+
+debug EMMC boot: print init OK
+debug EMMC boot: send RST_N .
+debug EMMC boot: start eMMC boot......
+load fastboot1!
+Switch to aarch64 mode. CPU0 executes at 0xf9801000!
+NOTICE:  Booting Trusted Firmware
+NOTICE:  BL1: v1.1(release):a0c0399
+NOTICE:  BL1: Built : 13:23:48, May 22 2015
+NOTICE:  succeed to init lpddr3 rank0 dram phy
+INFO:    lpddr3_freq_init, set ddrc 533mhz
+INFO:    init ddr3 rank0
+INFO:    ddr3 rank1 init pass
+INFO:    lpddr3_freq_init, set ddrc 800mhz
+INFO:    init ddr3 rank0
+INFO:    ddr3 rank1 init pass
+INFO:    Elpida DDR
+NOTICE:  BL1: Booting BL2
+INFO:    [BDID] [fff91c18] midr: 0x410fd033
+INFO:    [BDID] [fff91c1c] board type: 0
+INFO:    [BDID] [fff91c20] board id: 0x2b
+INFO:    init_acpu_dvfs: pmic version 17
+INFO:    init_acpu_dvfs: ACPU_CHIP_MAX_FREQ=0x186a00.
+INFO:    acpu_dvfs_volt_init: success!
+INFO:    acpu_dvfs_set_freq: support freq num is 5
+INFO:    acpu_dvfs_set_freq: start prof is 0x4
+INFO:    acpu_dvfs_set_freq: magic is 0x5a5ac5c5
+INFO:    acpu_dvfs_set_freq: voltage:
+INFO:      - 0: 0x3a
+INFO:      - 1: 0x3a
+INFO:      - 2: 0x4a
+INFO:      - 3: 0x5b
+INFO:      - 4: 0x6b
+NOTICE:  acpu_dvfs_set_freq: set acpu freq success!NOTICE:  BL2: v1.1(debug):a0c0399
+NOTICE:  BL2: Built : 10:19:28, May 27 2015
+INFO:    BL2: Loading BL3-0
+INFO:    Using FIP
+WARNING: Failed to access image 'bl30.bin' (-1)
+ERROR:   Failed to load BL3-0 (-1)
+ERROR:   Please burn mcu image:
+ERROR:     sudo fastboot flash mcuimage mcuimage.bin
+INFO:    BL2: TrustZone: protecting 16777216 bytes of memory at 0x3f000000
+INFO:    BL2: Loading BL3-1
+INFO:    Using FIP
+INFO:    Loading file 'bl31.bin' at address 0xf9858000
+INFO:    File 'bl31.bin' loaded: 0xf9858000 - 0xf9860010
+INFO:    BL2: Loading BL3-2
+INFO:    Using FIP
+WARNING: Failed to access image 'bl32.bin' (-1)
+WARNING: Failed to load BL3-2 (-1)
+INFO:    BL2: Loading BL3-3
+INFO:    Using FIP
+INFO:    Loading file 'bl33.bin' at address 0x35000000
+INFO:    File 'bl33.bin' loaded: 0x35000000 - 0x35042938
+NOTICE:  BL1: Booting BL3-1
+NOTICE:  BL3-1: v1.1(debug):a0c0399
+NOTICE:  BL3-1: Built : 10:19:31, May 27 2015
+INFO:    BL3-1: Initializing runtime services
+INFO:    BL3-1: Preparing for EL3 exit to normal world
+INFO:    BL3-1: Next image address = 0x35000000
+INFO:    BL3-1: Next image spsr = 0x3c9
+
+
+U-Boot 2015.04-00007-g1b3d379-dirty (May 27 2015 - 10:18:16) hikey
+
+DRAM:  1008 MiB
+MMC:   sd_card_detect: SD card present
+HiKey DWMMC: 0, HiKey DWMMC: 1
+In:    serial
+Out:   serial
+Err:   serial
+Net:   Net Initialization Skipped
+No ethernet found.
+Hit any key to stop autoboot:  0

Signature · 1 line

1.9.1

Tom Rini

2015-08-13 13:22 UTC #16 lore raw

PATCH v4 8/9 ARM64: hikey: Add a README for this board.

Quoted 4 lines · Peter Griffin

To help others with compiling and flashing ATF and u-boot add a README for this board.
Signed-off-by Peter Griffin <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines

Tom
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Simon Glass

2015-08-18 03:34 UTC #17 lore raw

PATCH v4 8/9 ARM64: hikey: Add a README for this board.

In reply to Peter Griffin

Hi Peter,

Quoted 8 lines · Peter Griffin

To help others with compiling and flashing ATF and u-boot add a README for this board.
Signed-off-by Peter Griffin <[email protected]>
---
 board/hisilicon/hikey/README | 160 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 160 insertions(+)
 create mode 100644 board/hisilicon/hikey/README

I'm trying to follow these instructions but it is tricky. Please see my comments below.

Quoted 38 lines

board/hisilicon/hikey/README new file +31 -0

new file mode 100644
index 0000000..25c8143
@@ -0,0 +1,160 @@
+Introduction
+============
+
+HiKey is the first certified 96Boards Consumer Edition board. The board/SoC has: -
+* HiSilicon Kirin 6220 eight-core ARM Cortex-A53 64-bit SoC running at 1.2GHz.
+* ARM Mali 450-MP4 GPU
+* 1GB 800MHz LPDDR3 DRAM
+* 4GB eMMC Flash Storage
+* microSD
+* 802.11a/b/g/n WiFi, Bluetooth
+
+The HiKey schematic can be found here: -
+https://github.com/96boards/documentation/blob/master/hikey/96Boards-Hikey-Rev-A1.pdf
+
+A SoC datasheet can be found here: -
+https://github.com/96boards/documentation/blob/master/hikey/
+Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf
+
+Currently the u-boot port supports: -
+* USB
+* eMMC
+* SD card
+* GPIO
+
+Compile u-boot
+==============
+
+make CROSS_COMPILE=aarch64-linux-gnu- hikey_config
+make CROSS_COMPILE=aarch64-linux-gnu-
+
+ARM Trusted Firmware (ATF) & l-loader

board/hisilicon/hikey/README line 41

Quoted 10 lines

board/hisilicon/hikey/README new file +10 -0

+=====================================
+
+This u-boot port has been tested with l-loader, booting ATF, which then boots
+u-boot as the bl33.bin executable.
+
+1. Get ATF source code
+git clone https://github.com/96boards/arm-trusted-firmware.git
+
+2. Compile ATF I use the makefile here
+http://people.linaro.org/~peter.griffin/hikey/hikey-u-boot-release_r1/build-tf.mak

Can you put that Makefile in U-Boot too so that we don't need to rely on it being at a particular URL?

OK, so then should say something like:

cd arm-trusted-firmware
wget http://people.linaro.org/~peter.griffin/hikey/hikey-u-boot-release_r1/build-tf.mak
make -f build-tf.mak

I get Syntax error: Unterminated quoted string.

Line 45 seems to be missing an end quote.

But then in the end it says no rule to make target bl30-hikey.bin. Where does that come from?

board/hisilicon/hikey/README line 43

Quoted 2 lines

board/hisilicon/hikey/README new file +2 -0
+
+3. Get l-loader

cd .. ?

board/hisilicon/hikey/README line 48

Quoted 5 lines

board/hisilicon/hikey/README new file +5 -0

+git clone https://github.com/96boards/l-loader.git
+
+4. Make sym links to ATF bip / fip binaries
+ln -s /home/griffinp/aarch64/bl1-hikey.bin bl1.bin
+ln -s /home/griffinp/aarch64/fip-hikey.bin fip.bin

How about ../aarch64 or even ../bin?

board/hisilicon/hikey/README line 58

Quoted 10 lines

board/hisilicon/hikey/README new file +10 -0

+
+arm-linux-gnueabihf-gcc -c -o start.o start.S
+arm-linux-gnueabihf-gcc -c -o debug.o debug.S
+arm-linux-gnueabihf-ld -Bstatic -Tl-loader.lds -Ttext 0xf9800800 start.o debug.o -o loader
+arm-linux-gnueabihf-objcopy -O binary loader temp
+
+python gen_loader.py -o l-loader.bin --img_loader=temp --img_bl1=bl1.bin
+sudo bash -x generate_ptable.sh
+python gen_loader.py -o ptable.img --img_prm_ptable=prm_ptable.img --img_sec_ptable=sec_ptable.img
+

That worked for me. How about creating a script for that?

board/hisilicon/hikey/README line 65

Quoted 7 lines

board/hisilicon/hikey/README new file +7 -0

+These instructions are adapted from
+https://github.com/96boards/documentation/wiki/HiKeyUEFI
+
+FLASHING
+========
+
+1. Connect jumper J2 to go into recovery mode and flash l-loader.bin with

It doesn't say J2 - I think you mean J15 BOOT SEL, which is the second jumper in J15.

board/hisilicon/hikey/README line 69

Quoted 4 lines

board/hisilicon/hikey/README new file +4 -0

+   fastboot using the hisi-idt.py utility
+
+> git clone https://github.com/96boards/burn-boot.git
+> sudo python /home/griffinp/Software/hikey/burn-boot/hisi-idt.py -d /dev/ttyUSB0 --img1=/tmp/l-loader.bin

Try to turn the /home/griffinp to a relative path. Also mention that /dev/ttyUSB0 is the first USB serial port.

board/hisilicon/hikey/README line 77

Quoted 8 lines

board/hisilicon/hikey/README new file +8 -0

+
+2. Once LED 0 comes on solid, it should be detected as a fastboot device
+   (on some boards I've found this to be unreliable)
+
+sudo fastboot devices
+
+3. Flash the images
+wget https://builds.96boards.org/releases/hikey/nvme.img

That URL has changed.

board/hisilicon/hikey/README line 79

Quoted 2 lines

board/hisilicon/hikey/README new file +2 -0
+sudo fastboot flash ptable ptable.img
+sudo fastboot flash fastboot fip.bin

I can't find fip.bin, perhaps because of the failure above.

Quoted 82 lines

board/hisilicon/hikey/README new file +81 -1

+sudo fastboot flash nvme nvme.img
+
+4. Disconnect jumper J2, and reset the board and you will now (hopefully)
+   have ATF, booting u-boot from eMMC. On 'new' boards I've had to do the
+   flashing twice in the past to avoid an ATF error.
+
+See working boot trace below: -
+
+debug EMMC boot: print init OK
+debug EMMC boot: send RST_N .
+debug EMMC boot: start eMMC boot......
+load fastboot1!
+Switch to aarch64 mode. CPU0 executes at 0xf9801000!
+NOTICE:  Booting Trusted Firmware
+NOTICE:  BL1: v1.1(release):a0c0399
+NOTICE:  BL1: Built : 13:23:48, May 22 2015
+NOTICE:  succeed to init lpddr3 rank0 dram phy
+INFO:    lpddr3_freq_init, set ddrc 533mhz
+INFO:    init ddr3 rank0
+INFO:    ddr3 rank1 init pass
+INFO:    lpddr3_freq_init, set ddrc 800mhz
+INFO:    init ddr3 rank0
+INFO:    ddr3 rank1 init pass
+INFO:    Elpida DDR
+NOTICE:  BL1: Booting BL2
+INFO:    [BDID] [fff91c18] midr: 0x410fd033
+INFO:    [BDID] [fff91c1c] board type: 0
+INFO:    [BDID] [fff91c20] board id: 0x2b
+INFO:    init_acpu_dvfs: pmic version 17
+INFO:    init_acpu_dvfs: ACPU_CHIP_MAX_FREQ=0x186a00.
+INFO:    acpu_dvfs_volt_init: success!
+INFO:    acpu_dvfs_set_freq: support freq num is 5
+INFO:    acpu_dvfs_set_freq: start prof is 0x4
+INFO:    acpu_dvfs_set_freq: magic is 0x5a5ac5c5
+INFO:    acpu_dvfs_set_freq: voltage:
+INFO:      - 0: 0x3a
+INFO:      - 1: 0x3a
+INFO:      - 2: 0x4a
+INFO:      - 3: 0x5b
+INFO:      - 4: 0x6b
+NOTICE:  acpu_dvfs_set_freq: set acpu freq success!NOTICE:  BL2: v1.1(debug):a0c0399
+NOTICE:  BL2: Built : 10:19:28, May 27 2015
+INFO:    BL2: Loading BL3-0
+INFO:    Using FIP
+WARNING: Failed to access image 'bl30.bin' (-1)
+ERROR:   Failed to load BL3-0 (-1)
+ERROR:   Please burn mcu image:
+ERROR:     sudo fastboot flash mcuimage mcuimage.bin
+INFO:    BL2: TrustZone: protecting 16777216 bytes of memory at 0x3f000000
+INFO:    BL2: Loading BL3-1
+INFO:    Using FIP
+INFO:    Loading file 'bl31.bin' at address 0xf9858000
+INFO:    File 'bl31.bin' loaded: 0xf9858000 - 0xf9860010
+INFO:    BL2: Loading BL3-2
+INFO:    Using FIP
+WARNING: Failed to access image 'bl32.bin' (-1)
+WARNING: Failed to load BL3-2 (-1)
+INFO:    BL2: Loading BL3-3
+INFO:    Using FIP
+INFO:    Loading file 'bl33.bin' at address 0x35000000
+INFO:    File 'bl33.bin' loaded: 0x35000000 - 0x35042938
+NOTICE:  BL1: Booting BL3-1
+NOTICE:  BL3-1: v1.1(debug):a0c0399
+NOTICE:  BL3-1: Built : 10:19:31, May 27 2015
+INFO:    BL3-1: Initializing runtime services
+INFO:    BL3-1: Preparing for EL3 exit to normal world
+INFO:    BL3-1: Next image address = 0x35000000
+INFO:    BL3-1: Next image spsr = 0x3c9
+
+
+U-Boot 2015.04-00007-g1b3d379-dirty (May 27 2015 - 10:18:16) hikey
+
+DRAM:  1008 MiB
+MMC:   sd_card_detect: SD card present
+HiKey DWMMC: 0, HiKey DWMMC: 1
+In:    serial
+Out:   serial
+Err:   serial
+Net:   Net Initialization Skipped
+No ethernet found.
+Hit any key to stop autoboot:  0
--

Quoted 2 lines

1.9.1

Can you please have a look and let me know what I am missing? Also it would be great to get a patch to tidy this up. It's an extremely convoluted build and flash process so the clearer it is the better,

It would also help to explain what all these .bin files are.

Regards,
Simon

Peter Griffin

author

2015-09-09 21:09 UTC #18 lore raw

PATCH v4 8/9 ARM64: hikey: Add a README for this board.

Hi Simon,

Quoted 6 lines · Peter Griffin

Quoted 6 lines
To help others with compiling and flashing ATF and u-boot add a README for this board.
Signed-off-by Peter Griffin <[email protected]>
---
 board/hisilicon/hikey/README | 160

Quoted 7 lines

+++++++++++++++++++++++++++++++++++++++++++
Quoted 2 lines
 1 file changed, 160 insertions(+)
 create mode 100644 board/hisilicon/hikey/README
I'm trying to follow these instructions but it is tricky. Please see my comments below.

Sorry for the delay in replying to you. I've been away on honeymoon most of August, and then had the inevitable backlog of email to get through.

It is nice to see the HiKey port was merged whilst I was away though :) as I had spent quite a bit of time working on it before I left.

Apologies that you ran into some problems with my instructions, I'll send a series in a moment which fixes up various issues you've spotted in the README and a few other fixes.

Quoted 54 lines

board/hisilicon/hikey/README line 4
Quoted 11 lines
board/hisilicon/hikey/README new file +4 -0
new file mode 100644
index 0000000..25c8143
@@ -0,0 +1,160 @@
+Introduction
+============
+
+HiKey is the first certified 96Boards Consumer Edition board. The
board/SoC has: -
board/hisilicon/hikey/README line 5
Quoted 1 line
board/hisilicon/hikey/README new file +1 -0
+* HiSilicon Kirin 6220 eight-core ARM Cortex-A53 64-bit SoC running at
1.2GHz.
board/hisilicon/hikey/README line 14
Quoted 8 lines
board/hisilicon/hikey/README new file +8 -0
+* ARM Mali 450-MP4 GPU
+* 1GB 800MHz LPDDR3 DRAM
+* 4GB eMMC Flash Storage
+* microSD
+* 802.11a/b/g/n WiFi, Bluetooth
+
+The HiKey schematic can be found here: -
+
https://github.com/96boards/documentation/blob/master/hikey/96Boards-Hikey-Rev-A1.pdf
Quoted 11 lines
board/hisilicon/hikey/README new file +11 -0
+
+A SoC datasheet can be found here: -
+https://github.com/96boards/documentation/blob/master/hikey/
+Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf
+
+Currently the u-boot port supports: -
+* USB
+* eMMC
+* SD card
+* GPIO
+
board/hisilicon/hikey/README
Quoted 10 lines
board/hisilicon/hikey/README new file +10 -0
+Compile u-boot
+==============
+
+make CROSS_COMPILE=aarch64-linux-gnu- hikey_config
+make CROSS_COMPILE=aarch64-linux-gnu-
+
+ARM Trusted Firmware (ATF) & l-loader
+=====================================
+
+This u-boot port has been tested with l-loader, booting ATF, which then
boots
board/hisilicon/hikey/README line 42
Quoted 7 lines
board/hisilicon/hikey/README new file +7 -0
+u-boot as the bl33.bin executable.
+
+1. Get ATF source code
+git clone https://github.com/96boards/arm-trusted-firmware.git
+
+2. Compile ATF I use the makefile here
+
http://people.linaro.org/~peter.griffin/hikey/hikey-u-boot-release_r1/build-tf.mak

Quoted 3 lines

Can you put that Makefile in U-Boot too so that we don't need to rely on it being at a particular URL?

Yes sure, that would suit me fine. I will submit a patch shortly.

Quoted 11 lines

OK, so then should say something like:
cd arm-trusted-firmware
wget
http://people.linaro.org/~peter.griffin/hikey/hikey-u-boot-release_r1/build-tf.mak
make -f build-tf.mak
I get Syntax error: Unterminated quoted string.
Line 45 seems to be missing an end quote.

Sorry it is a missing end quote on the help message rule. With that fixed you should get the message telling you

**** Common Makefile ****
example:
make -f build-tf.mak build

So to build ATF, type "make -f build-tf.mak build"

Quoted 3 lines

But then in the end it says no rule to make target bl30-hikey.bin. Where does that come from?

Having BL30 defined was a mistake in the makefile. However it looks like the latest ATF for HiKey now has BL30 enabled, which ironically means you should have it defined in the makefile.

BL30 binary should be set to mcuimage.bin which you can get from wget
https://builds.96boards.org/releases/hikey/linaro/binaries/latest/mcuimage.bin

This is now included in the latest README.

Quoted 5 lines

board/hisilicon/hikey/README line 43
Quoted 4 lines
board/hisilicon/hikey/README new file +2 -0
+
+3. Get l-loader

Quoted 9 lines

cd .. ?
board/hisilicon/hikey/README line 48
Quoted 5 lines
board/hisilicon/hikey/README new file +5 -0
+git clone https://github.com/96boards/l-loader.git
+
+4. Make sym links to ATF bip / fip binaries
+ln -s /home/griffinp/aarch64/bl1-hikey.bin bl1.bin
+ln -s /home/griffinp/aarch64/fip-hikey.bin fip.bin
How about ../aarch64 or even ../bin?

Changed in latest README

Quoted 12 lines

board/hisilicon/hikey/README
Quoted 5 lines
board/hisilicon/hikey/README new file +4 -0
+
+arm-linux-gnueabihf-gcc -c -o start.o start.S
+arm-linux-gnueabihf-gcc -c -o debug.o debug.S
+arm-linux-gnueabihf-ld -Bstatic -Tl-loader.lds -Ttext 0xf9800800
start.o debug.o -o loader
board/hisilicon/hikey/README
Quoted 5 lines
board/hisilicon/hikey/README new file +5 -0
+arm-linux-gnueabihf-objcopy -O binary loader temp
+
+python gen_loader.py -o l-loader.bin --img_loader=temp --img_bl1=bl1.bin
+sudo bash -x generate_ptable.sh
+python gen_loader.py -o ptable.img --img_prm_ptable=prm_ptable.img
--img_sec_ptable=sec_ptable.img

Quoted 4 lines

board/hisilicon/hikey/README line 58
Quoted 1 line
board/hisilicon/hikey/README new file +1 -0
+
That worked for me. How about creating a script for that?

I will suggest it to the people who maintain the l-loader repo.

Quoted 10 lines

board/hisilicon/hikey/README

Quoted 8 lines

board/hisilicon/hikey/README new file +7 -0

+These instructions are adapted from
+https://github.com/96boards/documentation/wiki/HiKeyUEFI
+
+FLASHING
+========
+
+1. Connect jumper J2 to go into recovery mode and flash l-loader.bin

with

Quoted 3 lines

It doesn't say J2 - I think you mean J15 BOOT SEL, which is the second jumper in J15.

Yes your right I do. Updated in the README

Quoted 10 lines

board/hisilicon/hikey/README
Quoted 5 lines
board/hisilicon/hikey/README new file +4 -0
+   fastboot using the hisi-idt.py utility
+
+> git clone https://github.com/96boards/burn-boot.git
+> sudo python /home/griffinp/Software/hikey/burn-boot/hisi-idt.py -d
/dev/ttyUSB0 --img1=/tmp/l-loader.bin
Try to turn the /home/griffinp to a relative path. Also mention that /dev/ttyUSB0 is the first USB serial port.

Now updated in README

Quoted 12 lines

board/hisilicon/hikey/README line 77
Quoted 9 lines
board/hisilicon/hikey/README new file +8 -0
+
+2. Once LED 0 comes on solid, it should be detected as a fastboot device
+   (on some boards I've found this to be unreliable)
+
+sudo fastboot devices
+
+3. Flash the images
+wget https://builds.96boards.org/releases/hikey/nvme.img
That URL has changed.

Now updated in README

Quoted 6 lines

board/hisilicon/hikey/README line 79
Quoted 3 lines
board/hisilicon/hikey/README new file +2 -0
+sudo fastboot flash ptable ptable.img
+sudo fastboot flash fastboot fip.bin
I can't find fip.bin, perhaps because of the failure above.

Yes, following the latest README and code, it should hopefully all work for you.

Quoted 85 lines

board/hisilicon/hikey/README

Quoted 4 lines

board/hisilicon/hikey/README new file +3 -0

+sudo fastboot flash nvme nvme.img
+
+4. Disconnect jumper J2, and reset the board and you will now

(hopefully)

board/hisilicon/hikey/README line 83

Quoted 1 line

board/hisilicon/hikey/README new file +1 -0
+   have ATF, booting u-boot from eMMC. On 'new' boards I've had to do

the

Quoted 27 lines

board/hisilicon/hikey/README new file +27 -0

+   flashing twice in the past to avoid an ATF error.
+
+See working boot trace below: -
+
+debug EMMC boot: print init OK
+debug EMMC boot: send RST_N .
+debug EMMC boot: start eMMC boot......
+load fastboot1!
+Switch to aarch64 mode. CPU0 executes at 0xf9801000!
+NOTICE:  Booting Trusted Firmware
+NOTICE:  BL1: v1.1(release):a0c0399
+NOTICE:  BL1: Built : 13:23:48, May 22 2015
+NOTICE:  succeed to init lpddr3 rank0 dram phy
+INFO:    lpddr3_freq_init, set ddrc 533mhz
+INFO:    init ddr3 rank0
+INFO:    ddr3 rank1 init pass
+INFO:    lpddr3_freq_init, set ddrc 800mhz
+INFO:    init ddr3 rank0
+INFO:    ddr3 rank1 init pass
+INFO:    Elpida DDR
+NOTICE:  BL1: Booting BL2
+INFO:    [BDID] [fff91c18] midr: 0x410fd033
+INFO:    [BDID] [fff91c1c] board type: 0
+INFO:    [BDID] [fff91c20] board id: 0x2b
+INFO:    init_acpu_dvfs: pmic version 17
+INFO:    init_acpu_dvfs: ACPU_CHIP_MAX_FREQ=0x186a00.
+INFO:    acpu_dvfs_volt_init: success!

board/hisilicon/hikey/README

Quoted 10 lines

board/hisilicon/hikey/README new file +10 -0

+INFO:    acpu_dvfs_set_freq: support freq num is 5
+INFO:    acpu_dvfs_set_freq: start prof is 0x4
+INFO:    acpu_dvfs_set_freq: magic is 0x5a5ac5c5
+INFO:    acpu_dvfs_set_freq: voltage:
+INFO:      - 0: 0x3a
+INFO:      - 1: 0x3a
+INFO:      - 2: 0x4a
+INFO:      - 3: 0x5b
+INFO:      - 4: 0x6b
+NOTICE:  acpu_dvfs_set_freq: set acpu freq success!NOTICE:  BL2:

v1.1(debug):a0c0399

board/hisilicon/hikey/README

Quoted 8 lines

board/hisilicon/hikey/README new file +8 -0

+NOTICE:  BL2: Built : 10:19:28, May 27 2015
+INFO:    BL2: Loading BL3-0
+INFO:    Using FIP
+WARNING: Failed to access image 'bl30.bin' (-1)
+ERROR:   Failed to load BL3-0 (-1)
+ERROR:   Please burn mcu image:
+ERROR:     sudo fastboot flash mcuimage mcuimage.bin
+INFO:    BL2: TrustZone: protecting 16777216 bytes of memory at

0x3f000000

Quoted 31 lines

board/hisilicon/hikey/README new file +31 -0

+INFO:    BL2: Loading BL3-1
+INFO:    Using FIP
+INFO:    Loading file 'bl31.bin' at address 0xf9858000
+INFO:    File 'bl31.bin' loaded: 0xf9858000 - 0xf9860010
+INFO:    BL2: Loading BL3-2
+INFO:    Using FIP
+WARNING: Failed to access image 'bl32.bin' (-1)
+WARNING: Failed to load BL3-2 (-1)
+INFO:    BL2: Loading BL3-3
+INFO:    Using FIP
+INFO:    Loading file 'bl33.bin' at address 0x35000000
+INFO:    File 'bl33.bin' loaded: 0x35000000 - 0x35042938
+NOTICE:  BL1: Booting BL3-1
+NOTICE:  BL3-1: v1.1(debug):a0c0399
+NOTICE:  BL3-1: Built : 10:19:31, May 27 2015
+INFO:    BL3-1: Initializing runtime services
+INFO:    BL3-1: Preparing for EL3 exit to normal world
+INFO:    BL3-1: Next image address = 0x35000000
+INFO:    BL3-1: Next image spsr = 0x3c9
+
+
+U-Boot 2015.04-00007-g1b3d379-dirty (May 27 2015 - 10:18:16) hikey
+
+DRAM:  1008 MiB
+MMC:   sd_card_detect: SD card present
+HiKey DWMMC: 0, HiKey DWMMC: 1
+In:    serial
+Out:   serial
+Err:   serial
+Net:   Net Initialization Skipped
+No ethernet found.

Quoted 9 lines

Quoted 4 lines
board/hisilicon/hikey/README new file +1 -1
+Hit any key to stop autoboot:  0
--
1.9.1
Can you please have a look and let me know what I am missing? Also it would be great to get a patch to tidy this up. It's an extremely convoluted build and flash process so the clearer it is the better,

I will send a "hikey: hi6220: Various fixups" series in a moment, which will tidy this up.

regards,

Peter.

Peter Griffin

author

2015-07-30 17:55 UTC #19 lore raw

PATCH v4 9/9 hikey: Add hikey-u-boot.mak

In reply to Peter Griffin

Signed-off-by Peter Griffin <[email protected]>

---
 hikey-u-boot.mak | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 hikey-u-boot.mak

hikey-u-boot.mak new file +33 -0

new file mode 100644
index 0000000..f4cd547
@@ -0,0 +1,33 @@
+CROSS_COMPILE	:= aarch64-linux-gnu-
+build_dir       := $(CURDIR)/build-hikey
+output_dir	:= $(HOME)/aarch64
+
+.PHONY: have-crosscompiler
+have-crosscompiler:
+	@echo -n "Check that $(CROSS_COMPILE)gcc is available..."
+	@which $(CROSS_COMPILE)gcc > /dev/null ; \
+	if [ ! $$? -eq 0 ] ; then \
+	   echo "ERROR: cross-compiler $(CROSS_COMPILE)gcc not in PATH=$$PATH!" ; \
+	   echo "ABORTING." ; \
+	   exit 1 ; \
+	else \
+	   echo "OK" ;\
+	fi
+
+build: have-crosscompiler FORCE
+	rm -rf $(build_dir)
+	@mkdir -p $(build_dir)
+	$(MAKE) O=$(build_dir) CROSS_COMPILE=$(CROSS_COMPILE) distclean
+	$(MAKE) O=$(build_dir) CROSS_COMPILE=$(CROSS_COMPILE) hikey_config
+	$(MAKE) O=$(build_dir) CROSS_COMPILE=$(CROSS_COMPILE)
+	cp $(build_dir)/u-boot.bin $(output_dir)/u-boot-hikey.bin
+	cp $(build_dir)/u-boot.bin /tftpboot/u-boot-hikey.bin
+
+menuconfig:
+	$(MAKE) O=$(build_dir) CROSS_COMPILE=$(CROSS_COMPILE) menuconfig
+
+clean:
+	$(MAKE) O=$(build_dir) clean
+	rm -rf $(build_dir)
+
+FORCE:

Signature · 1 line

1.9.1

Peter Griffin

author

2015-07-30 20:14 UTC #20 lore raw

PATCH v4 9/9 hikey: Add hikey-u-boot.mak

Pleas ignore this last patch. I didn't mean to send it as part of the v4 series.

regards,

Peter.

Quoted 50 lines · Peter Griffin

Signed-off-by Peter Griffin <[email protected]>

---
 hikey-u-boot.mak | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 hikey-u-boot.mak

hikey-u-boot.mak new file +10 -0

new file mode 100644
index 0000000..f4cd547
@@ -0,0 +1,33 @@
+CROSS_COMPILE  := aarch64-linux-gnu-
+build_dir       := $(CURDIR)/build-hikey
+output_dir     := $(HOME)/aarch64
+
+.PHONY: have-crosscompiler
+have-crosscompiler:
+       @echo -n "Check that $(CROSS_COMPILE)gcc is available..."
+       @which $(CROSS_COMPILE)gcc > /dev/null ; \
+       if [ ! $$? -eq 0 ] ; then \
+          echo "ERROR: cross-compiler $(CROSS_COMPILE)gcc not in

PATH=$$PATH!" ; \

hikey-u-boot.mak new file +23 -1

+          echo "ABORTING." ; \
+          exit 1 ; \
+       else \
+          echo "OK" ;\
+       fi
+
+build: have-crosscompiler FORCE
+       rm -rf $(build_dir)
+       @mkdir -p $(build_dir)
+       $(MAKE) O=$(build_dir) CROSS_COMPILE=$(CROSS_COMPILE) distclean
+       $(MAKE) O=$(build_dir) CROSS_COMPILE=$(CROSS_COMPILE) hikey_config
+       $(MAKE) O=$(build_dir) CROSS_COMPILE=$(CROSS_COMPILE)
+       cp $(build_dir)/u-boot.bin $(output_dir)/u-boot-hikey.bin
+       cp $(build_dir)/u-boot.bin /tftpboot/u-boot-hikey.bin
+
+menuconfig:
+       $(MAKE) O=$(build_dir) CROSS_COMPILE=$(CROSS_COMPILE) menuconfig
+
+clean:
+       $(MAKE) O=$(build_dir) clean
+       rm -rf $(build_dir)
+
+FORCE:
--

1.9.1

Tom Rini

2015-08-13 13:24 UTC #21 lore raw

v4 cover Add support for hi6220 SoC and HiKey 96boards CE board.

In reply to Peter Griffin

Quoted 27 lines · Peter Griffin

Hi Albert / Tom,
This series adds support for the first 96boards consumer edition HiKey board.
More information can be found about this board at the following link
https://www.96boards.org/products/hikey/.
This initial port adds support for: -
1) Serial
2) eMMC and sd card
3) USB
4) GPIO
It has been tested with Arm Trusted Firmware running u-boot as the BL33 executable.
Some instructions on exactly how to compile everything (l-loader,
with Arm Trusted Firmware, which then loads u-boot) is documented in the README found in the board/hisilicon/hikey directory.
A basic SoC datasheet can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf
Board schematic can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
96Boards-Hikey-Rev-A1.pdf

Quoted 7 lines

A rather pleasant side effect of rebasing to v2015.07-rc2 is that the two main bugs with the v1 series (that I new about at least) are resolved. DHCP now works correctly, and USB mass storage devices are also enumerated).
The plan is once basic support is merged to u-boot, and upstream Linux kernel has DT which supports GPIO, UART and MMC, we can migrate this u-boot port over to using DT for configuration.

So, with the Linaro gcc 4.8 (2013.10) toolchain this compiles without warnings, with the 4.9 (2014.11) this gives a bunch of warnings. If there's a still better toolchain I should be using for aarch64 I can update to that. Can you look into the warnings however with 4.9? Thanks!

Signature · 8 lines

Tom
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