arm: spear: Fix booting - relocate vector table to 0 (low-vector)

index 6474e9d..1fdf715 100644
@@ -12,6 +12,21 @@
 #include <asm/arch/spr_misc.h>
 #include <asm/arch/spr_defs.h>
 
+void spear_late_init(void)
+{
+	struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
+
+	writel(0x80000007, &misc_p->arb_icm_ml1);
+	writel(0x80000007, &misc_p->arb_icm_ml2);
+	writel(0x80000007, &misc_p->arb_icm_ml3);
+	writel(0x80000007, &misc_p->arb_icm_ml4);
+	writel(0x80000007, &misc_p->arb_icm_ml5);
+	writel(0x80000007, &misc_p->arb_icm_ml6);
+	writel(0x80000007, &misc_p->arb_icm_ml7);
+	writel(0x80000007, &misc_p->arb_icm_ml8);
+	writel(0x80000007, &misc_p->arb_icm_ml9);
+}
+
 static void sel_1v8(void)
 {
 	struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE;

@@ -104,14 +119,6 @@ void plat_ddr_init(void)
 }
 
 /*
- * soc_init:
- */
-void soc_init(void)
-{
-	/* Nothing to be done for SPEAr600 */
-}
-
-/*
  * xxx_boot_selected:
  *
  * return true if the particular booting option is selected

103 lines not on this page · raw message

181 lines not on this page · raw message

index 7e77a30..bece2d6 100644
@@ -13,9 +13,7 @@ extern void setfreq(unsigned int, unsigned int);
 extern unsigned int setfreq_sz;
 
 void plat_ddr_init(void);
-void soc_init(void);
 void spear_late_init(void);
-void plat_late_init(void);
 
 int snor_boot_selected(void);
 int nand_boot_selected(void);

index edb16b1..70e633c 100644
@@ -2,7 +2,7 @@
  * (C) Copyright 2009
  * Vipin Kumar, STMicroelectronics, <[email protected]>
  *
- * Copyright (C) 2012 Stefan Roese <[email protected]>
+ * Copyright (C) 2012, 2015 Stefan Roese <[email protected]>
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */

@@ -162,7 +162,8 @@
 
 /* Use last 2 lwords in internal SRAM for bootcounter */
 #define CONFIG_BOOTCOUNT_LIMIT
-#define CONFIG_SYS_BOOTCOUNT_ADDR	0xd2801ff8
+#define CONFIG_SYS_BOOTCOUNT_ADDR		(CONFIG_SRAM_BASE + \
+						 CONFIG_SRAM_SIZE)
 
 #define CONFIG_HOSTNAME				x600
 #define CONFIG_UBI_PART				ubi0

@@ -248,8 +249,11 @@
 #define PHYS_SDRAM_1_MAXSIZE			0x40000000
 
 #define CONFIG_SYS_SDRAM_BASE			PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_RAM_ADDR		0xD2800000
-#define CONFIG_SYS_INIT_RAM_SIZE		0x2000
+#define CONFIG_SRAM_BASE			0xd2800000
+/* Preserve the last 2 lwords for the boot-counter */
+#define CONFIG_SRAM_SIZE			((8 << 10) - 0x8)
+#define CONFIG_SYS_INIT_RAM_ADDR		CONFIG_SRAM_BASE
+#define CONFIG_SYS_INIT_RAM_SIZE		CONFIG_SRAM_SIZE
 
 #define CONFIG_SYS_INIT_SP_OFFSET		\
 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)

@@ -260,10 +264,13 @@
 /*
  * SPL related defines
  */
-#define CONFIG_SPL_TEXT_BASE	0xd2800b00
+#define CONFIG_SPL_TEXT_BASE		0xd2800b00
+#define CONFIG_SPL_MAX_SIZE		(CONFIG_SRAM_SIZE - 0xb00)
 #define	CONFIG_SPL_START_S_PATH	"arch/arm/cpu/arm926ejs/spear"
 #define CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds"
 
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_NOR_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_LIBCOMMON_SUPPORT	/* image.c */
 #define CONFIG_SPL_LIBGENERIC_SUPPORT	/* string.c */

index 1ce9db7..3037084 100644
@@ -47,8 +47,12 @@ int arch_cpu_init(void)
 #if defined(CONFIG_NAND_FSMC)
 	periph1_clken |= MISC_FSMCENB;
 #endif
+#if defined(CONFIG_USB_EHCI_SPEAR)
+	periph1_clken |= PERIPH_USBH1 | PERIPH_USBH2;
+#endif
 
 	writel(periph1_clken, &misc_p->periph1_clken);
+
 	return 0;
 }
 

index c6da405..065360a 100644
@@ -11,6 +11,8 @@
 #define CONFIG_SYS_USBD_BASE			0xE1100000
 #define CONFIG_SYS_PLUG_BASE			0xE1200000
 #define CONFIG_SYS_FIFO_BASE			0xE1000800
+#define CONFIG_SYS_UHC0_EHCI_BASE		0xE1800000
+#define CONFIG_SYS_UHC1_EHCI_BASE		0xE2000000
 #define CONFIG_SYS_SMI_BASE			0xFC000000
 #define CONFIG_SPEAR_SYSCNTLBASE		0xFCA00000
 #define CONFIG_SPEAR_TIMERBASE			0xFC800000

index 210ee9e..9e90e18 100644
@@ -14,7 +14,21 @@
 #include <usb.h>
 #include "ehci.h"
 #include <asm/arch/hardware.h>
+#include <asm/arch/spr_misc.h>
 
+static void spear6xx_usbh_stop(void)
+{
+	struct misc_regs *const misc_p =
+	    (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
+	u32 periph1_rst = readl(misc_p->periph1_rst);
+
+	periph1_rst |= PERIPH_USBH1 | PERIPH_USBH2;
+	writel(periph1_rst, misc_p->periph1_rst);
+
+	udelay(1000);
+	periph1_rst &= ~(PERIPH_USBH1 | PERIPH_USBH2);
+	writel(periph1_rst, misc_p->periph1_rst);
+}
 
 /*
  * Create the appropriate control structures to manage

@@ -23,9 +37,23 @@
 int ehci_hcd_init(int index, enum usb_init_type init,
 		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 {
-	*hccr = (struct ehci_hccr *)(CONFIG_SYS_UHC0_EHCI_BASE + 0x100);
-	*hcor = (struct ehci_hcor *)((uint32_t)*hccr
-			+ HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
+	u32 ehci = 0;
+
+	switch (index) {
+	case 0:
+		ehci = CONFIG_SYS_UHC0_EHCI_BASE;
+		break;
+	case 1:
+		ehci = CONFIG_SYS_UHC1_EHCI_BASE;
+		break;
+	default:
+		printf("ERROR: wrong controller index!\n");
+		break;
+	};
+
+	*hccr = (struct ehci_hccr *)(ehci + 0x100);
+	*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
+			HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
 
 	debug("SPEAr-ehci: init hccr %x and hcor %x hc_length %d\n",
 		(uint32_t)*hccr, (uint32_t)*hcor,

@@ -40,5 +68,9 @@ int ehci_hcd_init(int index, enum usb_init_type init,
  */
 int ehci_hcd_stop(int index)
 {
+#if defined(CONFIG_SPEAR600)
+	spear6xx_usbh_stop();
+#endif
+
 	return 0;
 }

index 3037084..e39cdba 100644
@@ -56,6 +56,16 @@ int arch_cpu_init(void)
 	return 0;
 }
 
+void enable_caches(void)
+{
+#ifndef CONFIG_SYS_ICACHE_OFF
+	icache_enable();
+#endif
+#ifndef CONFIG_SYS_DCACHE_OFF
+	dcache_enable();
+#endif
+}
+
 #ifdef CONFIG_DISPLAY_CPUINFO
 int print_cpuinfo(void)
 {

index 70e633c..6a57388 100644
@@ -30,6 +30,7 @@
 #define CONFIG_SYS_SPL_LEN			CONFIG_SPL_PAD_TO
 #define CONFIG_SYS_UBOOT_BASE			(CONFIG_SYS_FLASH_BASE + \
 						 CONFIG_SYS_SPL_LEN)
+#define CONFIG_SYS_UBOOT_START			CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_MONITOR_BASE			CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_MONITOR_LEN			0x60000
 

@@ -98,6 +99,12 @@
 #define CONFIG_FPGA_SPARTAN3
 #define CONFIG_FPGA_COUNT	1
 
+/* USB EHCI options */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_SPEAR
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_MAX_CONTROLLER_COUNT	2
+
 /*
  * Command support defines
  */

@@ -105,7 +112,9 @@
 #define CONFIG_CMD_DATE
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_ENV
+#define CONFIG_CMD_FAT
 #define CONFIG_CMD_FPGA_LOADMK
+#define CONFIG_CMD_FS_GENERIC
 #define CONFIG_CMD_GPIO
 #define CONFIG_CMD_I2C
 #define CONFIG_CMD_MII

@@ -115,8 +124,13 @@
 #define CONFIG_CMD_SAVES
 #define CONFIG_CMD_UBI
 #define CONFIG_CMD_UBIFS
+#define CONFIG_CMD_USB
 #define CONFIG_LZO
 
+/* Filesystem support (for USB key) */
+#define CONFIG_SUPPORT_VFAT
+#define CONFIG_DOS_PARTITION
+
 #define CONFIG_BOOTDELAY			3
 
 #define CONFIG_SYS_HUSH_PARSER			/* Use the HUSH parser	*/

@@ -148,10 +162,11 @@
 
 #define CONFIG_SYS_MEMTEST_START		0x00800000
 #define CONFIG_SYS_MEMTEST_END			0x04000000
-#define CONFIG_SYS_MALLOC_LEN			(1024 * 1024)
+#define CONFIG_SYS_MALLOC_LEN			(8 << 20)
 #define CONFIG_IDENT_STRING			"-SPEAr"
 #define CONFIG_SYS_LONGHELP
 #define CONFIG_CMDLINE_EDITING
+#define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_CBSIZE			256
 #define CONFIG_SYS_PBSIZE			(CONFIG_SYS_CBSIZE + \
 						 sizeof(CONFIG_SYS_PROMPT) + 16)

@@ -240,9 +255,6 @@
 	"bootcmd=run nand_ubifs\0"					\
 	"\0"
 
-/* Stack sizes */
-#define CONFIG_STACKSIZE			(512 * 1024)
-
 /* Physical Memory Map */
 #define CONFIG_NR_DRAM_BANKS			1
 #define PHYS_SDRAM_1				0x00000000

@@ -274,7 +286,6 @@
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_LIBCOMMON_SUPPORT	/* image.c */
 #define CONFIG_SPL_LIBGENERIC_SUPPORT	/* string.c */
-#define CONFIG_SPL_NO_PRINTF
 
 /*
  * Please select/define only one of the following