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arm: socfpga: Fix delay in clock manager

PATCH New Marek Vasut 2 participants 3 messages Aug 10, 2015 – Aug 18, 2015

Subsystems (3)
Arm (32-bit) Arm sub-architectures Arm/socfpga architecture
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Marek Vasut

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#0 lore raw

PATCH 1/1 arm: socfpga: Fix delay in clock manager

This code claims it needs to wait 7us, yet it uses get_timer() function which operates with millisecond granularity. Use timer_get_us() instead, which operates with microsecond granularity.

Signed-off-by Marek Vasut <[email protected]>
---
 arch/arm/mach-socfpga/clock_manager.c | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)
arch/arm/mach-socfpga/clock_manager.c +5 -7
index 1341df4..aa71636 100644
@@ -90,7 +90,7 @@ static void cm_write_with_phase(uint32_t value,
 
 void cm_basic_init(const struct cm_config * const cfg)
 {
-	uint32_t start, timeout;
+	unsigned long end;
 
 	/* Start by being paranoid and gate all sw managed clocks */
 

@@ -159,12 +159,10 @@ void cm_basic_init(const struct cm_config * const cfg)
 	writel(cfg->sdram_vco_base, &clock_manager_base->sdr_pll.vco);
 
 	/*
-	 * Time starts here
-	 * must wait 7 us from BGPWRDN_SET(0) to VCO_ENABLE_SET(1)
+	 * Time starts here. Must wait 7 us from
+	 * BGPWRDN_SET(0) to VCO_ENABLE_SET(1).
 	 */
-	start = get_timer(0);
-	/* timeout in unit of us as CONFIG_SYS_HZ = 1000*1000 */
-	timeout = 7;
+	end = timer_get_us() + 7;
 
 	/* main mpu */
 	writel(cfg->mpuclk, &clock_manager_base->main_pll.mpuclk);

@@ -204,7 +202,7 @@ void cm_basic_init(const struct cm_config * const cfg)
 	writel(cfg->s2fuser1clk, &clock_manager_base->per_pll.s2fuser1clk);
 
 	/* 7 us must have elapsed before we can enable the VCO */
-	while (get_timer(start) < timeout)
+	while (timer_get_us() < end)
 		;
 
 	/* Enable vco */
Signature · 1 line
2.1.4
#1 lore raw

PATCH 1/1 arm: socfpga: Fix delay in clock manager

Quoted 14 lines · Marek Vasut

This code claims it needs to wait 7us, yet it uses get_timer() function which operates with millisecond granularity. Use timer_get_us() instead, which operates with microsecond granularity.

Signed-off-by Marek Vasut <[email protected]>
---
 arch/arm/mach-socfpga/clock_manager.c | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)
arch/arm/mach-socfpga/clock_manager.c +0 -0
index 1341df4..aa71636 100644

arch/arm/mach-socfpga/clock_manager.c static void cm_write_with_phase(uint32_t value, · line 90

Quoted 1 line
arch/arm/mach-socfpga/clock_manager.c +0 -0
@@ -90,7 +90,7 @@ static void cm_write_with_phase(uint32_t value,
Acked-by Dinh Nguyen <[email protected]>

Thanks,
Dinh

author
#2 lore raw

PATCH 1/1 arm: socfpga: Fix delay in clock manager

Quoted 11 lines · Dinh Nguyen
Quoted 10 lines · Marek Vasut

This code claims it needs to wait 7us, yet it uses get_timer() function which operates with millisecond granularity. Use timer_get_us() instead, which operates with microsecond granularity.

Signed-off-by Marek Vasut <[email protected]>

---

 arch/arm/mach-socfpga/clock_manager.c | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)
Quoted 7 lines

arch/arm/mach-socfpga/clock_manager.c static void cm_write_with_phase(uint32_t value,

Quoted 5 lines
(quoted diff) +0 -0

b/arch/arm/mach-socfpga/clock_manager.c index 1341df4..aa71636 100644

arch/arm/mach-socfpga/clock_manager.c +0 -0
@@ -90,7 +90,7 @@ static void cm_write_with_phase(uint32_t value,
Acked-by Dinh Nguyen <[email protected]>

Applied to u-boot-socfpga/master, thanks!

Best regards,
Marek Vasut