zynqmp: usb: Add usb dwc3 driver support for zynqmp

Added USB XHCI driver support for zynqmp.

Signed-off-by Siva Durga Prasad Paladugu <[email protected]>

drivers/usb/host/xhci-zynqmp.c new file +4 -0

+__weak int __board_usb_init(int index, enum usb_init_type init)
+{
+	return 0;
+}

drivers/usb/host/xhci-zynqmp.c new file +6 -0

+	/* Clear USB3 PHY reset */
+	clrbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST);
+
+	/* Clear USB2 PHY reset */
+	clrbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST);
+}

include/linux/usb/xhci-zynqmp.h new file +6 -0

+/*
+ * Copyright 2015 Xilinx, Inc.
+ *
+ * Zynq USB HOST xHCI Controller
+ *
+ * Author: Siva Durga Prasad Paladugu<[email protected]>

include/linux/usb/xhci-zynqmp.h new file +21 -0

+#define USB3_PWRCTL_CLK_CMD_SHIFT   14
+#define USB3_PWRCTL_CLK_FREQ_SHIFT	22
+
+/* USBOTGSS_WRAPPER definitions */
+#define USBOTGSS_WRAPRESET	BIT(17)
+#define USBOTGSS_DMADISABLE BIT(16)
+#define USBOTGSS_STANDBYMODE_NO_STANDBY BIT(4)
+#define USBOTGSS_STANDBYMODE_SMRT		BIT(5)
+#define USBOTGSS_STANDBYMODE_SMRT_WKUP (0x3 << 4)
+#define USBOTGSS_IDLEMODE_NOIDLE BIT(2)
+#define USBOTGSS_IDLEMODE_SMRT BIT(3)
+#define USBOTGSS_IDLEMODE_SMRT_WKUP (0x3 << 2)
+
+/* USBOTGSS_IRQENABLE_SET_0 bit */
+#define USBOTGSS_COREIRQ_EN	BIT(1)
+
+/* USBOTGSS_IRQENABLE_SET_1 bits */
+#define USBOTGSS_IRQ_SET_1_IDPULLUP_FALL_EN	BIT(1)
+#define USBOTGSS_IRQ_SET_1_DISCHRGVBUS_FALL_EN	BIT(3)
+#define USBOTGSS_IRQ_SET_1_CHRGVBUS_FALL_EN	BIT(4)
+#define USBOTGSS_IRQ_SET_1_DRVVBUS_FALL_EN	BIT(5)

include/linux/usb/xhci-zynqmp.h new file +3 -0

+};
+
+#endif /* _ASM_ARCH_XHCI_ZYNQMP_H_ */

Added usb dwc3 driver support for zynqmp
this also supports the DFU and LTHOR to download
the linux images on to RAM and cen be booted from
those linux images.

Signed-off-by Siva Durga Prasad Paladugu <[email protected]>

---
 arch/arm/cpu/armv8/zynqmp/Kconfig           |    3 ++
 arch/arm/include/asm/arch-zynqmp/hardware.h |    3 ++
 board/xilinx/zynqmp/zynqmp.c                |   27 +++++++++++++++++
 configs/xilinx_zynqmp_ep_defconfig          |    1 +
 include/configs/xilinx_zynqmp.h             |   41 +++++++++++++++++++++++++-
 5 files changed, 73 insertions(+), 2 deletions(-)

arch/arm/cpu/armv8/zynqmp/Kconfig +3 -0

index c8fcfb6..9a19dfa 100644
@@ -20,4 +20,7 @@ config SYS_SOC
 config SYS_CONFIG_NAME
 	default "xilinx_zynqmp_ep" if TARGET_ZYNQMP_EP
 
+config ZYNQMP_USB
+	bool "Configure ZynqMP USB"
+
 endif

arch/arm/include/asm/arch-zynqmp/hardware.h +3 -0

index 7640eab..8c041c0 100644
@@ -27,6 +27,9 @@
 
 #define ZYNQMP_SATA_BASEADDR	0xFD0C0000
 
+#define ZYNQMP_USB0_XHCI_BASEADDR	0xFE200000
+#define ZYNQMP_USB1_XHCI_BASEADDR	0xFE300000
+
 #define ZYNQMP_CRL_APB_BASEADDR	0xFF5E0000
 #define ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT	0x1000000
 

board/xilinx/zynqmp/zynqmp.c +27 -0

index 70d9c2c..d105bb4 100644
@@ -12,6 +12,8 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/io.h>
+#include <usb.h>
+#include <dwc3-uboot.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 

@@ -137,3 +139,28 @@ int checkboard(void)
 	return 0;
 }
 
+#ifdef CONFIG_USB_DWC3
+static struct dwc3_device dwc3_device_data = {
+	.maximum_speed = USB_SPEED_HIGH,
+	.base = ZYNQMP_USB0_XHCI_BASEADDR,
+	.dr_mode = USB_DR_MODE_PERIPHERAL,
+	.index = 0,
+};
+
+int usb_gadget_handle_interrupts(void)
+{
+	dwc3_uboot_handle_interrupt(0);
+	return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	return dwc3_uboot_init(&dwc3_device_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	dwc3_uboot_exit(index);
+	return 0;
+}
+#endif

configs/xilinx_zynqmp_ep_defconfig +1 -0

index fda44ea..efc1bbe 100644
@@ -16,3 +16,4 @@ CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep"
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_SYS_TEXT_BASE=0x8000000
+CONFIG_ZYNQMP_USB=y

include/configs/xilinx_zynqmp.h +37 -1

index 68853b6..927c917 100644
@@ -49,7 +49,7 @@
 #define COUNTER_FREQUENCY		4000000
 
 /* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 0x400000)
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 0x2000000)
 
 /* Serial setup */
 #if defined(CONFIG_ZYNQMP_DCC)

@@ -108,13 +108,50 @@
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_LOAD_ADDR		0x8000000
 
+#if defined(CONFIG_ZYNQMP_USB)
+#define CONFIG_USB_DWC3
+#define CONFIG_USB_DWC3_GADGET
+
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_VBUS_DRAW	2
+#define CONFIG_USBDOWNLOAD_GADGET
+#define CONFIG_SYS_DFU_DATA_BUF_SIZE	0x1800000
+#define DFU_DEFAULT_POLL_TIMEOUT	300
+#define CONFIG_DFU_FUNCTION
+#define CONFIG_DFU_RAM
+#define CONFIG_G_DNL_VENDOR_NUM		0x03FD
+#define CONFIG_G_DNL_PRODUCT_NUM	0x0300
+#define CONFIG_G_DNL_MANUFACTURER	"Xilinx"
+#define CONFIG_USB_CABLE_CHECK
+#define CONFIG_CMD_DFU
+#define CONFIG_CMD_THOR_DOWNLOAD
+#define CONFIG_THOR_FUNCTION
+#define CONFIG_THOR_RESET_OFF
+#define DFU_ALT_INFO_RAM \
+	"dfu_ram_info=" \
+	"set dfu_alt_info " \
+	"Image ram 0x200000 0x1800000\\\\;" \
+	"system.dtb ram 0x7000000 0x40000\0" \
+	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
+	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
+
+#define DFU_ALT_INFO  \
+		DFU_ALT_INFO_RAM
+#endif
+
+#if !defined(DFU_ALT_INFO)
+# define DFU_ALT_INFO
+#endif
+
 /* Initial environment variables */
 #define CONFIG_EXTRA_ENV_SETTINGS \