spi: cadence_qspi: Enable quad mode for read and programming
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
Enable the quad output fast read and quad input fast program support. Quad mode is supported by Cadence QSPI controller.
--- drivers/spi/cadence_qspi.c | 11 +++++++++++ drivers/spi/cadence_qspi_apb.c | 16 ++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-)
drivers/spi/cadence_qspi.c +11 -0
@@ -318,6 +318,16 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus)return 0 ; } +static int cadence_spi_child_pre_probe (struct udevice *dev) +{ +struct spi_slave *slave =dev_get_parentdata (dev); + +/* Cadence QSPI controller can support quad read and program */ + slave->op_mode_rx =SPI_OPM_RX_QOF ; + slave->op_mode_tx =SPI_OPM_TX_QPP ; +return 0 ; +} +static const struct dm_spi_ops cadence_spi_ops = { .xfer = cadence_spi_xfer, .set_speed = cadence_spi_set_speed,
@@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = { .ofdata_to_platdata = cadence_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata), .priv_auto_alloc_size = sizeof(struct cadence_spi_priv), + .child_pre_probe = cadence_spi_child_pre_probe, .probe = cadence_spi_probe, };
drivers/spi/cadence_qspi_apb.c +12 -4
@@ -29,6 +29,9 @@#include <asm/io.h> #include <asm/errno.h> #include "cadence_qspi.h" +#include <spi.h> +#include <spi_flash.h> +#include "../mtd/spi/sf_internal.h" #define CQSPI_REG_POLL_US (1)/* 1us */ #define CQSPI_REG_RETRY (10000)
@@ -82,6 +85,7 @@#define CQSPI_REG_WR_INSTR 0x08#define CQSPI_REG_WR_INSTR_OPCODE_LSB 0 +#define CQSPI_REG_WR_INSTR_TYPE_DATA_LSB 16#define CQSPI_REG_DELAY 0x0C#define CQSPI_REG_DELAY_TSLCH_LSB 0
@@ -700,10 +704,10 @@ int cadence_qspi_apb_indirect_read_setup(struct cadence_spi_platdata *plat,/* Configure the opcode */ rd_reg = cmdbuf[0 ] <<CQSPI_REG_RD_INSTR_OPCODE_LSB ; -#if (CONFIG_SPI_FLASH_QUAD ==1 ) -/* Instruction and address at DQ0, data at DQ0-3. */ - rd_reg |=CQSPI_INST_TYPE_QUAD <<CQSPI_REG_RD_INSTR_TYPE_DATA_LSB ; -#endif +if (cmdbuf[0 ] ==CMD_READ_QUAD_OUTPUT_FAST ) +/* Instruction and address at DQ0, data at DQ0-3. */ + rd_reg |=CQSPI_INST_TYPE_QUAD << +CQSPI_REG_RD_INSTR_TYPE_DATA_LSB ;/* Get address */ addr_value =cadence_qspi_apb_cmd2addr (&cmdbuf[1 ], addr_bytes);
@@ -796,6 +800,10 @@ int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata *plat,/* Configure the opcode */ reg = cmdbuf[0 ] <<CQSPI_REG_WR_INSTR_OPCODE_LSB ; +if (cmdbuf[0 ] ==CMD_QUAD_PAGE_PROGRAM ) +/* Instruction and address at DQ0, data@DQ0-3. */ + reg |=CQSPI_INST_TYPE_QUAD << +CQSPI_REG_WR_INSTR_TYPE_DATA_LSB ;writel (reg, plat->regbase +CQSPI_REG_WR_INSTR );/* Setup write address. */
Signature · 1 line
1.7.7.4
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
Quoted 37 lines · Chin Liang See
Enable the quad output fast read and quad input fast program support. Quad mode is supported by Cadence QSPI controller.
Signed-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Stefan Roese <[email protected]>Cc Vikas Manocha <[email protected]>Cc Jagannadh Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>--- drivers/spi/cadence_qspi.c | 11 +++++++++++ drivers/spi/cadence_qspi_apb.c | 16 ++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-)drivers/spi/cadence_qspi.c +10
-0@@ -318,6 +318,16 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) return 0; } +static int cadence_spi_child_pre_probe (struct udevice *dev) +{ +struct spi_slave *slave =dev_get_parentdata (dev); + +/* Cadence QSPI controller can support quad read and program */ + slave->op_mode_rx =SPI_OPM_RX_QOF ; + slave->op_mode_tx =SPI_OPM_TX_QPP ; +return 0 ; +} +static const struct dm_spi_ops cadence_spi_ops = { .xfer = cadence_spi_xfer, .set_speed = cadence_spi_set_speed,
drivers/spi/cadence_qspi.c U_BOOT_DRIVER(cadence_spi) = { · line 356
Quoted 6 lines
drivers/spi/cadence_qspi.c +1
-0@@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = { .ofdata_to_platdata = cadence_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata), .priv_auto_alloc_size = sizeof(struct cadence_spi_priv), + .child_pre_probe = cadence_spi_child_pre_probe, .probe = cadence_spi_probe, };
Simon, can you please check if this DM bit is correct ?
drivers/spi/cadence_qspi_apb.c line 34
Quoted 11 lines
(quoted diff) +0
-0
b/drivers/spi/cadence_qspi_apb.cindex d053407..deffb6b 100644drivers/spi/cadence_qspi_apb.c +3
-0@@ -29,6 +29,9 @@#include <asm/io.h> #include <asm/errno.h> #include "cadence_qspi.h" +#include <spi.h> +#include <spi_flash.h> +#include "../mtd/spi/sf_internal.h"
Why do you need this include ?
[...]
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
Quoted 47 lines · marex at denx.de
Quoted 37 lines · Chin Liang See
Enable the quad output fast read and quad input fast program support. Quad mode is supported by Cadence QSPI controller.
Signed-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Stefan Roese <[email protected]>Cc Vikas Manocha <[email protected]>Cc Jagannadh Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>--- drivers/spi/cadence_qspi.c | 11 +++++++++++ drivers/spi/cadence_qspi_apb.c | 16 ++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-)drivers/spi/cadence_qspi.c +10
-0@@ -318,6 +318,16 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) return 0; } +static int cadence_spi_child_pre_probe (struct udevice *dev) +{ +struct spi_slave *slave =dev_get_parentdata (dev); + +/* Cadence QSPI controller can support quad read and program */ + slave->op_mode_rx =SPI_OPM_RX_QOF ; + slave->op_mode_tx =SPI_OPM_TX_QPP ; +return 0 ; +} +static const struct dm_spi_ops cadence_spi_ops = { .xfer = cadence_spi_xfer, .set_speed = cadence_spi_set_speed,drivers/spi/cadence_qspi.c U_BOOT_DRIVER(cadence_spi) = { · line 356
Quoted 6 lines
drivers/spi/cadence_qspi.c +1
-0@@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = { .ofdata_to_platdata = cadence_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata), .priv_auto_alloc_size = sizeof(struct cadence_spi_priv), + .child_pre_probe = cadence_spi_child_pre_probe, .probe = cadence_spi_probe, };Simon, can you please check if this DM bit is correct ?
Quoted 14 lines
drivers/spi/cadence_qspi_apb.c line 34
Quoted 11 lines
(quoted diff) +0
-0
b/drivers/spi/cadence_qspi_apb.cindex d053407..deffb6b 100644drivers/spi/cadence_qspi_apb.c +3
-0@@ -29,6 +29,9 @@#include <asm/io.h> #include <asm/errno.h> #include "cadence_qspi.h" +#include <spi.h> +#include <spi_flash.h> +#include "../mtd/spi/sf_internal.h" Why do you need this include ?
Actually I am comparing the opcode to determine whether its a quad command. If yes, we need to setup the controller accordingly.
Thanks
Chin Liang
Quoted 1 line
[...]
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
Quoted 67 lines · Chin Liang See
Quoted 66 lines · marex at denx.de
Quoted 49 lines · Chin Liang See
Enable the quad output fast read and quad input fast program support. Quad mode is supported by Cadence QSPI controller.
Signed-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Stefan Roese <[email protected]>Cc Vikas Manocha <[email protected]>Cc Jagannadh Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>---
drivers/spi/cadence_qspi.c | 11 +++++++++++ drivers/spi/cadence_qspi_apb.c | 16 ++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-)drivers/spi/cadence_qspi.c +10
-0@@ -318,6 +318,16 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) return 0; } +static int cadence_spi_child_pre_probe (struct udevice *dev) +{ +struct spi_slave *slave =dev_get_parentdata (dev); + +/* Cadence QSPI controller can support quad read and program */ + slave->op_mode_rx =SPI_OPM_RX_QOF ; + slave->op_mode_tx =SPI_OPM_TX_QPP ; +return 0 ; +} +static const struct dm_spi_ops cadence_spi_ops = {drivers/spi/cadence_qspi.c +1
-0.xfer = cadence_spi_xfer, .set_speed = cadence_spi_set_speed,@@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = { .ofdata_to_platdata = cadence_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata), .priv_auto_alloc_size = sizeof(struct cadence_spi_priv), + .child_pre_probe = cadence_spi_child_pre_probe,Quoted 3 lines
.probe =
cadence_spi_probe,};
Simon, can you please check if this DM bit is correct ?
Quoted 10 lines
(quoted diff) +0
-0
b/drivers/spi/cadence_qspi_apb.cindex d053407..deffb6b 100644drivers/spi/cadence_qspi_apb.c +0
-0@@ -29,6 +29,9 @@#include <asm/io.h> #include <asm/errno.h> #include "cadence_qspi.h"
Quoted 8 lines
Quoted 5 lines
drivers/spi/cadence_qspi_apb.c line 34
Quoted 3 lines
drivers/spi/cadence_qspi_apb.c +3
-0+#include <spi.h> +#include <spi_flash.h> +#include "../mtd/spi/sf_internal.h" Why do you need this include ?
Actually I am comparing the opcode to determine whether its a quad command. If yes, we need to setup the controller accordingly.
Ewww, I think we should implement something similar to:
https://lkml.org/lkml/2015/8/24/299
[PATCH linux-next v4 1/5] mtd: spi-nor: notify (Q)SPI controller about protocol change
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
Quoted 74 lines · marex at denx.de
Quoted 73 lines · Chin Liang See
Quoted 71 lines · marex at denx.de
Quoted 49 lines · Chin Liang See
Enable the quad output fast read and quad input fast program support. Quad mode is supported by Cadence QSPI controller.
Signed-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Stefan Roese <[email protected]>Cc Vikas Manocha <[email protected]>Cc Jagannadh Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>---
drivers/spi/cadence_qspi.c | 11 +++++++++++ drivers/spi/cadence_qspi_apb.c | 16 ++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-)drivers/spi/cadence_qspi.c +10
-0@@ -318,6 +318,16 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) return 0; } +static int cadence_spi_child_pre_probe (struct udevice *dev) +{ +struct spi_slave *slave =dev_get_parentdata (dev); + +/* Cadence QSPI controller can support quad read and program */ + slave->op_mode_rx =SPI_OPM_RX_QOF ; + slave->op_mode_tx =SPI_OPM_TX_QPP ; +return 0 ; +} +static const struct dm_spi_ops cadence_spi_ops = {drivers/spi/cadence_qspi.c +1
-0.xfer = cadence_spi_xfer, .set_speed = cadence_spi_set_speed,@@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = { .ofdata_to_platdata = cadence_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata), .priv_auto_alloc_size = sizeof(struct cadence_spi_priv), + .child_pre_probe = cadence_spi_child_pre_probe,Quoted 3 lines
.probe =
cadence_spi_probe,};
Simon, can you please check if this DM bit is correct ?
drivers/spi/cadence_qspi_apb.c line 36
Quoted 13 lines
(quoted diff) +0
-0
b/drivers/spi/cadence_qspi_apb.cindex d053407..deffb6b 100644drivers/spi/cadence_qspi_apb.c +3
-0@@ -29,6 +29,9 @@#include <asm/io.h> #include <asm/errno.h> #include "cadence_qspi.h" +#include <spi.h> +#include <spi_flash.h> +#include "../mtd/spi/sf_internal.h" Why do you need this include ?
Quoted 8 lines
Quoted 2 lines
Actually I am comparing the opcode to determine whether its a quad command. If yes, we need to setup the controller accordingly.
Ewww, I think we should implement something similar to:
https://lkml.org/lkml/2015/8/24/299
[PATCH linux-next v4 1/5] mtd: spi-nor: notify (Q)SPI controller about protocol change
Yah, that is a nice enhancement in order to keep up with controller enhancement. We definitely want to explore and enable that at U-Boot in the future.
Thanks
Chin Liang
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
Quoted 80 lines · Chin Liang See
Quoted 79 lines · marex at denx.de
Quoted 67 lines · Chin Liang See
Quoted 66 lines · marex at denx.de
Quoted 49 lines · Chin Liang See
Enable the quad output fast read and quad input fast program support. Quad mode is supported by Cadence QSPI controller.
Signed-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Stefan Roese <[email protected]>Cc Vikas Manocha <[email protected]>Cc Jagannadh Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>---
drivers/spi/cadence_qspi.c | 11 +++++++++++ drivers/spi/cadence_qspi_apb.c | 16 ++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-)(quoted diff) +0
-0
b/drivers/spi/cadence_qspi.cindex 34a0f46..c6b69c4 100644drivers/spi/cadence_qspi.c +10
-0@@ -318,6 +318,16 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) return 0; } +static int cadence_spi_child_pre_probe (struct udevice *dev) +{ +struct spi_slave *slave =dev_get_parentdata (dev); + +/* Cadence QSPI controller can support quad read and program */ + slave->op_mode_rx =SPI_OPM_RX_QOF ; + slave->op_mode_tx =SPI_OPM_TX_QPP ; +return 0 ; +} +static const struct dm_spi_ops cadence_spi_ops = {drivers/spi/cadence_qspi.c +1
-0.xfer = cadence_spi_xfer, .set_speed = cadence_spi_set_speed,@@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = { .ofdata_to_platdata = cadence_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata), .priv_auto_alloc_size = sizeof(struct cadence_spi_priv), + .child_pre_probe = cadence_spi_child_pre_probe,Quoted 3 lines
.probe =
cadence_spi_probe,};
Simon, can you please check if this DM bit is correct ?
Quoted 10 lines
(quoted diff) +0
-0
b/drivers/spi/cadence_qspi_apb.cindex d053407..deffb6b 100644drivers/spi/cadence_qspi_apb.c +0
-0@@ -29,6 +29,9 @@#include <asm/io.h> #include <asm/errno.h> #include "cadence_qspi.h" Quoted 8 lines
Quoted 5 lines
drivers/spi/cadence_qspi_apb.c line 34
Quoted 3 lines
drivers/spi/cadence_qspi_apb.c +3
-0+#include <spi.h> +#include <spi_flash.h> +#include "../mtd/spi/sf_internal.h" Why do you need this include ?
Actually I am comparing the opcode to determine whether its a quad command. If yes, we need to setup the controller accordingly.
Ewww, I think we should implement something similar to:
Quoted 7 lines
Quoted 3 lines
https://lkml.org/lkml/2015/8/24/299
[PATCH linux-next v4 1/5] mtd: spi-nor: notify (Q)SPI controller about protocol changeYah, that is a nice enhancement in order to keep up with controller enhancement. We definitely want to explore and enable that at U-Boot in the future.
You mean you'll implement this functionality and then make your change to the QSPI driver to use it, in order to implement things properly ? :) In that case, I agree.
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
Quoted 85 lines · marex at denx.de
Quoted 84 lines · Chin Liang See
Quoted 82 lines · marex at denx.de
Quoted 67 lines · Chin Liang See
Quoted 66 lines · marex at denx.de
Quoted 49 lines · Chin Liang See
Enable the quad output fast read and quad input fast program support. Quad mode is supported by Cadence QSPI controller.
Signed-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Stefan Roese <[email protected]>Cc Vikas Manocha <[email protected]>Cc Jagannadh Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>---
drivers/spi/cadence_qspi.c | 11 +++++++++++ drivers/spi/cadence_qspi_apb.c | 16 ++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-)(quoted diff) +0
-0
b/drivers/spi/cadence_qspi.cindex 34a0f46..c6b69c4 100644drivers/spi/cadence_qspi.c +10
-0@@ -318,6 +318,16 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) return 0; } +static int cadence_spi_child_pre_probe (struct udevice *dev) +{ +struct spi_slave *slave =dev_get_parentdata (dev); + +/* Cadence QSPI controller can support quad read and program */ + slave->op_mode_rx =SPI_OPM_RX_QOF ; + slave->op_mode_tx =SPI_OPM_TX_QPP ; +return 0 ; +} +static const struct dm_spi_ops cadence_spi_ops = {drivers/spi/cadence_qspi.c +1
-0.xfer = cadence_spi_xfer, .set_speed = cadence_spi_set_speed,@@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = { .ofdata_to_platdata = cadence_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata), .priv_auto_alloc_size = sizeof(struct cadence_spi_priv), + .child_pre_probe = cadence_spi_child_pre_probe,Quoted 3 lines
.probe =
cadence_spi_probe,};
Simon, can you please check if this DM bit is correct ?
Quoted 10 lines
(quoted diff) +0
-0
b/drivers/spi/cadence_qspi_apb.cindex d053407..deffb6b 100644drivers/spi/cadence_qspi_apb.c +0
-0@@ -29,6 +29,9 @@#include <asm/io.h> #include <asm/errno.h> #include "cadence_qspi.h" Quoted 8 lines
Quoted 5 lines
drivers/spi/cadence_qspi_apb.c line 34
Quoted 3 lines
drivers/spi/cadence_qspi_apb.c +3
-0+#include <spi.h> +#include <spi_flash.h> +#include "../mtd/spi/sf_internal.h" Why do you need this include ?
Actually I am comparing the opcode to determine whether its a quad command. If yes, we need to setup the controller accordingly.
Ewww, I think we should implement something similar to:
https://lkml.org/lkml/2015/8/24/299
[PATCH linux-next v4 1/5] mtd: spi-nor: notify (Q)SPI controller about protocol change
Quoted 7 lines
Quoted 3 lines
Yah, that is a nice enhancement in order to keep up with controller enhancement. We definitely want to explore and enable that at U-Boot in the future.
You mean you'll implement this functionality and then make your change to the QSPI driver to use it, in order to implement things properly ? :) In that case, I agree.
Sure, something I can look at in 1-2 months time. I still have laundry lists on ensuring the mainline SOCFPGA U-Boot has all the essential features as we have in github. Prior that happen, can I get an ACK from you? :)
Thanks
Chin Liang
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
On Wednesday, August 26, 2015 at 03:13:15 PM, Chin Liang See wrote:
Hi,
[...]
Quoted 9 lines
Quoted 7 lines
Quoted 3 lines
Yah, that is a nice enhancement in order to keep up with controller enhancement. We definitely want to explore and enable that at U-Boot in the future.
You mean you'll implement this functionality and then make your change to the QSPI driver to use it, in order to implement things properly ? :) In that case, I agree.
Sure, something I can look at in 1-2 months time.
Sure, no problem, that should be in time for the next merge window.
Quoted 4 lines
I still have laundry
lists on ensuring the mainline SOCFPGA U-Boot has all the essential features as we have in github. Prior that happen, can I get an ACK from you? :)
No, sorry, you can not get ack on a patch which is hacky. You cannot push hacky code into mainline just for the sake of getting something somehow working, that's not how it works. We either do things proper or not at all.
Best regards,
Marek Vasut
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
Quoted 18 lines · marex at denx.de
On Wednesday, August 26, 2015 at 03:13:15 PM, Chin Liang See wrote:
Hi,
[...]
Quoted 9 lines
Quoted 7 lines
Quoted 3 lines
Yah, that is a nice enhancement in order to keep up with controller enhancement. We definitely want to explore and enable that at U-Boot in the future.
You mean you'll implement this functionality and then make your change to the QSPI driver to use it, in order to implement things properly ? :) In that case, I agree.
Sure, something I can look at in 1-2 months time.
Sure, no problem, that should be in time for the next merge window.
Quoted 9 lines
Quoted 4 lines
I still have laundry
lists on ensuring the mainline SOCFPGA U-Boot has all the essential features as we have in github. Prior that happen, can I get an ACK from you? :)No, sorry, you can not get ack on a patch which is hacky. You cannot push hacky code into mainline just for the sake of getting something somehow working, that's not how it works. We either do things proper or not at all.
In this case, probably its something we can work together on enabling the spi-nor?
Thanks
Chin Liang
Quoted 2 lines
Best regards,
Marek Vasut
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
Quoted 24 lines · Chin Liang See
Quoted 23 lines · marex at denx.de
On Wednesday, August 26, 2015 at 03:13:15 PM, Chin Liang See wrote:
Hi,
[...]
Quoted 9 lines
Quoted 7 lines
Quoted 3 lines
Yah, that is a nice enhancement in order to keep up with controller enhancement. We definitely want to explore and enable that at U-Boot in the future.
You mean you'll implement this functionality and then make your change to the QSPI driver to use it, in order to implement things properly ? :) In that case, I agree.
Sure, something I can look at in 1-2 months time.
Sure, no problem, that should be in time for the next merge window.
Quoted 4 lines
I still have laundry
lists on ensuring the mainline SOCFPGA U-Boot has all the essential features as we have in github. Prior that happen, can I get an ACK from you? :)
Quoted 7 lines
Quoted 4 lines
No, sorry, you can not get ack on a patch which is hacky. You cannot push hacky code into mainline just for the sake of getting something somehow working, that's not how it works. We either do things proper or not at all.
In this case, probably its something we can work together on enabling the spi-nor?
Hi!
But the Cadence QSPI works in U-Boot, I'm using it on a board here. If you need additional features, I'm glad to ack patches which are done right.
Best regards,
Marek Vasut
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
Quoted 30 lines · marex at denx.de
Quoted 29 lines · Chin Liang See
Quoted 27 lines · marex at denx.de
On Wednesday, August 26, 2015 at 03:13:15 PM, Chin Liang See wrote:
Hi,
[...]
Quoted 9 lines
Quoted 7 lines
Quoted 3 lines
Yah, that is a nice enhancement in order to keep up with controller enhancement. We definitely want to explore and enable that at U-Boot in the future.
You mean you'll implement this functionality and then make your change to the QSPI driver to use it, in order to implement things properly ? :) In that case, I agree.
Sure, something I can look at in 1-2 months time.
Sure, no problem, that should be in time for the next merge window.
Quoted 4 lines
I still have laundry
lists on ensuring the mainline SOCFPGA U-Boot has all the essential features as we have in github. Prior that happen, can I get an ACK from you? :)No, sorry, you can not get ack on a patch which is hacky. You cannot push hacky code into mainline just for the sake of getting something somehow working, that's not how it works. We either do things proper or not at all.
Quoted 6 lines
Quoted 2 lines
In this case, probably its something we can work together on enabling the spi-nor?
Hi!
But the Cadence QSPI works in U-Boot, I'm using it on a board here.
Yup, the basic function works. I am looking at 2 areas below
1. Quad mode
Current driver is running at single IO mode. We yet to utilize the quad mode that is supported by the controller. Its for performance.
2. SCLK at 80MHz and beyond
The driver fail to work at higher SCLK frequency. The github version work well at 100MHz. I am troubleshooting on this now
Thanks
Chin Liang
Quoted 5 lines
If you need additional features, I'm glad to ack patches which are done right.
Best regards,
Marek Vasut
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
Quoted 31 lines · Chin Liang See
Quoted 30 lines · marex at denx.de
Quoted 29 lines · Chin Liang See
Quoted 27 lines · marex at denx.de
On Wednesday, August 26, 2015 at 03:13:15 PM, Chin Liang See wrote:
Hi,
[...]
Quoted 9 lines
Quoted 7 lines
Quoted 3 lines
Yah, that is a nice enhancement in order to keep up with controller enhancement. We definitely want to explore and enable that at U-Boot in the future.
You mean you'll implement this functionality and then make your change to the QSPI driver to use it, in order to implement things properly ? :) In that case, I agree.
Sure, something I can look at in 1-2 months time.
Sure, no problem, that should be in time for the next merge window.
Quoted 4 lines
I still have laundry
lists on ensuring the mainline SOCFPGA U-Boot has all the essential features as we have in github. Prior that happen, can I get an ACK from you? :)No, sorry, you can not get ack on a patch which is hacky. You cannot push hacky code into mainline just for the sake of getting something somehow working, that's not how it works. We either do things proper or not at all.
Quoted 6 lines
Quoted 6 lines
Quoted 2 lines
In this case, probably its something we can work together on enabling the spi-nor?
Hi!
But the Cadence QSPI works in U-Boot, I'm using it on a board here.
Hi!
Quoted 5 lines
Yup, the basic function works. I am looking at 2 areas below
1. Quad mode
Current driver is running at single IO mode. We yet to utilize the quad mode that is supported by the controller. Its for performance.
OK
Quoted 3 lines
2. SCLK at 80MHz and beyond
The driver fail to work at higher SCLK frequency. The github version work well at 100MHz. I am troubleshooting on this now
Cool, thanks!
Best regards,
Marek Vasut
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
In reply to Chin Liang SeeQuoted 63 lines · Chin Liang See
Quoted 47 lines · marex at denx.de
Quoted 37 lines · Chin Liang See
Enable the quad output fast read and quad input fast program support. Quad mode is supported by Cadence QSPI controller.
Signed-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Stefan Roese <[email protected]>Cc Vikas Manocha <[email protected]>Cc Jagannadh Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>--- drivers/spi/cadence_qspi.c | 11 +++++++++++ drivers/spi/cadence_qspi_apb.c | 16 ++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-)drivers/spi/cadence_qspi.c +10
-0@@ -318,6 +318,16 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) return 0; } +static int cadence_spi_child_pre_probe (struct udevice *dev) +{ +struct spi_slave *slave =dev_get_parentdata (dev); + +/* Cadence QSPI controller can support quad read and program */ + slave->op_mode_rx =SPI_OPM_RX_QOF ; + slave->op_mode_tx =SPI_OPM_TX_QPP ; +return 0 ; +} +static const struct dm_spi_ops cadence_spi_ops = { .xfer = cadence_spi_xfer, .set_speed = cadence_spi_set_speed,drivers/spi/cadence_qspi.c U_BOOT_DRIVER(cadence_spi) = { · line 356
Quoted 6 lines
drivers/spi/cadence_qspi.c +1
-0@@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = { .ofdata_to_platdata = cadence_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata), .priv_auto_alloc_size = sizeof(struct cadence_spi_priv), + .child_pre_probe = cadence_spi_child_pre_probe, .probe = cadence_spi_probe, };Simon, can you please check if this DM bit is correct ?
Quoted 14 lines
drivers/spi/cadence_qspi_apb.c line 34
Quoted 11 lines
(quoted diff) +0
-0
b/drivers/spi/cadence_qspi_apb.cindex d053407..deffb6b 100644drivers/spi/cadence_qspi_apb.c +3
-0@@ -29,6 +29,9 @@#include <asm/io.h> #include <asm/errno.h> #include "cadence_qspi.h" +#include <spi.h> +#include <spi_flash.h> +#include "../mtd/spi/sf_internal.h" Why do you need this include ?
Quoted 2 lines
Actually I am comparing the opcode to determine whether its a quad command. If yes, we need to setup the controller accordingly.
Sorry, this I wouldn't recommend as of now please assign quad directly instead setting up controller based on the flash stuff, Yes things need to change it on u-boot like spi-nor framework and currently we are working on it[1] will defiantly back with proper solution.
[1] http://git.denx.de/?p=u-boot/u-boot-spi.git;a=shortlog;h=refs/heads/spi-nor
thanks!
Signature · 1 line
Jagan | openedev.
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
Quoted 67 lines · Jagan Teki
Quoted 63 lines · Chin Liang See
Quoted 47 lines · marex at denx.de
Quoted 37 lines · Chin Liang See
Enable the quad output fast read and quad input fast program support. Quad mode is supported by Cadence QSPI controller.
Signed-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Stefan Roese <[email protected]>Cc Vikas Manocha <[email protected]>Cc Jagannadh Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>--- drivers/spi/cadence_qspi.c | 11 +++++++++++ drivers/spi/cadence_qspi_apb.c | 16 ++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-)drivers/spi/cadence_qspi.c +10
-0@@ -318,6 +318,16 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) return 0; } +static int cadence_spi_child_pre_probe (struct udevice *dev) +{ +struct spi_slave *slave =dev_get_parentdata (dev); + +/* Cadence QSPI controller can support quad read and program */ + slave->op_mode_rx =SPI_OPM_RX_QOF ; + slave->op_mode_tx =SPI_OPM_TX_QPP ; +return 0 ; +} +static const struct dm_spi_ops cadence_spi_ops = { .xfer = cadence_spi_xfer, .set_speed = cadence_spi_set_speed,drivers/spi/cadence_qspi.c U_BOOT_DRIVER(cadence_spi) = { · line 356
Quoted 6 lines
drivers/spi/cadence_qspi.c +1
-0@@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = { .ofdata_to_platdata = cadence_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata), .priv_auto_alloc_size = sizeof(struct cadence_spi_priv), + .child_pre_probe = cadence_spi_child_pre_probe, .probe = cadence_spi_probe, };Simon, can you please check if this DM bit is correct ?
Quoted 14 lines
drivers/spi/cadence_qspi_apb.c line 34
Quoted 11 lines
(quoted diff) +0
-0
b/drivers/spi/cadence_qspi_apb.cindex d053407..deffb6b 100644drivers/spi/cadence_qspi_apb.c +3
-0@@ -29,6 +29,9 @@#include <asm/io.h> #include <asm/errno.h> #include "cadence_qspi.h" +#include <spi.h> +#include <spi_flash.h> +#include "../mtd/spi/sf_internal.h" Why do you need this include ?
Quoted 2 lines
Actually I am comparing the opcode to determine whether its a quad command. If yes, we need to setup the controller accordingly.
Quoted 7 lines
Sorry, this I wouldn't recommend as of now please assign quad directly instead setting up controller based on the flash stuff, Yes things need to change it on u-boot like spi-nor framework and currently we are working on it[1] will defiantly back with proper solution.
[1] http://git.denx.de/?p=u-boot/u-boot-spi.git;a=shortlog;h=refs/heads/spi-nor
In this case, I shall use the spi-nor for proper long term solution. Let me take a look and work that out with you.
Thanks
Chin Liang
Quoted 1 line
thanks!
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
In reply to Jagan TekiQuoted 77 lines · Jagan Teki
Quoted 67 lines · Chin Liang See
Quoted 66 lines · marex at denx.de
Quoted 49 lines · Chin Liang See
Enable the quad output fast read and quad input fast program support. Quad mode is supported by Cadence QSPI controller.
Signed-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Stefan Roese <[email protected]>Cc Vikas Manocha <[email protected]>Cc Jagannadh Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>---
drivers/spi/cadence_qspi.c | 11 +++++++++++ drivers/spi/cadence_qspi_apb.c | 16 ++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-)drivers/spi/cadence_qspi.c +10
-0@@ -318,6 +318,16 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) return 0; } +static int cadence_spi_child_pre_probe (struct udevice *dev) +{ +struct spi_slave *slave =dev_get_parentdata (dev); + +/* Cadence QSPI controller can support quad read and program */ + slave->op_mode_rx =SPI_OPM_RX_QOF ; + slave->op_mode_tx =SPI_OPM_TX_QPP ; +return 0 ; +} +static const struct dm_spi_ops cadence_spi_ops = {.xfer =
cadence_spi_xfer,
.set_speed =cadence_spi_set_speed,drivers/spi/cadence_qspi.c +1
-0@@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = { .ofdata_to_platdata = cadence_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata), .priv_auto_alloc_size = sizeof(struct cadence_spi_priv), + .child_pre_probe = cadence_spi_child_pre_probe,Quoted 3 lines
.probe =
cadence_spi_probe,};
Simon, can you please check if this DM bit is correct ?
Quoted 10 lines
(quoted diff) +0
-0
b/drivers/spi/cadence_qspi_apb.cindex d053407..deffb6b 100644drivers/spi/cadence_qspi_apb.c +0
-0@@ -29,6 +29,9 @@#include <asm/io.h> #include <asm/errno.h> #include "cadence_qspi.h" Quoted 8 lines
Quoted 5 lines
drivers/spi/cadence_qspi_apb.c line 34
Quoted 3 lines
drivers/spi/cadence_qspi_apb.c +3
-0+#include <spi.h> +#include <spi_flash.h> +#include "../mtd/spi/sf_internal.h" Why do you need this include ?
Actually I am comparing the opcode to determine whether its a quad command. If yes, we need to setup the controller accordingly.
Quoted 8 lines
Sorry, this I wouldn't recommend as of now please assign quad directly instead setting up controller based on the flash stuff, Yes things need to change it on u-boot like spi-nor framework and currently we are working on it[1] will defiantly back with proper solution.
[1]
http://git.denx.de/?p=u-boot/u-boot-spi.git;a=shortlog;h=refs/heads/spi-no
r
Is this stuff in any way compatible with the spi-nor stuff in Linux ?
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
Quoted 83 lines · Marek Vasut
Quoted 82 lines · Jagan Teki
Quoted 67 lines · Chin Liang See
Quoted 66 lines · marex at denx.de
Quoted 49 lines · Chin Liang See
Enable the quad output fast read and quad input fast program support. Quad mode is supported by Cadence QSPI controller.
Signed-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Stefan Roese <[email protected]>Cc Vikas Manocha <[email protected]>Cc Jagannadh Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>---
drivers/spi/cadence_qspi.c | 11 +++++++++++ drivers/spi/cadence_qspi_apb.c | 16 ++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-)drivers/spi/cadence_qspi.c +10
-0@@ -318,6 +318,16 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) return 0; } +static int cadence_spi_child_pre_probe (struct udevice *dev) +{ +struct spi_slave *slave =dev_get_parentdata (dev); + +/* Cadence QSPI controller can support quad read and program */ + slave->op_mode_rx =SPI_OPM_RX_QOF ; + slave->op_mode_tx =SPI_OPM_TX_QPP ; +return 0 ; +} +static const struct dm_spi_ops cadence_spi_ops = {.xfer =
cadence_spi_xfer,
.set_speed =cadence_spi_set_speed,drivers/spi/cadence_qspi.c +1
-0@@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = { .ofdata_to_platdata = cadence_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata), .priv_auto_alloc_size = sizeof(struct cadence_spi_priv), + .child_pre_probe = cadence_spi_child_pre_probe,Quoted 3 lines
.probe =
cadence_spi_probe,};
Simon, can you please check if this DM bit is correct ?
Quoted 10 lines
(quoted diff) +0
-0
b/drivers/spi/cadence_qspi_apb.cindex d053407..deffb6b 100644drivers/spi/cadence_qspi_apb.c +0
-0@@ -29,6 +29,9 @@#include <asm/io.h> #include <asm/errno.h> #include "cadence_qspi.h" Quoted 8 lines
Quoted 5 lines
drivers/spi/cadence_qspi_apb.c line 34
Quoted 3 lines
drivers/spi/cadence_qspi_apb.c +3
-0+#include <spi.h> +#include <spi_flash.h> +#include "../mtd/spi/sf_internal.h" Why do you need this include ?
Actually I am comparing the opcode to determine whether its a quad command. If yes, we need to setup the controller accordingly.
Sorry, this I wouldn't recommend as of now please assign quad directly instead setting up controller based on the flash stuff, Yes things need to change it on u-boot like spi-nor framework and currently we are working on it[1] will defiantly back with proper solution.
Quoted 5 lines
Is this stuff in any way compatible with the spi-nor stuff in Linux ?
Main intention is to compatible with Linux spi-nor, but instead of direct porting - this way is to make
enhancements step by step.
thanks!
Signature · 1 line
Jagan | openedev.
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
Quoted 89 lines · Jagan Teki
Quoted 88 lines · Marek Vasut
Quoted 86 lines · Jagan Teki
Quoted 68 lines · Chin Liang See
Quoted 67 lines · marex at denx.de
Quoted 43 lines · Chin Liang See
Enable the quad output fast read and quad input fast program support. Quad mode is supported by Cadence QSPI controller.
Signed-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Stefan Roese <[email protected]>Cc Vikas Manocha <[email protected]>Cc Jagannadh Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>---
drivers/spi/cadence_qspi.c | 11 +++++++++++ drivers/spi/cadence_qspi_apb.c | 16 ++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-)(quoted diff) +0
-0
b/drivers/spi/cadence_qspi.cindex 34a0f46..c6b69c4 100644drivers/spi/cadence_qspi.c +10
-0@@ -318,6 +318,16 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) return 0; } +static int cadence_spi_child_pre_probe (struct udevice *dev) +{ +struct spi_slave *slave =dev_get_parentdata (dev); + +/* Cadence QSPI controller can support quad read and program */ + slave->op_mode_rx =SPI_OPM_RX_QOF ; + slave->op_mode_tx =SPI_OPM_TX_QPP ; +return 0 ; +} +static const struct dm_spi_ops cadence_spi_ops = {.xfer =
cadence_spi_xfer,
.set_speed =cadence_spi_set_speed,drivers/spi/cadence_qspi.c +0
-0@@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = {drivers/spi/cadence_qspi.c U_BOOT_DRIVER(cadence_spi) = {
Quoted 10 lines
drivers/spi/cadence_qspi.c +1
-0.ofdata_to_platdata = cadence_spi_ofdata_to_platdata, .platdata_auto_alloc_size =sizeof (struct cadence_spi_platdata), .priv_auto_alloc_size = sizeof(struct cadence_spi_priv), + .child_pre_probe = cadence_spi_child_pre_probe, .probe = cadence_spi_probe, };Simon, can you please check if this DM bit is correct ?
Quoted 10 lines
(quoted diff) +0
-0
b/drivers/spi/cadence_qspi_apb.cindex d053407..deffb6b 100644drivers/spi/cadence_qspi_apb.c +0
-0@@ -29,6 +29,9 @@#include <asm/io.h> #include <asm/errno.h> #include "cadence_qspi.h" Quoted 8 lines
Quoted 5 lines
drivers/spi/cadence_qspi_apb.c line 34
Quoted 3 lines
drivers/spi/cadence_qspi_apb.c +3
-0+#include <spi.h> +#include <spi_flash.h> +#include "../mtd/spi/sf_internal.h" Why do you need this include ?
Actually I am comparing the opcode to determine whether its a quad command. If yes, we need to setup the controller accordingly.
Sorry, this I wouldn't recommend as of now please assign quad directly instead setting up controller based on the flash stuff, Yes things need to change it on u-boot like spi-nor framework and currently we are working on it[1] will defiantly back with proper solution.
[1]
http://git.denx.de/?p=u-boot/u-boot-spi.git;a=shortlog;h=refs/heads/spi-
no r
Quoted 5 lines
Quoted 1 line
Is this stuff in any way compatible with the spi-nor stuff in Linux ?
Main intention is to compatible with Linux spi-nor, but instead of direct porting - this way is to make
enhancements step by step.
Why can't you port the SPI-NOR from Linux directly ?
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
Quoted 90 lines · Marek Vasut
Quoted 89 lines · Jagan Teki
Quoted 88 lines · Marek Vasut
Quoted 86 lines · Jagan Teki
Quoted 68 lines · Chin Liang See
Quoted 67 lines · marex at denx.de
Quoted 43 lines · Chin Liang See
Enable the quad output fast read and quad input fast program support. Quad mode is supported by Cadence QSPI controller.
Signed-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Stefan Roese <[email protected]>Cc Vikas Manocha <[email protected]>Cc Jagannadh Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>---
drivers/spi/cadence_qspi.c | 11 +++++++++++ drivers/spi/cadence_qspi_apb.c | 16 ++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-)(quoted diff) +0
-0
b/drivers/spi/cadence_qspi.cindex 34a0f46..c6b69c4 100644drivers/spi/cadence_qspi.c +10
-0@@ -318,6 +318,16 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) return 0; } +static int cadence_spi_child_pre_probe (struct udevice *dev) +{ +struct spi_slave *slave =dev_get_parentdata (dev); + +/* Cadence QSPI controller can support quad read and program */ + slave->op_mode_rx =SPI_OPM_RX_QOF ; + slave->op_mode_tx =SPI_OPM_TX_QPP ; +return 0 ; +} +static const struct dm_spi_ops cadence_spi_ops = {.xfer =
cadence_spi_xfer,
.set_speed =cadence_spi_set_speed,drivers/spi/cadence_qspi.c +0
-0@@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = {drivers/spi/cadence_qspi.c U_BOOT_DRIVER(cadence_spi) = {
Quoted 10 lines
drivers/spi/cadence_qspi.c +1
-0.ofdata_to_platdata = cadence_spi_ofdata_to_platdata, .platdata_auto_alloc_size =sizeof (struct cadence_spi_platdata), .priv_auto_alloc_size = sizeof(struct cadence_spi_priv), + .child_pre_probe = cadence_spi_child_pre_probe, .probe = cadence_spi_probe, };Simon, can you please check if this DM bit is correct ?
Quoted 10 lines
(quoted diff) +0
-0
b/drivers/spi/cadence_qspi_apb.cindex d053407..deffb6b 100644drivers/spi/cadence_qspi_apb.c +0
-0@@ -29,6 +29,9 @@#include <asm/io.h> #include <asm/errno.h> #include "cadence_qspi.h" Quoted 8 lines
Quoted 5 lines
drivers/spi/cadence_qspi_apb.c line 36
Quoted 3 lines
drivers/spi/cadence_qspi_apb.c +3
-0+#include <spi.h> +#include <spi_flash.h> +#include "../mtd/spi/sf_internal.h" Why do you need this include ?
Actually I am comparing the opcode to determine whether its a quad command. If yes, we need to setup the controller accordingly.
Sorry, this I wouldn't recommend as of now please assign quad directly instead setting up controller based on the flash stuff, Yes things need to change it on u-boot like spi-nor framework and currently we are working on it[1] will defiantly back with proper solution.
[1]
http://git.denx.de/?p=u-boot/u-boot-spi.git;a=shortlog;h=refs/heads/spi-
no r
Quoted 7 lines
Quoted 5 lines
Quoted 1 line
Is this stuff in any way compatible with the spi-nor stuff in Linux ?
Main intention is to compatible with Linux spi-nor, but instead of direct porting - this way is to make
enhancements step by step.Why can't you port the SPI-NOR from Linux directly ?
There are some features that are not added in Linux, yet like BAR, dual_flash and way of handling
ops like erase/read/write logic need to compatible to these features. I'm planning to make these ops logic sits as it is and add spi-nor on top it.
This way looks better for testing as I experienced so-far, and I'm hoping at the end these no much significant difference between Linux vs U-Boot except these feature sets.
thanks!
Signature · 1 line
Jagan | openedev.
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
In reply to Jagan TekiQuoted 67 lines · Jagan Teki
Quoted 63 lines · Chin Liang See
Quoted 47 lines · marex at denx.de
Quoted 37 lines · Chin Liang See
Enable the quad output fast read and quad input fast program support. Quad mode is supported by Cadence QSPI controller.
Signed-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Stefan Roese <[email protected]>Cc Vikas Manocha <[email protected]>Cc Jagannadh Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>--- drivers/spi/cadence_qspi.c | 11 +++++++++++ drivers/spi/cadence_qspi_apb.c | 16 ++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-)drivers/spi/cadence_qspi.c +10
-0@@ -318,6 +318,16 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) return 0; } +static int cadence_spi_child_pre_probe (struct udevice *dev) +{ +struct spi_slave *slave =dev_get_parentdata (dev); + +/* Cadence QSPI controller can support quad read and program */ + slave->op_mode_rx =SPI_OPM_RX_QOF ; + slave->op_mode_tx =SPI_OPM_TX_QPP ; +return 0 ; +} +static const struct dm_spi_ops cadence_spi_ops = { .xfer = cadence_spi_xfer, .set_speed = cadence_spi_set_speed,drivers/spi/cadence_qspi.c U_BOOT_DRIVER(cadence_spi) = { · line 356
Quoted 6 lines
drivers/spi/cadence_qspi.c +1
-0@@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = { .ofdata_to_platdata = cadence_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata), .priv_auto_alloc_size = sizeof(struct cadence_spi_priv), + .child_pre_probe = cadence_spi_child_pre_probe, .probe = cadence_spi_probe, };Simon, can you please check if this DM bit is correct ?
Quoted 14 lines
drivers/spi/cadence_qspi_apb.c line 34
Quoted 11 lines
(quoted diff) +0
-0
b/drivers/spi/cadence_qspi_apb.cindex d053407..deffb6b 100644drivers/spi/cadence_qspi_apb.c +3
-0@@ -29,6 +29,9 @@#include <asm/io.h> #include <asm/errno.h> #include "cadence_qspi.h" +#include <spi.h> +#include <spi_flash.h> +#include "../mtd/spi/sf_internal.h" Why do you need this include ?
Quoted 2 lines
Actually I am comparing the opcode to determine whether its a quad command. If yes, we need to setup the controller accordingly.
Quoted 6 lines
Sorry, this I wouldn't recommend as of now please assign quad directly instead setting up controller based on the flash stuff, Yes things need to change it on u-boot like spi-nor framework and currently we are working on it[1] will defiantly back with proper solution.
[1] http://git.denx.de/?p=u-boot/u-boot-spi.git;a=shortlog;h=refs/heads/spi-nor
What's not clear to me here is, are you implementing a similar framework to what the linux kernel has but with the same name, or slowly introducing the framework from the linux kernel? Thanks.
Signature · 8 lines
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PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
Quoted 73 lines · Tom Rini
Quoted 72 lines · Jagan Teki
Quoted 63 lines · Chin Liang See
Quoted 47 lines · marex at denx.de
Quoted 37 lines · Chin Liang See
Enable the quad output fast read and quad input fast program support. Quad mode is supported by Cadence QSPI controller.
Signed-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Stefan Roese <[email protected]>Cc Vikas Manocha <[email protected]>Cc Jagannadh Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>--- drivers/spi/cadence_qspi.c | 11 +++++++++++ drivers/spi/cadence_qspi_apb.c | 16 ++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-)drivers/spi/cadence_qspi.c +10
-0@@ -318,6 +318,16 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) return 0; } +static int cadence_spi_child_pre_probe (struct udevice *dev) +{ +struct spi_slave *slave =dev_get_parentdata (dev); + +/* Cadence QSPI controller can support quad read and program */ + slave->op_mode_rx =SPI_OPM_RX_QOF ; + slave->op_mode_tx =SPI_OPM_TX_QPP ; +return 0 ; +} +static const struct dm_spi_ops cadence_spi_ops = { .xfer = cadence_spi_xfer, .set_speed = cadence_spi_set_speed,drivers/spi/cadence_qspi.c U_BOOT_DRIVER(cadence_spi) = { · line 356
Quoted 6 lines
drivers/spi/cadence_qspi.c +1
-0@@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = { .ofdata_to_platdata = cadence_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata), .priv_auto_alloc_size = sizeof(struct cadence_spi_priv), + .child_pre_probe = cadence_spi_child_pre_probe, .probe = cadence_spi_probe, };Simon, can you please check if this DM bit is correct ?
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drivers/spi/cadence_qspi_apb.c line 34
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(quoted diff) +0
-0
b/drivers/spi/cadence_qspi_apb.cindex d053407..deffb6b 100644drivers/spi/cadence_qspi_apb.c +3
-0@@ -29,6 +29,9 @@#include <asm/io.h> #include <asm/errno.h> #include "cadence_qspi.h" +#include <spi.h> +#include <spi_flash.h> +#include "../mtd/spi/sf_internal.h" Why do you need this include ?
Quoted 2 lines
Actually I am comparing the opcode to determine whether its a quad command. If yes, we need to setup the controller accordingly.
Sorry, this I wouldn't recommend as of now please assign quad directly instead setting up controller based on the flash stuff, Yes things need to change it on u-boot like spi-nor framework and currently we are working on it[1] will defiantly back with proper solution.
Quoted 5 lines
What's not clear to me here is, are you implementing a similar framework to what the linux kernel has but with the same name, or slowly introducing the framework from the linux kernel? Thanks.
I can't say it's a direct Linux copy at least from the initial support, but with same compatibility means same style of approach and will slowly add missing futures.
Things which are differ from Linux, from base support
- Code logic of spi_flash operations erase/read/write
- As these flash ops are bound with BAR, dual_flash which are not there yet in Linux
- Handling of spi-nor in Linux from high level with MTD, but here with spi_flash
- No in-build MTD stuff
And these differ points, may implement same as Linux in future based on our u-boot design and need, but will take significant amount of time.
Apart from adding spi-nor, there is a quite significant tuning required on whole spi_flash handling code like, handling cmd_sf with the help of some spi_flash could be include/spi_flash.h or any common code in drivers/mtd/spi instead of direct calls to spi-uclass [1] this is to isolate flash handling directly to spi.
And this will also an enhancement for spi-nand addition in future, where spi_flash will handling spi-nand.c at low level.
thanks!
Signature · 1 line
Jagan | openedev.
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
In reply to Marek VasutHi Marek,
Quoted 38 lines · Marek Vasut
Quoted 37 lines · Chin Liang See
Enable the quad output fast read and quad input fast program support. Quad mode is supported by Cadence QSPI controller.
Signed-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Stefan Roese <[email protected]>Cc Vikas Manocha <[email protected]>Cc Jagannadh Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>--- drivers/spi/cadence_qspi.c | 11 +++++++++++ drivers/spi/cadence_qspi_apb.c | 16 ++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-)drivers/spi/cadence_qspi.c +10
-0@@ -318,6 +318,16 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) return 0; } +static int cadence_spi_child_pre_probe (struct udevice *dev) +{ +struct spi_slave *slave =dev_get_parentdata (dev); + +/* Cadence QSPI controller can support quad read and program */ + slave->op_mode_rx =SPI_OPM_RX_QOF ; + slave->op_mode_tx =SPI_OPM_TX_QPP ; +return 0 ; +} +static const struct dm_spi_ops cadence_spi_ops = { .xfer = cadence_spi_xfer, .set_speed = cadence_spi_set_speed,@@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = {
Quoted 8 lines
drivers/spi/cadence_qspi.c U_BOOT_DRIVER(cadence_spi) = { · line 356
Quoted 6 lines
drivers/spi/cadence_qspi.c +1
-0.ofdata_to_platdata = cadence_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata), .priv_auto_alloc_size = sizeof(struct cadence_spi_priv), + .child_pre_probe = cadence_spi_child_pre_probe, .probe = cadence_spi_probe, };Simon, can you please check if this DM bit is correct ?
It seems OK to me. I worry a bit that xfer() is causing SPI controller changes to happen based on inspection of the bytes being sent. I think that is what Marek is saying below. Do we need a new method for SPI to set the protocol?
The license header in cadence_qspi_apb.c should move to SPDX.
For the driver model bits:
Quoted 15 lines
drivers/spi/cadence_qspi_apb.c line 34
Quoted 12 lines
(quoted diff) +0
-0
b/drivers/spi/cadence_qspi_apb.cindex d053407..deffb6b 100644drivers/spi/cadence_qspi_apb.c +3
-0@@ -29,6 +29,9 @@#include <asm/io.h> #include <asm/errno.h> #include "cadence_qspi.h" +#include <spi.h> +#include <spi_flash.h> +#include "../mtd/spi/sf_internal.h" Why do you need this include ?
Quoted 1 line
[...]
Regards,
Simon
PATCH 1/1 spi: cadence_qspi: Enable quad mode for read and programming
Quoted 55 lines · Simon Glass
Hi Marek,
Quoted 52 lines · Marek Vasut
Quoted 51 lines · Chin Liang See
Enable the quad output fast read and quad input fast program support. Quad mode is supported by Cadence QSPI controller.
Signed-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Stefan Roese <[email protected]>Cc Vikas Manocha <[email protected]>Cc Jagannadh Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>---
drivers/spi/cadence_qspi.c | 11 +++++++++++ drivers/spi/cadence_qspi_apb.c | 16 ++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-)drivers/spi/cadence_qspi.c +10
-0@@ -318,6 +318,16 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) return 0; } +static int cadence_spi_child_pre_probe (struct udevice *dev) +{ +struct spi_slave *slave =dev_get_parentdata (dev); + +/* Cadence QSPI controller can support quad read and program */ + slave->op_mode_rx =SPI_OPM_RX_QOF ; + slave->op_mode_tx =SPI_OPM_TX_QPP ; +return 0 ; +} +static const struct dm_spi_ops cadence_spi_ops = {.xfer =
cadence_spi_xfer,
.set_speed =cadence_spi_set_speed,drivers/spi/cadence_qspi.c +1
-0@@ -341,5 +351,6 @@ U_BOOT_DRIVER(cadence_spi) = { .ofdata_to_platdata = cadence_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata), .priv_auto_alloc_size = sizeof(struct cadence_spi_priv), + .child_pre_probe = cadence_spi_child_pre_probe,.probe =
cadence_spi_probe,
Quoted 8 lines
Quoted 3 lines
Quoted 1 line
};
Simon, can you please check if this DM bit is correct ?
It seems OK to me. I worry a bit that
xfer()is causing SPI controller changes to happen based on inspection of the bytes being sent. I think that is what Marek is saying below. Do we need a new method for SPI to set the protocol?
Yes, that's what I'm saying.
Quoted 5 lines
The license header in
cadence_qspi_apb.cshould move to SPDX.For the driver model bits:
Reviewed-by Simon Glass <[email protected]>
Thanks :)