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arm: socfpga: Add support for the Terasic DE-0 Atlas board

PATCH New dinguyen at opensource.altera.com 5 participants 15 messages Aug 31, 2015 – Sep 2, 2015

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Arm (32-bit) Arm sub-architectures Arm/socfpga architecture
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dinguyen at opensource.altera.com

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#0 lore raw

PATCH 1/1 arm: socfpga: Add support for the Terasic DE-0 Atlas board

From: Dinh Nguyen <[email protected]>

Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is a bit different because it has a KSZ9031 PHY, so for now, ethernet doesn't quite work yet, as a few patches are needed to support the PHY.

Signed-off-by Dinh Nguyen <[email protected]>

---
Hi Marek,

This patch is based on your u-boot-socfpga/wip/boards branch.

Thanks,
Dinh

---
 arch/arm/dts/Makefile                        |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts |  61 +++
 arch/arm/mach-socfpga/Kconfig                |   7 +
 board/terasic/de0/MAINTAINERS                |   5 +
 board/terasic/de0/Makefile                   |   9 +
 board/terasic/de0/qts/iocsr_config.h         | 658 +++++++++++++++++++++++++++
 board/terasic/de0/qts/pinmux_config.h        | 220 +++++++++
 board/terasic/de0/qts/pll_config.h           |  85 ++++
 board/terasic/de0/qts/sdram_config.h         | 342 ++++++++++++++
 board/terasic/de0/socfpga.c                  |  22 +
 configs/socfpga_de0_defconfig                |  21 +
 include/configs/socfpga_de0.h                |  88 ++++
 12 files changed, 1519 insertions(+)
 create mode 100644 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts
 create mode 100644 board/terasic/de0/MAINTAINERS
 create mode 100644 board/terasic/de0/Makefile
 create mode 100644 board/terasic/de0/qts/iocsr_config.h
 create mode 100644 board/terasic/de0/qts/pinmux_config.h
 create mode 100644 board/terasic/de0/qts/pll_config.h
 create mode 100644 board/terasic/de0/qts/sdram_config.h
 create mode 100644 board/terasic/de0/socfpga.c
 create mode 100644 configs/socfpga_de0_defconfig
 create mode 100644 include/configs/socfpga_de0.h
arch/arm/dts/Makefile +1 -0
index c53f5fd..b9778db 100644
@@ -58,6 +58,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) +=				\
 	socfpga_arria5_socdk.dtb			\
 	socfpga_cyclone5_mcvevk.dtb			\
 	socfpga_cyclone5_socdk.dtb			\
+	socfpga_cyclone5_de0_sockit.dtb			\
 	socfpga_cyclone5_sockit.dtb			\
 	socfpga_cyclone5_socrates.dtb
 dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb
arch/arm/dts/socfpga_cyclone5_de0_sockit.dts new file +61 -0

61 lines not on this page · raw message

arch/arm/mach-socfpga/Kconfig +7 -0
index 420f66a..6b2bba8 100644
@@ -18,6 +18,10 @@ config TARGET_SOCFPGA_CYCLONE5_SOCDK
 	bool "Altera SOCFPGA SoCDK (Cyclone V)"
 	select TARGET_SOCFPGA_CYCLONE5
 
+config TARGET_SOCFPGA_TERASIC_DE0
+	bool "Terasic DE0-Nano-Atlas (Cyclone V)"
+	select TARGET_SOCFPGA_CYCLONE5
+
 config TARGET_SOCFPGA_TERASIC_SOCKIT
 	bool "Terasic SoCkit (Cyclone V)"
 	select TARGET_SOCFPGA_CYCLONE5

@@ -31,12 +35,14 @@ endchoice
 config SYS_BOARD
 	default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
 	default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
+	default "de0" if TARGET_SOCFPGA_TERASIC_DE0
 	default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
 	default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
 
 config SYS_VENDOR
 	default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
 	default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
+	default "terasic" if TARGET_SOCFPGA_TERASIC_DE0
 	default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
 	default "denx" if TARGET_SOCFPGA_DENX_MCVEVK
 

@@ -46,6 +52,7 @@ config SYS_SOC
 config SYS_CONFIG_NAME
 	default "socfpga_arria5" if TARGET_SOCFPGA_ARRIA5_SOCDK
 	default "socfpga_cyclone5" if TARGET_SOCFPGA_CYCLONE5_SOCDK
+	default "socfpga_de0" if TARGET_SOCFPGA_TERASIC_DE0
 	default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
 	default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
board/terasic/de0/MAINTAINERS new file +5 -0
new file mode 100644
index 0000000..9875046
@@ -0,0 +1,5 @@
+SOCFPGA ATLAS BOARD
+M:	Dinh Nguyen <[email protected]>
+S:	Maintained
+F:	include/configs/socfpga_cyclone5.h
+F:	configs/socfpga_cyclone5_defconfig
board/terasic/de0/Makefile new file +9 -0
new file mode 100644
index 0000000..86f9b78
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2001-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+# (C) Copyright 2010, Thomas Chou <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= socfpga.o
board/terasic/de0/qts/iocsr_config.h new file +658 -0

658 lines not on this page · raw message

board/terasic/de0/qts/pinmux_config.h new file +220 -0

220 lines not on this page · raw message

board/terasic/de0/qts/pll_config.h new file +85 -0

85 lines not on this page · raw message

board/terasic/de0/qts/sdram_config.h new file +342 -0

342 lines not on this page · raw message

board/terasic/de0/socfpga.c new file +22 -0
new file mode 100644
index 0000000..3ccc2a7
@@ -0,0 +1,22 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void s_init(void) {}
+
+/*
+ * Miscellaneous platform dependent initialisations
+ */
+int board_init(void)
+{
+	/* Address of boot parameters for ATAG (if ATAG is used) */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+	return 0;
+}
configs/socfpga_de0_defconfig new file +21 -0
new file mode 100644
index 0000000..000f322
@@ -0,0 +1,21 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_TARGET_SOCFPGA_CYCLONE5=y
+CONFIG_TARGET_SOCFPGA_TERASIC_DE0=y
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_sockit"
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_DM_GPIO=y
+CONFIG_DWAPB_GPIO=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_DM_SEQ_ALIAS=y
+CONFIG_SPL_SIMPLE_BUS=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_ADDR=0x00800000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
include/configs/socfpga_de0.h new file +88 -0

88 lines not on this page · raw message

Signature · 1 line
2.4.5
#1 lore raw

PATCH 1/1 arm: socfpga: Add support for the Terasic DE-0 Atlas board

Quoted 6 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is a bit different because it has a KSZ9031 PHY, so for now, ethernet doesn't quite work yet, as a few patches are needed to support the PHY.

I thought we did support the KSZ9031 PHY. What's the problem ?

Quoted 5 lines
Signed-off-by Dinh Nguyen <[email protected]>

---
Hi Marek,

This patch is based on your u-boot-socfpga/wip/boards branch.

OK, that makes sense.

Quoted 8 lines

Thanks,
Dinh

---
 arch/arm/dts/Makefile                        |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts |  61 +++
 arch/arm/mach-socfpga/Kconfig                |   7 +
 board/terasic/de0/MAINTAINERS                |   5 +
 board/terasic/de0/Makefile                   |   9 +

I think it might be clearer to rename it to de0-nano-soc, what do you think ? What's the difference between de0-nano-soc and atlas btw ?

[...]

Quoted 13 lines
configs/socfpga_de0_defconfig new file +7 -0
new file mode 100644
index 0000000..000f322
@@ -0,0 +1,21 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_TARGET_SOCFPGA_CYCLONE5=y
+CONFIG_TARGET_SOCFPGA_TERASIC_DE0=y
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_sockit"
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set

configs/socfpga_de0_defconfig line 17

Quoted 10 lines
configs/socfpga_de0_defconfig new file +10 -0
+# CONFIG_CMD_FLASH is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_DM_GPIO=y
+CONFIG_DWAPB_GPIO=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_DM_SEQ_ALIAS=y

I think you don't need the DM_SEQ_ALIAS, it's needed only for QSPI to enforce the SPI NOR ordering.

Quoted 40 lines
configs/socfpga_de0_defconfig new file +4 -0
+CONFIG_SPL_SIMPLE_BUS=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_ADDR=0x00800000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
include/configs/socfpga_de0.h new file +30 -0
new file mode 100644
index 0000000..47e18ba
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef __CONFIG_TERASIC_DE0_H__
+#define __CONFIG_TERASIC_DE0_H__
+
+#include <asm/arch/socfpga_base_addrs.h>
+
+/* U-Boot Commands */
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_DOS_PARTITION
+#define CONFIG_FAT_WRITE
+#define CONFIG_HW_WATCHDOG
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DFU
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_EXT4_WRITE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_FS_GENERIC
+#define CONFIG_CMD_GPIO
+#define CONFIG_CMD_GREPENV
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_PING

include/configs/socfpga_de0.h line 40

Quoted 10 lines
include/configs/socfpga_de0.h new file +10 -0
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_USB_MASS_STORAGE
+
+/* Memory configurations */
+#define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB */
+
+/* Booting Linux */
+#define CONFIG_BOOTDELAY	3
+#define CONFIG_BOOTFILE		"fitImage"
+#define CONFIG_BOOTARGS		"console=ttyS0,"

__stringify(CONFIG_BAUDRATE)

Quoted 15 lines
include/configs/socfpga_de0.h new file +15 -0
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
+#define CONFIG_BOOTCOMMAND	"run ramboot"
+#else
+#define CONFIG_BOOTCOMMAND	"run mmcload; run mmcboot"
+#endif
+#define CONFIG_LOADADDR		0x01000000
+#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
+
+/* Ethernet on SoC (EMAC) */
+#if defined(CONFIG_CMD_NET)
+
+/* PHY */
+#define CONFIG_PHY_MICREL
+#define CONFIG_PHY_MICREL_KSZ9031
+

include/configs/socfpga_de0.h line 65

Quoted 10 lines
include/configs/socfpga_de0.h new file +10 -0
+#endif
+
+/* USB */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_DWC2_REG_ADDR	SOCFPGA_USB1_ADDRESS
+#endif
+#define CONFIG_G_DNL_MANUFACTURER      "Terasic"
+
+/* Extra Environment */
+#define CONFIG_HOSTNAME		socfpga_cyclone5

socfpga_d0_nano_soc might be better ;-)

include/configs/socfpga_de0.h line 68

Quoted 3 lines
include/configs/socfpga_de0.h new file +3 -0
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"verify=n\0" \

What's this "verify" variable for ?

Quoted 20 lines
include/configs/socfpga_de0.h new file +20 -0
+	"loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+	"ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
+		"bootm ${loadaddr} - ${fdt_addr}\0" \
+	"bootimage=zImage\0" \
+	"fdt_addr=100\0" \
+	"fdtimage=socfpga.dtb\0" \
+		"fsloadcmd=ext2load\0" \
+	"bootm ${loadaddr} - ${fdt_addr}\0" \
+	"mmcroot=/dev/mmcblk0p2\0" \
+	"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
+		" root=${mmcroot} rw rootwait;" \
+		"bootz ${loadaddr} - ${fdt_addr}\0" \
+	"mmcload=mmc rescan;" \
+		"load mmc 0:1 ${loadaddr} ${bootimage};" \
+		"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
+
+/* The rest of the configuration is shared */
+#include <configs/socfpga_common.h>
+
+#endif	/* __CONFIG_TERASIC_DE0_H__ */
#2 lore raw

PATCH 1/1 arm: socfpga: Add support for the Terasic DE-0 Atlas board

Quoted 138 lines · marex at denx.de
Quoted 6 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is a bit different because it has a KSZ9031 PHY, so for now, ethernet doesn't quite work yet, as a few patches are needed to support the PHY.

I thought we did support the KSZ9031 PHY. What's the problem ?

Quoted 5 lines
Signed-off-by Dinh Nguyen <[email protected]>

---
Hi Marek,

This patch is based on your u-boot-socfpga/wip/boards branch.

OK, that makes sense.

Quoted 8 lines

Thanks,
Dinh

---
 arch/arm/dts/Makefile                        |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts |  61 +++
 arch/arm/mach-socfpga/Kconfig                |   7 +
 board/terasic/de0/MAINTAINERS                |   5 +
 board/terasic/de0/Makefile                   |   9 +

I think it might be clearer to rename it to de0-nano-soc, what do you think ? What's the difference between de0-nano-soc and atlas btw ?

[...]

Quoted 13 lines
configs/socfpga_de0_defconfig new file +7 -0
new file mode 100644
index 0000000..000f322
@@ -0,0 +1,21 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_TARGET_SOCFPGA_CYCLONE5=y
+CONFIG_TARGET_SOCFPGA_TERASIC_DE0=y
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_sockit"
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set

configs/socfpga_de0_defconfig line 17

Quoted 10 lines
configs/socfpga_de0_defconfig new file +10 -0
+# CONFIG_CMD_FLASH is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_DM_GPIO=y
+CONFIG_DWAPB_GPIO=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_DM_SEQ_ALIAS=y

I think you don't need the DM_SEQ_ALIAS, it's needed only for QSPI to enforce the SPI NOR ordering.

Quoted 40 lines
configs/socfpga_de0_defconfig new file +4 -0
+CONFIG_SPL_SIMPLE_BUS=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_ADDR=0x00800000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
include/configs/socfpga_de0.h new file +30 -0
new file mode 100644
index 0000000..47e18ba
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef __CONFIG_TERASIC_DE0_H__
+#define __CONFIG_TERASIC_DE0_H__
+
+#include <asm/arch/socfpga_base_addrs.h>
+
+/* U-Boot Commands */
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_DOS_PARTITION
+#define CONFIG_FAT_WRITE
+#define CONFIG_HW_WATCHDOG
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DFU
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_EXT4_WRITE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_FS_GENERIC
+#define CONFIG_CMD_GPIO
+#define CONFIG_CMD_GREPENV
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_PING

include/configs/socfpga_de0.h line 40

Quoted 10 lines
include/configs/socfpga_de0.h new file +10 -0
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_USB_MASS_STORAGE
+
+/* Memory configurations */
+#define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB */
+
+/* Booting Linux */
+#define CONFIG_BOOTDELAY	3
+#define CONFIG_BOOTFILE		"fitImage"
+#define CONFIG_BOOTARGS		"console=ttyS0,"

__stringify(CONFIG_BAUDRATE)

Quoted 15 lines
include/configs/socfpga_de0.h new file +15 -0
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
+#define CONFIG_BOOTCOMMAND	"run ramboot"
+#else
+#define CONFIG_BOOTCOMMAND	"run mmcload; run mmcboot"
+#endif
+#define CONFIG_LOADADDR		0x01000000
+#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
+
+/* Ethernet on SoC (EMAC) */
+#if defined(CONFIG_CMD_NET)
+
+/* PHY */
+#define CONFIG_PHY_MICREL
+#define CONFIG_PHY_MICREL_KSZ9031
+

include/configs/socfpga_de0.h line 65

Quoted 10 lines
include/configs/socfpga_de0.h new file +10 -0
+#endif
+
+/* USB */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_DWC2_REG_ADDR	SOCFPGA_USB1_ADDRESS
+#endif
+#define CONFIG_G_DNL_MANUFACTURER      "Terasic"
+
+/* Extra Environment */
+#define CONFIG_HOSTNAME		socfpga_cyclone5

socfpga_d0_nano_soc might be better ;-)

Quoted 5 lines

include/configs/socfpga_de0.h line 68

Quoted 3 lines
include/configs/socfpga_de0.h new file +3 -0
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"verify=n\0" \

What's this "verify" variable for ?

This is to enable the checksum of next boot image. But I suspect it should be no for zImage as decompression engine will check that?

Thanks
Chin Liang

Quoted 21 lines
Quoted 21 lines
include/configs/socfpga_de0.h new file +20 -0
+	"loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+	"ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
+		"bootm ${loadaddr} - ${fdt_addr}\0" \
+	"bootimage=zImage\0" \
+	"fdt_addr=100\0" \
+	"fdtimage=socfpga.dtb\0" \
+		"fsloadcmd=ext2load\0" \
+	"bootm ${loadaddr} - ${fdt_addr}\0" \
+	"mmcroot=/dev/mmcblk0p2\0" \
+	"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
+		" root=${mmcroot} rw rootwait;" \
+		"bootz ${loadaddr} - ${fdt_addr}\0" \
+	"mmcload=mmc rescan;" \
+		"load mmc 0:1 ${loadaddr} ${bootimage};" \
+		"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
+
+/* The rest of the configuration is shared */
+#include <configs/socfpga_common.h>
+
+#endif	/* __CONFIG_TERASIC_DE0_H__ */
#3 lore raw

PATCH 1/1 arm: socfpga: Add support for the Terasic DE-0 Atlas board

Quoted 2 lines · Chin Liang See
Quoted 1 line · marex at denx.de

On Monday, August 31, 2015 at 09:57:05 PM, dinguyen at opensource.altera.com

Quoted 140 lines · wrote:
Quoted 140 lines
Quoted 6 lines

From: Dinh Nguyen <[email protected]>

Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is a bit different because it has a KSZ9031 PHY, so for now, ethernet doesn't quite work yet, as a few patches are needed to support the PHY.

I thought we did support the KSZ9031 PHY. What's the problem ?

Quoted 5 lines
Signed-off-by Dinh Nguyen <[email protected]>

---
Hi Marek,

This patch is based on your u-boot-socfpga/wip/boards branch.

OK, that makes sense.

Quoted 9 lines

Thanks,
Dinh
---

 arch/arm/dts/Makefile                        |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts |  61 +++
 arch/arm/mach-socfpga/Kconfig                |   7 +
 board/terasic/de0/MAINTAINERS                |   5 +
 board/terasic/de0/Makefile                   |   9 +

I think it might be clearer to rename it to de0-nano-soc, what do you think ? What's the difference between de0-nano-soc and atlas btw ?

[...]

Quoted 13 lines
(quoted diff) +0 -0

b/configs/socfpga_de0_defconfig new file mode 100644 index 0000000..000f322

configs/socfpga_de0_defconfig new file +7 -0
@@ -0,0 +1,21 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_TARGET_SOCFPGA_CYCLONE5=y
+CONFIG_TARGET_SOCFPGA_TERASIC_DE0=y
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_sockit"
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set

configs/socfpga_de0_defconfig line 17

Quoted 10 lines
configs/socfpga_de0_defconfig new file +10 -0
+# CONFIG_CMD_FLASH is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_DM_GPIO=y
+CONFIG_DWAPB_GPIO=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_DM_SEQ_ALIAS=y

I think you don't need the DM_SEQ_ALIAS, it's needed only for QSPI to enforce the SPI NOR ordering.

Quoted 40 lines
configs/socfpga_de0_defconfig new file +4 -0
+CONFIG_SPL_SIMPLE_BUS=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_ADDR=0x00800000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
(quoted diff) +0 -0

b/include/configs/socfpga_de0.h new file mode 100644 index 0000000..47e18ba

include/configs/socfpga_de0.h new file +30 -0
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef __CONFIG_TERASIC_DE0_H__
+#define __CONFIG_TERASIC_DE0_H__
+
+#include <asm/arch/socfpga_base_addrs.h>
+
+/* U-Boot Commands */
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_DOS_PARTITION
+#define CONFIG_FAT_WRITE
+#define CONFIG_HW_WATCHDOG
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DFU
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_EXT4_WRITE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_FS_GENERIC
+#define CONFIG_CMD_GPIO
+#define CONFIG_CMD_GREPENV
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_PING

include/configs/socfpga_de0.h line 40

Quoted 10 lines
include/configs/socfpga_de0.h new file +10 -0
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_USB_MASS_STORAGE
+
+/* Memory configurations */
+#define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB */
+
+/* Booting Linux */
+#define CONFIG_BOOTDELAY	3
+#define CONFIG_BOOTFILE		"fitImage"
+#define CONFIG_BOOTARGS		"console=ttyS0,"

__stringify(CONFIG_BAUDRATE)

Quoted 15 lines
include/configs/socfpga_de0.h new file +15 -0
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
+#define CONFIG_BOOTCOMMAND	"run ramboot"
+#else
+#define CONFIG_BOOTCOMMAND	"run mmcload; run mmcboot"
+#endif
+#define CONFIG_LOADADDR		0x01000000
+#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
+
+/* Ethernet on SoC (EMAC) */
+#if defined(CONFIG_CMD_NET)
+
+/* PHY */
+#define CONFIG_PHY_MICREL
+#define CONFIG_PHY_MICREL_KSZ9031
+

include/configs/socfpga_de0.h line 65

Quoted 10 lines
include/configs/socfpga_de0.h new file +10 -0
+#endif
+
+/* USB */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_DWC2_REG_ADDR	SOCFPGA_USB1_ADDRESS
+#endif
+#define CONFIG_G_DNL_MANUFACTURER      "Terasic"
+
+/* Extra Environment */
+#define CONFIG_HOSTNAME		socfpga_cyclone5

socfpga_d0_nano_soc might be better ;-)

Quoted 8 lines
Quoted 5 lines

include/configs/socfpga_de0.h line 68

Quoted 3 lines
include/configs/socfpga_de0.h new file +3 -0
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"verify=n\0" \

What's this "verify" variable for ?

This is to enable the checksum of next boot image. But I suspect it should be no for zImage as decompression engine will check that?

There is no checksum involved when booting zImage (which is the reason zImage is not the preferred image format).

#4 lore raw

PATCH 1/1 arm: socfpga: Add support for the Terasic DE-0 Atlas board

In reply to Marek Vasut
Quoted 27 lines · Marek Vasut
Quoted 6 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is a bit different because it has a KSZ9031 PHY, so for now, ethernet doesn't quite work yet, as a few patches are needed to support the PHY.

I thought we did support the KSZ9031 PHY. What's the problem ?

Quoted 5 lines
Signed-off-by Dinh Nguyen <[email protected]>

---
Hi Marek,

This patch is based on your u-boot-socfpga/wip/boards branch.

OK, that makes sense.

Quoted 8 lines

Thanks,
Dinh

---
 arch/arm/dts/Makefile                        |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts |  61 +++
 arch/arm/mach-socfpga/Kconfig                |   7 +
 board/terasic/de0/MAINTAINERS                |   5 +
 board/terasic/de0/Makefile                   |   9 +
Quoted 2 lines

I think it might be clearer to rename it to de0-nano-soc, what do you think ? What's the difference between de0-nano-soc and atlas btw ?

Unless they are going to make "de0-mega".. I'd say "de0" is clean enough.

Quoted 1 line

configs/socfpga_de0_defconfig

Quoted 1 line
configs/socfpga_de0_defconfig +0 -0

...and matches defconfig name

Quoted 1 line
Quoted 1 line

+++ b/include/configs/socfpga_de0.h

...and header file, etc.

Quoted 4 lines

configs/socfpga_de0_defconfig

Quoted 2 lines
configs/socfpga_de0_defconfig +2 -0
+/* Extra Environment */
+#define CONFIG_HOSTNAME		socfpga_cyclone5

socfpga_d0_nano_soc might be better ;-)

socfpga_de0 might be better. No need to have kilometer long hostnames :-).

Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#5 lore raw

PATCH 1/1 arm: socfpga: Add support for the Terasic DE-0 Atlas board

Quoted 2 lines · Pavel Machek
Quoted 1 line · Marek Vasut

On Monday, August 31, 2015 at 09:57:05 PM, dinguyen at opensource.altera.com

Quoted 27 lines · wrote:
Quoted 27 lines
Quoted 6 lines

From: Dinh Nguyen <[email protected]>

Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is a bit different because it has a KSZ9031 PHY, so for now, ethernet doesn't quite work yet, as a few patches are needed to support the PHY.

I thought we did support the KSZ9031 PHY. What's the problem ?

Quoted 5 lines
Signed-off-by Dinh Nguyen <[email protected]>

---
Hi Marek,

This patch is based on your u-boot-socfpga/wip/boards branch.

OK, that makes sense.

Quoted 9 lines

Thanks,
Dinh
---

 arch/arm/dts/Makefile                        |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts |  61 +++
 arch/arm/mach-socfpga/Kconfig                |   7 +
 board/terasic/de0/MAINTAINERS                |   5 +
 board/terasic/de0/Makefile                   |   9 +
Quoted 5 lines
Quoted 2 lines

I think it might be clearer to rename it to de0-nano-soc, what do you think ? What's the difference between de0-nano-soc and atlas btw ?

Unless they are going to make "de0-mega".. I'd say "de0" is clean enough.

They already make de0-cv , which is cycloneV SoC based, so de0 is not clear enough, no way. They also make de0-nano , which is cycloneIV based (without soc).

Quoted 4 lines
Quoted 2 lines

configs/socfpga_de0_defconfig

Quoted 2 lines
configs/socfpga_de0_defconfig +0 -0

...and matches defconfig name

So rename the defconfig.

Quoted 3 lines
Quoted 1 line
Quoted 1 line

+++ b/include/configs/socfpga_de0.h

...and header file, etc.

And header file.

Quoted 6 lines
Quoted 4 lines

configs/socfpga_de0_defconfig

Quoted 2 lines
configs/socfpga_de0_defconfig +2 -0
+/* Extra Environment */
+#define CONFIG_HOSTNAME		socfpga_cyclone5

socfpga_d0_nano_soc might be better ;-)

socfpga_de0 might be better. No need to have kilometer long hostnames

See above ;-)

Best regards,
Marek Vasut

author
#6 lore raw

PATCH 1/1 arm: socfpga: Add support for the Terasic DE-0 Atlas board

Quoted 34 lines · Marek Vasut
Quoted 2 lines · Pavel Machek
Quoted 1 line · Marek Vasut

On Monday, August 31, 2015 at 09:57:05 PM, dinguyen at opensource.altera.com

Quoted 30 lines · wrote:
Quoted 29 lines
Quoted 6 lines

From: Dinh Nguyen <[email protected]>

Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is a bit different because it has a KSZ9031 PHY, so for now, ethernet doesn't quite work yet, as a few patches are needed to support the PHY.

I thought we did support the KSZ9031 PHY. What's the problem ?

Quoted 5 lines
Signed-off-by Dinh Nguyen <[email protected]>

---
Hi Marek,

This patch is based on your u-boot-socfpga/wip/boards branch.

OK, that makes sense.

Quoted 9 lines

Thanks,
Dinh
---

 arch/arm/dts/Makefile                        |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts |  61 +++
 arch/arm/mach-socfpga/Kconfig                |   7 +
 board/terasic/de0/MAINTAINERS                |   5 +
 board/terasic/de0/Makefile                   |   9 +

I think it might be clearer to rename it to de0-nano-soc, what do you think ? What's the difference between de0-nano-soc and atlas btw ?

Quoted 7 lines
Quoted 2 lines

Unless they are going to make "de0-mega".. I'd say "de0" is clean enough.

They already make de0-cv , which is cycloneV SoC based, so de0 is not clear enough, no way. They also make de0-nano , which is cycloneIV based (without soc).

After looking around the site a bit more, I think "de0_nano_sockit" is more appropriate?

Dinh

#7 lore raw

PATCH 1/1 arm: socfpga: Add support for the Terasic DE-0 Atlas board

Quoted 41 lines · Dinh Nguyen
Quoted 40 lines · Marek Vasut
Quoted 3 lines · Pavel Machek
Quoted 2 lines · Marek Vasut

On Monday, August 31, 2015 at 09:57:05 PM,
dinguyen at opensource.altera.com

Quoted 33 lines · wrote:
Quoted 22 lines
Quoted 7 lines

From: Dinh Nguyen <[email protected]>

Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is a bit different because it has a KSZ9031 PHY, so for now, ethernet doesn't quite work yet, as a few patches are needed to support the PHY.

I thought we did support the KSZ9031 PHY. What's the problem ?

Quoted 5 lines
Signed-off-by Dinh Nguyen <[email protected]>

---
Hi Marek,

This patch is based on your u-boot-socfpga/wip/boards branch.

OK, that makes sense.

Quoted 4 lines

Thanks,
Dinh
---

Quoted 8 lines
Quoted 5 lines
 arch/arm/dts/Makefile                        |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts |  61 +++
 arch/arm/mach-socfpga/Kconfig                |   7 +
 board/terasic/de0/MAINTAINERS                |   5 +
 board/terasic/de0/Makefile                   |   9 +

I think it might be clearer to rename it to de0-nano-soc, what do you think ? What's the difference between de0-nano-soc and atlas btw ?

Unless they are going to make "de0-mega".. I'd say "de0" is clean enough.

Quoted 6 lines
Quoted 3 lines

They already make de0-cv , which is cycloneV SoC based, so de0 is not clear enough, no way. They also make de0-nano , which is cycloneIV based (without soc).

After looking around the site a bit more, I think "de0_nano_sockit" is more appropriate?

It's de0-nano-soc, that's what they call it on that website, right ? SoCkit is a separate board.

Best regards,
Marek Vasut

#8 lore raw

PATCH 1/1 arm: socfpga: Add support for the Terasic DE-0 Atlas board

Quoted 46 lines · Marek Vasut
Quoted 45 lines · Dinh Nguyen
Quoted 43 lines · Marek Vasut
Quoted 3 lines · Pavel Machek
Quoted 2 lines · Marek Vasut

On Monday, August 31, 2015 at 09:57:05 PM,
dinguyen at opensource.altera.com

Quoted 28 lines · wrote:
Quoted 28 lines
Quoted 7 lines

From: Dinh Nguyen <[email protected]>

Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is a bit different because it has a KSZ9031 PHY, so for now, ethernet doesn't quite work yet, as a few patches are needed to support the PHY.

I thought we did support the KSZ9031 PHY. What's the problem ?

Quoted 5 lines
Signed-off-by Dinh Nguyen <[email protected]>

---
Hi Marek,

This patch is based on your u-boot-socfpga/wip/boards branch.

OK, that makes sense.

Quoted 9 lines

Thanks,
Dinh
---

 arch/arm/dts/Makefile                        |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts |  61 +++
 arch/arm/mach-socfpga/Kconfig                |   7 +
 board/terasic/de0/MAINTAINERS                |   5 +
 board/terasic/de0/Makefile                   |   9 +
Quoted 5 lines
Quoted 2 lines

I think it might be clearer to rename it to de0-nano-soc, what do you think ? What's the difference between de0-nano-soc and atlas btw ?

Unless they are going to make "de0-mega".. I'd say "de0" is clean enough.

They already make de0-cv , which is cycloneV SoC based, so de0 is not clear enough, no way. They also make de0-nano , which is cycloneIV based (without soc).

Quoted 6 lines
Quoted 2 lines

After looking around the site a bit more, I think "de0_nano_sockit" is more appropriate?

It's de0-nano-soc, that's what they call it on that website, right ? SoCkit is a separate board.

Ah yes, it's de0-nano-soc<space>kit. So "de0-nano-soc" ?

Dinh

#9 lore raw

PATCH 1/1 arm: socfpga: Add support for the Terasic DE-0 Atlas board

Quoted 48 lines · Dinh Nguyen
Quoted 47 lines · Marek Vasut
Quoted 46 lines · Dinh Nguyen
Quoted 44 lines · Marek Vasut
Quoted 3 lines · Pavel Machek
Quoted 2 lines · Marek Vasut

On Monday, August 31, 2015 at 09:57:05 PM,
dinguyen at opensource.altera.com

Quoted 28 lines · wrote:
Quoted 28 lines
Quoted 7 lines

From: Dinh Nguyen <[email protected]>

Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is a bit different because it has a KSZ9031 PHY, so for now, ethernet doesn't quite work yet, as a few patches are needed to support the PHY.

I thought we did support the KSZ9031 PHY. What's the problem ?

Quoted 5 lines
Signed-off-by Dinh Nguyen <[email protected]>

---
Hi Marek,

This patch is based on your u-boot-socfpga/wip/boards branch.

OK, that makes sense.

Quoted 9 lines

Thanks,
Dinh
---

 arch/arm/dts/Makefile                        |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts |  61 +++
 arch/arm/mach-socfpga/Kconfig                |   7 +
 board/terasic/de0/MAINTAINERS                |   5 +
 board/terasic/de0/Makefile                   |   9 +
Quoted 6 lines
Quoted 3 lines

I think it might be clearer to rename it to de0-nano-soc, what do you think ? What's the difference between de0-nano-soc and atlas btw ?

Unless they are going to make "de0-mega".. I'd say "de0" is clean enough.

They already make de0-cv , which is cycloneV SoC based, so de0 is not clear enough, no way. They also make de0-nano , which is cycloneIV based (without soc).

Quoted 7 lines
Quoted 5 lines
Quoted 2 lines

After looking around the site a bit more, I think "de0_nano_sockit" is more appropriate?

It's de0-nano-soc, that's what they call it on that website, right ? SoCkit is a separate board.

Ah yes, it's de0-nano-soc<space>kit. So "de0-nano-soc" ?

Yeah, exactly :)

Best regards,
Marek Vasut

author
#10 lore raw

PATCH 1/1 arm: socfpga: Add support for the Terasic DE-0 Atlas board

In reply to Marek Vasut
Quoted 10 lines · Marek Vasut
Quoted 6 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is a bit different because it has a KSZ9031 PHY, so for now, ethernet doesn't quite work yet, as a few patches are needed to support the PHY.

I thought we did support the KSZ9031 PHY. What's the problem ?

Yeah, I just realized that. That's the problem when I've been working with v2013.10 U-Boot! I'll have ethernet in V2.

Quoted 17 lines
Quoted 5 lines
Signed-off-by Dinh Nguyen <[email protected]>

---
Hi Marek,

This patch is based on your u-boot-socfpga/wip/boards branch.

OK, that makes sense.

Quoted 8 lines

Thanks,
Dinh

---
 arch/arm/dts/Makefile                        |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts |  61 +++
 arch/arm/mach-socfpga/Kconfig                |   7 +
 board/terasic/de0/MAINTAINERS                |   5 +
 board/terasic/de0/Makefile                   |   9 +
Quoted 3 lines

I think it might be clearer to rename it to de0-nano-soc, what do you think ? What's the difference between de0-nano-soc and atlas btw ?

I don't know. From the website, DE0-Nano-SoC Kit/Atlas-SoC Kit, so DE0_Nano_SoCKit is synonymous with Atlas Sockit?

Quoted 20 lines

[...]

Quoted 18 lines
configs/socfpga_de0_defconfig new file +12 -0
new file mode 100644
index 0000000..000f322
@@ -0,0 +1,21 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_TARGET_SOCFPGA_CYCLONE5=y
+CONFIG_TARGET_SOCFPGA_TERASIC_DE0=y
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_sockit"
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
Quoted 9 lines

configs/socfpga_de0_defconfig line 17

Quoted 5 lines
configs/socfpga_de0_defconfig new file +5 -0
+CONFIG_DM_GPIO=y
+CONFIG_DWAPB_GPIO=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_DM_SEQ_ALIAS=y

I think you don't need the DM_SEQ_ALIAS, it's needed only for QSPI to enforce the SPI NOR ordering.

Right, I missed this one.

<snip>

Quoted 12 lines

configs/socfpga_de0_defconfig

Quoted 9 lines
configs/socfpga_de0_defconfig new file +9 -0
+
+/* USB */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_DWC2_REG_ADDR	SOCFPGA_USB1_ADDRESS
+#endif
+#define CONFIG_G_DNL_MANUFACTURER      "Terasic"
+
+/* Extra Environment */
+#define CONFIG_HOSTNAME		socfpga_cyclone5

socfpga_d0_nano_soc might be better ;-)

Yeah..missed this one too.

Quoted 6 lines

configs/socfpga_de0_defconfig

Quoted 3 lines
configs/socfpga_de0_defconfig new file +3 -0
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"verify=n\0" \

What's this "verify" variable for ?

Copied from your SoCKit patch.

Thanks for reviewing.
Dinh

#11 lore raw

PATCH 1/1 arm: socfpga: Add support for the Terasic DE-0 Atlas board

Quoted 2 lines · Dinh Nguyen
Quoted 1 line · Marek Vasut

On Monday, August 31, 2015 at 09:57:05 PM, dinguyen at opensource.altera.com

Quoted 11 lines · wrote:
Quoted 8 lines
Quoted 6 lines

From: Dinh Nguyen <[email protected]>

Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is a bit different because it has a KSZ9031 PHY, so for now, ethernet doesn't quite work yet, as a few patches are needed to support the PHY.

I thought we did support the KSZ9031 PHY. What's the problem ?

Yeah, I just realized that. That's the problem when I've been working with v2013.10 U-Boot! I'll have ethernet in V2.

Cool :-)

Quoted 18 lines
Quoted 18 lines
Quoted 5 lines
Signed-off-by Dinh Nguyen <[email protected]>

---
Hi Marek,

This patch is based on your u-boot-socfpga/wip/boards branch.

OK, that makes sense.

Quoted 9 lines

Thanks,
Dinh
---

 arch/arm/dts/Makefile                        |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts |  61 +++
 arch/arm/mach-socfpga/Kconfig                |   7 +
 board/terasic/de0/MAINTAINERS                |   5 +
 board/terasic/de0/Makefile                   |   9 +
Quoted 5 lines
Quoted 2 lines

I think it might be clearer to rename it to de0-nano-soc, what do you think ? What's the difference between de0-nano-soc and atlas btw ?

I don't know. From the website, DE0-Nano-SoC Kit/Atlas-SoC Kit, so DE0_Nano_SoCKit is synonymous with Atlas Sockit?

See the other email I guess.

Quoted 29 lines
Quoted 20 lines

[...]

Quoted 18 lines
(quoted diff) +0 -0

b/configs/socfpga_de0_defconfig new file mode 100644 index 0000000..000f322

configs/socfpga_de0_defconfig new file +12 -0
@@ -0,0 +1,21 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_TARGET_SOCFPGA_CYCLONE5=y
+CONFIG_TARGET_SOCFPGA_TERASIC_DE0=y
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_sockit"
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
Quoted 8 lines

configs/socfpga_de0_defconfig line 17

Quoted 5 lines
configs/socfpga_de0_defconfig new file +5 -0
+CONFIG_DM_GPIO=y
+CONFIG_DWAPB_GPIO=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_DM_SEQ_ALIAS=y

I think you don't need the DM_SEQ_ALIAS, it's needed only for QSPI to enforce the SPI NOR ordering.

Quoted 1 line

Right, I missed this one.

:)

Quoted 14 lines

<snip>

Quoted 11 lines

configs/socfpga_de0_defconfig

Quoted 9 lines
configs/socfpga_de0_defconfig new file +9 -0
+
+/* USB */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_DWC2_REG_ADDR	SOCFPGA_USB1_ADDRESS
+#endif
+#define CONFIG_G_DNL_MANUFACTURER      "Terasic"
+
+/* Extra Environment */
+#define CONFIG_HOSTNAME		socfpga_cyclone5

socfpga_d0_nano_soc might be better ;-)

Quoted 1 line

Yeah..missed this one too.

Thanks!

#12 lore raw

PATCH 1/1 arm: socfpga: Add support for the Terasic DE-0 Atlas board

In reply to dinguyen at opensource.altera.com
Quoted 75 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is a bit different because it has a KSZ9031 PHY, so for now, ethernet doesn't quite work yet, as a few patches are needed to support the PHY.

Signed-off-by Dinh Nguyen <[email protected]>

---
Hi Marek,

This patch is based on your u-boot-socfpga/wip/boards branch.

Thanks,
Dinh

---
 arch/arm/dts/Makefile                        |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts |  61 +++
 arch/arm/mach-socfpga/Kconfig                |   7 +
 board/terasic/de0/MAINTAINERS                |   5 +
 board/terasic/de0/Makefile                   |   9 +
 board/terasic/de0/qts/iocsr_config.h         | 658 +++++++++++++++++++++++++++
 board/terasic/de0/qts/pinmux_config.h        | 220 +++++++++
 board/terasic/de0/qts/pll_config.h           |  85 ++++
 board/terasic/de0/qts/sdram_config.h         | 342 ++++++++++++++
 board/terasic/de0/socfpga.c                  |  22 +
 configs/socfpga_de0_defconfig                |  21 +
 include/configs/socfpga_de0.h                |  88 ++++
 12 files changed, 1519 insertions(+)
 create mode 100644 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts
 create mode 100644 board/terasic/de0/MAINTAINERS
 create mode 100644 board/terasic/de0/Makefile
 create mode 100644 board/terasic/de0/qts/iocsr_config.h
 create mode 100644 board/terasic/de0/qts/pinmux_config.h
 create mode 100644 board/terasic/de0/qts/pll_config.h
 create mode 100644 board/terasic/de0/qts/sdram_config.h
 create mode 100644 board/terasic/de0/socfpga.c
 create mode 100644 configs/socfpga_de0_defconfig
 create mode 100644 include/configs/socfpga_de0.h
include/configs/socfpga_de0.h new file +29 -0
new file mode 100644
index 0000000..47e18ba
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef __CONFIG_TERASIC_DE0_H__
+#define __CONFIG_TERASIC_DE0_H__
+
+#include <asm/arch/socfpga_base_addrs.h>
+
+/* U-Boot Commands */
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_DOS_PARTITION
+#define CONFIG_FAT_WRITE
+#define CONFIG_HW_WATCHDOG
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DFU
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_EXT4_WRITE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_FS_GENERIC
+#define CONFIG_CMD_GPIO
+#define CONFIG_CMD_GREPENV
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_MMC

include/configs/socfpga_de0.h line 39

Quoted 10 lines
include/configs/socfpga_de0.h new file +10 -0
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_USB_MASS_STORAGE
+
+/* Memory configurations */
+#define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB */
+
+/* Booting Linux */
+#define CONFIG_BOOTDELAY	3
+#define CONFIG_BOOTFILE		"fitImage"

Wonder this should be zImage as the mmcload still using zImage?

Thanks
Chin Liang

Quoted 49 lines
include/configs/socfpga_de0.h new file +49 -0
+#define CONFIG_BOOTARGS		"console=ttyS0," __stringify(CONFIG_BAUDRATE)
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
+#define CONFIG_BOOTCOMMAND	"run ramboot"
+#else
+#define CONFIG_BOOTCOMMAND	"run mmcload; run mmcboot"
+#endif
+#define CONFIG_LOADADDR		0x01000000
+#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
+
+/* Ethernet on SoC (EMAC) */
+#if defined(CONFIG_CMD_NET)
+
+/* PHY */
+#define CONFIG_PHY_MICREL
+#define CONFIG_PHY_MICREL_KSZ9031
+
+#endif
+
+/* USB */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_DWC2_REG_ADDR	SOCFPGA_USB1_ADDRESS
+#endif
+#define CONFIG_G_DNL_MANUFACTURER      "Terasic"
+
+/* Extra Environment */
+#define CONFIG_HOSTNAME		socfpga_cyclone5
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"verify=n\0" \
+	"loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+	"ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
+		"bootm ${loadaddr} - ${fdt_addr}\0" \
+	"bootimage=zImage\0" \
+	"fdt_addr=100\0" \
+	"fdtimage=socfpga.dtb\0" \
+		"fsloadcmd=ext2load\0" \
+	"bootm ${loadaddr} - ${fdt_addr}\0" \
+	"mmcroot=/dev/mmcblk0p2\0" \
+	"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
+		" root=${mmcroot} rw rootwait;" \
+		"bootz ${loadaddr} - ${fdt_addr}\0" \
+	"mmcload=mmc rescan;" \
+		"load mmc 0:1 ${loadaddr} ${bootimage};" \
+		"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
+
+/* The rest of the configuration is shared */
+#include <configs/socfpga_common.h>
+
+#endif	/* __CONFIG_TERASIC_DE0_H__ */
#13 lore raw

PATCH 1/1 arm: socfpga: Add support for the Terasic DE-0 Atlas board

Quoted 82 lines · Chin Liang See
Quoted 81 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is a bit different because it has a KSZ9031 PHY, so for now, ethernet doesn't quite work yet, as a few patches are needed to support the PHY.

Signed-off-by Dinh Nguyen <[email protected]>

---
Hi Marek,

This patch is based on your u-boot-socfpga/wip/boards branch.

Thanks,
Dinh
---

 arch/arm/dts/Makefile                        |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts |  61 +++
 arch/arm/mach-socfpga/Kconfig                |   7 +
 board/terasic/de0/MAINTAINERS                |   5 +
 board/terasic/de0/Makefile                   |   9 +
 board/terasic/de0/qts/iocsr_config.h         | 658
 +++++++++++++++++++++++++++ board/terasic/de0/qts/pinmux_config.h      
  | 220 +++++++++
 board/terasic/de0/qts/pll_config.h           |  85 ++++
 board/terasic/de0/qts/sdram_config.h         | 342 ++++++++++++++
 board/terasic/de0/socfpga.c                  |  22 +
 configs/socfpga_de0_defconfig                |  21 +
 include/configs/socfpga_de0.h                |  88 ++++
 12 files changed, 1519 insertions(+)
 create mode 100644 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts
 create mode 100644 board/terasic/de0/MAINTAINERS
 create mode 100644 board/terasic/de0/Makefile
 create mode 100644 board/terasic/de0/qts/iocsr_config.h
 create mode 100644 board/terasic/de0/qts/pinmux_config.h
 create mode 100644 board/terasic/de0/qts/pll_config.h
 create mode 100644 board/terasic/de0/qts/sdram_config.h
 create mode 100644 board/terasic/de0/socfpga.c
 create mode 100644 configs/socfpga_de0_defconfig
 create mode 100644 include/configs/socfpga_de0.h
(quoted diff) +0 -0

b/include/configs/socfpga_de0.h new file mode 100644 index 0000000..47e18ba

include/configs/socfpga_de0.h new file +33 -0
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef __CONFIG_TERASIC_DE0_H__
+#define __CONFIG_TERASIC_DE0_H__
+
+#include <asm/arch/socfpga_base_addrs.h>
+
+/* U-Boot Commands */
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_DOS_PARTITION
+#define CONFIG_FAT_WRITE
+#define CONFIG_HW_WATCHDOG
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DFU
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_EXT4_WRITE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_FS_GENERIC
+#define CONFIG_CMD_GPIO
+#define CONFIG_CMD_GREPENV
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_USB_MASS_STORAGE
+
Quoted 8 lines

include/configs/socfpga_de0.h line 39

Quoted 6 lines
include/configs/socfpga_de0.h new file +6 -0
+/* Memory configurations */
+#define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB */
+
+/* Booting Linux */
+#define CONFIG_BOOTDELAY	3
+#define CONFIG_BOOTFILE		"fitImage"

Wonder this should be zImage as the mmcload still using zImage?

Or maybe the mmcload should be fixed instead ; fitImage is preferred.

#14 lore raw

PATCH 1/1 arm: socfpga: Add support for the Terasic DE-0 Atlas board

Quoted 92 lines · marex at denx.de
Quoted 82 lines · Chin Liang See
Quoted 81 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is a bit different because it has a KSZ9031 PHY, so for now, ethernet doesn't quite work yet, as a few patches are needed to support the PHY.

Signed-off-by Dinh Nguyen <[email protected]>

---
Hi Marek,

This patch is based on your u-boot-socfpga/wip/boards branch.

Thanks,
Dinh
---

 arch/arm/dts/Makefile                        |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts |  61 +++
 arch/arm/mach-socfpga/Kconfig                |   7 +
 board/terasic/de0/MAINTAINERS                |   5 +
 board/terasic/de0/Makefile                   |   9 +
 board/terasic/de0/qts/iocsr_config.h         | 658
 +++++++++++++++++++++++++++ board/terasic/de0/qts/pinmux_config.h      
  | 220 +++++++++
 board/terasic/de0/qts/pll_config.h           |  85 ++++
 board/terasic/de0/qts/sdram_config.h         | 342 ++++++++++++++
 board/terasic/de0/socfpga.c                  |  22 +
 configs/socfpga_de0_defconfig                |  21 +
 include/configs/socfpga_de0.h                |  88 ++++
 12 files changed, 1519 insertions(+)
 create mode 100644 arch/arm/dts/socfpga_cyclone5_de0_sockit.dts
 create mode 100644 board/terasic/de0/MAINTAINERS
 create mode 100644 board/terasic/de0/Makefile
 create mode 100644 board/terasic/de0/qts/iocsr_config.h
 create mode 100644 board/terasic/de0/qts/pinmux_config.h
 create mode 100644 board/terasic/de0/qts/pll_config.h
 create mode 100644 board/terasic/de0/qts/sdram_config.h
 create mode 100644 board/terasic/de0/socfpga.c
 create mode 100644 configs/socfpga_de0_defconfig
 create mode 100644 include/configs/socfpga_de0.h
(quoted diff) +0 -0

b/include/configs/socfpga_de0.h new file mode 100644 index 0000000..47e18ba

include/configs/socfpga_de0.h new file +33 -0
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef __CONFIG_TERASIC_DE0_H__
+#define __CONFIG_TERASIC_DE0_H__
+
+#include <asm/arch/socfpga_base_addrs.h>
+
+/* U-Boot Commands */
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_DOS_PARTITION
+#define CONFIG_FAT_WRITE
+#define CONFIG_HW_WATCHDOG
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DFU
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_EXT4_WRITE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_FS_GENERIC
+#define CONFIG_CMD_GPIO
+#define CONFIG_CMD_GREPENV
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_USB_MASS_STORAGE
+
Quoted 8 lines

include/configs/socfpga_de0.h line 39

Quoted 6 lines
include/configs/socfpga_de0.h new file +6 -0
+/* Memory configurations */
+#define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB */
+
+/* Booting Linux */
+#define CONFIG_BOOTDELAY	3
+#define CONFIG_BOOTFILE		"fitImage"

Wonder this should be zImage as the mmcload still using zImage?

Quoted 1 line

Or maybe the mmcload should be fixed instead ; fitImage is preferred.

Yup, I agreed that as we can enable checksum even its zimage.

Thanks
Chin Liang