usb: zynqmp: Add XHCI driver support

PATCH Superseded Siva Durga Prasad Paladugu 3 participants 6 messages Sep 4, 2015 – Sep 7, 2015

Subsystems (3)

USB Arm/Zynq architecture USB xHCI driver

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Siva Durga Prasad Paladugu

author

2015-09-04 06:31 UTC #0 lore raw

PATCH v4 1/2 usb: zynqmp: Add XHCI driver support

Added USB XHCI driver support for zynqmp.

Signed-off-by Siva Durga Prasad Paladugu <[email protected]>

---
Changes for v4:
- Added sanity check for index as per
review comment
Changes for v3:
- Decreased the phy reset delay to 10 micro secs
- Defined base addresses in board config file as
per review comment.
Changes for v2:
- Moved all from xhci-zynqmp.h to .c file as
per review comment
- Removed ad-hoc function zynqmp_xhci_core_exit()
as per review comment

---
 drivers/usb/host/Makefile          |    1 +
 drivers/usb/host/xhci-zynqmp.c     |  148 ++++++++++++++++++++++++++++++++++++
 include/configs/xilinx_zynqmp_ep.h |    2 +
 3 files changed, 151 insertions(+), 0 deletions(-)
 create mode 100644 drivers/usb/host/xhci-zynqmp.c

drivers/usb/host/Makefile +1 -0

index f70f38c..645b990 100644
@@ -54,6 +54,7 @@ obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
 # xhci
 obj-$(CONFIG_USB_XHCI) += xhci.o xhci-mem.o xhci-ring.o
 obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
+obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o
 obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o
 obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o
 obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o

drivers/usb/host/xhci-zynqmp.c new file +148 -0

148 lines not on this page · raw message

include/configs/xilinx_zynqmp_ep.h +2 -0

index e476eb1..abb3c40 100644
@@ -24,6 +24,8 @@
 #define CONFIG_SYS_I2C_ZYNQ
 #define CONFIG_ZYNQ_EEPROM
 #define CONFIG_AHCI
+#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
+				 ZYNQMP_USB1_XHCI_BASEADDR}
 
 #include <configs/xilinx_zynqmp.h>

Signature · 1 line

1.7.1

Siva Durga Prasad Paladugu

author

2015-09-04 06:31 UTC #1 lore raw

PATCH v4 2/2 usb: zynqmp: Enable USB XHCI support

Enable USB XHCI support for ZynqMP

Signed-off-by Siva Durga Prasad Paladugu <[email protected]>

---
Changes for v4:
- None
Changes for v3:
- Removed extra space between # and define
as per review comment
Changes for v2:
- None

---
 include/configs/xilinx_zynqmp.h |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

include/configs/xilinx_zynqmp.h +8 -0

index da87188..46b951a 100644
@@ -109,6 +109,14 @@
 #define CONFIG_SYS_LOAD_ADDR		0x8000000
 
 #if defined(CONFIG_ZYNQMP_USB)
+#define CONFIG_USB_XHCI_DWC3
+#define CONFIG_USB_XHCI
+#define CONFIG_USB_MAX_CONTROLLER_COUNT         1
+#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
+#define CONFIG_CMD_USB
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_XHCI_ZYNQMP
+
 #define CONFIG_USB_DWC3
 #define CONFIG_USB_DWC3_GADGET

Signature · 1 line

1.7.1

Marek Vasut

2015-09-05 13:15 UTC #2 lore raw

PATCH v4 1/2 usb: zynqmp: Add XHCI driver support

In reply to Siva Durga Prasad Paladugu

Quoted 3 lines · Siva Durga Prasad Paladugu

Added USB XHCI driver support for zynqmp.
Signed-off-by Siva Durga Prasad Paladugu <[email protected]>

Hi,

looks like in the meantime, some xhci implementations switches to OF (see for example xhci-exynos5.c), which I believe is also already used on Zynq. Maybe you should consider that as well, given that this patch is scheduled after 2015.10 release anyway.

drivers/usb/host/xhci-zynqmp.c line 68

Quoted 10 lines

drivers/usb/host/xhci-zynqmp.c new file +9 -0

+struct zynqmp_xhci {
+	struct xhci_hccr *hcd;
+	struct dwc3 *dwc3_reg;
+};
+
+static struct zynqmp_xhci zynqmp_xhci;
 
+unsigned long ctr_addr[] = CONFIG_ZYNQMP_XHCI_LIST;
+
+__weak int __board_usb_init(int index, enum usb_init_type init)

Please, no functions starting with underscores.

Review

Quoted 2 lines

(quoted diff) +2 -0
+{
+	return 0;

This function is not used, remove it?

Quoted 8 lines

drivers/usb/host/xhci-zynqmp.c new file +8 -0

+}
+
+void usb_phy_reset(struct dwc3 *dwc3_reg)
+{
+	/* Assert USB3 PHY reset */
+	setbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST);
+
+	/* Assert USB2 PHY reset */

drivers/usb/host/xhci-zynqmp.c line 88

Quoted 10 lines

drivers/usb/host/xhci-zynqmp.c new file +10 -0

+	setbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST);
+
+	udelay(10);
+
+	/* Clear USB3 PHY reset */
+	clrbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST);
+
+	/* Clear USB2 PHY reset */
+	clrbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST);
+}

[...]
Best regards,
Marek Vasut

Siva Durga Prasad Paladugu

author

2015-09-07 04:25 UTC #3 lore raw

PATCH v4 1/2 usb: zynqmp: Add XHCI driver support

Hi Marek,

Quoted 11 lines

-----Original Message-----
From: Marek Vasut [mailto:marex at denx.de]
Sent: Saturday, September 05, 2015 6:46 PM
To: Siva Durga Prasad Paladugu
Cc: u-boot at lists.denx.de; Siva Durga Prasad Paladugu
Subject: Re: [PATCH v4 1/2] usb: zynqmp: Add XHCI driver support
Quoted 2 lines · Siva Durga Prasad Paladugu
Added USB XHCI driver support for zynqmp.

Quoted 8 lines

Quoted 1 line
Signed-off-by Siva Durga Prasad Paladugu <[email protected]>
Hi,
looks like in the meantime, some xhci implementations switches to OF (see for example xhci-exynos5.c), which I believe is also already used on Zynq. Maybe you should consider that as well, given that this patch is scheduled after 2015.10 release anyway.

This patch is for ZynqMP not for Zynq.
ZynqMP, we haven't yet moved to OF.

Regards,
Siva

Quoted 43 lines

drivers/usb/host/xhci-zynqmp.c line 68
Quoted 11 lines
drivers/usb/host/xhci-zynqmp.c new file +9 -0
+struct zynqmp_xhci {
+	struct xhci_hccr *hcd;
+	struct dwc3 *dwc3_reg;
+};
+
+static struct zynqmp_xhci zynqmp_xhci;
 
+unsigned long ctr_addr[] = CONFIG_ZYNQMP_XHCI_LIST;
+
+__weak int __board_usb_init(int index, enum usb_init_type init)
Please, no functions starting with underscores.
Review
Quoted 2 lines
(quoted diff) +2 -0
+{
+	return 0;
This function is not used, remove it?
drivers/usb/host/xhci-zynqmp.c
Quoted 9 lines
drivers/usb/host/xhci-zynqmp.c new file +9 -0
+}
+
+void usb_phy_reset(struct dwc3 *dwc3_reg) {
+	/* Assert USB3 PHY reset */
+	setbits_le32(&dwc3_reg->g_usb3pipectl[0],
+DWC3_GUSB3PIPECTL_PHYSOFTRST);
+
+	/* Assert USB2 PHY reset */
+	setbits_le32(&dwc3_reg->g_usb2phycfg,
DWC3_GUSB2PHYCFG_PHYSOFTRST);
drivers/usb/host/xhci-zynqmp.c
Quoted 9 lines
drivers/usb/host/xhci-zynqmp.c new file +9 -0
+
+	udelay(10);
+
+	/* Clear USB3 PHY reset */
+	clrbits_le32(&dwc3_reg->g_usb3pipectl[0],
+DWC3_GUSB3PIPECTL_PHYSOFTRST);
+
+	/* Clear USB2 PHY reset */
+	clrbits_le32(&dwc3_reg->g_usb2phycfg,
DWC3_GUSB2PHYCFG_PHYSOFTRST);
Quoted 1 line
+}
[...]
Best regards,
Marek Vasut

Simon Glass

2015-09-05 13:47 UTC #4 lore raw

PATCH v4 1/2 usb: zynqmp: Add XHCI driver support

In reply to Siva Durga Prasad Paladugu

Hi,

Quoted 16 lines · Siva Durga Prasad Paladugu

Added USB XHCI driver support for zynqmp.
Signed-off-by Siva Durga Prasad Paladugu <[email protected]>
---
Changes for v4:
- Added sanity check for index as per
review comment
Changes for v3:
- Decreased the phy reset delay to 10 micro secs
- Defined base addresses in board config file as
per review comment.
Changes for v2:
- Moved all from xhci-zynqmp.h to .c file as
per review comment
- Removed ad-hoc function zynqmp_xhci_core_exit()
as per review comment

Quoted 6 lines

---
 drivers/usb/host/Makefile          |    1 +
 drivers/usb/host/xhci-zynqmp.c     |  148 ++++++++++++++++++++++++++++++++++++
 include/configs/xilinx_zynqmp_ep.h |    2 +
 3 files changed, 151 insertions(+), 0 deletions(-)
 create mode 100644 drivers/usb/host/xhci-zynqmp.c

Can you convert this to use driver model? See xhci-exynos5.c for an example.

Regards,
Simon

Marek Vasut

2015-09-05 13:54 UTC #5 lore raw

PATCH v4 1/2 usb: zynqmp: Add XHCI driver support

Quoted 38 lines · Simon Glass

Hi,
On 4 September 2015 at 00:31, Siva Durga Prasad Paladugu
Quoted 24 lines · <[email protected]> wrote:
Added USB XHCI driver support for zynqmp.
Signed-off-by Siva Durga Prasad Paladugu <[email protected]>
---
Changes for v4:
- Added sanity check for index as per
review comment
Changes for v3:
- Decreased the phy reset delay to 10 micro secs
- Defined base addresses in board config file as
per review comment.
Changes for v2:
- Moved all from xhci-zynqmp.h to .c file as
per review comment
- Removed ad-hoc function zynqmp_xhci_core_exit()
as per review comment
Quoted 8 lines
---
 drivers/usb/host/Makefile          |    1 +
 drivers/usb/host/xhci-zynqmp.c     |  148
 ++++++++++++++++++++++++++++++++++++ include/configs/xilinx_zynqmp_ep.h
 |    2 +
 3 files changed, 151 insertions(+), 0 deletions(-)
 create mode 100644 drivers/usb/host/xhci-zynqmp.c

Quoted 2 lines

Can you convert this to use driver model? See xhci-exynos5.c for an example.

Right :)

Best regards,
Marek Vasut