ARM: OMAP2+: reset controller support

191 lines not on this page · raw message

index cc8a987..f53ebc6 100644
@@ -2467,15 +2467,24 @@ static int __init _init(struct omap_hwmod *oh, void *data)
 
 	if (of_have_populated_dt()) {
 		struct device_node *bus;
+		struct device_node *soc;
 
 		bus = of_find_node_by_name(NULL, "ocp");
 		if (!bus)
 			return -ENODEV;
 
 		r = of_dev_hwmod_lookup(bus, oh, &index, &np);
-		if (r)
-			pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
-		else if (np && index)
+		if (r) {
+			soc = of_find_node_by_name(NULL, "soc");
+			if (soc)
+				r = of_dev_hwmod_lookup(soc, oh, &index, &np);
+
+			if (r)
+				pr_debug("omap_hwmod: %s missing dt data\n",
+					 oh->name);
+		}
+
+		if (np && index)
 			pr_warn("omap_hwmod: %s using broken dt data from %s\n",
 				oh->name, np->name);
 	}

index f53ebc6..974260a 100644
@@ -142,6 +142,7 @@
 #include <linux/cpu.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/reset.h>
 
 #include <asm/system_misc.h>
 

@@ -1611,9 +1612,10 @@ static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
 		if (!strcmp(rst_line, name)) {
 			ohri->rst_shift = oh->rst_lines[i].rst_shift;
 			ohri->st_shift = oh->rst_lines[i].st_shift;
-			pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
+			ohri->rc = oh->rst_lines[i].rc;
+			pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d rc %x\n",
 				 oh->name, __func__, rst_line, ohri->rst_shift,
-				 ohri->st_shift);
+				 ohri->st_shift, (u32)ohri->rc);
 
 			return 0;
 		}

@@ -2445,6 +2447,58 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
 }
 
 /**
+ * _init_resets - initialize internal reset data for hwmod @oh
+ * @oh: struct omap_hwmod *
+ * @np: device node pointer for this hwmod
+ *
+ * Look up the reset info for this hwmod from device tree.
+ */
+static int __init _init_resets(struct omap_hwmod *oh, struct device_node *np)
+{
+	int num;
+	int i;
+	int ret;
+	const char *reset_name;
+	struct reset_control *rc;
+
+	num = of_property_count_strings(np, "reset-names");
+	if (num < 1)
+		return 0;
+
+	oh->rst_lines = kcalloc(num, sizeof(struct omap_hwmod_rst_info),
+				GFP_KERNEL);
+
+	for (i = 0; i < num; i++) {
+		ret = of_property_read_string_index(np, "reset-names", i,
+						    &reset_name);
+		if (ret)
+			goto cleanup;
+
+		rc = of_reset_control_get(np, reset_name);
+		if (IS_ERR(rc)) {
+			ret = PTR_ERR(rc);
+			goto cleanup;
+		}
+
+		oh->rst_lines[i].name = kstrdup(reset_name, GFP_KERNEL);
+		oh->rst_lines[i].rc = rc;
+	}
+
+	oh->rst_lines_cnt = num;
+
+	return ret;
+
+cleanup:
+	for (i = 0; i < num; i++) {
+		if (oh->rst_lines[i].rc)
+			reset_control_put(oh->rst_lines[i].rc);
+	}
+	kfree(oh->rst_lines);
+	oh->rst_lines = NULL;
+	return ret;
+}
+
+/**
  * _init - initialize internal data for the hwmod @oh
  * @oh: struct omap_hwmod *
  * @n: (unused)

@@ -2507,6 +2561,13 @@ static int __init _init(struct omap_hwmod *oh, void *data)
 			oh->flags |= HWMOD_INIT_NO_RESET;
 		if (of_find_property(np, "ti,no-idle-on-init", NULL))
 			oh->flags |= HWMOD_INIT_NO_IDLE;
+
+		r = _init_resets(oh, np);
+		if (r < 0) {
+			WARN(1, "omap_hwmod: %s: couldn't init reset\n",
+			     oh->name);
+			return -EINVAL;
+		}
 	}
 
 	oh->_state = _HWMOD_STATE_INITIALIZED;

@@ -3108,6 +3169,39 @@ static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
 					   oh->prcm.omap4.rstst_offs);
 }
 
+static int _dt_assert_hardreset(struct omap_hwmod *oh,
+				struct omap_hwmod_rst_info *ohri)
+{
+	if (!ohri->rc) {
+		pr_err("%s: %s: missing rc\n", __func__, oh->name);
+		WARN_ONCE(1, "missing rc\n");
+		return 0;
+	}
+
+	return reset_control_assert(ohri->rc);
+}
+
+static int _dt_deassert_hardreset(struct omap_hwmod *oh,
+				  struct omap_hwmod_rst_info *ohri)
+{
+	if (!ohri->rc) {
+		pr_err("%s: %s: missing rc\n", __func__, oh->name);
+		return 0;
+	}
+
+	return reset_control_deassert(ohri->rc);
+}
+
+static int _dt_is_hardreset_asserted(struct omap_hwmod *oh,
+				     struct omap_hwmod_rst_info *ohri)
+{
+	if (!ohri->rc) {
+		pr_err("%s: %s: missing rc\n", __func__, oh->name);
+		return 0;
+	}
+	return reset_control_status(ohri->rc);
+}
+
 /* Public functions */
 
 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)

@@ -3922,6 +4016,12 @@ void __init omap_hwmod_init(void)
 		WARN(1, "omap_hwmod: unknown SoC type\n");
 	}
 
+	if (of_have_populated_dt()) {
+		soc_ops.assert_hardreset = _dt_assert_hardreset;
+		soc_ops.deassert_hardreset = _dt_deassert_hardreset;
+		soc_ops.is_hardreset_asserted = _dt_is_hardreset_asserted;
+	}
+
 	inited = true;
 }
 

index ca6df1a..a6f3ac2 100644
@@ -199,14 +199,16 @@ struct omap_hwmod_dma_info {
  * @name: name of the reset line (module local name)
  * @rst_shift: Offset of the reset bit
  * @st_shift: Offset of the reset status bit (OMAP2/3 only)
+ * @rc: reset control handle for the reset
  *
  * @name should be something short, e.g., "cpu0" or "rst". It is defined
  * locally to the hwmod.
  */
 struct omap_hwmod_rst_info {
-	const char	*name;
-	u8		rst_shift;
-	u8		st_shift;
+	const char		*name;
+	u8			rst_shift;
+	u8			st_shift;
+	struct reset_control	*rc;
 };
 
 /**

deleted file mode 100644
index 5bace6a..0000000
@@ -1,27 +0,0 @@
-/*
- * am33xx-restart.c - Code common to all AM33xx machines.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/reboot.h>
-
-#include "common.h"
-#include "prm.h"
-
-/**
- * am3xx_restart - trigger a software restart of the SoC
- * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
- * @cmd: passed from the userspace program rebooting the system (if provided)
- *
- * Resets the SoC.  For @cmd, see the 'reboot' syscall in
- * kernel/sys.c.  No return value.
- */
-void am33xx_restart(enum reboot_mode mode, const char *cmd)
-{
-	/* TODO: Handle mode and cmd if necessary */
-
-	omap_prm_reset_system();
-}

index 24c9afc..6a82a9c 100644
@@ -177,7 +177,7 @@ DT_MACHINE_START(TI814X_DT, "Generic ti814x (Flattened Device Tree)")
 	.init_late	= ti81xx_init_late,
 	.init_time	= omap3_gptimer_timer_init,
 	.dt_compat	= ti814x_boards_compat,
-	.restart	= ti81xx_restart,
+	.restart	= omap_restart,
 MACHINE_END
 
 static const char *const ti816x_boards_compat[] __initconst = {

@@ -194,7 +194,7 @@ DT_MACHINE_START(TI816X_DT, "Generic ti816x (Flattened Device Tree)")
 	.init_late	= ti81xx_init_late,
 	.init_time	= omap3_gptimer_timer_init,
 	.dt_compat	= ti816x_boards_compat,
-	.restart	= ti81xx_restart,
+	.restart	= omap_restart,
 MACHINE_END
 #endif
 

@@ -212,7 +212,7 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
 	.init_late	= am33xx_init_late,
 	.init_time	= omap3_gptimer_timer_init,
 	.dt_compat	= am33xx_boards_compat,
-	.restart	= am33xx_restart,
+	.restart	= omap_restart,
 MACHINE_END
 #endif
 

@@ -237,7 +237,7 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
 	.init_late	= omap4430_init_late,
 	.init_time	= omap4_local_timer_init,
 	.dt_compat	= omap4_boards_compat,
-	.restart	= omap44xx_restart,
+	.restart	= omap_restart,
 MACHINE_END
 #endif
 

@@ -259,7 +259,7 @@ DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
 	.init_late	= omap5_init_late,
 	.init_time	= omap5_realtime_timer_init,
 	.dt_compat	= omap5_boards_compat,
-	.restart	= omap44xx_restart,
+	.restart	= omap_restart,
 MACHINE_END
 #endif
 

@@ -281,7 +281,7 @@ DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
 	.init_machine	= omap_generic_init,
 	.init_time	= omap3_gptimer_timer_init,
 	.dt_compat	= am43_boards_compat,
-	.restart	= omap44xx_restart,
+	.restart	= omap_restart,
 MACHINE_END
 #endif
 

@@ -304,7 +304,7 @@ DT_MACHINE_START(DRA74X_DT, "Generic DRA74X (Flattened Device Tree)")
 	.init_machine	= omap_generic_init,
 	.init_time	= omap5_realtime_timer_init,
 	.dt_compat	= dra74x_boards_compat,
-	.restart	= omap44xx_restart,
+	.restart	= omap_restart,
 MACHINE_END
 
 static const char *const dra72x_boards_compat[] __initconst = {

@@ -323,6 +323,6 @@ DT_MACHINE_START(DRA72X_DT, "Generic DRA72X (Flattened Device Tree)")
 	.init_machine	= omap_generic_init,
 	.init_time	= omap5_realtime_timer_init,
 	.dt_compat	= dra72x_boards_compat,
-	.restart	= omap44xx_restart,
+	.restart	= omap_restart,
 MACHINE_END
 #endif

index 484cdad..8afb4ac 100644
@@ -14,9 +14,13 @@
  */
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/reset.h>
 
 #include "common.h"
 #include "omap-secure.h"
+#include "soc.h"
+
+static struct reset_control *omap_reset_control;
 
 /*
  * Stub function for OMAP2 so that common files

@@ -32,3 +36,28 @@ void __init omap_reserve(void)
 	omap_secure_ram_reserve_memblock();
 	omap_barrier_reserve_memblock();
 }
+
+void omap_restart(enum reboot_mode mode, const char *cmd)
+{
+	if (omap_reset_control)
+		reset_control_assert(omap_reset_control);
+
+	while (1)
+		;
+}
+
+static int __init omap_init_restart(void)
+{
+	struct device_node *np;
+
+	np = of_find_node_by_name(NULL, "system_reset");
+	omap_reset_control = of_reset_control_get(np, "system");
+	if (IS_ERR(omap_reset_control)) {
+		pr_err("%s: no reset controller, reboot not functional.\n",
+		       __func__);
+		omap_reset_control = NULL;
+	}
+
+	return 0;
+}
+omap_late_initcall(omap_init_restart);

index 92e92cf..51d6068 100644
@@ -148,6 +148,8 @@ static inline void omap_soc_device_init(void)
 }
 #endif
 
+void omap_restart(enum reboot_mode mode, const char *cmd);
+
 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
 void omap2xxx_restart(enum reboot_mode mode, const char *cmd);
 #else

index d937b2e..f6dd4fc 100644
@@ -40,7 +40,7 @@ void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
 
 	/* XXX Should save the cmd argument for use after the reboot */
 
-	omap_prm_reset_system();
+	omap_restart(mode, cmd);
 }
 
 /**

index 4bdd22e..5669137 100644
@@ -31,5 +31,5 @@
 void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
 {
 	omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
-	omap_prm_reset_system();
+	omap_restart(mode, cmd);
 }

deleted file mode 100644
index e17136a..0000000
@@ -1,27 +0,0 @@
-/*
- * omap4-restart.c - Common to OMAP4 and OMAP5
- *
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/types.h>
-#include <linux/reboot.h>
-#include "common.h"
-#include "prm.h"
-
-/**
- * omap44xx_restart - trigger a software restart of the SoC
- * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
- * @cmd: passed from the userspace program rebooting the system (if provided)
- *
- * Resets the SoC.  For @cmd, see the 'reboot' syscall in
- * kernel/sys.c.  No return value.
- */
-void omap44xx_restart(enum reboot_mode mode, const char *cmd)
-{
-	/* XXX Should save 'cmd' into scratchpad for use after reboot */
-	omap_prm_reset_system();
-}

deleted file mode 100644
index 6c3ce7c..0000000
@@ -1,34 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/reboot.h>
-
-#include "iomap.h"
-#include "common.h"
-#include "control.h"
-#include "prm3xxx.h"
-
-#define TI81XX_PRM_DEVICE_RSTCTRL	0x00a0
-#define TI81XX_GLOBAL_RST_COLD		BIT(1)
-
-/**
- * ti81xx_restart - trigger a software restart of the SoC
- * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
- * @cmd: passed from the userspace program rebooting the system (if provided)
- *
- * Resets the SoC.  For @cmd, see the 'reboot' syscall in
- * kernel/sys.c.  No return value.
- *
- * NOTE: Warm reset does not seem to work, may require resetting
- * clocks to bypass mode.
- */
-void ti81xx_restart(enum reboot_mode mode, const char *cmd)
-{
-	omap2_prm_set_mod_reg_bits(TI81XX_GLOBAL_RST_COLD, 0,
-				   TI81XX_PRM_DEVICE_RSTCTRL);
-	while (1);
-}

index 43eebf2..0447ba9 100644
@@ -535,21 +535,14 @@ static struct omap_hwmod_class omap44xx_dsp_hwmod_class = {
 };
 
 /* dsp */
-static struct omap_hwmod_rst_info omap44xx_dsp_resets[] = {
-	{ .name = "dsp", .rst_shift = 0 },
-};
-
 static struct omap_hwmod omap44xx_dsp_hwmod = {
 	.name		= "dsp",
 	.class		= &omap44xx_dsp_hwmod_class,
 	.clkdm_name	= "tesla_clkdm",
-	.rst_lines	= omap44xx_dsp_resets,
-	.rst_lines_cnt	= ARRAY_SIZE(omap44xx_dsp_resets),
 	.main_clk	= "dpll_iva_m4x2_ck",
 	.prcm = {
 		.omap4 = {
 			.clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET,
-			.rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET,
 			.context_offs = OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET,
 			.modulemode   = MODULEMODE_HWCTRL,
 		},

@@ -1414,22 +1407,14 @@ static struct omap_hwmod_class omap44xx_ipu_hwmod_class = {
 };
 
 /* ipu */
-static struct omap_hwmod_rst_info omap44xx_ipu_resets[] = {
-	{ .name = "cpu0", .rst_shift = 0 },
-	{ .name = "cpu1", .rst_shift = 1 },
-};
-
 static struct omap_hwmod omap44xx_ipu_hwmod = {
 	.name		= "ipu",
 	.class		= &omap44xx_ipu_hwmod_class,
 	.clkdm_name	= "ducati_clkdm",
-	.rst_lines	= omap44xx_ipu_resets,
-	.rst_lines_cnt	= ARRAY_SIZE(omap44xx_ipu_resets),
 	.main_clk	= "ducati_clk_mux_ck",
 	.prcm = {
 		.omap4 = {
 			.clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET,
-			.rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET,
 			.context_offs = OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET,
 			.modulemode   = MODULEMODE_HWCTRL,
 		},

@@ -1497,23 +1482,14 @@ static struct omap_hwmod_class omap44xx_iva_hwmod_class = {
 };
 
 /* iva */
-static struct omap_hwmod_rst_info omap44xx_iva_resets[] = {
-	{ .name = "seq0", .rst_shift = 0 },
-	{ .name = "seq1", .rst_shift = 1 },
-	{ .name = "logic", .rst_shift = 2 },
-};
-
 static struct omap_hwmod omap44xx_iva_hwmod = {
 	.name		= "iva",
 	.class		= &omap44xx_iva_hwmod_class,
 	.clkdm_name	= "ivahd_clkdm",
-	.rst_lines	= omap44xx_iva_resets,
-	.rst_lines_cnt	= ARRAY_SIZE(omap44xx_iva_resets),
 	.main_clk	= "dpll_iva_m5x2_ck",
 	.prcm = {
 		.omap4 = {
 			.clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET,
-			.rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET,
 			.context_offs = OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET,
 			.modulemode   = MODULEMODE_HWCTRL,
 		},

@@ -2093,9 +2069,6 @@ static struct omap_mmu_dev_attr mmu_ipu_dev_attr = {
 };
 
 static struct omap_hwmod omap44xx_mmu_ipu_hwmod;
-static struct omap_hwmod_rst_info omap44xx_mmu_ipu_resets[] = {
-	{ .name = "mmu_cache", .rst_shift = 2 },
-};
 
 static struct omap_hwmod_addr_space omap44xx_mmu_ipu_addrs[] = {
 	{

@@ -2119,13 +2092,10 @@ static struct omap_hwmod omap44xx_mmu_ipu_hwmod = {
 	.name		= "mmu_ipu",
 	.class		= &omap44xx_mmu_hwmod_class,
 	.clkdm_name	= "ducati_clkdm",
-	.rst_lines	= omap44xx_mmu_ipu_resets,
-	.rst_lines_cnt	= ARRAY_SIZE(omap44xx_mmu_ipu_resets),
 	.main_clk	= "ducati_clk_mux_ck",
 	.prcm = {
 		.omap4 = {
 			.clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET,
-			.rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET,
 			.context_offs = OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET,
 			.modulemode   = MODULEMODE_HWCTRL,
 		},

@@ -2140,9 +2110,6 @@ static struct omap_mmu_dev_attr mmu_dsp_dev_attr = {
 };
 
 static struct omap_hwmod omap44xx_mmu_dsp_hwmod;
-static struct omap_hwmod_rst_info omap44xx_mmu_dsp_resets[] = {
-	{ .name = "mmu_cache", .rst_shift = 1 },
-};
 
 static struct omap_hwmod_addr_space omap44xx_mmu_dsp_addrs[] = {
 	{

@@ -2166,13 +2133,10 @@ static struct omap_hwmod omap44xx_mmu_dsp_hwmod = {
 	.name		= "mmu_dsp",
 	.class		= &omap44xx_mmu_hwmod_class,
 	.clkdm_name	= "tesla_clkdm",
-	.rst_lines	= omap44xx_mmu_dsp_resets,
-	.rst_lines_cnt	= ARRAY_SIZE(omap44xx_mmu_dsp_resets),
 	.main_clk	= "dpll_iva_m4x2_ck",
 	.prcm = {
 		.omap4 = {
 			.clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET,
-			.rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET,
 			.context_offs = OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET,
 			.modulemode   = MODULEMODE_HWCTRL,
 		},

@@ -2320,16 +2284,14 @@ static struct omap_hwmod omap44xx_cm_core_hwmod = {
 };
 
 /* prm */
-static struct omap_hwmod_rst_info omap44xx_prm_resets[] = {
-	{ .name = "rst_global_warm_sw", .rst_shift = 0 },
-	{ .name = "rst_global_cold_sw", .rst_shift = 1 },
-};
-
 static struct omap_hwmod omap44xx_prm_hwmod = {
 	.name		= "prm",
 	.class		= &omap44xx_prcm_hwmod_class,
-	.rst_lines	= omap44xx_prm_resets,
-	.rst_lines_cnt	= ARRAY_SIZE(omap44xx_prm_resets),
+	.prcm = {
+		.omap4 = {
+			.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT,
+		},
+	},
 };
 
 /*

index 7c3fac0..9e33ac8 100644
@@ -1378,21 +1378,14 @@ static struct omap_hwmod_class omap54xx_mmu_hwmod_class = {
 	.sysc = &omap54xx_mmu_sysc,
 };
 
-static struct omap_hwmod_rst_info omap54xx_mmu_dsp_resets[] = {
-	{ .name = "mmu_cache", .rst_shift = 1 },
-};
-
 static struct omap_hwmod omap54xx_mmu_dsp_hwmod = {
 	.name		= "mmu_dsp",
 	.class		= &omap54xx_mmu_hwmod_class,
 	.clkdm_name	= "dsp_clkdm",
-	.rst_lines	= omap54xx_mmu_dsp_resets,
-	.rst_lines_cnt	= ARRAY_SIZE(omap54xx_mmu_dsp_resets),
 	.main_clk	= "dpll_iva_h11x2_ck",
 	.prcm = {
 		.omap4 = {
 			.clkctrl_offs = OMAP54XX_CM_DSP_DSP_CLKCTRL_OFFSET,
-			.rstctrl_offs = OMAP54XX_RM_DSP_RSTCTRL_OFFSET,
 			.context_offs = OMAP54XX_RM_DSP_DSP_CONTEXT_OFFSET,
 			.modulemode   = MODULEMODE_HWCTRL,
 		},

@@ -1400,21 +1393,14 @@ static struct omap_hwmod omap54xx_mmu_dsp_hwmod = {
 };
 
 /* mmu ipu */
-static struct omap_hwmod_rst_info omap54xx_mmu_ipu_resets[] = {
-	{ .name = "mmu_cache", .rst_shift = 2 },
-};
-
 static struct omap_hwmod omap54xx_mmu_ipu_hwmod = {
 	.name		= "mmu_ipu",
 	.class		= &omap54xx_mmu_hwmod_class,
 	.clkdm_name	= "ipu_clkdm",
-	.rst_lines	= omap54xx_mmu_ipu_resets,
-	.rst_lines_cnt	= ARRAY_SIZE(omap54xx_mmu_ipu_resets),
 	.main_clk	= "dpll_core_h22x2_ck",
 	.prcm = {
 		.omap4 = {
 			.clkctrl_offs = OMAP54XX_CM_IPU_IPU_CLKCTRL_OFFSET,
-			.rstctrl_offs = OMAP54XX_RM_IPU_RSTCTRL_OFFSET,
 			.context_offs = OMAP54XX_RM_IPU_IPU_CONTEXT_OFFSET,
 			.modulemode   = MODULEMODE_HWCTRL,
 		},

index 907a452b..7405e78 100644
@@ -27,8 +27,6 @@
 #include "common.h"
 
 #define CLKCTRL(oh, clkctrl) ((oh).prcm.omap4.clkctrl_offs = (clkctrl))
-#define RSTCTRL(oh, rstctrl) ((oh).prcm.omap4.rstctrl_offs = (rstctrl))
-#define RSTST(oh, rstst) ((oh).prcm.omap4.rstst_offs = (rstst))
 
 /*
  * 'l3' class

@@ -143,10 +141,6 @@ static struct omap_hwmod_class am33xx_pruss_hwmod_class = {
 	.name	= "pruss",
 };
 
-static struct omap_hwmod_rst_info am33xx_pruss_resets[] = {
-	{ .name = "pruss", .rst_shift = 1 },
-};
-
 /* pru-icss */
 /* Pseudo hwmod for reset control purpose only */
 struct omap_hwmod am33xx_pruss_hwmod = {

@@ -159,8 +153,6 @@ struct omap_hwmod am33xx_pruss_hwmod = {
 			.modulemode	= MODULEMODE_SWCTRL,
 		},
 	},
-	.rst_lines	= am33xx_pruss_resets,
-	.rst_lines_cnt	= ARRAY_SIZE(am33xx_pruss_resets),
 };
 
 /* gfx */

@@ -169,10 +161,6 @@ static struct omap_hwmod_class am33xx_gfx_hwmod_class = {
 	.name	= "gfx",
 };
 
-static struct omap_hwmod_rst_info am33xx_gfx_resets[] = {
-	{ .name = "gfx", .rst_shift = 0, .st_shift = 0},
-};
-
 struct omap_hwmod am33xx_gfx_hwmod = {
 	.name		= "gfx",
 	.class		= &am33xx_gfx_hwmod_class,

@@ -183,8 +171,6 @@ struct omap_hwmod am33xx_gfx_hwmod = {
 			.modulemode	= MODULEMODE_SWCTRL,
 		},
 	},
-	.rst_lines	= am33xx_gfx_resets,
-	.rst_lines_cnt	= ARRAY_SIZE(am33xx_gfx_resets),
 };
 
 /*

@@ -1397,17 +1383,9 @@ static void omap_hwmod_am33xx_clkctrl(void)
 	CLKCTRL(am33xx_aes0_hwmod , AM33XX_CM_PER_AES0_CLKCTRL_OFFSET);
 }
 
-static void omap_hwmod_am33xx_rst(void)
-{
-	RSTCTRL(am33xx_pruss_hwmod, AM33XX_RM_PER_RSTCTRL_OFFSET);
-	RSTCTRL(am33xx_gfx_hwmod, AM33XX_RM_GFX_RSTCTRL_OFFSET);
-	RSTST(am33xx_gfx_hwmod, AM33XX_RM_GFX_RSTST_OFFSET);
-}
-
 void omap_hwmod_am33xx_reg(void)
 {
 	omap_hwmod_am33xx_clkctrl();
-	omap_hwmod_am33xx_rst();
 }
 
 static void omap_hwmod_am43xx_clkctrl(void)

@@ -1470,15 +1448,7 @@ static void omap_hwmod_am43xx_clkctrl(void)
 	CLKCTRL(am33xx_aes0_hwmod , AM43XX_CM_PER_AES0_CLKCTRL_OFFSET);
 }
 
-static void omap_hwmod_am43xx_rst(void)
-{
-	RSTCTRL(am33xx_pruss_hwmod, AM43XX_RM_PER_RSTCTRL_OFFSET);
-	RSTCTRL(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTCTRL_OFFSET);
-	RSTST(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTST_OFFSET);
-}
-
 void omap_hwmod_am43xx_reg(void)
 {
 	omap_hwmod_am43xx_clkctrl();
-	omap_hwmod_am43xx_rst();
 }

index cc0791d..e4fc8b3 100644
@@ -64,10 +64,6 @@ static struct omap_hwmod am33xx_l4_hs_hwmod = {
 	},
 };
 
-static struct omap_hwmod_rst_info am33xx_wkup_m3_resets[] = {
-	{ .name = "wkup_m3", .rst_shift = 3, .st_shift = 5 },
-};
-
 /* wkup_m3  */
 static struct omap_hwmod am33xx_wkup_m3_hwmod = {
 	.name		= "wkup_m3",

@@ -79,13 +75,9 @@ static struct omap_hwmod am33xx_wkup_m3_hwmod = {
 	.prcm		= {
 		.omap4	= {
 			.clkctrl_offs	= AM33XX_CM_WKUP_WKUP_M3_CLKCTRL_OFFSET,
-			.rstctrl_offs	= AM33XX_RM_WKUP_RSTCTRL_OFFSET,
-			.rstst_offs	= AM33XX_RM_WKUP_RSTST_OFFSET,
 			.modulemode	= MODULEMODE_SWCTRL,
 		},
 	},
-	.rst_lines	= am33xx_wkup_m3_resets,
-	.rst_lines_cnt	= ARRAY_SIZE(am33xx_wkup_m3_resets),
 };
 
 /*

index e97a894..d486c42 100644
@@ -52,10 +52,6 @@ static struct omap_hwmod am43xx_l4_hs_hwmod = {
 	},
 };
 
-static struct omap_hwmod_rst_info am33xx_wkup_m3_resets[] = {
-	{ .name = "wkup_m3", .rst_shift = 3, .st_shift = 5 },
-};
-
 static struct omap_hwmod am43xx_wkup_m3_hwmod = {
 	.name		= "wkup_m3",
 	.class		= &am33xx_wkup_m3_hwmod_class,

@@ -66,13 +62,9 @@ static struct omap_hwmod am43xx_wkup_m3_hwmod = {
 	.prcm		= {
 		.omap4	= {
 			.clkctrl_offs	= AM43XX_CM_WKUP_WKUP_M3_CLKCTRL_OFFSET,
-			.rstctrl_offs	= AM43XX_RM_WKUP_RSTCTRL_OFFSET,
-			.rstst_offs	= AM43XX_RM_WKUP_RSTST_OFFSET,
 			.modulemode	= MODULEMODE_SWCTRL,
 		},
 	},
-	.rst_lines	= am33xx_wkup_m3_resets,
-	.rst_lines_cnt	= ARRAY_SIZE(am33xx_wkup_m3_resets),
 };
 
 static struct omap_hwmod am43xx_control_hwmod = {

index 65b1647..5db681d 100644
@@ -49,16 +49,10 @@ static struct omap_hwmod_class iva1_hwmod_class = {
 	.name		= "iva1",
 };
 
-static struct omap_hwmod_rst_info omap2420_iva_resets[] = {
-	{ .name = "iva", .rst_shift = 8 },
-};
-
 static struct omap_hwmod omap2420_iva_hwmod = {
 	.name		= "iva",
 	.class		= &iva1_hwmod_class,
 	.clkdm_name	= "iva1_clkdm",
-	.rst_lines	= omap2420_iva_resets,
-	.rst_lines_cnt	= ARRAY_SIZE(omap2420_iva_resets),
 	.main_clk	= "iva1_ifck",
 };
 

@@ -67,17 +61,10 @@ static struct omap_hwmod_class dsp_hwmod_class = {
 	.name		= "dsp",
 };
 
-static struct omap_hwmod_rst_info omap2420_dsp_resets[] = {
-	{ .name = "logic", .rst_shift = 0 },
-	{ .name = "mmu", .rst_shift = 1 },
-};
-
 static struct omap_hwmod omap2420_dsp_hwmod = {
 	.name		= "dsp",
 	.class		= &dsp_hwmod_class,
 	.clkdm_name	= "dsp_clkdm",
-	.rst_lines	= omap2420_dsp_resets,
-	.rst_lines_cnt	= ARRAY_SIZE(omap2420_dsp_resets),
 	.main_clk	= "dsp_fck",
 };
 

index 79127b3..cc0cfaf 100644
@@ -44,17 +44,10 @@
  */
 
 /* IVA2 (IVA2) */
-static struct omap_hwmod_rst_info omap2430_iva_resets[] = {
-	{ .name = "logic", .rst_shift = 0 },
-	{ .name = "mmu", .rst_shift = 1 },
-};
-
 static struct omap_hwmod omap2430_iva_hwmod = {
 	.name		= "iva",
 	.class		= &iva_hwmod_class,
 	.clkdm_name	= "dsp_clkdm",
-	.rst_lines	= omap2430_iva_resets,
-	.rst_lines_cnt	= ARRAY_SIZE(omap2430_iva_resets),
 	.main_clk	= "dsp_fck",
 };
 

index 974260a..9d7a034 100644
@@ -3069,106 +3069,6 @@ static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
 					      oh->prcm.omap2.module_offs, 0);
 }
 
-/**
- * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
- * @oh: struct omap_hwmod * to assert hardreset
- * @ohri: hardreset line data
- *
- * Call omap4_prminst_assert_hardreset() with parameters extracted
- * from the hwmod @oh and the hardreset line data @ohri.  Only
- * intended for use as an soc_ops function pointer.  Passes along the
- * return value from omap4_prminst_assert_hardreset().  XXX This
- * function is scheduled for removal when the PRM code is moved into
- * drivers/.
- */
-static int _omap4_assert_hardreset(struct omap_hwmod *oh,
-				   struct omap_hwmod_rst_info *ohri)
-{
-	if (!oh->clkdm)
-		return -EINVAL;
-
-	return omap_prm_assert_hardreset(ohri->rst_shift,
-					 oh->clkdm->pwrdm.ptr->prcm_partition,
-					 oh->clkdm->pwrdm.ptr->prcm_offs,
-					 oh->prcm.omap4.rstctrl_offs);
-}
-
-/**
- * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
- * @oh: struct omap_hwmod * to deassert hardreset
- * @ohri: hardreset line data
- *
- * Call omap4_prminst_deassert_hardreset() with parameters extracted
- * from the hwmod @oh and the hardreset line data @ohri.  Only
- * intended for use as an soc_ops function pointer.  Passes along the
- * return value from omap4_prminst_deassert_hardreset().  XXX This
- * function is scheduled for removal when the PRM code is moved into
- * drivers/.
- */
-static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
-				     struct omap_hwmod_rst_info *ohri)
-{
-	if (!oh->clkdm)
-		return -EINVAL;
-
-	if (ohri->st_shift)
-		pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
-		       oh->name, ohri->name);
-	return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
-					   oh->clkdm->pwrdm.ptr->prcm_partition,
-					   oh->clkdm->pwrdm.ptr->prcm_offs,
-					   oh->prcm.omap4.rstctrl_offs,
-					   oh->prcm.omap4.rstctrl_offs +
-					   OMAP4_RST_CTRL_ST_OFFSET);
-}
-
-/**
- * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
- * @oh: struct omap_hwmod * to test hardreset
- * @ohri: hardreset line data
- *
- * Call omap4_prminst_is_hardreset_asserted() with parameters
- * extracted from the hwmod @oh and the hardreset line data @ohri.
- * Only intended for use as an soc_ops function pointer.  Passes along
- * the return value from omap4_prminst_is_hardreset_asserted().  XXX
- * This function is scheduled for removal when the PRM code is moved
- * into drivers/.
- */
-static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
-					struct omap_hwmod_rst_info *ohri)
-{
-	if (!oh->clkdm)
-		return -EINVAL;
-
-	return omap_prm_is_hardreset_asserted(ohri->rst_shift,
-					      oh->clkdm->pwrdm.ptr->
-					      prcm_partition,
-					      oh->clkdm->pwrdm.ptr->prcm_offs,
-					      oh->prcm.omap4.rstctrl_offs);
-}
-
-/**
- * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
- * @oh: struct omap_hwmod * to deassert hardreset
- * @ohri: hardreset line data
- *
- * Call am33xx_prminst_deassert_hardreset() with parameters extracted
- * from the hwmod @oh and the hardreset line data @ohri.  Only
- * intended for use as an soc_ops function pointer.  Passes along the
- * return value from am33xx_prminst_deassert_hardreset().  XXX This
- * function is scheduled for removal when the PRM code is moved into
- * drivers/.
- */
-static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
-				     struct omap_hwmod_rst_info *ohri)
-{
-	return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
-					   oh->clkdm->pwrdm.ptr->prcm_partition,
-					   oh->clkdm->pwrdm.ptr->prcm_offs,
-					   oh->prcm.omap4.rstctrl_offs,
-					   oh->prcm.omap4.rstst_offs);
-}
-
 static int _dt_assert_hardreset(struct omap_hwmod *oh,
 				struct omap_hwmod_rst_info *ohri)
 {

@@ -3984,8 +3884,6 @@ void __init omap_hwmod_init(void)
 {
 	if (cpu_is_omap24xx()) {
 		soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
-		soc_ops.assert_hardreset = _omap2_assert_hardreset;
-		soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
 		soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
 	} else if (cpu_is_omap34xx()) {
 		soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;

@@ -3997,9 +3895,6 @@ void __init omap_hwmod_init(void)
 		soc_ops.enable_module = _omap4_enable_module;
 		soc_ops.disable_module = _omap4_disable_module;
 		soc_ops.wait_target_ready = _omap4_wait_target_ready;
-		soc_ops.assert_hardreset = _omap4_assert_hardreset;
-		soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
-		soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
 		soc_ops.init_clkdm = _init_clkdm;
 		soc_ops.update_context_lost = _omap4_update_context_lost;
 		soc_ops.get_context_lost = _omap4_get_context_lost;

@@ -4008,9 +3903,6 @@ void __init omap_hwmod_init(void)
 		soc_ops.enable_module = _omap4_enable_module;
 		soc_ops.disable_module = _omap4_disable_module;
 		soc_ops.wait_target_ready = _omap4_wait_target_ready;
-		soc_ops.assert_hardreset = _omap4_assert_hardreset;
-		soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
-		soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
 		soc_ops.init_clkdm = _init_clkdm;
 	} else {
 		WARN(1, "omap_hwmod: unknown SoC type\n");

index a6f3ac2..e1f0b76 100644
@@ -451,10 +451,8 @@ struct omap_hwmod_omap2_prcm {
 /**
  * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
  * @clkctrl_offs: offset of the PRCM clock control register
- * @rstctrl_offs: offset of the XXX_RSTCTRL register located in the PRM
  * @context_offs: offset of the RM_*_CONTEXT register
  * @lostcontext_mask: bitmask for selecting bits from RM_*_CONTEXT register
- * @rstst_reg: (AM33XX only) address of the XXX_RSTST register in the PRM
  * @submodule_wkdep_bit: bit shift of the WKDEP range
  * @flags: PRCM register capabilities for this IP block
  * @modulemode: allowable modulemodes

@@ -467,8 +465,6 @@ struct omap_hwmod_omap2_prcm {
  */
 struct omap_hwmod_omap4_prcm {
 	u16		clkctrl_offs;
-	u16		rstctrl_offs;
-	u16		rstst_offs;
 	u16		context_offs;
 	u32		lostcontext_mask;
 	u8		submodule_wkdep_bit;

index 752018ce..70f711b 100644
@@ -101,20 +101,6 @@ static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
 }
 
 /**
- * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
- *
- * Set the DPLL reset bit, which should reboot the SoC.  This is the
- * recommended way to restart the SoC.  No return value.
- */
-static void omap2xxx_prm_dpll_reset(void)
-{
-	omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, WKUP_MOD,
-				   OMAP2_RM_RSTCTRL);
-	/* OCP barrier */
-	omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTCTRL);
-}
-
-/**
  * omap2xxx_prm_clear_mod_irqs - clear wakeup status bits for a module
  * @module: PRM module to clear wakeups from
  * @regs: register offset to clear

@@ -216,7 +202,6 @@ static struct prm_ll_data omap2xxx_prm_ll_data = {
 	.assert_hardreset = &omap2_prm_assert_hardreset,
 	.deassert_hardreset = &omap2_prm_deassert_hardreset,
 	.is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,
-	.reset_system = &omap2xxx_prm_dpll_reset,
 	.clear_mod_irqs = &omap2xxx_prm_clear_mod_irqs,
 };
 

index dcb5001..12b15a2 100644
@@ -336,23 +336,6 @@ static int am33xx_check_vcvp(void)
 	return 0;
 }
 
-/**
- * am33xx_prm_global_warm_sw_reset - reboot the device via warm reset
- *
- * Immediately reboots the device through warm reset.
- */
-static void am33xx_prm_global_warm_sw_reset(void)
-{
-	am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
-				AM33XX_RST_GLOBAL_WARM_SW_MASK,
-				AM33XX_PRM_DEVICE_MOD,
-				AM33XX_PRM_RSTCTRL_OFFSET);
-
-	/* OCP barrier */
-	(void)am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
-				  AM33XX_PRM_RSTCTRL_OFFSET);
-}
-
 struct pwrdm_ops am33xx_pwrdm_operations = {
 	.pwrdm_set_next_pwrst		= am33xx_pwrdm_set_next_pwrst,
 	.pwrdm_read_next_pwrst		= am33xx_pwrdm_read_next_pwrst,

@@ -375,7 +358,6 @@ static struct prm_ll_data am33xx_prm_ll_data = {
 	.assert_hardreset		= am33xx_prm_assert_hardreset,
 	.deassert_hardreset		= am33xx_prm_deassert_hardreset,
 	.is_hardreset_asserted		= am33xx_prm_is_hardreset_asserted,
-	.reset_system			= am33xx_prm_global_warm_sw_reset,
 };
 
 int __init am33xx_prm_init(const struct omap_prcm_init_data *data)

index 3076800..76d7e30 100644
@@ -702,7 +702,6 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 	.assert_hardreset	= omap4_prminst_assert_hardreset,
 	.deassert_hardreset	= omap4_prminst_deassert_hardreset,
 	.is_hardreset_asserted	= omap4_prminst_is_hardreset_asserted,
-	.reset_system		= omap4_prminst_global_warm_sw_reset,
 	.vp_check_txdone	= omap4_prm_vp_check_txdone,
 	.vp_clear_txdone	= omap4_prm_vp_clear_txdone,
 };

index d0b15db..ffed63f 100644
@@ -174,23 +174,3 @@ int omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 inst,
 
 	return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
 }
-
-
-void omap4_prminst_global_warm_sw_reset(void)
-{
-	u32 v;
-	s32 inst = omap4_prmst_get_prm_dev_inst();
-
-	if (inst == PRM_INSTANCE_UNKNOWN)
-		return;
-
-	v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, inst,
-					OMAP4_PRM_RSTCTRL_OFFSET);
-	v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK;
-	omap4_prminst_write_inst_reg(v, OMAP4430_PRM_PARTITION,
-				 inst, OMAP4_PRM_RSTCTRL_OFFSET);
-
-	/* OCP barrier */
-	v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
-				    inst, OMAP4_PRM_RSTCTRL_OFFSET);
-}