gpio: add tps65218 gpio driver
PATCH 1/1 gpio: add tps65218 gpio driver
Driver for the GPIO block found in ti's tps65218 pmics.
The device has two GPIOs and one GPO pin which can be configured as follows:
GPIO1:
-general-purpose, open-drain output controlled by GPO1 user bit and/or
sequencer
-DDR3 reset input signal from SOC. Signal is either latched or
passed-trough to GPO2 pin. See below for details.
GPO2:
-general-purpose output controlled by GPO2 user bit
-DDR3 reset output signal. Signal is controlled by GPIO1 and PGOOD.
See below for details.
-Output buffer can be configured as open-drain or push-pull.
GPIO3:
-general-purpose, open-drain output controlled by GPO3 user bit and/or
sequencer
-reset input-signal for DCDC1 and DCDC2.
The input configurations are not meant to be used by the user so the driver only offers GPOs. Also GPO2 is set-up as open drain by default.
--- drivers/gpio/Kconfig | 7 ++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-tps65218.c | 165 +++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 173 insertions(+) create mode 100644 drivers/gpio/gpio-tps65218.c
drivers/gpio/Kconfig +7 -0
@@ -822,6 +822,13 @@ config GPIO_TIMBERDALE ---help--- Add support for the GPIO IP in the timberdale FPGA. +config GPIO_TPS65218 + tristate "TPS65218 GPIO" + depends on MFD_TPS65218 + help + Select this option to enable GPIO driver for the TPS65218 + chip family. + config GPIO_TPS6586X bool "TPS6586X GPIO" depends on MFD_TPS6586X
drivers/gpio/Makefile +1 -0
@@ -93,6 +93,7 @@ obj-$(CONFIG_GPIO_TC3589X) += gpio-tc3589x.o obj-$(CONFIG_ARCH_TEGRA) += gpio-tegra.o obj-$(CONFIG_GPIO_TIMBERDALE) += gpio-timberdale.o obj-$(CONFIG_GPIO_PALMAS) += gpio-palmas.o +obj-$(CONFIG_GPIO_TPS65218) += gpio-tps65218.o obj-$(CONFIG_GPIO_TPS6586X) += gpio-tps6586x.o obj-$(CONFIG_GPIO_TPS65910) += gpio-tps65910.o obj-$(CONFIG_GPIO_TPS65912) += gpio-tps65912.o
drivers/gpio/gpio-tps65218.c new file +165 -0
165 lines not on this page · raw message
Signature · 1 line
2.5.0
kbuild test robot
build bot[PATCH] gpio: fix platform_no_drv_owner.cocci warnings
drivers/gpio/gpio-tps65218.c:153:3-8: No need to set .owner here. The core will do it.
drivers/gpio/gpio-tps65218.c:153:3-8: No need to set .owner here. The core will do it.
Remove .owner field if calls are used which set it automatically
Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
---
gpio-tps65218.c | 1 - 1 file changed, 1 deletion(-)
drivers/gpio/gpio-tps65218.c +0 -1
@@ -150,7 +150,6 @@ MODULE_DEVICE_TABLE(of, tps65218_dt_matcstatic struct platform_driver tps65218_gpio_driver = { .driver = { .name ="tps65218-gpio" , - .owner =THIS_MODULE , .of_match_table =of_match_ptr (tps65218_dt_match) }, .probe = tps65218_gpio_probe,
kbuild test robot
build botcoccinelle warnings: (new ones prefixed by >>)
Hi Nicolas,
[auto build test WARNING on gpio/for-next -- if it's inappropriate base, please ignore]
coccinelle warnings: (new ones prefixed by >>)
>> drivers/gpio/gpio-tps65218.c:153:3-8: No need to set .owner here. The core will do it.
Please review and possibly fold the followup patch.
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
Quoted 18 lines · Nicolas Saenz Julienne
Driver for the GPIO block found in ti's tps65218 pmics.
The device has two GPIOs and one GPO pin which can be configured as follows:
GPIO1:
-general-purpose, open-drain output controlled by GPO1 user bit and/or
sequencer
-DDR3 reset input signal from SOC. Signal is either latched or
passed-trough to GPO2 pin. See below for details.
GPO2:
-general-purpose output controlled by GPO2 user bit
-DDR3 reset output signal. Signal is controlled by GPIO1 and PGOOD.
See below for details.
-Output buffer can be configured as open-drain or push-pull.
GPIO3:
-general-purpose, open-drain output controlled by GPO3 user bit and/or
sequencer
-reset input-signal for DCDC1 and DCDC2.
Quoted 4 lines
The input configurations are not meant to be used by the user so the driver only offers GPOs. Also GPO2 is set-up as open drain by default.
Signed-off-by Nicolas Saenz Julienne <[email protected]>
It seems we are currently seeing an influx of drivers that can selectively enable open drain on some pins. Can you please look at the patches submitted by Laurent Pinchart for this so we get a generic solution that works for everyone.
It's important that consumers can request open drain from descriptor tables or device trees and that the driver says "no" if this can not be satisfied.
Yours,
Linus Walleij