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ARM: handle imprecise aborts from firmware in common code

PATCH Superseded Lucas Stach 6 participants 11 messages Oct 14, 2015 – Oct 15, 2015

Subsystems (6)

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#0 lore raw

cover ARM: handle imprecise aborts from firmware in common code

This series implements the handling of a pending imprecise abort left behind by the bootloader/firmware running before Linux in the common ARM startup code.

It turns pending imprecise aborts that may signal during the first unmasking of such aborts on the boot CPU into a non-faulting event and warns the user that the firmware of the machine might be buggy.

Handling this in the common code makes sure that we only ignore already pending aborts and not those that may happen later during system boot/usage. It also allows to remove the custom fault handler from the 3 architectures that are known to have bad firmware/bootloaders.

The patches changing OMAP, MVEBU and BCM5301X are only build tested as I have no hardware to test on. So I would appreciate a tested-by for those.

Regards,
Lucas

Lucas Stach (4):
ARM: catch pending imprecise abort on unmask
ARM: OMAP2+: remove custom abort handler for t410
ARM: mvebu: remove the workaround imprecise abort fault handler
ARM: BCM5301X: remove workaround imprecise abort fault handler

 arch/arm/mach-bcm/bcm_5301x.c      | 35 -----------------------------------
 arch/arm/mach-mvebu/board-v7.c     | 35 -----------------------------------
 arch/arm/mach-omap2/pdata-quirks.c | 29 -----------------------------
 arch/arm/mm/fault.c                | 15 +++++++++++++++
 arch/arm/mm/fault.h                |  2 ++
 arch/arm/mm/mmu.c                  | 19 ++++++++++++++++++-
 6 files changed, 35 insertions(+), 100 deletions(-)
Signature · 1 line
2.6.1
#1 lore raw

PATCH 1/4 ARM: catch pending imprecise abort on unmask

Install a non-faulting handler just before unmasking imprecise aborts and switch back to the regular one after unmasking is done.

This catches any pending imprecise abort that the firmware/bootloader may have left behind that would normally crash the kernel at that point. As there are apparently a lot of bootlaoders out there that do such a thing it makes sense to handle it in the common startup code.

---
 arch/arm/mm/fault.c | 15 +++++++++++++++
 arch/arm/mm/fault.h |  2 ++
 arch/arm/mm/mmu.c   | 19 ++++++++++++++++++-
 3 files changed, 35 insertions(+), 1 deletion(-)
arch/arm/mm/fault.c +15 -0
index 0d629b8f973f..519f694ec9db 100644
@@ -538,6 +538,21 @@ hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *)
 	fsr_info[nr].name = name;
 }
 
+void * __init
+swap_fault_function(int nr,
+		    int (*fn)(unsigned long, unsigned int, struct pt_regs *))
+{
+	void *old_fn;
+
+	if (nr < 0 || nr >= ARRAY_SIZE(fsr_info))
+		BUG();
+
+	old_fn = fsr_info[nr].fn;
+	fsr_info[nr].fn = fn;
+
+	return old_fn;
+}
+
 /*
  * Dispatch a data abort to the relevant handler.
  */
arch/arm/mm/fault.h +2 -0
index cf08bdfbe0d6..2deb7494d84f 100644
@@ -24,5 +24,7 @@ static inline int fsr_fs(unsigned int fsr)
 
 void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs);
 unsigned long search_exception_table(unsigned long addr);
+void *swap_fault_function(int nr,
+		int (*fn)(unsigned long, unsigned int, struct pt_regs *));
 
 #endif	/* __ARCH_ARM_FAULT_H */
arch/arm/mm/mmu.c +18 -1
index f65a6f344b6d..78c420776f4c 100644
@@ -38,6 +38,7 @@
 #include <asm/mach/pci.h>
 #include <asm/fixmap.h>
 
+#include "fault.h"
 #include "mm.h"
 #include "tcm.h"
 
@@ -1259,6 +1260,20 @@ void __init arm_mm_memblock_reserve(void)
 }
 
 /*
+ * Abort handler to be used only during unmasking of imprecise aborts. This
+ * makes sure that the machine will not die if the firmware/bootloader left an
+ * imprecise abort pending for us to trip over.
+ */
+static int __init early_abort_handler(unsigned long addr, unsigned int fsr,
+				      struct pt_regs *regs)
+{
+	pr_warn("Hit pending imprecise external abort during first unmask, "
+		"this is most likely caused by a firmware/bootloader bug.\n");
+
+	return 0;
+}
+
+/*
  * Set up the device mappings.  Since we clear out the page tables for all
  * mappings above VMALLOC_START, except early fixmap, we might remove debug
  * device mappings.  This means earlycon can be used to debug this function
@@ -1269,7 +1284,7 @@ static void __init devicemaps_init(const struct machine_desc *mdesc)
 {
 	struct map_desc map;
 	unsigned long addr;
-	void *vectors;
+	void *vectors, *saved_fault_fn;
 
 	/*
 	 * Allocate the vector page early.
@@ -1365,7 +1380,9 @@ static void __init devicemaps_init(const struct machine_desc *mdesc)
 	flush_cache_all();
 
 	/* Enable asynchronous aborts */
+	saved_fault_fn = swap_fault_function(22, early_abort_handler);
 	local_abt_enable();
+	swap_fault_function(22, saved_fault_fn);
 }
 
 static void __init kmap_init(void)
Signature · 1 line
2.6.1
maintainer
#2 lore raw

PATCH 1/4 ARM: catch pending imprecise abort on unmask

Quoted 68 lines · Lucas Stach

Install a non-faulting handler just before unmasking imprecise aborts and switch back to the regular one after unmasking is done.

This catches any pending imprecise abort that the firmware/bootloader may have left behind that would normally crash the kernel at that point. As there are apparently a lot of bootlaoders out there that do such a thing it makes sense to handle it in the common startup code.

---
 arch/arm/mm/fault.c | 15 +++++++++++++++
 arch/arm/mm/fault.h |  2 ++
 arch/arm/mm/mmu.c   | 19 ++++++++++++++++++-
 3 files changed, 35 insertions(+), 1 deletion(-)
arch/arm/mm/fault.c +15 -0
index 0d629b8f973f..519f694ec9db 100644
@@ -538,6 +538,21 @@ hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *)
 	fsr_info[nr].name = name;
 }
 
+void * __init
+swap_fault_function(int nr,
+		    int (*fn)(unsigned long, unsigned int, struct pt_regs *))
+{
+	void *old_fn;
+
+	if (nr < 0 || nr >= ARRAY_SIZE(fsr_info))
+		BUG();
+
+	old_fn = fsr_info[nr].fn;
+	fsr_info[nr].fn = fn;
+
+	return old_fn;
+}
+
 /*
  * Dispatch a data abort to the relevant handler.
  */
arch/arm/mm/fault.h +2 -0
index cf08bdfbe0d6..2deb7494d84f 100644
@@ -24,5 +24,7 @@ static inline int fsr_fs(unsigned int fsr)
 
 void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs);
 unsigned long search_exception_table(unsigned long addr);
+void *swap_fault_function(int nr,
+		int (*fn)(unsigned long, unsigned int, struct pt_regs *));
 
 #endif	/* __ARCH_ARM_FAULT_H */
arch/arm/mm/mmu.c +1 -0
index f65a6f344b6d..78c420776f4c 100644
@@ -38,6 +38,7 @@
 #include <asm/mach/pci.h>
 #include <asm/fixmap.h>
 
+#include "fault.h"
 #include "mm.h"
 #include "tcm.h"
 
@@ -1259,6 +1260,20 @@ void __init arm_mm_memblock_reserve(void)
 }
 

arch/arm/mm/mmu.c void __init arm_mm_memblock_reserve(void) · line 1271

Quoted 10 lines
arch/arm/mm/mmu.c +9 -0
 /*
+ * Abort handler to be used only during unmasking of imprecise aborts. This
+ * makes sure that the machine will not die if the firmware/bootloader left an
+ * imprecise abort pending for us to trip over.
+ */
+static int __init early_abort_handler(unsigned long addr, unsigned int fsr,
+				      struct pt_regs *regs)
+{
+	pr_warn("Hit pending imprecise external abort during first unmask, "
+		"this is most likely caused by a firmware/bootloader bug.\n");

Why don't you add the fsr value into the print, so it is easier to debug.

Otherwise:

Quoted 28 lines
arch/arm/mm/mmu.c +8 -1
+
+	return 0;
+}
+
+/*
  * Set up the device mappings.  Since we clear out the page tables for all
  * mappings above VMALLOC_START, except early fixmap, we might remove debug
  * device mappings.  This means earlycon can be used to debug this function
@@ -1269,7 +1284,7 @@ static void __init devicemaps_init(const struct machine_desc *mdesc)
 {
 	struct map_desc map;
 	unsigned long addr;
-	void *vectors;
+	void *vectors, *saved_fault_fn;
 
 	/*
 	 * Allocate the vector page early.
@@ -1365,7 +1380,9 @@ static void __init devicemaps_init(const struct machine_desc *mdesc)
 	flush_cache_all();
 
 	/* Enable asynchronous aborts */
+	saved_fault_fn = swap_fault_function(22, early_abort_handler);
 	local_abt_enable();
+	swap_fault_function(22, saved_fault_fn);
 }
 
 static void __init kmap_init(void)
#3 lore raw

PATCH 1/4 ARM: catch pending imprecise abort on unmask

In reply to Lucas Stach
Quoted 28 lines · Lucas Stach

Install a non-faulting handler just before unmasking imprecise aborts and switch back to the regular one after unmasking is done.

This catches any pending imprecise abort that the firmware/bootloader may have left behind that would normally crash the kernel at that point. As there are apparently a lot of bootlaoders out there that do such a thing it makes sense to handle it in the common startup code.

---
 arch/arm/mm/fault.c | 15 +++++++++++++++
 arch/arm/mm/fault.h |  2 ++
 arch/arm/mm/mmu.c   | 19 ++++++++++++++++++-
 3 files changed, 35 insertions(+), 1 deletion(-)
arch/arm/mm/fault.c +5 -0
index 0d629b8f973f..519f694ec9db 100644
@@ -538,6 +538,21 @@ hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *)
 	fsr_info[nr].name = name;
 }
 
+void * __init
+swap_fault_function(int nr,
+		    int (*fn)(unsigned long, unsigned int, struct pt_regs *))
+{
+	void *old_fn;

arch/arm/mm/fault.c hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *) · line 555

Quoted 10 lines
arch/arm/mm/fault.c +10 -0
+
+	if (nr < 0 || nr >= ARRAY_SIZE(fsr_info))
+		BUG();
+
+	old_fn = fsr_info[nr].fn;
+	fsr_info[nr].fn = fn;
+
+	return old_fn;
+}
+

Please move the abort enable and handler into fault.c - I don't want this exposed to the rest of the kernel as people will get the impression that they can make use of this, even though it's not in arch/arm/include/, as a way to hook and then subsequently unhook a handler.

Thanks.

Signature · 2 lines
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.
#4 lore raw

PATCH 2/4 ARM: OMAP2+: remove custom abort handler for t410

In reply to Lucas Stach

This is not needed anymore. Handling a potentially pending imprecise external abort left behind by the bootloader is now done in a slightly safer way inside the common ARM startup code.

---
 arch/arm/mach-omap2/pdata-quirks.c | 29 -----------------------------
 1 file changed, 29 deletions(-)
arch/arm/mach-omap2/pdata-quirks.c +0 -29
index ea56397599c2..3a2bc2a88db4 100644
@@ -24,9 +24,6 @@
 #include <linux/platform_data/iommu-omap.h>
 #include <linux/platform_data/wkup_m3.h>
 
-#include <asm/siginfo.h>
-#include <asm/signal.h>
-
 #include "common.h"
 #include "common-board-devices.h"
 #include "dss-common.h"
@@ -385,29 +382,6 @@ static void __init omap3_pandora_legacy_init(void)
 }
 #endif /* CONFIG_ARCH_OMAP3 */
 
-#ifdef CONFIG_SOC_TI81XX
-static int fault_fixed_up;
-
-static int t410_abort_handler(unsigned long addr, unsigned int fsr,
-			      struct pt_regs *regs)
-{
-	if ((fsr == 0x406 || fsr == 0xc06) && !fault_fixed_up) {
-		pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",
-			addr, fsr);
-		fault_fixed_up = 1;
-		return 0;
-	}
-
-	return 1;
-}
-
-static void __init t410_abort_init(void)
-{
-	hook_fault_code(16 + 6, t410_abort_handler, SIGBUS, BUS_OBJERR,
-			"imprecise external abort");
-}
-#endif
-
 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
 static struct iommu_platform_data omap4_iommu_pdata = {
 	.reset_name = "mmu_cache",
@@ -536,9 +510,6 @@ static struct pdata_init pdata_quirks[] __initdata = {
 	{ "openpandora,omap3-pandora-600mhz", omap3_pandora_legacy_init, },
 	{ "openpandora,omap3-pandora-1ghz", omap3_pandora_legacy_init, },
 #endif
-#ifdef CONFIG_SOC_TI81XX
-	{ "hp,t410", t410_abort_init, },
-#endif
 #ifdef CONFIG_SOC_OMAP5
 	{ "ti,omap5-uevm", omap5_uevm_legacy_init, },
 #endif
Signature · 1 line
2.6.1
maintainer
#5 lore raw

PATCH 2/4 ARM: OMAP2+: remove custom abort handler for t410

Hi,

Quoted 3 lines · Lucas Stach

This is not needed anymore. Handling a potentially pending imprecise external abort left behind by the bootloader is now done in a slightly safer way inside the common ARM startup code.

With commit bbeb92095159 ("ARM: 8422/1: enable imprecise aborts during early kernel startup") we now see where it breaks :) It seems to be related to misconfigured SRAM size or something in the t410 case:

[    0.363485] Unhandled fault: imprecise external abort (0xc06) at 0xc08b156c
[    0.370732] pgd = c0004000
[    0.373598] [c08b156c] *pgd=8080040e(bad)
[    0.377817] Internal error: : c06 [#1] SMP ARM
[    0.382470] Modules linked in:
[    0.385702] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G        W       4.3.0-rc5-00001-g3b6348b #1672
[    0.394999] Hardware name: Generic ti814x (Flattened Device Tree)
[    0.401348] task: ee08ed40 ti: ee090000 task.ti: ee090000
[    0.406988] PC is at omap_rev+0x0/0x10
[    0.410930] LR is at omap_sram_init+0xf8/0x3e0
[    0.415586] pc : [<c00259c8>]    lr : [<c08b12e0>]    psr: 60000013
[    0.415586] sp : ee091eb0  ip : f004a800  fp : 00000099
[    0.427563] r10: c08f1858  r9 : 00000000  r8 : c08a57c4
[    0.433019] r7 : c09d0000  r6 : ee0e8980  r5 : 00000000  r4 : c09d08dc
[    0.439812] r3 : 00000000  r2 : 00000000  r1 : 00000000  r0 : f004a000
[    0.446609] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
[    0.454030] Control: 10c5387d  Table: 80004019  DAC: 00000051
[    0.460024] Process swapper/0 (pid: 1, stack limit = 0xee090218)
[    0.466283] Stack: (0xee091eb0 to 0xee092000)
[    0.470849] 1ea0:                                     c08efa48 00000000 00000000 ee0e8980
[    0.479347] 1ec0: c09d0000 c08aca0c c08efa48 c08faf44 c0904844 c08b581c c08efa48 c091a3b0
[    0.487847] 1ee0: c091a3b0 c08b5478 c08efa48 c08a57e0 00000000 c00098a4 ee08ed40 c0951e2c
[    0.496346] 1f00: ee08f280 00000000 ee08ed00 00000004 00000006 00000000 ef7fcb3d c066c6b8
[    0.504843] 1f20: 00000099 c005eba0 00000001 00000000 c086e2b4 ef7fcb51 00000003 00000003
[    0.513340] 1f40: c090ab00 c090ac0c c090ac14 00000003 c09d0000 c09d0000 c08f1840 00000000
[    0.521841] 1f60: c08f1858 c08a2ec4 00000003 00000003 00000000 c08a2594 ffffffff 00000000
[    0.530340] 1f80: c063a54c 00000000 c063a54c 00000000 00000000 00000000 00000000 00000000
[    0.538837] 1fa0: 00000000 c063a554 00000000 c000f890 00000000 00000000 00000000 00000000
[    0.547333] 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[    0.555832] 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 ffffffff ffffffff
[    0.564333] [<c00259c8>] (omap_rev) from [<c08b12e0>] (omap_sram_init+0xf8/0x3e0)
[    0.572118] [<c08b12e0>] (omap_sram_init) from [<c08aca0c>] (omap_sdrc_init+0x10/0xb0)
[    0.580349] [<c08aca0c>] (omap_sdrc_init) from [<c08b581c>] (pdata_quirks_init+0x18/0x44)
[    0.588850] [<c08b581c>] (pdata_quirks_init) from [<c08b5478>] (omap_generic_init+0x10/0x1c)
[    0.597619] [<c08b5478>] (omap_generic_init) from [<c08a57e0>] (customize_machine+0x1c/0x40)
[    0.606390] [<c08a57e0>] (customize_machine) from [<c00098a4>] (do_one_initcall+0x80/0x1dc)
[    0.615068] [<c00098a4>] (do_one_initcall) from [<c08a2ec4>] (kernel_init_freeable+0x218/0x2e8)
[    0.624107] [<c08a2ec4>] (kernel_init_freeable) from [<c063a554>] (kernel_init+0x8/0xec)
[    0.632522] [<c063a554>] (kernel_init) from [<c000f890>] (ret_from_fork+0x14/0x24)
[    0.640397] Code: e3a03000 e5843064 e8bd8010 c0959e3c (e59f3004)
[    0.646756] ---[ end trace cb88537fdc8fa202 ]---

Your patch does not affect this, I need to fix up things for t410 anyways. So please feel free to add:

Regards,

Tony

#6 lore raw

PATCH 3/4 ARM: mvebu: remove the workaround imprecise abort fault handler

In reply to Lucas Stach

This is not needed anymore. Handling a potentially pending imprecise external abort left behind by the bootloader is now done in a slightly safer way inside the common ARM startup code.

---
 arch/arm/mach-mvebu/board-v7.c | 35 -----------------------------------
 1 file changed, 35 deletions(-)
arch/arm/mach-mvebu/board-v7.c +0 -35
index 9f739f3cad4c..1648edd515a2 100644
@@ -22,7 +22,6 @@
 #include <linux/dma-mapping.h>
 #include <linux/memblock.h>
 #include <linux/mbus.h>
-#include <linux/signal.h>
 #include <linux/slab.h>
 #include <linux/irqchip.h>
 #include <asm/hardware/cache-l2x0.h>
@@ -105,27 +104,6 @@ static void __init mvebu_memblock_reserve(void)
 static void __init mvebu_memblock_reserve(void) {}
 #endif
 
-/*
- * Early versions of Armada 375 SoC have a bug where the BootROM
- * leaves an external data abort pending. The kernel is hit by this
- * data abort as soon as it enters userspace, because it unmasks the
- * data aborts at this moment. We register a custom abort handler
- * below to ignore the first data abort to work around this
- * problem.
- */
-static int armada_375_external_abort_wa(unsigned long addr, unsigned int fsr,
-					struct pt_regs *regs)
-{
-	static int ignore_first;
-
-	if (!ignore_first && fsr == 0x1406) {
-		ignore_first = 1;
-		return 0;
-	}
-
-	return 1;
-}
-
 static void __init mvebu_init_irq(void)
 {
 	irqchip_init();
@@ -134,17 +112,6 @@ static void __init mvebu_init_irq(void)
 	BUG_ON(mvebu_mbus_dt_init(coherency_available()));
 }
 
-static void __init external_abort_quirk(void)
-{
-	u32 dev, rev;
-
-	if (mvebu_get_soc_id(&dev, &rev) == 0 && rev > ARMADA_375_Z1_REV)
-		return;
-
-	hook_fault_code(16 + 6, armada_375_external_abort_wa, SIGBUS, 0,
-			"imprecise external abort");
-}
-
 static void __init i2c_quirk(void)
 {
 	struct device_node *np;
@@ -177,8 +144,6 @@ static void __init mvebu_dt_init(void)
 {
 	if (of_machine_is_compatible("marvell,armadaxp"))
 		i2c_quirk();
-	if (of_machine_is_compatible("marvell,a375-db"))
-		external_abort_quirk();
 
 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 }
Signature · 1 line
2.6.1
#7 lore raw

PATCH 3/4 ARM: mvebu: remove the workaround imprecise abort fault handler

Lucas,

Quoted 8 lines · Lucas Stach

This is not needed anymore. Handling a potentially pending imprecise external abort left behind by the bootloader is now done in a slightly safer way inside the common ARM startup code.

---
 arch/arm/mach-mvebu/board-v7.c | 35 -----------------------------------
 1 file changed, 35 deletions(-)

In fact this code is anyway no longer needed, since this workaround was only needed for the Armada 375 Z1 stepping, which we no longer support in mainline anyway.

Thanks!

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
#8 lore raw

PATCH 3/4 ARM: mvebu: remove the workaround imprecise abort fault handler

Hi Lucas,

Quoted 8 lines · Thomas Petazzoni

Lucas,

Quoted 5 lines · Lucas Stach

This is not needed anymore. Handling a potentially pending imprecise external abort left behind by the bootloader is now done in a slightly safer way inside the common ARM startup code.

As pointed by Thomas the code is no longer needed. So even if the rest of tour series is not merged, I still applied on mvebu/cleanup.

I also amended the commit log to emphasize that the Armada 375 Z1 was not support anymore.

Thanks,

Gregory

Quoted 17 lines
Quoted 3 lines
---
 arch/arm/mach-mvebu/board-v7.c | 35 -----------------------------------
 1 file changed, 35 deletions(-)

In fact this code is anyway no longer needed, since this workaround was only needed for the Armada 375 Z1 stepping, which we no longer support in mainline anyway.

Thanks!

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
Signature · 4 lines
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
#9 lore raw

PATCH 4/4 ARM: BCM5301X: remove workaround imprecise abort fault handler

In reply to Lucas Stach

This is not needed anymore. Handling a potentially pending imprecise external abort left behind by the bootloader is now done in a slightly safer way inside the common ARM startup code.

---
 arch/arm/mach-bcm/bcm_5301x.c | 35 -----------------------------------
 1 file changed, 35 deletions(-)
arch/arm/mach-bcm/bcm_5301x.c +0 -35
index 5478fe6bcce6..c8830a2b0d60 100644
@@ -9,40 +9,6 @@
 #include <asm/hardware/cache-l2x0.h>
 
 #include <asm/mach/arch.h>
-#include <asm/siginfo.h>
-#include <asm/signal.h>
-
-
-static bool first_fault = true;
-
-static int bcm5301x_abort_handler(unsigned long addr, unsigned int fsr,
-				 struct pt_regs *regs)
-{
-	if ((fsr == 0x1406 || fsr == 0x1c06) && first_fault) {
-		first_fault = false;
-
-		/*
-		 * These faults with codes 0x1406 (BCM4709) or 0x1c06 happens
-		 * for no good reason, possibly left over from the CFE boot
-		 * loader.
-		 */
-		pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",
-			addr, fsr);
-
-		/* Returning non-zero causes fault display and panic */
-		return 0;
-	}
-
-	/* Others should cause a fault */
-	return 1;
-}
-
-static void __init bcm5301x_init_early(void)
-{
-	/* Install our hook */
-	hook_fault_code(16 + 6, bcm5301x_abort_handler, SIGBUS, BUS_OBJERR,
-			"imprecise external abort");
-}
 
 static const char *const bcm5301x_dt_compat[] __initconst = {
 	"brcm,bcm4708",
@@ -52,6 +18,5 @@ static const char *const bcm5301x_dt_compat[] __initconst = {
 DT_MACHINE_START(BCM5301X, "BCM5301X")
 	.l2c_aux_val	= 0,
 	.l2c_aux_mask	= ~0,
-	.init_early	= bcm5301x_init_early,
 	.dt_compat	= bcm5301x_dt_compat,
 MACHINE_END
Signature · 1 line
2.6.1
maintainer
#10 lore raw

PATCH 4/4 ARM: BCM5301X: remove workaround imprecise abort fault handler

Quoted 5 lines · Lucas Stach

This is not needed anymore. Handling a potentially pending imprecise external abort left behind by the bootloader is now done in a slightly safer way inside the common ARM startup code.

I tested this on my board and this fixes the problem.

Hauke