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pci: pcie_imx: Fix hang on mx6qp

PATCH New Fabio Estevam 4 participants 5 messages Oct 13, 2015 – Oct 15, 2015

Subsystems (3)
Arm (32-bit) Arm i.MX and Layerscape PCI
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Fabio Estevam

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#0 lore raw

PATCH v4 1/1 pci: pcie_imx: Fix hang on mx6qp

PCI driver currently hangs on mx6qp.

Toggle the reset bit with the appropriate timings to fix the issue.

Based on the FSL kernel driver implementation.

Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v3:
- Remove blank line from commit log
Changes since v2:
- Remove unneeded blank line (Bin)

 arch/arm/include/asm/arch-mx6/iomux.h | 2 ++
 drivers/pci/pcie_imx.c                | 8 ++++++++
 2 files changed, 10 insertions(+)
arch/arm/include/asm/arch-mx6/iomux.h +2 -0
index 9b3a91f..907cb40 100644
@@ -18,6 +18,8 @@
 #define IOMUXC_GPR1_REF_SSP_EN			(1 << 16)
 #define IOMUXC_GPR1_TEST_POWERDOWN		(1 << 18)
 
+#define IOMUXC_GPR1_PCIE_SW_RST		(1 << 29)
+
 /*
  * IOMUXC_GPR5 bit fields
  */
drivers/pci/pcie_imx.c +8 -0
index 1568f20..f1e189e 100644
@@ -19,6 +19,7 @@
 #include <asm/io.h>
 #include <linux/sizes.h>
 #include <errno.h>
+#include <asm/arch/sys_proto.h>
 
 #define PCI_ACCESS_READ  0
 #define PCI_ACCESS_WRITE 1

@@ -430,6 +431,10 @@ static int imx_pcie_write_config(struct pci_controller *hose, pci_dev_t d,
 static int imx6_pcie_assert_core_reset(void)
 {
 	struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
+
+	if (is_mx6dqp())
+		setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_PCIE_SW_RST);
+
 #if defined(CONFIG_MX6SX)
 	struct gpc *gpc_regs = (struct gpc *)GPC_BASE_ADDR;
 

@@ -536,6 +541,9 @@ static int imx6_pcie_deassert_core_reset(void)
 
 	enable_pcie_clock();
 
+	if (is_mx6dqp())
+		clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_PCIE_SW_RST);
+
 	/*
 	 * Wait for the clock to settle a bit, when the clock are sourced
 	 * from the CPU, we need about 30 ms to settle.
Signature · 1 line
1.9.1
#1 lore raw

PATCH v4 1/1 pci: pcie_imx: Fix hang on mx6qp

Quoted 55 lines · Fabio Estevam

PCI driver currently hangs on mx6qp.

Toggle the reset bit with the appropriate timings to fix the issue.

Based on the FSL kernel driver implementation.

Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v3:
- Remove blank line from commit log
Changes since v2:
- Remove unneeded blank line (Bin)

 arch/arm/include/asm/arch-mx6/iomux.h | 2 ++
 drivers/pci/pcie_imx.c                | 8 ++++++++
 2 files changed, 10 insertions(+)
arch/arm/include/asm/arch-mx6/iomux.h +2 -0
index 9b3a91f..907cb40 100644
@@ -18,6 +18,8 @@
 #define IOMUXC_GPR1_REF_SSP_EN			(1 << 16)
 #define IOMUXC_GPR1_TEST_POWERDOWN		(1 << 18)
 
+#define IOMUXC_GPR1_PCIE_SW_RST		(1 << 29)
+
 /*
  * IOMUXC_GPR5 bit fields
  */
drivers/pci/pcie_imx.c +5 -0
index 1568f20..f1e189e 100644
@@ -19,6 +19,7 @@
 #include <asm/io.h>
 #include <linux/sizes.h>
 #include <errno.h>
+#include <asm/arch/sys_proto.h>
 
 #define PCI_ACCESS_READ  0
 #define PCI_ACCESS_WRITE 1

@@ -430,6 +431,10 @@ static int imx_pcie_write_config(struct pci_controller *hose, pci_dev_t d,
 static int imx6_pcie_assert_core_reset(void)
 {
 	struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
+
+	if (is_mx6dqp())
+		setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_PCIE_SW_RST);
+
 #if defined(CONFIG_MX6SX)
 	struct gpc *gpc_regs = (struct gpc *)GPC_BASE_ADDR;

drivers/pci/pcie_imx.c static int imx6_pcie_deassert_core_reset(void) · line 549

Quoted 9 lines
drivers/pci/pcie_imx.c +3 -0
@@ -536,6 +541,9 @@ static int imx6_pcie_deassert_core_reset(void)
 
 	enable_pcie_clock();
 
+	if (is_mx6dqp())
+		clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_PCIE_SW_RST);
+
 	/*
 	 * Wait for the clock to settle a bit, when the clock are sourced
 	 * from the CPU, we need about 30 ms to settle.

Thanks Fabio - as fix, I pick it up for the release.

Acked-by Stefano Babic <[email protected]>

Best regards,
Stefano Babic

Signature · 5 lines
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DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
reviewer
#2 lore raw

PATCH v4 1/1 pci: pcie_imx: Fix hang on mx6qp

Hi Stefano,

Quoted 1 line · Stefano Babic

Thanks Fabio - as fix, I pick it up for the release.

I don't see this one included in your pull request for Tom.

Thanks

#3 lore raw

PATCH v4 1/1 pci: pcie_imx: Fix hang on mx6qp

Quoted 8 lines · Fabio Estevam

Hi Stefano,

Quoted 1 line · Stefano Babic

Thanks Fabio - as fix, I pick it up for the release.

I don't see this one included in your pull request for Tom.

Aargh ! Thanks for noting this, I am fixing it.

Regards,
Stefano

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
#4 lore raw

PATCH v4 1/1 pci: pcie_imx: Fix hang on mx6qp

In reply to Fabio Estevam
Quoted 8 lines · Fabio Estevam

PCI driver currently hangs on mx6qp.

Toggle the reset bit with the appropriate timings to fix the issue.

Based on the FSL kernel driver implementation.

Signed-off-by Fabio Estevam <[email protected]>
Acked-by Stefano Babic <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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