pinctrl: sunxi: r_pio irq fixes

PATCH New Hans de Goede 4 participants 9 messages Oct 16, 2015 – Oct 23, 2015

Subsystems (2)

Arm/Allwinner sunXi SoC support Pin control

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Hans de Goede

author

2015-10-16 07:46 UTC #0 lore raw

v2 cover pinctrl: sunxi: r_pio irq fixes

Hi All,

Here is a v2 of this patch-set which actually compiles (problem with the second patch in v1). After testing that everything worked I extended the irq mapping to not just cover PL5 (the pin I actually tested with) but also all the other pins which have an irq function. I botched up the copy paste (in some cases the irq mux is the last function so I needed to also move a brace), and then to make things worse I also forgot to do a compile after adding the irq muxing to the other pins.

This version has the braces moved to the proper place fixing the compile error, otherwise it is unchanged.

Regards,

Hans

Hans de Goede

author

2015-10-16 07:46 UTC #1 lore raw

PATCH v2 1/2 pinctrl: sunxi: Fix irq_of_xlate for the r_pio pinctrl block

The r_pio gpio / pin controller has a pin_base of non 0, we need to adjust for this before calling sunxi_pinctrl_desc_find_function_by_pin.

Signed-off-by Hans de Goede <[email protected]>

---
 drivers/pinctrl/sunxi/pinctrl-sunxi.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

drivers/pinctrl/sunxi/pinctrl-sunxi.c +3 -3

index 38e0c7b..96a58e4 100644
@@ -716,6 +716,7 @@ static int sunxi_pinctrl_irq_of_xlate(struct irq_domain *d,
 				      unsigned long *out_hwirq,
 				      unsigned int *out_type)
 {
+	struct sunxi_pinctrl *pctl = d->host_data;
 	struct sunxi_desc_function *desc;
 	int pin, base;

@@ -723,10 +724,9 @@ static int sunxi_pinctrl_irq_of_xlate(struct irq_domain *d,
 		return -EINVAL;
 
 	base = PINS_PER_BANK * intspec[0];
-	pin = base + intspec[1];
+	pin = pctl->desc->pin_base + base + intspec[1];
 
-	desc = sunxi_pinctrl_desc_find_function_by_pin(d->host_data,
-						       pin, "irq");
+	desc = sunxi_pinctrl_desc_find_function_by_pin(pctl, pin, "irq");
 	if (!desc)
 		return -EINVAL;

Signature · 1 line

2.5.0

Chen-Yu Tsai

2015-10-16 07:57 UTC #2 lore raw

PATCH v2 1/2 pinctrl: sunxi: Fix irq_of_xlate for the r_pio pinctrl block

Quoted 4 lines · Hans de Goede

The r_pio gpio / pin controller has a pin_base of non 0, we need to adjust for this before calling sunxi_pinctrl_desc_find_function_by_pin.
Signed-off-by Hans de Goede <[email protected]>

Acked-by Chen-Yu Tsai <[email protected]>

Thanks!

Maxime Ripard

2015-10-16 14:27 UTC #3 lore raw

PATCH v2 1/2 pinctrl: sunxi: Fix irq_of_xlate for the r_pio pinctrl block

In reply to Hans de Goede

Quoted 4 lines · Hans de Goede

The r_pio gpio / pin controller has a pin_base of non 0, we need to adjust for this before calling sunxi_pinctrl_desc_find_function_by_pin.
Signed-off-by Hans de Goede <[email protected]>

Acked-by Maxime Ripard <[email protected]>

Thanks!
Maxime

Signature · 10 lines

Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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Linus Walleij

2015-10-23 08:12 UTC #4 lore raw

PATCH v2 1/2 pinctrl: sunxi: Fix irq_of_xlate for the r_pio pinctrl block

In reply to Hans de Goede

Quoted 4 lines · Hans de Goede

The r_pio gpio / pin controller has a pin_base of non 0, we need to adjust for this before calling sunxi_pinctrl_desc_find_function_by_pin.
Signed-off-by Hans de Goede <[email protected]>

Patch applied with Chen-Yu's and Maxime's ACKs.

Yours,
Linus Walleij

Hans de Goede

author

2015-10-16 07:46 UTC #5 lore raw

PATCH v2 2/2 pinctrl: sunxi: Add irq pinmuxing to sun6i "r" pincontroller

In reply to Hans de Goede

Add pinmuxing for external interrupt functionality through the sun6i "r" pincontroller.

Signed-off-by Hans de Goede <[email protected]>

---
Changes in v2:
-Fix compile error introduced by last minute changes before sending out
the patch (note to self: always do a recompile in such a case)

---
 drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c | 24 ++++++++++++++++++------
 1 file changed, 18 insertions(+), 6 deletions(-)

drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c +18 -6

index 9596b0a3..d4bc4f0 100644
@@ -47,45 +47,57 @@ static const struct sunxi_desc_pin sun6i_a31_r_pins[] = {
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 0),	/* PL_EINT0 */
 		  SUNXI_FUNCTION(0x3, "s_jtag")),	/* MS */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 1),	/* PL_EINT1 */
 		  SUNXI_FUNCTION(0x3, "s_jtag")),	/* CK */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 2),	/* PL_EINT2 */
 		  SUNXI_FUNCTION(0x3, "s_jtag")),	/* DO */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 3),	/* PL_EINT3 */
 		  SUNXI_FUNCTION(0x3, "s_jtag")),	/* DI */
 	/* Hole */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
-		  SUNXI_FUNCTION(0x1, "gpio_out")),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 0)),	/* PM_EINT0 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
-		  SUNXI_FUNCTION(0x1, "gpio_out")),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 1)),	/* PM_EINT1 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 2),	/* PM_EINT2 */
 		  SUNXI_FUNCTION(0x3, "1wire")),
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
-		  SUNXI_FUNCTION(0x1, "gpio_out")),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 3)),	/* PM_EINT3 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
-		  SUNXI_FUNCTION(0x1, "gpio_out")),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 4)),	/* PM_EINT4 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 5),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
-		  SUNXI_FUNCTION(0x1, "gpio_out")),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 5)),	/* PM_EINT5 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 6),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
-		  SUNXI_FUNCTION(0x1, "gpio_out")),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 6)),	/* PM_EINT6 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 7),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 7),	/* PM_EINT7 */
 		  SUNXI_FUNCTION(0x3, "rtc")),		/* CLKO */
 };

Signature · 1 line

2.5.0

Chen-Yu Tsai

2015-10-16 07:57 UTC #6 lore raw

PATCH v2 2/2 pinctrl: sunxi: Add irq pinmuxing to sun6i "r" pincontroller

Quoted 4 lines · Hans de Goede

Add pinmuxing for external interrupt functionality through the sun6i "r" pincontroller.
Signed-off-by Hans de Goede <[email protected]>

Acked-by Chen-Yu Tsai <[email protected]>

Thanks!

Quoted 4 lines

---
Changes in v2:
-Fix compile error introduced by last minute changes before sending out
the patch (note to self: always do a recompile in such a case)

Sorry I didn't catch that either.

Maxime Ripard

2015-10-16 14:28 UTC #7 lore raw

PATCH v2 2/2 pinctrl: sunxi: Add irq pinmuxing to sun6i "r" pincontroller

In reply to Hans de Goede

Quoted 4 lines · Hans de Goede

Add pinmuxing for external interrupt functionality through the sun6i "r" pincontroller.
Signed-off-by Hans de Goede <[email protected]>

Acked-by Maxime Ripard <[email protected]>

Thanks!
Maxime

Signature · 10 lines

Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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Linus Walleij

2015-10-23 08:14 UTC #8 lore raw

PATCH v2 2/2 pinctrl: sunxi: Add irq pinmuxing to sun6i "r" pincontroller

In reply to Hans de Goede

Quoted 8 lines · Hans de Goede

Add pinmuxing for external interrupt functionality through the sun6i "r" pincontroller.
Signed-off-by Hans de Goede <[email protected]>
---
Changes in v2:
-Fix compile error introduced by last minute changes before sending out
the patch (note to self: always do a recompile in such a case)

Patch applied with Chen-Yu's and Maxime's ACKs.

Yours,
Linus Walleij