clk: sunxi: Add support for the Audio PLL
Subsystems (4)
v6 cover clk: sunxi: Add support for the Audio PLL
Hi,
This serie adds support for the PLL2 aka the Audio PLL on the Allwinner A10 and the later SoCs.
This is the last part of the audio codec support, it's been around for quite a while now, and I expect it to be merged in 4.4.
This serie is built on top of a generic clk-multiplier driver to handle clock that multiply their parent clock rate (mostly PLL's), in order to provide the driver for the PLL2 base clock, and then adds the drivers for the clock that derive from the Audio PLL.
Thanks!
Maxime
Changes from v5:
- Fixed the multiplier calculation
- Added Chen-Yu tags
Changes from v4:
- Fixed the genmask calls
- Fixed the number of parents registration in mod1
- Added Chen-Yu's Reviewed-by
Changes from v3:
- Fixed the header issues: removed unused ones, added some others
- Added the __acquire / __release call when a spinlock is not defined
Changes from v2:
- Renamed clk-factor to clk-multiplier
- Added an exception for the A13 clock
Changes from v1:
- Removed a bogus of_iomap in the mod1 clock driver
- Wrote the clk-factor driver
- Converted the PLL2 clock to that driver
Emilio L?pez (2):
clk: sunxi: codec clock support
clk: sunxi: mod1 clock support
Maxime Ripard (3):
clk: Add a basic multiplier clock
clk: sunxi: Add a driver for the PLL2
clk: sunxi: pll2: Add A13 support
drivers/clk/Makefile | 1 + drivers/clk/clk-multiplier.c | 181 ++++++++++++++++++++++++ drivers/clk/sunxi/Makefile | 3 + drivers/clk/sunxi/clk-a10-codec.c | 44 ++++++ drivers/clk/sunxi/clk-a10-mod1.c | 81 +++++++++++ drivers/clk/sunxi/clk-a10-pll2.c | 216 +++++++++++++++++++++++++++++ include/dt-bindings/clock/sun4i-a10-pll2.h | 53 +++++++ include/linux/clk-provider.h | 42 ++++++ 8 files changed, 621 insertions(+) create mode 100644 drivers/clk/clk-multiplier.c create mode 100644 drivers/clk/sunxi/clk-a10-codec.c create mode 100644 drivers/clk/sunxi/clk-a10-mod1.c create mode 100644 drivers/clk/sunxi/clk-a10-pll2.c create mode 100644 include/dt-bindings/clock/sun4i-a10-pll2.h
Signature · 1 line
2.6.2
PATCH v6 1/5 clk: Add a basic multiplier clock
Some clocks are using a multiplier component, however, unlike their mux, gate or divider counterpart, these factors don't have a basic clock implementation.
This leads to code duplication across platforms that want to use that kind of clocks, and the impossibility to use the composite clocks with such a clock without defining your own rate operations.
Create such a driver in order to remove these issues, and hopefully factor the implementations, reducing code size across platforms and consolidating the various implementations.
--- drivers/clk/Makefile | 1 + drivers/clk/clk-multiplier.c | 181 +++++++++++++++++++++++++++++++++++++++++++ include/linux/clk-provider.h | 42 ++++++++++ 3 files changed, 224 insertions(+) create mode 100644 drivers/clk/clk-multiplier.c
drivers/clk/Makefile +1 -0
@@ -6,6 +6,7 @@ obj-$(CONFIG_COMMON_CLK) += clk-divider.o obj-$(CONFIG_COMMON_CLK) += clk-fixed-factor.o obj-$(CONFIG_COMMON_CLK) += clk-fixed-rate.o obj-$(CONFIG_COMMON_CLK) += clk-gate.o +obj-$(CONFIG_COMMON_CLK) += clk-multiplier.o obj-$(CONFIG_COMMON_CLK) += clk-mux.o obj-$(CONFIG_COMMON_CLK) += clk-composite.o obj-$(CONFIG_COMMON_CLK) += clk-fractional-divider.o
drivers/clk/clk-multiplier.c new file +181 -0
181 lines not on this page · raw message
include/linux/clk-provider.h +42 -0
48 lines not on this page · raw message
Signature · 1 line
2.6.2
PATCH v6 1/5 clk: Add a basic multiplier clock
Hi Maxime,
Quoting Maxime Ripard (2015-10-20 00:36:45)
drivers/clk/clk-multiplier.c line 137
Quoted 6 lines
drivers/clk/clk-multiplier.c new file +6
-0+struct clk *clk_register_multiplier (struct device *dev,const char *name, +const char *parent_name, +unsigned long flags, +void __iomem *reg,u8 shift,u8 width, +u8 clk_mult_flags,spinlock_t *lock) +{
Patch looks good in general. However this is a good opportunity to stop the madness around the registration functions in these basic clock types.
clk_register is really all that we need since we've had struct clk_init_data for a while. Initializing a multiplier should be as simple as:
struct clk_multiplier clk_foo = {
.hw.init = &(struct clk_init_data){
.name = "foo",
.parent_names = (const char *[]){
"bar",
},
.num_parents = 1;
.ops = &clk_multiplier_ops,
},
.reg = 0xd34db33f,
.shift = 1,
.width = 2,
};
clk_register(dev, &clk_foo.hw);This is nice since it turns these basic clocks into even more of a library and less of a poor mans driver.
(I really hope the above works. I did not test it)
Is it possible you can convert to using this method, and if it is correct for you then just remove clk_multiplier_register altogether? (In fact you might not use the registration function at all since you use the composite clock...)
Regards,
Mike
PATCH v6 1/5 clk: Add a basic multiplier clock
Hi Mike,
Quoted 37 lines · Michael Turquette
Hi Maxime,
Quoting Maxime Ripard (2015-10-20 00:36:45)
drivers/clk/clk-multiplier.c line 137
Quoted 6 lines
drivers/clk/clk-multiplier.c new file +6
-0+struct clk *clk_register_multiplier (struct device *dev,const char *name, +const char *parent_name, +unsigned long flags, +void __iomem *reg,u8 shift,u8 width, +u8 clk_mult_flags,spinlock_t *lock) +{Patch looks good in general. However this is a good opportunity to stop the madness around the registration functions in these basic clock types.
clk_registeris really all that we need since we've had structclk_init_datafor a while. Initializing a multiplier should be as simple as:struct clk_multiplier clk_foo = { .hw.init = &(struct clk_init_data){ .name = "foo", .parent_names = (const char *[]){ "bar", }, .num_parents = 1; .ops = &clk_multiplier_ops, }, .reg = 0xd34db33f, .shift = 1, .width = 2, }; clk_register(dev, &clk_foo.hw);This is nice since it turns these basic clocks into even more of a library and less of a poor mans driver.
Quoted 6 lines
(I really hope the above works. I did not test it)
Is it possible you can convert to using this method, and if it is correct for you then just remove
clk_multiplier_registeraltogether? (In fact you might not use the registration function at all since you use the composite clock...)
This chunk of code has been here since v2, which has been first posted in May, two and half kernel releases ago.
In the meantime, we had a full-blown DMA driver and a quite unusual ASoC driver merged. For some reason, this is the only piece of the audio support that is missing for us, while at the same time it's the most trivial.
If that's the only issue you have with this patch, I'm fine with sending a subsequent patch this week. But I'd be really unhappy with sending yet another version for a single change, while you had 5 monthes to review it, and we discussed it several times on IRC and face to face.
Maxime
Signature · 10 lines
Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20151020/e18b1520/attachment.sig>
PATCH v6 1/5 clk: Add a basic multiplier clock
Quoting Maxime Ripard (2015-10-20 07:40:47)
Quoted 55 lines
Hi Mike,
Quoted 37 lines · Michael Turquette
Hi Maxime,
Quoting Maxime Ripard (2015-10-20 00:36:45)
drivers/clk/clk-multiplier.c line 137
Quoted 6 lines
drivers/clk/clk-multiplier.c new file +6
-0+struct clk *clk_register_multiplier (struct device *dev,const char *name, +const char *parent_name, +unsigned long flags, +void __iomem *reg,u8 shift,u8 width, +u8 clk_mult_flags,spinlock_t *lock) +{Patch looks good in general. However this is a good opportunity to stop the madness around the registration functions in these basic clock types.
clk_registeris really all that we need since we've had structclk_init_datafor a while. Initializing a multiplier should be as simple as:struct clk_multiplier clk_foo = { .hw.init = &(struct clk_init_data){ .name = "foo", .parent_names = (const char *[]){ "bar", }, .num_parents = 1; .ops = &clk_multiplier_ops, }, .reg = 0xd34db33f, .shift = 1, .width = 2, }; clk_register(dev, &clk_foo.hw);This is nice since it turns these basic clocks into even more of a library and less of a poor mans driver.
Quoted 6 lines
(I really hope the above works. I did not test it)
Is it possible you can convert to using this method, and if it is correct for you then just remove
clk_multiplier_registeraltogether? (In fact you might not use the registration function at all since you use the composite clock...)This chunk of code has been here since v2, which has been first posted in May, two and half kernel releases ago.
In the meantime, we had a full-blown DMA driver and a quite unusual ASoC driver merged. For some reason, this is the only piece of the audio support that is missing for us, while at the same time it's the most trivial.
Quoted 5 lines
If that's the only issue you have with this patch, I'm fine with sending a subsequent patch this week. But I'd be really unhappy with sending yet another version for a single change, while you had 5 monthes to review it, and we discussed it several times on IRC and face to face.
The change can go in later. It's not a prerequisite. I had a feeling you'd be grumpy about me asking but I thought I'd try anyways. I won't even ask if you got sign-off from Jim on whether this works for his platforms ;-)
The copy/paste nature of these basic clock types really sucks and it is one of many reasons that I am hesitant to accept them and slow to merge them...
Anyways it seems that you are not using the registration function at all so I might just follow up with a patch to remove it.
I can pick these 5 patches directly, or do you plan to send a PR?
Regards,
Mike
Quoted 7 lines
Maxime
Signature · 3 lines
Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com
PATCH v6 1/5 clk: Add a basic multiplier clock
Quoted 62 lines · Michael Turquette
Quoting Maxime Ripard (2015-10-20 07:40:47)
Quoted 55 lines
Hi Mike,
Quoted 37 lines · Michael Turquette
Hi Maxime,
Quoting Maxime Ripard (2015-10-20 00:36:45)
drivers/clk/clk-multiplier.c line 137
Quoted 6 lines
drivers/clk/clk-multiplier.c new file +6
-0+struct clk *clk_register_multiplier (struct device *dev,const char *name, +const char *parent_name, +unsigned long flags, +void __iomem *reg,u8 shift,u8 width, +u8 clk_mult_flags,spinlock_t *lock) +{Patch looks good in general. However this is a good opportunity to stop the madness around the registration functions in these basic clock types.
clk_registeris really all that we need since we've had structclk_init_datafor a while. Initializing a multiplier should be as simple as:struct clk_multiplier clk_foo = { .hw.init = &(struct clk_init_data){ .name = "foo", .parent_names = (const char *[]){ "bar", }, .num_parents = 1; .ops = &clk_multiplier_ops, }, .reg = 0xd34db33f, .shift = 1, .width = 2, }; clk_register(dev, &clk_foo.hw);This is nice since it turns these basic clocks into even more of a library and less of a poor mans driver.
Quoted 6 lines
(I really hope the above works. I did not test it)
Is it possible you can convert to using this method, and if it is correct for you then just remove
clk_multiplier_registeraltogether? (In fact you might not use the registration function at all since you use the composite clock...)This chunk of code has been here since v2, which has been first posted in May, two and half kernel releases ago.
In the meantime, we had a full-blown DMA driver and a quite unusual ASoC driver merged. For some reason, this is the only piece of the audio support that is missing for us, while at the same time it's the most trivial.
Quoted 5 lines
If that's the only issue you have with this patch, I'm fine with sending a subsequent patch this week. But I'd be really unhappy with sending yet another version for a single change, while you had 5 monthes to review it, and we discussed it several times on IRC and face to face.
Quoted 4 lines
The change can go in later. It's not a prerequisite. I had a feeling you'd be grumpy about me asking but I thought I'd try anyways. I won't even ask if you got sign-off from Jim on whether this works for his platforms ;-)
I asked several times, he never replied... :/
Quoted 3 lines
The copy/paste nature of these basic clock types really sucks and it is one of many reasons that I am hesitant to accept them and slow to merge them...
I guess we cover all cases now? So it shouldn't grow that much.
Quoted 4 lines
Anyways it seems that you are not using the registration function at all so I might just follow up with a patch to remove it.
I can pick these 5 patches directly, or do you plan to send a PR?
I have a pull request coming for you with a single patch, I can apply them on that branch and send you the PR later today if it's okay?
Thanks,
Maxime
Signature · 10 lines
Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20151021/6d5be779/attachment.sig>
PATCH v6 1/5 clk: Add a basic multiplier clock
Quoting Maxime Ripard (2015-10-21 07:53:35)
Quoted 76 lines · Michael Turquette
Quoted 62 lines
Quoting Maxime Ripard (2015-10-20 07:40:47)
Quoted 55 lines
Hi Mike,
Quoted 37 lines · Michael Turquette
Hi Maxime,
Quoting Maxime Ripard (2015-10-20 00:36:45)
drivers/clk/clk-multiplier.c line 137
Quoted 6 lines
drivers/clk/clk-multiplier.c new file +6
-0+struct clk *clk_register_multiplier (struct device *dev,const char *name, +const char *parent_name, +unsigned long flags, +void __iomem *reg,u8 shift,u8 width, +u8 clk_mult_flags,spinlock_t *lock) +{Patch looks good in general. However this is a good opportunity to stop the madness around the registration functions in these basic clock types.
clk_registeris really all that we need since we've had structclk_init_datafor a while. Initializing a multiplier should be as simple as:struct clk_multiplier clk_foo = { .hw.init = &(struct clk_init_data){ .name = "foo", .parent_names = (const char *[]){ "bar", }, .num_parents = 1; .ops = &clk_multiplier_ops, }, .reg = 0xd34db33f, .shift = 1, .width = 2, }; clk_register(dev, &clk_foo.hw);This is nice since it turns these basic clocks into even more of a library and less of a poor mans driver.
Quoted 6 lines
(I really hope the above works. I did not test it)
Is it possible you can convert to using this method, and if it is correct for you then just remove
clk_multiplier_registeraltogether? (In fact you might not use the registration function at all since you use the composite clock...)This chunk of code has been here since v2, which has been first posted in May, two and half kernel releases ago.
In the meantime, we had a full-blown DMA driver and a quite unusual ASoC driver merged. For some reason, this is the only piece of the audio support that is missing for us, while at the same time it's the most trivial.
Quoted 5 lines
If that's the only issue you have with this patch, I'm fine with sending a subsequent patch this week. But I'd be really unhappy with sending yet another version for a single change, while you had 5 monthes to review it, and we discussed it several times on IRC and face to face.
Quoted 4 lines
The change can go in later. It's not a prerequisite. I had a feeling you'd be grumpy about me asking but I thought I'd try anyways. I won't even ask if you got sign-off from Jim on whether this works for his platforms ;-)
I asked several times, he never replied... :/
Quoted 3 lines
The copy/paste nature of these basic clock types really sucks and it is one of many reasons that I am hesitant to accept them and slow to merge them...
I guess we cover all cases now? So it shouldn't grow that much.
Quoted 7 lines
Quoted 4 lines
Anyways it seems that you are not using the registration function at all so I might just follow up with a patch to remove it.
I can pick these 5 patches directly, or do you plan to send a PR?
I have a pull request coming for you with a single patch, I can apply them on that branch and send you the PR later today if it's okay?
Sounds good to me.
Regards,
Mike
Quoted 8 lines
Thanks,
MaximeSignature · 3 lines
Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com
PATCH v6 2/5 clk: sunxi: Add a driver for the PLL2
In reply to Maxime RipardThe PLL2 on the A10 and later SoCs is the clock used for all the audio related operations.
This clock has a somewhat complex output tree, with three outputs (2X, 4X and 8X) with a fixed divider from the base clock, and an output (1X) with a post divider.
However, we can simplify things since the 1X divider can be fixed, and we end up by having a base clock not exposed to any device (or at least directly, since the 4X output doesn't have any divider), and 4 fixed divider clocks that will be exposed.
This clock seems to have been introduced, at least in this form, in the revision B of the A10, but we don't have any information on the clock used on the revision A.
--- drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk-a10-pll2.c | 188 +++++++++++++++++++++++++++++ include/dt-bindings/clock/sun4i-a10-pll2.h | 53 ++++++++ 3 files changed, 242 insertions(+) create mode 100644 drivers/clk/sunxi/clk-a10-pll2.c create mode 100644 include/dt-bindings/clock/sun4i-a10-pll2.h
drivers/clk/sunxi/Makefile +1 -0
@@ -4,6 +4,7 @@ obj-y += clk-sunxi.o clk-factors.o obj-y += clk-a10-hosc.o +obj-y += clk-a10-pll2.o obj-y += clk-a20-gmac.o obj-y += clk-mod0.o obj-y += clk-simple-gates.o
drivers/clk/sunxi/clk-a10-pll2.c new file +188 -0
188 lines not on this page · raw message
include/dt-bindings/clock/sun4i-a10-pll2.h new file +53 -0
53 lines not on this page · raw message
Signature · 1 line
2.6.2
PATCH v6 3/5 clk: sunxi: pll2: Add A13 support
In reply to Maxime RipardThe A13, unlike the A10 and A20, doesn't use a pass-through exception for the 0 value in the pre and post dividers, but increments all the values written in the register by one.
Add an exception for both these cases to handle them nicely.
--- drivers/clk/sunxi/clk-a10-pll2.c | 38 +++++++++++++++++++++++++++++++++----- 1 file changed, 33 insertions(+), 5 deletions(-)
drivers/clk/sunxi/clk-a10-pll2.c +33 -5
@@ -41,9 +41,15 @@#define SUN4I_PLL2_OUTPUTS 4 +struct sun4i_pll2_data { +u32 post_div_offset; +u32 pre_div_flags; +}; +static DEFINE_SPINLOCK (sun4i_a10_pll2_lock); -static void __init sun4i_pll2_setup (struct device_node *node) +static void __init sun4i_pll2_setup (struct device_node *node, +struct sun4i_pll2_data *data) {const char *clk_name = node->name, *parent;struct clk **clks, *base_clk, *prediv_clk;
@@ -70,8 +76,7 @@ static void __init sun4i_pll2_setup(struct device_node *node) parent,0 , reg,SUN4I_PLL2_PRE_DIV_SHIFT ,SUN4I_PLL2_PRE_DIV_WIDTH , -CLK_DIVIDER_ONE_BASED | -CLK_DIVIDER_ALLOW_ZERO , + data->pre_div_flags, &sun4i_a10_pll2_lock);if (!prediv_clk) {pr_err ("Couldn't register the prediv clock\n" );
@@ -122,7 +127,7 @@ static void __init sun4i_pll2_setup(struct device_node *node)*/ val =readl (reg); val &= ~(SUN4I_PLL2_POST_DIV_MASK <<SUN4I_PLL2_POST_DIV_SHIFT ); - val |=SUN4I_PLL2_POST_DIV_VALUE <<SUN4I_PLL2_POST_DIV_SHIFT ; + val |= (SUN4I_PLL2_POST_DIV_VALUE - data->post_div_offset) <<SUN4I_PLL2_POST_DIV_SHIFT ;writel (val, reg); of_property_read_string_index(node, "clock-output-names",
@@ -185,4 +190,27 @@ err_free_data: err_unmap:iounmap (reg); } -CLK_OF_DECLARE (sun4i_pll2,"allwinner,sun4i-a10-pll2-clk" , sun4i_pll2_setup); + +static struct sun4i_pll2_data sun4i_a10_pll2_data = { + .pre_div_flags =CLK_DIVIDER_ONE_BASED |CLK_DIVIDER_ALLOW_ZERO , +}; + +static void __init sun4i_a10_pll2_setup (struct device_node *node) +{ +sun4i_pll2_setup (node, &sun4i_a10_pll2_data); +} + +CLK_OF_DECLARE (sun4i_a10_pll2,"allwinner,sun4i-a10-pll2-clk" , + sun4i_a10_pll2_setup); + +static struct sun4i_pll2_data sun5i_a13_pll2_data = { + .post_div_offset =1 , +}; + +static void __init sun5i_a13_pll2_setup (struct device_node *node) +{ +sun4i_pll2_setup (node, &sun5i_a13_pll2_data); +} + +CLK_OF_DECLARE (sun5i_a13_pll2,"allwinner,sun5i-a13-pll2-clk" , + sun5i_a13_pll2_setup);
Signature · 1 line
2.6.2
PATCH v6 4/5 clk: sunxi: codec clock support
In reply to Maxime RipardFrom: Emilio L?pez <[email protected]>
The codec clock on sun4i, sun5i and sun7i is a simple gate with PLL2 as parent. Add a driver for such a clock.
--- drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk-a10-codec.c | 44 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+) create mode 100644 drivers/clk/sunxi/clk-a10-codec.c
drivers/clk/sunxi/Makefile +1 -0
@@ -3,6 +3,7 @@ # obj-y += clk-sunxi.o clk-factors.o +obj-y += clk-a10-codec.o obj-y += clk-a10-hosc.o obj-y += clk-a10-pll2.o obj-y += clk-a20-gmac.o
drivers/clk/sunxi/clk-a10-codec.c new file +44 -0
44 lines not on this page · raw message
Signature · 1 line
2.6.2
PATCH v6 5/5 clk: sunxi: mod1 clock support
In reply to Maxime RipardFrom: Emilio L?pez <[email protected]>
The module 1 type of clocks consist of a gate and a mux and are used on the audio blocks to mux and gate the PLL2 outputs for AC97, IIS or SPDIF. This commit adds support for them on the sunxi clock driver.
--- drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk-a10-mod1.c | 81 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 82 insertions(+) create mode 100644 drivers/clk/sunxi/clk-a10-mod1.c
drivers/clk/sunxi/Makefile +1 -0
@@ -5,6 +5,7 @@ obj-y += clk-sunxi.o clk-factors.o obj-y += clk-a10-codec.o obj-y += clk-a10-hosc.o +obj-y += clk-a10-mod1.o obj-y += clk-a10-pll2.o obj-y += clk-a20-gmac.o obj-y += clk-mod0.o
drivers/clk/sunxi/clk-a10-mod1.c new file +81 -0
81 lines not on this page · raw message
Signature · 1 line
2.6.2