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ARM: at91/dt: sama5d4: Fix mmc0 pinmux comments

PATCH New Marek Vasut 2 participants 9 messages Nov 4, 2015 – Nov 5, 2015

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#0 lore raw

PATCH 1/3 ARM: at91/dt: sama5d4: Fix mmc0 pinmux comments

Synchronise the comments in mmc0 pinmux node with HSMCI0 pinmux description in the Atmel SAMA5D4 datasheet from 24-Aug-15 page 1119, section 37.6.1, Table 37-3 .

---
 arch/arm/boot/dts/sama5d4.dtsi | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)
arch/arm/boot/dts/sama5d4.dtsi +5 -5
index 8d1de29..48ca530 100644
@@ -1640,15 +1640,15 @@
 					pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
 						atmel,pins =
 							<AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE	/* MCI0_CK, conflict with PCK1(ISI_MCK) */
-							 AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_CDB, conflict with NAND_D0 */
-							 AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DB0, conflict with NAND_D1 */
+							 AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_CDA, conflict with NAND_D0 */
+							 AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA0, conflict with NAND_D1 */
 							>;
 					};
 					pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
 						atmel,pins =
-							<AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DB1, conflict with NAND_D2 */
-							 AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DB2, conflict with NAND_D3 */
-							 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DB3, conflict with NAND_D4 */
+							<AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA1, conflict with NAND_D2 */
+							 AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA2, conflict with NAND_D3 */
+							 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA3, conflict with NAND_D4 */
 							>;
 					};
 				};
Signature · 1 line
2.1.4
#1 lore raw

PATCH v2 2/3 ARM: at91/dt: sama5d4: Add pinmux for 8-bit MMC0 bus

Add pinmux for the 4 remaining signals used in 8-bit MMC 0 bus configuration.

Cc Alexandre Belloni <[email protected]>
Cc Josh Wu <[email protected]>
Cc Nicolas Ferre <[email protected]>
---
 arch/arm/boot/dts/sama5d4.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

V2: Repair the incorrect comments for the pinmux, original version
of the commment contained wrong MCI0_DAx references.

arch/arm/boot/dts/sama5d4.dtsi +8 -0
index 48ca530..d086a7d 100644
@@ -1651,6 +1651,14 @@
 							 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA3, conflict with NAND_D4 */
 							>;
 					};
+					pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
+						atmel,pins =
+							<AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA4, conflict with NAND_D5 */
+							 AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA5, conflict with NAND_D6 */
+							 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA6, conflict with NAND_D7 */
+							 AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA7, conflict with NAND_D8 */
+							>;
+					};
 				};
 
 				mmc1 {
Signature · 1 line
2.1.4
#2 lore raw

PATCH v2 2/3 ARM: at91/dt: sama5d4: Add pinmux for 8-bit MMC0 bus

Hi, Marek

Quoted 19 lines · Marek Vasut

Add pinmux for the 4 remaining signals used in 8-bit MMC 0 bus configuration.

Cc Alexandre Belloni <[email protected]>
Cc Josh Wu <[email protected]>
Cc Nicolas Ferre <[email protected]>
---
  arch/arm/boot/dts/sama5d4.dtsi | 8 ++++++++
  1 file changed, 8 insertions(+)

V2: Repair the incorrect comments for the pinmux, original version
of the commment contained wrong MCI0_DAx references.

arch/arm/boot/dts/sama5d4.dtsi +0 -0
index 48ca530..d086a7d 100644

arch/arm/boot/dts/sama5d4.dtsi line 1659

Quoted 9 lines
arch/arm/boot/dts/sama5d4.dtsi +6 -0
@@ -1651,6 +1651,14 @@
  							 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA3, conflict with NAND_D4 */
  							>;
  					};
+					pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
+						atmel,pins =
+							<AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA4, conflict with NAND_D5 */
+							 AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA5, conflict with NAND_D6 */
+							 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA6, conflict with NAND_D7 */
+							 AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA7, conflict with NAND_D8 */

PC13 is conflicted with NRD/NANDOE, not D8 (PB18). with this comment fix, you can add:

Best Regards,
Josh Wu

Quoted 5 lines
arch/arm/boot/dts/sama5d4.dtsi +2 -0
+							>;
+					};
  				};
 
  				mmc1 {
#3 lore raw

PATCH v3 2/3 ARM: at91/dt: sama5d4: Add pinmux for 8-bit MMC0 bus

Add pinmux for the 4 remaining signals used in 8-bit MMC 0 bus configuration.

Cc Alexandre Belloni <[email protected]>
Cc Josh Wu <[email protected]>
Cc Nicolas Ferre <[email protected]>
---
 arch/arm/boot/dts/sama5d4.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

V2: Repair the incorrect comments for the pinmux, original version
of the commment contained wrong MCI0_DAx references.
V3: Fix NAND_D8 -> NAND_OE

arch/arm/boot/dts/sama5d4.dtsi +8 -0
index 48ca530..ae6041b 100644
@@ -1651,6 +1651,14 @@
 							 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA3, conflict with NAND_D4 */
 							>;
 					};
+					pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
+						atmel,pins =
+							<AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA4, conflict with NAND_D5 */
+							 AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA5, conflict with NAND_D6 */
+							 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA6, conflict with NAND_D7 */
+							 AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA7, conflict with NAND_OE */
+							>;
+					};
 				};
 
 				mmc1 {
Signature · 1 line
2.1.4
#4 lore raw

PATCH v3 2/3 ARM: at91/dt: sama5d4: Add pinmux for 8-bit MMC0 bus

Quoted 8 lines · Marek Vasut

Add pinmux for the 4 remaining signals used in 8-bit MMC 0 bus configuration.

Cc Alexandre Belloni <[email protected]>
Cc Josh Wu <[email protected]>
Cc Nicolas Ferre <[email protected]>

---

Thanks Marek for the quick fix ;-), and

Best Regards,
Josh Wu

Quoted 26 lines
  arch/arm/boot/dts/sama5d4.dtsi | 8 ++++++++
  1 file changed, 8 insertions(+)

V2: Repair the incorrect comments for the pinmux, original version
of the commment contained wrong MCI0_DAx references.
V3: Fix NAND_D8 -> NAND_OE

arch/arm/boot/dts/sama5d4.dtsi +8 -0
index 48ca530..ae6041b 100644
@@ -1651,6 +1651,14 @@
  							 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA3, conflict with NAND_D4 */
  							>;
  					};
+					pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
+						atmel,pins =
+							<AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA4, conflict with NAND_D5 */
+							 AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA5, conflict with NAND_D6 */
+							 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA6, conflict with NAND_D7 */
+							 AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA7, conflict with NAND_OE */
+							>;
+					};
  				};
 
  				mmc1 {
#5 lore raw

PATCH v3 2/3 ARM: at91/dt: sama5d4: Add pinmux for 8-bit MMC0 bus

Quoted 11 lines · Josh Wu
Quoted 8 lines · Marek Vasut

Add pinmux for the 4 remaining signals used in 8-bit MMC 0 bus configuration.

Cc Alexandre Belloni <[email protected]>
Cc Josh Wu <[email protected]>
Cc Nicolas Ferre <[email protected]>

---

Thanks Marek for the quick fix ;-), and

You're welcome :)

Quoted 1 line

Thanks!

Best regards,
Marek Vasut

#6 lore raw

PATCH v2 2/3 ARM: at91/dt: sama5d4: Add pinmux for 8-bit MMC0 bus

In reply to Josh Wu
Quoted 19 lines · Josh Wu

Hi, Marek

Quoted 16 lines · Marek Vasut

Add pinmux for the 4 remaining signals used in 8-bit MMC 0 bus configuration.

Cc Alexandre Belloni <[email protected]>
Cc Josh Wu <[email protected]>
Cc Nicolas Ferre <[email protected]>

---

  arch/arm/boot/dts/sama5d4.dtsi | 8 ++++++++
  1 file changed, 8 insertions(+)

V2: Repair the incorrect comments for the pinmux, original version

of the commment contained wrong MCI0_DAx references.

Quoted 7 lines

arch/arm/boot/dts/sama5d4.dtsi line 1652

Quoted 7 lines
(quoted diff) +0 -0

b/arch/arm/boot/dts/sama5d4.dtsi index 48ca530..d086a7d 100644

arch/arm/boot/dts/sama5d4.dtsi +0 -0
@@ -1651,6 +1651,14 @@
 
  							 AT91_PIOC 9 

AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA3,

Quoted 1 line

arch/arm/boot/dts/sama5d4.dtsi line 1653

Quoted 1 line
arch/arm/boot/dts/sama5d4.dtsi +0 -0
  							 conflict with NAND_D4 

*/

Quoted 8 lines

arch/arm/boot/dts/sama5d4.dtsi

Quoted 8 lines
arch/arm/boot/dts/sama5d4.dtsi +3 -0
  							>;
 
  					};
 
+					pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
+						atmel,pins =
+							<AT91_PIOC 10 

AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA4,

Quoted 1 line
Quoted 1 line

conflict with NAND_D5 */ +

AT91_PIOC 11 AT91_PERIPH_B

Quoted 4 lines
Quoted 4 lines

AT91_PINCTRL_PULL_UP /* MCI0_DA5, conflict with NAND_D6 */ +

AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA6, conflict
with NAND_D7 */ +

AT91_PIOC 13 AT91_PERIPH_B

Quoted 5 lines
Quoted 1 line

AT91_PINCTRL_PULL_UP /* MCI0_DA7, conflict with NAND_D8 */

PC13 is conflicted with NRD/NANDOE, not D8 (PB18). with this comment fix, you can add:

Thanks, patch is out, hope I got it right this time.

Best regards,
Marek Vasut

#7 lore raw

PATCH v2 3/3 ARM: at91/dt: sama5d4: Add support for DENX MA5D4 SoM and EVK

In reply to Marek Vasut

Add support for the DENX MA5D4 SoM and MA5D4EVK board. The system consists of a SoM with eMMC, SPI NOR for booting, 2x SPI CAN chip and an EVK with microSD slot, 2x UART, 2x CAN port, 3x USB port, LEDs and expansion headers.

Cc Alexandre Belloni <[email protected]>
Cc Josh Wu <[email protected]>
Cc Nicolas Ferre <[email protected]>
---
 arch/arm/boot/dts/Makefile                  |   1 +
 arch/arm/boot/dts/at91-sama5d4_ma5d4.dtsi   | 127 +++++++++++++++++++++
 arch/arm/boot/dts/at91-sama5d4_ma5d4evk.dts | 170 ++++++++++++++++++++++++++++
 3 files changed, 298 insertions(+)
 create mode 100644 arch/arm/boot/dts/at91-sama5d4_ma5d4.dtsi
 create mode 100644 arch/arm/boot/dts/at91-sama5d4_ma5d4evk.dts

V2: - Zap bogus bootargs, zap clock at 0 and clk20m .
- Zap bogus address-cells / size-cells / ranges in the clocks node.
- Drop duplicated /clocks/slow_xtal and /clocks/main_xtal, which is already present in sama5d4.dtsi
- Sort nodes by address in ascending order

arch/arm/boot/dts/Makefile +1 -0
index bb8fa02..67130bb 100644
@@ -48,6 +48,7 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
 	sama5d34ek.dtb \
 	sama5d35ek.dtb \
 	sama5d36ek.dtb \
+	at91-sama5d4_ma5d4evk.dtb \
 	at91-sama5d4_xplained.dtb \
 	at91-sama5d4ek.dtb
 dtb-$(CONFIG_ARCH_ATLAS6) += \
arch/arm/boot/dts/at91-sama5d4_ma5d4.dtsi new file +127 -0

127 lines not on this page · raw message

arch/arm/boot/dts/at91-sama5d4_ma5d4evk.dts new file +170 -0

170 lines not on this page · raw message

Signature · 1 line
2.1.4
#8 lore raw

PATCH 1/3 ARM: at91/dt: sama5d4: Fix mmc0 pinmux comments

In reply to Marek Vasut

Hi, Marek

Quoted 9 lines · Marek Vasut

Synchronise the comments in mmc0 pinmux node with HSMCI0 pinmux description in the Atmel SAMA5D4 datasheet from 24-Aug-15 page 1119, section 37.6.1, Table 37-3 .

---

Thanks for the correction.

Best Regards,
Josh Wu

Quoted 28 lines
  arch/arm/boot/dts/sama5d4.dtsi | 10 +++++-----
  1 file changed, 5 insertions(+), 5 deletions(-)
arch/arm/boot/dts/sama5d4.dtsi +5 -5
index 8d1de29..48ca530 100644
@@ -1640,15 +1640,15 @@
  					pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
  						atmel,pins =
  							<AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE	/* MCI0_CK, conflict with PCK1(ISI_MCK) */
-							 AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_CDB, conflict with NAND_D0 */
-							 AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DB0, conflict with NAND_D1 */
+							 AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_CDA, conflict with NAND_D0 */
+							 AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA0, conflict with NAND_D1 */
  							>;
  					};
  					pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
  						atmel,pins =
-							<AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DB1, conflict with NAND_D2 */
-							 AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DB2, conflict with NAND_D3 */
-							 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DB3, conflict with NAND_D4 */
+							<AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA1, conflict with NAND_D2 */
+							 AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA2, conflict with NAND_D3 */
+							 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* MCI0_DA3, conflict with NAND_D4 */
  							>;
  					};
  				};