ARM: socfpga: Add support for DENX MCV SoM and MCVEVK baseboard

PATCH New Marek Vasut 3 participants 6 messages Nov 1, 2015 – Nov 19, 2015

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Device tree bindings Arm and arm64 SoC sub-architectures (common parts)

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Marek Vasut

author

2015-11-01 23:29 UTC #0 lore raw

PATCH 1/1 ARM: socfpga: Add support for DENX MCV SoM and MCVEVK baseboard

Add support for the DENX MCV SoM and MCVEVK baseboard. The SoM contains eMMC, DRAM, Altera Cyclone V SoC. The baseboard contains CAN ports, UART ports, STMPE811 touchscreen controller, USB OTG port, ethernet port and a lot of IO pins.

Signed-off-by Marek Vasut <[email protected]>

Cc Vince Bridgers <[email protected]>

Cc Alan Tull <[email protected]>

Cc Thor Thayer <[email protected]>

Cc Dinh Nguyen <[email protected]>

Cc Olof Johansson <[email protected]>

---
 arch/arm/boot/dts/Makefile                    |  1 +
 arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi   | 33 ++++++++++
 arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts | 94 +++++++++++++++++++++++++++
 3 files changed, 128 insertions(+)
 create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi
 create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts

arch/arm/boot/dts/Makefile +1 -0

index 7d3e495..8f322be 100644
@@ -555,6 +555,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
 dtb-$(CONFIG_ARCH_SOCFPGA) += \
 	socfpga_arria5_socdk.dtb \
 	socfpga_arria10_socdk_sdmmc.dtb \
+	socfpga_cyclone5_mcvevk.dtb \
 	socfpga_cyclone5_socdk.dtb \
 	socfpga_cyclone5_de0_sockit.dtb \
 	socfpga_cyclone5_sockit.dtb \

arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi new file +33 -0

new file mode 100644
index 0000000..70dacf3
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "socfpga_cyclone5.dtsi"
+
+/ {
+	model = "DENX MCV";
+	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+	memory {
+		name = "memory";
+		device_type = "memory";
+		reg = <0x0 0x40000000>;	/* 1 GiB */
+	};
+};
+
+&mmc0 {	/* On-SoM eMMC */
+	bus-width = <8>;
+};

arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts new file +94 -0

94 lines not on this page · raw message

Signature · 1 line

2.1.4

Marek Vasut

author

2015-11-18 09:50 UTC #1 lore raw

PATCH 1/1 ARM: socfpga: Add support for DENX MCV SoM and MCVEVK baseboard

Quoted 11 lines · Marek Vasut

Add support for the DENX MCV SoM and MCVEVK baseboard. The SoM contains eMMC, DRAM, Altera Cyclone V SoC. The baseboard contains CAN ports, UART ports, STMPE811 touchscreen controller, USB OTG port, ethernet port and a lot of IO pins.
Signed-off-by Marek Vasut <[email protected]>
Cc Vince Bridgers <[email protected]>
Cc Alan Tull <[email protected]>
Cc Thor Thayer <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Olof Johansson <[email protected]>

Hi,

since the rc1 is out, can someone please look at this patch ?

btw. the consensus is, that it's preferred if contributors submit patches between rc1-rc5, right?

Thanks!

Quoted 159 lines

---
 arch/arm/boot/dts/Makefile                    |  1 +
 arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi   | 33 ++++++++++
 arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts | 94
+++++++++++++++++++++++++++ 3 files changed, 128 insertions(+)
 create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi
 create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts

arch/arm/boot/dts/Makefile +1 -0

index 7d3e495..8f322be 100644
@@ -555,6 +555,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
 dtb-$(CONFIG_ARCH_SOCFPGA) += \
 	socfpga_arria5_socdk.dtb \
 	socfpga_arria10_socdk_sdmmc.dtb \
+	socfpga_cyclone5_mcvevk.dtb \
 	socfpga_cyclone5_socdk.dtb \
 	socfpga_cyclone5_de0_sockit.dtb \
 	socfpga_cyclone5_sockit.dtb \

(quoted diff) +0 -0

b/arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi new file mode 100644 index 0000000..70dacf3

arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi new file +33 -0

@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "socfpga_cyclone5.dtsi"
+
+/ {
+	model = "DENX MCV";
+	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+	memory {
+		name = "memory";
+		device_type = "memory";
+		reg = <0x0 0x40000000>;	/* 1 GiB */
+	};
+};
+
+&mmc0 {	/* On-SoM eMMC */
+	bus-width = <8>;
+};

(quoted diff) +0 -0

b/arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts new file mode 100644 index 0000000..7cbe9b3

arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts new file +94 -0

@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "socfpga_cyclone5_mcv.dtsi"
+
+/ {
+	model = "DENX MCV EVK";
+	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+	aliases {
+		ethernet0 = &gmac0;
+		stmpe-i2c0 = &stmpe1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&gpio0 {	/* GPIO  0 ... 28 */
+	status = "okay";
+};
+
+&gpio1 {	/* GPIO 29 ... 57 */
+	status = "okay";
+};
+
+&gpio2 {	/* GPIO 58..66 (HLGPI 0..13 at offset 13) */
+	status = "okay";
+};
+
+&can0 {
+	status = "okay";
+};
+
+&can1 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+	speed-mode = <0>;
+
+	stmpe1: stmpe811 at 41 {
+		compatible = "st,stmpe811";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x41>;
+		id = <0>;
+		blocks = <0x5>;
+		irq-gpio = <&portb 28 0x4>;	/* GPIO 57, trig. level HI */
+
+		stmpe_touchscreen {
+			compatible = "st,stmpe-ts";
+			reg = <0>;
+			ts,sample-time = <4>;
+			ts,mod-12b = <1>;
+			ts,ref-sel = <0>;
+			ts,adc-freq = <1>;
+			ts,ave-ctrl = <1>;
+			ts,touch-det-delay = <3>;
+			ts,settling = <4>;
+			ts,fraction-z = <7>;
+			ts,i-drive = <1>;
+		};
+	};
+};
+
+&gmac0 {
+	phy-mode = "rgmii";
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&usb1 {
+	status = "okay";
+};

Dinh Nguyen

2015-11-19 15:57 UTC #2 lore raw

PATCH 1/1 ARM: socfpga: Add support for DENX MCV SoM and MCVEVK baseboard

Quoted 11 lines · Marek Vasut

Quoted 10 lines · Marek Vasut
Add support for the DENX MCV SoM and MCVEVK baseboard. The SoM contains eMMC, DRAM, Altera Cyclone V SoC. The baseboard contains CAN ports, UART ports, STMPE811 touchscreen controller, USB OTG port, ethernet port and a lot of IO pins.
Signed-off-by Marek Vasut <[email protected]>
Cc Vince Bridgers <[email protected]>
Cc Alan Tull <[email protected]>
Cc Thor Thayer <[email protected]>
Cc Dinh Nguyen <[email protected]>

Please use dinguyen at opensource.altera.com in your V2.

Quoted 2 lines

Quoted 1 line
Cc Olof Johansson <[email protected]>

Dinh

Marek Vasut

author

2015-11-19 16:00 UTC #3 lore raw

PATCH 1/1 ARM: socfpga: Add support for DENX MCV SoM and MCVEVK baseboard

Quoted 7 lines · Dinh Nguyen

Quoted 6 lines · Marek Vasut
Quoted 5 lines · Marek Vasut
Add support for the DENX MCV SoM and MCVEVK baseboard. The SoM contains eMMC, DRAM, Altera Cyclone V SoC. The baseboard contains CAN ports, UART ports, STMPE811 touchscreen controller, USB OTG port, ethernet port and a lot of IO pins.

Quoted 7 lines

Quoted 5 lines
Quoted 5 lines
Signed-off-by Marek Vasut <[email protected]>
Cc Vince Bridgers <[email protected]>
Cc Alan Tull <[email protected]>
Cc Thor Thayer <[email protected]>
Cc Dinh Nguyen <[email protected]>
Please use dinguyen at opensource.altera.com in your V2.

Uh, sorry, must've been a copy-paste mistake from some other patch. I already posted the V2, but if there's a need for V3, will keep that in mind.

Quoted 3 lines

Quoted 1 line
Quoted 1 line
Cc Olof Johansson <[email protected]>
Dinh

Best regards,
Marek Vasut

Steffen Trumtrar

2015-11-19 08:22 UTC #4 lore raw

PATCH 1/1 ARM: socfpga: Add support for DENX MCV SoM and MCVEVK baseboard

In reply to Marek Vasut

Hi!

Quoted 160 lines · Marek Vasut

Signed-off-by Marek Vasut <[email protected]>

Cc Vince Bridgers <[email protected]>

Cc Alan Tull <[email protected]>

Cc Thor Thayer <[email protected]>

Cc Dinh Nguyen <[email protected]>

Cc Olof Johansson <[email protected]>

---
 arch/arm/boot/dts/Makefile                    |  1 +
 arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi   | 33 ++++++++++
 arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts | 94 +++++++++++++++++++++++++++
 3 files changed, 128 insertions(+)
 create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi
 create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts

arch/arm/boot/dts/Makefile +1 -0

index 7d3e495..8f322be 100644
@@ -555,6 +555,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
 dtb-$(CONFIG_ARCH_SOCFPGA) += \
 	socfpga_arria5_socdk.dtb \
 	socfpga_arria10_socdk_sdmmc.dtb \
+	socfpga_cyclone5_mcvevk.dtb \
 	socfpga_cyclone5_socdk.dtb \
 	socfpga_cyclone5_de0_sockit.dtb \
 	socfpga_cyclone5_sockit.dtb \

arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi new file +33 -0

new file mode 100644
index 0000000..70dacf3
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "socfpga_cyclone5.dtsi"
+
+/ {
+	model = "DENX MCV";
+	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+	memory {
+		name = "memory";
+		device_type = "memory";
+		reg = <0x0 0x40000000>;	/* 1 GiB */
+	};
+};
+
+&mmc0 {	/* On-SoM eMMC */
+	bus-width = <8>;
+};

arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts new file +84 -0

new file mode 100644
index 0000000..7cbe9b3
@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "socfpga_cyclone5_mcv.dtsi"
+
+/ {
+	model = "DENX MCV EVK";
+	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+	aliases {
+		ethernet0 = &gmac0;
+		stmpe-i2c0 = &stmpe1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&gpio0 {	/* GPIO  0 ... 28 */
+	status = "okay";
+};
+
+&gpio1 {	/* GPIO 29 ... 57 */
+	status = "okay";
+};
+
+&gpio2 {	/* GPIO 58..66 (HLGPI 0..13 at offset 13) */
+	status = "okay";
+};
+
+&can0 {
+	status = "okay";
+};
+
+&can1 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+	speed-mode = <0>;
+
+	stmpe1: stmpe811 at 41 {
+		compatible = "st,stmpe811";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x41>;
+		id = <0>;
+		blocks = <0x5>;
+		irq-gpio = <&portb 28 0x4>;	/* GPIO 57, trig. level HI */
+
+		stmpe_touchscreen {
+			compatible = "st,stmpe-ts";
+			reg = <0>;
+			ts,sample-time = <4>;
+			ts,mod-12b = <1>;
+			ts,ref-sel = <0>;
+			ts,adc-freq = <1>;
+			ts,ave-ctrl = <1>;
+			ts,touch-det-delay = <3>;
+			ts,settling = <4>;
+			ts,fraction-z = <7>;
+			ts,i-drive = <1>;
+		};
+	};
+};
+
+&gmac0 {
+	phy-mode = "rgmii";

arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts line 94

Quoted 10 lines

arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts new file +10 -0
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&usb1 {
+	status = "okay";
+};

Could you please sort the nodes alphabetically? I guess the risk of merge conflicts is pretty low as this seems to be a complete description of the hardware, but I would still prefer it that way.

Otherwise:

Reviewed-by Steffen Trumtrar <[email protected]>

Regards,
Steffen

Signature · 4 lines

Pengutronix e.K.                           |                             |
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Marek Vasut

author

2015-11-19 14:41 UTC #5 lore raw

PATCH 1/1 ARM: socfpga: Add support for DENX MCV SoM and MCVEVK baseboard

Quoted 1 line · Steffen Trumtrar

Hi!

Hi!

Quoted 182 lines · Marek Vasut

Quoted 166 lines

Signed-off-by Marek Vasut <[email protected]>

Cc Vince Bridgers <[email protected]>

Cc Alan Tull <[email protected]>

Cc Thor Thayer <[email protected]>

Cc Dinh Nguyen <[email protected]>

Cc Olof Johansson <[email protected]>

---

 arch/arm/boot/dts/Makefile                    |  1 +
 arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi   | 33 ++++++++++
 arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts | 94
 +++++++++++++++++++++++++++ 3 files changed, 128 insertions(+)
 create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi
 create mode 100644 arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts

arch/arm/boot/dts/Makefile +1 -0

index 7d3e495..8f322be 100644
@@ -555,6 +555,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
 
 dtb-$(CONFIG_ARCH_SOCFPGA) += \
 
 	socfpga_arria5_socdk.dtb \
 	socfpga_arria10_socdk_sdmmc.dtb \
 
+	socfpga_cyclone5_mcvevk.dtb \

arch/arm/boot/dts/Makefile +0 -0

 	socfpga_cyclone5_socdk.dtb \
 	socfpga_cyclone5_de0_sockit.dtb \
 	socfpga_cyclone5_sockit.dtb \

(quoted diff) +0 -0

b/arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi new file mode 100644 index 0000000..70dacf3

arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi new file +33 -0

@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "socfpga_cyclone5.dtsi"
+
+/ {
+	model = "DENX MCV";
+	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+	memory {
+		name = "memory";
+		device_type = "memory";
+		reg = <0x0 0x40000000>;	/* 1 GiB */
+	};
+};
+
+&mmc0 {	/* On-SoM eMMC */
+	bus-width = <8>;
+};

(quoted diff) +0 -0

b/arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts new file mode 100644 index 0000000..7cbe9b3

arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts new file +84 -0

@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "socfpga_cyclone5_mcv.dtsi"
+
+/ {
+	model = "DENX MCV EVK";
+	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+	aliases {
+		ethernet0 = &gmac0;
+		stmpe-i2c0 = &stmpe1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&gpio0 {	/* GPIO  0 ... 28 */
+	status = "okay";
+};
+
+&gpio1 {	/* GPIO 29 ... 57 */
+	status = "okay";
+};
+
+&gpio2 {	/* GPIO 58..66 (HLGPI 0..13 at offset 13) */
+	status = "okay";
+};
+
+&can0 {
+	status = "okay";
+};
+
+&can1 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+	speed-mode = <0>;
+
+	stmpe1: stmpe811 at 41 {
+		compatible = "st,stmpe811";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x41>;
+		id = <0>;
+		blocks = <0x5>;
+		irq-gpio = <&portb 28 0x4>;	/* GPIO 57, trig. level HI */
+
+		stmpe_touchscreen {
+			compatible = "st,stmpe-ts";
+			reg = <0>;
+			ts,sample-time = <4>;
+			ts,mod-12b = <1>;
+			ts,ref-sel = <0>;
+			ts,adc-freq = <1>;
+			ts,ave-ctrl = <1>;
+			ts,touch-det-delay = <3>;
+			ts,settling = <4>;
+			ts,fraction-z = <7>;
+			ts,i-drive = <1>;
+		};
+	};
+};
+
+&gmac0 {
+	phy-mode = "rgmii";

arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts line 94

Quoted 10 lines

arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts new file +10 -0
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&usb1 {
+	status = "okay";
+};

Could you please sort the nodes alphabetically? I guess the risk of merge conflicts is pretty low as this seems to be a complete description of the hardware, but I would still prefer it that way.

Quoted 3 lines

Otherwise:
Reviewed-by Steffen Trumtrar <[email protected]>

Done and reposted, thanks for the review!