arm: socfpga: Remove cpu_mmc_init()

PATCH New Marek Vasut 3 participants 11 messages Nov 30, 2015 – Dec 2, 2015

Subsystems (4)

Arm (32-bit) Arm sub-architectures MMC, SD and SDIO Arm/socfpga architecture

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Marek Vasut

author

2015-11-30 19:48 UTC #0 lore raw

PATCH 1/3 arm: socfpga: Remove cpu_mmc_init()

This function triggers the registration of the dwmmc driver on SoCFPGA, but this is not needed in case the driver is correctly probed from DT.

Signed-off-by Marek Vasut <[email protected]>

Cc Chin Liang See <[email protected]>

Cc Dinh Nguyen <[email protected]>

Cc Pantelis Antoniou <[email protected]>

Cc Simon Glass <[email protected]>

Cc Tom Rini <[email protected]>

---
 arch/arm/mach-socfpga/misc.c | 11 -----------
 1 file changed, 11 deletions(-)

arch/arm/mach-socfpga/misc.c +0 ~~-11~~

index bbd31ef..b110f5b 100644
@@ -130,17 +130,6 @@ int cpu_eth_init(bd_t *bis)
 }
 #endif
 
-#ifdef CONFIG_DWMMC
-/*
- * Initializes MMC controllers.
- * to override, implement board_mmc_init()
- */
-int cpu_mmc_init(bd_t *bis)
-{
-	return socfpga_dwmmc_init(gd->fdt_blob);
-}
-#endif
-
 struct {
 	const char	*mode;
 	const char	*name;

Signature · 1 line

2.1.4

Marek Vasut

author

2015-11-30 19:48 UTC #1 lore raw

PATCH 2/3 mmc: dwmmc: socfpga: Convert to DM

Convert the SoCFPGA shim for registering the DWMMC driver to DM.

Signed-off-by Marek Vasut <[email protected]>

Cc Chin Liang See <[email protected]>

Cc Dinh Nguyen <[email protected]>

Cc Pantelis Antoniou <[email protected]>

Cc Simon Glass <[email protected]>

Cc Tom Rini <[email protected]>

---
 drivers/mmc/socfpga_dw_mmc.c | 119 ++++++++++++++++++++-----------------------
 1 file changed, 56 insertions(+), 63 deletions(-)

drivers/mmc/socfpga_dw_mmc.c +56 ~~-63~~

index 8076761..dd2b30a 100644
@@ -5,20 +5,28 @@
  */
 
 #include <common.h>
-#include <malloc.h>
-#include <fdtdec.h>
-#include <libfdt.h>
-#include <dwmmc.h>
-#include <errno.h>
-#include <asm/arch/dwmmc.h>
 #include <asm/arch/clock_manager.h>
+#include <asm/arch/dwmmc.h>
 #include <asm/arch/system_manager.h>
+#include <dm.h>
+#include <dwmmc.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <libfdt.h>
+#include <linux/err.h>
+#include <malloc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
 
 static const struct socfpga_clock_manager *clock_manager_base =
 		(void *)SOCFPGA_CLKMGR_ADDRESS;
 static const struct socfpga_system_manager *system_manager_base =
 		(void *)SOCFPGA_SYSMGR_ADDRESS;
 
+struct socfpga_dwmmc_priv {
+	struct dwmci_host	host;
+};
+
 static void socfpga_dwmci_clksel(struct dwmci_host *host)
 {
 	unsigned int drvsel;

@@ -44,87 +52,72 @@ static void socfpga_dwmci_clksel(struct dwmci_host *host)
 		CLKMGR_PERPLLGRP_EN_SDMMCCLK_MASK);
 }
 
-static int socfpga_dwmci_of_probe(const void *blob, int node, const int idx)
+static int socfpga_dwmmc_ofdata_to_platdata(struct udevice *dev)
 {
 	/* FIXME: probe from DT eventually too/ */
 	const unsigned long clk = cm_get_mmc_controller_clk_hz();
 
-	struct dwmci_host *host;
-	fdt_addr_t reg_base;
-	int bus_width, fifo_depth;
+	struct socfpga_dwmmc_priv *priv = dev_get_priv(dev);
+	struct dwmci_host *host = &priv->host;
+	int fifo_depth;
 
 	if (clk == 0) {
-		printf("DWMMC%d: MMC clock is zero!", idx);
+		printf("DWMMC: MMC clock is zero!");
 		return -EINVAL;
 	}
 
-	/* Get the register address from the device node */
-	reg_base = fdtdec_get_addr(blob, node, "reg");
-	if (!reg_base) {
-		printf("DWMMC%d: Can't get base address\n", idx);
-		return -EINVAL;
-	}
-
-	/* Get the bus width from the device node */
-	bus_width = fdtdec_get_int(blob, node, "bus-width", 0);
-	if (bus_width <= 0) {
-		printf("DWMMC%d: Can't get bus-width\n", idx);
-		return -EINVAL;
-	}
-
-	fifo_depth = fdtdec_get_int(blob, node, "fifo-depth", 0);
+	fifo_depth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+				    "fifo-depth", 0);
 	if (fifo_depth < 0) {
-		printf("DWMMC%d: Can't get FIFO depth\n", idx);
+		printf("DWMMC: Can't get FIFO depth\n");
 		return -EINVAL;
 	}
 
-	/* Allocate the host */
-	host = calloc(1, sizeof(*host));
-	if (!host)
-		return -ENOMEM;
-
-	host->name = "SOCFPGA DWMMC";
-	host->ioaddr = (void *)reg_base;
-	host->buswidth = bus_width;
+	host->name = dev->name;
+	host->ioaddr = (void *)dev_get_addr(dev);
+	host->buswidth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+					"bus-width", 4);
 	host->clksel = socfpga_dwmci_clksel;
-	host->dev_index = idx;
+
+	/*
+	 * TODO(sjg at chromium.org): Remove the need for this hack.
+	 * We only have one dwmmc block on gen5 SoCFPGA.
+	 */
+	host->dev_index = 0;
 	/* Fixed clock divide by 4 which due to the SDMMC wrapper */
 	host->bus_hz = clk;
 	host->fifoth_val = MSIZE(0x2) |
 		RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2);
 
-	return add_dwmci(host, host->bus_hz, 400000);
-}
-
-static int socfpga_dwmci_process_node(const void *blob, int nodes[],
-				      int count)
-{
-	int i, node, ret;
-
-	for (i = 0; i < count; i++) {
-		node = nodes[i];
-		if (node <= 0)
-			continue;
-
-		ret = socfpga_dwmci_of_probe(blob, node, i);
-		if (ret) {
-			printf("%s: failed to decode dev %d\n", __func__, i);
-			return ret;
-		}
-	}
 	return 0;
 }
 
-int socfpga_dwmmc_init(const void *blob)
+static int socfpga_dwmmc_probe(struct udevice *dev)
 {
-	int nodes[2];	/* Max. two controllers. */
-	int ret, count;
+	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+	struct socfpga_dwmmc_priv *priv = dev_get_priv(dev);
+	struct dwmci_host *host = &priv->host;
+	int ret;
 
-	count = fdtdec_find_aliases_for_id(blob, "mmc",
-					   COMPAT_ALTERA_SOCFPGA_DWMMC,
-					   nodes, ARRAY_SIZE(nodes));
+	ret = add_dwmci(host, host->bus_hz, 400000);
+	if (ret)
+		return ret;
 
-	ret = socfpga_dwmci_process_node(blob, nodes, count);
+	upriv->mmc = host->mmc;
 
-	return ret;
+	return 0;
 }
+
+static const struct udevice_id socfpga_dwmmc_ids[] = {
+	{ .compatible = "altr,socfpga-dw-mshc" },
+	{ }
+};
+
+U_BOOT_DRIVER(socfpga_dwmmc_drv) = {
+	.name		= "socfpga_dwmmc",
+	.id		= UCLASS_MMC,
+	.of_match	= socfpga_dwmmc_ids,
+	.ofdata_to_platdata = socfpga_dwmmc_ofdata_to_platdata,
+	.probe		= socfpga_dwmmc_probe,
+	.priv_auto_alloc_size = sizeof(struct socfpga_dwmmc_priv),
+};

Signature · 1 line

2.1.4

Chin Liang See

2015-12-01 05:24 UTC #2 lore raw

PATCH 2/3 mmc: dwmmc: socfpga: Convert to DM

Hi Marek,

Quoted 10 lines · Marek Vasut

Convert the SoCFPGA shim for registering the DWMMC driver to DM.
Signed-off-by Marek Vasut <[email protected]>
Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pantelis Antoniou <[email protected]>
Cc Simon Glass <[email protected]>
Cc Tom Rini <[email protected]>
---
 drivers/mmc/socfpga_dw_mmc.c | 119 ++++++++++++++++++++-------------

I cannot applied this successfully to u-boot-socfpga.git. I tried git am and also patch -1.

Quoted 30 lines

----------

 1 file changed, 56 insertions(+), 63 deletions(-)

drivers/mmc/socfpga_dw_mmc.c +10 -6

index 8076761..dd2b30a 100644
@@ -5,20 +5,28 @@
  */
 
 #include <common.h>
-#include <malloc.h>
-#include <fdtdec.h>
-#include <libfdt.h>
-#include <dwmmc.h>
-#include <errno.h>
-#include <asm/arch/dwmmc.h>
 #include <asm/arch/clock_manager.h>
+#include <asm/arch/dwmmc.h>
 #include <asm/arch/system_manager.h>
+#include <dm.h>
+#include <dwmmc.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <libfdt.h>
+#include <linux/err.h>
+#include <malloc.h>
+
+DECLARE_GLOBAL_DATA_PTR;

drivers/mmc/socfpga_dw_mmc.c line 29

Quoted 10 lines

drivers/mmc/socfpga_dw_mmc.c +4 -0

 
 static const struct socfpga_clock_manager *clock_manager_base =
 		(void *)SOCFPGA_CLKMGR_ADDRESS;
 static const struct socfpga_system_manager *system_manager_base =
 		(void *)SOCFPGA_SYSMGR_ADDRESS;
 
+struct socfpga_dwmmc_priv {
+	struct dwmci_host	host;
+};
+

There is a new structure added when we add the dts support for drvsel and smplsel. It's not reflected here.

Thanks
Chin Liang

Marek Vasut

author

2015-12-01 13:18 UTC #3 lore raw

PATCH 2/3 mmc: dwmmc: socfpga: Convert to DM

Quoted 1 line · Chin Liang See

Hi Marek,

Hi!

Quoted 11 lines · Marek Vasut

Quoted 10 lines
Convert the SoCFPGA shim for registering the DWMMC driver to DM.
Signed-off-by Marek Vasut <[email protected]>
Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pantelis Antoniou <[email protected]>
Cc Simon Glass <[email protected]>
Cc Tom Rini <[email protected]>
---

Quoted 4 lines

Quoted 1 line
 drivers/mmc/socfpga_dw_mmc.c | 119 ++++++++++++++++++++-------------
I cannot applied this successfully to u-boot-socfpga.git. I tried git am and also patch -1.

Try u-boot/master , that should work.

Best regards,
Marek Vasut

Marek Vasut

author

2015-12-01 18:42 UTC #4 lore raw

PATCH 2/3 mmc: dwmmc: socfpga: Convert to DM

In reply to Chin Liang See

Quoted 64 lines · Chin Liang See

Hi Marek,
Quoted 11 lines · Marek Vasut
Convert the SoCFPGA shim for registering the DWMMC driver to DM.
Signed-off-by Marek Vasut <[email protected]>
Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pantelis Antoniou <[email protected]>
Cc Simon Glass <[email protected]>
Cc Tom Rini <[email protected]>
---
 drivers/mmc/socfpga_dw_mmc.c | 119 ++++++++++++++++++++-------------
I cannot applied this successfully to u-boot-socfpga.git. I tried git am and also patch -1.
Quoted 46 lines
----------
 1 file changed, 56 insertions(+), 63 deletions(-)
drivers/mmc/socfpga_dw_mmc.c +10 -6
index 8076761..dd2b30a 100644
@@ -5,20 +5,28 @@
 
  */
 
 #include <common.h>
 
-#include <malloc.h>
-#include <fdtdec.h>
-#include <libfdt.h>
-#include <dwmmc.h>
-#include <errno.h>
-#include <asm/arch/dwmmc.h>
 
 #include <asm/arch/clock_manager.h>
 
+#include <asm/arch/dwmmc.h>
 
 #include <asm/arch/system_manager.h>
 
+#include <dm.h>
+#include <dwmmc.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <libfdt.h>
+#include <linux/err.h>
+#include <malloc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
 
 static const struct socfpga_clock_manager *clock_manager_base =
 
 		(void *)SOCFPGA_CLKMGR_ADDRESS;
 
 static const struct socfpga_system_manager *system_manager_base =
 
 		(void *)SOCFPGA_SYSMGR_ADDRESS;

Quoted 7 lines

drivers/mmc/socfpga_dw_mmc.c line 29
Quoted 4 lines
drivers/mmc/socfpga_dw_mmc.c +4 -0
+struct socfpga_dwmmc_priv {
+	struct dwmci_host	host;
+};
+
There is a new structure added when we add the dts support for drvsel and smplsel. It's not reflected here.

I see now. Fixed and applied all three. This leaves USB the only dangling thing which is not probed from OF. That's next on my list.

Chin Liang See

2015-12-02 05:42 UTC #5 lore raw

PATCH 2/3 mmc: dwmmc: socfpga: Convert to DM

Quoted 77 lines · Marek Vasut

Quoted 67 lines · Chin Liang See
Hi Marek,
Quoted 8 lines · Marek Vasut
Convert the SoCFPGA shim for registering the DWMMC driver to DM.
Signed-off-by Marek Vasut <[email protected]>
Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pantelis Antoniou <[email protected]>
Cc Simon Glass <[email protected]>
Cc Tom Rini <[email protected]>
Quoted 4 lines
---
 drivers/mmc/socfpga_dw_mmc.c | 119 ++++++++++++++++++++---------
----
I cannot applied this successfully to u-boot-socfpga.git. I tried git
am and also patch -1.
Quoted 47 lines
----------
 1 file changed, 56 insertions(+), 63 deletions(-)
drivers/mmc/socfpga_dw_mmc.c +10 -6
index 8076761..dd2b30a 100644
@@ -5,20 +5,28 @@
 
  */
 
 #include <common.h>
 
-#include <malloc.h>
-#include <fdtdec.h>
-#include <libfdt.h>
-#include <dwmmc.h>
-#include <errno.h>
-#include <asm/arch/dwmmc.h>
 
 #include <asm/arch/clock_manager.h>
 
+#include <asm/arch/dwmmc.h>
 
 #include <asm/arch/system_manager.h>
 
+#include <dm.h>
+#include <dwmmc.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <libfdt.h>
+#include <linux/err.h>
+#include <malloc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
 
 static const struct socfpga_clock_manager *clock_manager_base =
 
 		(void *)SOCFPGA_CLKMGR_ADDRESS;
 
 static const struct socfpga_system_manager *system_manager_base
=
(void *)SOCFPGA_SYSMGR_ADDRESS;
Quoted 8 lines
drivers/mmc/socfpga_dw_mmc.c line 29
Quoted 4 lines
drivers/mmc/socfpga_dw_mmc.c +4 -0
+struct socfpga_dwmmc_priv {
+	struct dwmci_host	host;
+};
+
There is a new structure added when we add the dts support for drvsel
and smplsel. It's not reflected here.

Quoted 3 lines

I see now. Fixed and applied all three. This leaves USB the only dangling
thing which is not probed from OF. That's next on my list.

Cool, thanks

Chin Liang

Simon Glass

2015-12-01 05:36 UTC #6 lore raw

PATCH 2/3 mmc: dwmmc: socfpga: Convert to DM

In reply to Marek Vasut

Quoted 10 lines · Marek Vasut

Convert the SoCFPGA shim for registering the DWMMC driver to DM.
Signed-off-by Marek Vasut <[email protected]>
Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pantelis Antoniou <[email protected]>
Cc Simon Glass <[email protected]>
Cc Tom Rini <[email protected]>
---
drivers/mmc/socfpga_dw_mmc.c | 119

++++++++++++++++++++-----------------------

Quoted 1 line

1 file changed, 56 insertions(+), 63 deletions(-)

For DM things:

Reviewed-by Simon Glass <[email protected]>

Marek Vasut

author

2015-11-30 19:48 UTC #7 lore raw

PATCH 3/3 arm: socfpga: Enable CONFIG_DM_MMC

In reply to Marek Vasut

Enable driver model MMC support on SoCFPGA.

Signed-off-by Marek Vasut <[email protected]>

Cc Chin Liang See <[email protected]>

Cc Dinh Nguyen <[email protected]>

Cc Pantelis Antoniou <[email protected]>

Cc Simon Glass <[email protected]>

Cc Tom Rini <[email protected]>

---
 configs/socfpga_arria5_defconfig       | 1 +
 configs/socfpga_cyclone5_defconfig     | 1 +
 configs/socfpga_de0_nano_soc_defconfig | 1 +
 configs/socfpga_mcvevk_defconfig       | 1 +
 configs/socfpga_sockit_defconfig       | 1 +
 configs/socfpga_socrates_defconfig     | 1 +
 6 files changed, 6 insertions(+)

configs/socfpga_arria5_defconfig +1 -0

index b4c23d9..f59bc00 100644
@@ -20,3 +20,4 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
 CONFIG_CADENCE_QSPI=y
 CONFIG_DESIGNWARE_SPI=y
+CONFIG_DM_MMC=y

configs/socfpga_cyclone5_defconfig +1 -0

index ac7bd0b..c0d6913 100644
@@ -20,3 +20,4 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
 CONFIG_CADENCE_QSPI=y
 CONFIG_DESIGNWARE_SPI=y
+CONFIG_DM_MMC=y

configs/socfpga_de0_nano_soc_defconfig +1 -0

index d21029f..a4f75e6 100644
@@ -18,3 +18,4 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
 CONFIG_CADENCE_QSPI=y
 CONFIG_DESIGNWARE_SPI=y
+CONFIG_DM_MMC=y

configs/socfpga_mcvevk_defconfig +1 -0

index 97f6c5d..382db65 100644
@@ -18,3 +18,4 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
 CONFIG_CADENCE_QSPI=y
 CONFIG_DESIGNWARE_SPI=y
+CONFIG_DM_MMC=y

configs/socfpga_sockit_defconfig +1 -0

index d3b9c89..03f8eff 100644
@@ -22,3 +22,4 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
 CONFIG_CADENCE_QSPI=y
 CONFIG_DESIGNWARE_SPI=y
+CONFIG_DM_MMC=y

configs/socfpga_socrates_defconfig +1 -0

index 462b2fd..ad8ed6d 100644
@@ -20,3 +20,4 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
 CONFIG_CADENCE_QSPI=y
 CONFIG_DESIGNWARE_SPI=y
+CONFIG_DM_MMC=y

Signature · 1 line

2.1.4

Chin Liang See

2015-12-01 05:25 UTC #8 lore raw

PATCH 3/3 arm: socfpga: Enable CONFIG_DM_MMC

Quoted 8 lines · Marek Vasut

Enable driver model MMC support on SoCFPGA.
Signed-off-by Marek Vasut <[email protected]>
Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pantelis Antoniou <[email protected]>
Cc Simon Glass <[email protected]>
Cc Tom Rini <[email protected]>

Quoted 10 lines

---
 configs/socfpga_arria5_defconfig       | 1 +
 configs/socfpga_cyclone5_defconfig     | 1 +
 configs/socfpga_de0_nano_soc_defconfig | 1 +
 configs/socfpga_mcvevk_defconfig       | 1 +
 configs/socfpga_sockit_defconfig       | 1 +
 configs/socfpga_socrates_defconfig     | 1 +
 6 files changed, 6 insertions(+)

Acked-by Chin Liang See <[email protected]>

Thanks
Chin Liang

Marek Vasut

author

2015-12-01 13:22 UTC #9 lore raw

PATCH 3/3 arm: socfpga: Enable CONFIG_DM_MMC

Quoted 19 lines · Chin Liang See

Quoted 10 lines · Marek Vasut
Enable driver model MMC support on SoCFPGA.
Signed-off-by Marek Vasut <[email protected]>
Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pantelis Antoniou <[email protected]>
Cc Simon Glass <[email protected]>
Cc Tom Rini <[email protected]>
---
Quoted 7 lines
 configs/socfpga_arria5_defconfig       | 1 +
 configs/socfpga_cyclone5_defconfig     | 1 +
 configs/socfpga_de0_nano_soc_defconfig | 1 +
 configs/socfpga_mcvevk_defconfig       | 1 +
 configs/socfpga_sockit_defconfig       | 1 +
 configs/socfpga_socrates_defconfig     | 1 +
 6 files changed, 6 insertions(+)

Quoted 1 line

Acked-by Chin Liang See <[email protected]>

Thanks, and that's one less block which didn't probe cleanly from DT.

Best regards,
Marek Vasut

Chin Liang See

2015-12-01 05:21 UTC #10 lore raw

PATCH 1/3 arm: socfpga: Remove cpu_mmc_init()

In reply to Marek Vasut

Quoted 5 lines · Marek Vasut

This function triggers the registration of the dwmmc driver on SoCFPGA,
but this is not needed in case the driver is correctly probed from DT.

Quoted 8 lines

Signed-off-by Marek Vasut <[email protected]>
Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pantelis Antoniou <[email protected]>
Cc Simon Glass <[email protected]>
Cc Tom Rini <[email protected]>
---

Acked-by Chin Liang See <[email protected]>

Thanks
Chin Liang