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reset: Add brcm,bcm6345-reset device tree binding

PATCH In review Simon Arlott 3 participants 4 messages Dec 10, 2015 – Dec 11, 2015

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Device tree bindings MIPS Reset controller framework
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Simon Arlott

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#0 lore raw

PATCH 1/2 reset: Add brcm,bcm6345-reset device tree binding

Add device tree binding for the BCM6345 soft reset controller.

The BCM6345 contains a soft-reset controller activated by setting a bit (that must previously have been cleared).

Signed-off-by Simon Arlott <[email protected]>

---
v3: Resend. Example has changed because usbh now has two compatible
strings and uses a power domain instead of a regulator.

v2: Renamed to bcm6345, removed "mask" property.

Acked-by Rob Herring <[email protected]>
 .../bindings/reset/brcm,bcm6345-reset.txt          | 33 ++++++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.txt
Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.txt new file +33 -0
new file mode 100644
index 0000000..0313040
@@ -0,0 +1,33 @@
+Broadcom BCM6345 reset controller
+
+The BCM6345 contains a basic soft reset controller in the perf register
+set which resets components using a bit in a register.
+
+Please also refer to reset.txt in this directory for common reset
+controller binding usage.
+
+Required properties:
+- compatible:	Should be "brcm,bcm<soc>-reset", "brcm,bcm6345-reset"
+- regmap:	The register map phandle
+- offset:	Offset in the register map for the reset register (in bytes)
+- #reset-cells:	Must be set to 1
+
+Example:
+
+periph_soft_rst: reset-controller {
+	compatible = "brcm,bcm63168-reset", "brcm,bcm6345-reset";
+	regmap = <&periph_cntl>;
+	offset = <0x10>;
+
+	#reset-cells = <1>;
+};
+
+usbh: usbphy@10002700 {
+	compatible = "brcm,bcm63168-usbh", "brcm,bcm6328-usbh";
+	reg = <0x10002700 0x38>;
+	clocks = <&periph_clk 13>, <&timer_clk 18>;
+	resets = <&periph_soft_rst 6>;
+	power-domains = <&misc_iddq_ctrl 4>;
+	#phy-cells = <0>;
+};
+
Signature · 8 lines
2.1.4

-- 
Simon Arlott
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author
#1 lore raw

PATCH 2/2 reset: bcm6345: Add support for the BCM6345 soft-reset controller

The BCM6345 contains a soft-reset controller activated by setting a bit (that must previously have been cleared).

Signed-off-by Simon Arlott <[email protected]>

---
v3: Resend based on linux-next, no changes.

v2: Renamed to bcm6345, removed "mask" property (and the regmap register
size is always assumed to be 32 bits).
Moved from drivers/reset/ to drivers/reset/bcm/.

 MAINTAINERS                       |   1 +
 drivers/reset/Kconfig             |   1 +
 drivers/reset/Makefile            |  17 +++---
 drivers/reset/bcm/Kconfig         |  10 ++++
 drivers/reset/bcm/Makefile        |   1 +
 drivers/reset/bcm/reset-bcm6345.c | 109 ++++++++++++++++++++++++++++++++++++++
 6 files changed, 131 insertions(+), 8 deletions(-)
 create mode 100644 drivers/reset/bcm/Kconfig
 create mode 100644 drivers/reset/bcm/Makefile
 create mode 100644 drivers/reset/bcm/reset-bcm6345.c
MAINTAINERS +1 -0
index 9b54ddc..b81b238 100644
@@ -2393,6 +2393,7 @@ F:	drivers/clk/bcm/clk-bcm6345*
 F:	drivers/irqchip/irq-bcm63*
 F:	drivers/irqchip/irq-bcm7*
 F:	drivers/irqchip/irq-brcmstb*
+F:	drivers/reset/bcm/reset-bcm6345*
 F:	include/linux/bcm63xx_wdt.h
 
 BROADCOM TG3 GIGABIT ETHERNET DRIVER
drivers/reset/Kconfig +1 -0
index 0615f50..ee73f5f 100644
@@ -12,4 +12,5 @@ menuconfig RESET_CONTROLLER
 
 	  If unsure, say no.
 
+source "drivers/reset/bcm/Kconfig"
 source "drivers/reset/sti/Kconfig"
drivers/reset/Makefile +9 -8
index 85d5904..a34f469 100644
@@ -1,8 +1,9 @@
-obj-$(CONFIG_RESET_CONTROLLER) += core.o
-obj-$(CONFIG_ARCH_LPC18XX) += reset-lpc18xx.o
-obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o
-obj-$(CONFIG_ARCH_BERLIN) += reset-berlin.o
-obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
-obj-$(CONFIG_ARCH_STI) += sti/
-obj-$(CONFIG_ARCH_ZYNQ) += reset-zynq.o
-obj-$(CONFIG_ATH79) += reset-ath79.o
+obj-$(CONFIG_RESET_CONTROLLER)	+= core.o
+obj-$(CONFIG_ARCH_LPC18XX)	+= reset-lpc18xx.o
+obj-$(CONFIG_ARCH_SOCFPGA)	+= reset-socfpga.o
+obj-$(CONFIG_ARCH_BERLIN)	+= reset-berlin.o
+obj-$(CONFIG_ARCH_SUNXI)	+= reset-sunxi.o
+obj-$(CONFIG_ARCH_STI)		+= sti/
+obj-$(CONFIG_ARCH_ZYNQ)		+= reset-zynq.o
+obj-$(CONFIG_ATH79)		+= reset-ath79.o
+obj-y				+= bcm/
drivers/reset/bcm/Kconfig new file +10 -0
new file mode 100644
index 0000000..85931c9
@@ -0,0 +1,10 @@
+if RESET_CONTROLLER
+
+config RESET_BCM6345
+	bool "BCM6345 Reset Controller"
+	depends on BMIPS_GENERIC
+	default BMIPS_GENERIC
+	help
+	  Support resetting of devices on BCM6345 boards.
+
+endif
drivers/reset/bcm/Makefile new file +1 -0
new file mode 100644
index 0000000..3d004bd
@@ -0,0 +1 @@
+obj-$(CONFIG_RESET_BCM6345)	+= reset-bcm6345.o
drivers/reset/bcm/reset-bcm6345.c new file +109 -0

109 lines not on this page · raw message

Signature · 8 lines
2.1.4

-- 
Simon Arlott
--
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#2 lore raw
In reply to Simon Arlott

Hello.

Quoted 38 lines · Simon Arlott

Add device tree binding for the BCM6345 soft reset controller.

The BCM6345 contains a soft-reset controller activated by setting a bit (that must previously have been cleared).

Signed-off-by Simon Arlott <[email protected]>

---
v3: Resend. Example has changed because usbh now has two compatible
strings and uses a power domain instead of a regulator.

v2: Renamed to bcm6345, removed "mask" property.

Acked-by Rob Herring <[email protected]>
  .../bindings/reset/brcm,bcm6345-reset.txt          | 33 ++++++++++++++++++++++
  1 file changed, 33 insertions(+)

create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.txt

Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.txt new file +15 -0
new file mode 100644
index 0000000..0313040
@@ -0,0 +1,33 @@
+Broadcom BCM6345 reset controller
+
+The BCM6345 contains a basic soft reset controller in the perf register
+set which resets components using a bit in a register.
+
+Please also refer to reset.txt in this directory for common reset
+controller binding usage.
+
+Required properties:
+- compatible:	Should be "brcm,bcm<soc>-reset", "brcm,bcm6345-reset"
+- regmap:	The register map phandle
+- offset:	Offset in the register map for the reset register (in bytes)
+- #reset-cells:	Must be set to 1
+
+Example:

Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.txt line 25

Quoted 10 lines
Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.txt new file +10 -0
+
+periph_soft_rst: reset-controller {
+	compatible = "brcm,bcm63168-reset", "brcm,bcm6345-reset";
+	regmap = <&periph_cntl>;
+	offset = <0x10>;
+
+	#reset-cells = <1>;
+};
+
+usbh: usbphy@10002700 {

"usb-phy" please to be more in line with ePAPR standardized "ethernet-phy"
node name.

[...]

MBR, Sergei

maintainer
#3 lore raw
In reply to Simon Arlott
Quoted 9 lines · Simon Arlott

Add device tree binding for the BCM6345 soft reset controller.

The BCM6345 contains a soft-reset controller activated by setting a bit (that must previously have been cleared).

Signed-off-by Simon Arlott <[email protected]>

---
v3: Resend. Example has changed because usbh now has two compatible
strings and uses a power domain instead of a regulator.

Not really all that important to this binding definition, so you can keep my ack.

Quoted 52 lines

v2: Renamed to bcm6345, removed "mask" property.

Acked-by Rob Herring <[email protected]>
 .../bindings/reset/brcm,bcm6345-reset.txt          | 33 ++++++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.txt
Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.txt new file +33 -0
new file mode 100644
index 0000000..0313040
@@ -0,0 +1,33 @@
+Broadcom BCM6345 reset controller
+
+The BCM6345 contains a basic soft reset controller in the perf register
+set which resets components using a bit in a register.
+
+Please also refer to reset.txt in this directory for common reset
+controller binding usage.
+
+Required properties:
+- compatible:	Should be "brcm,bcm<soc>-reset", "brcm,bcm6345-reset"
+- regmap:	The register map phandle
+- offset:	Offset in the register map for the reset register (in bytes)
+- #reset-cells:	Must be set to 1
+
+Example:
+
+periph_soft_rst: reset-controller {
+	compatible = "brcm,bcm63168-reset", "brcm,bcm6345-reset";
+	regmap = <&periph_cntl>;
+	offset = <0x10>;
+
+	#reset-cells = <1>;
+};
+
+usbh: usbphy@10002700 {
+	compatible = "brcm,bcm63168-usbh", "brcm,bcm6328-usbh";
+	reg = <0x10002700 0x38>;
+	clocks = <&periph_clk 13>, <&timer_clk 18>;
+	resets = <&periph_soft_rst 6>;
+	power-domains = <&misc_iddq_ctrl 4>;
+	#phy-cells = <0>;
+};
+
Signature · 4 lines
2.1.4

-- 
Simon Arlott

--
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