tty: amba-pl011: add support for 32-bit register access for earlycon

PATCH New Timur Tabi 3 participants 7 messages Nov 7, 2015 – Dec 17, 2015

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Documentation TTY layer and serial drivers Arm primecell UART PL010 and PL011 drivers

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Timur Tabi

author

2015-11-07 00:18 UTC #0 lore raw

PATCH 1/1 tty: amba-pl011: add support for 32-bit register access for earlycon

Add support the "mmio32" earlycon option for the pl011 device. If specified in the earlycon parameter, all reads/writes to pl011 registers during early console will use 32-bit accessors. Normally the function uses 8-bit writes.

Normal console uses the "access_32b" field of the vendor data structure to determine whether the registers needs 32-bit accessors. Early console is used before the vendor data is available, so we need a different mechanism to choose the accessor.

Example:

	earlycon=pl011,mmio32,0x3ced1000

Signed-off-by Timur Tabi <[email protected]>

---

This patch applies on top of Russell's 12-part amba-pl011.c patchset.

 Documentation/kernel-parameters.txt | 5 ++++-
 drivers/tty/serial/amba-pl011.c     | 9 ++++++---
 2 files changed, 10 insertions(+), 4 deletions(-)

Documentation/kernel-parameters.txt +4 -1

index 22a4b68..2436f62 100644
@@ -992,10 +992,13 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
 			unspecified, the h/w is not initialized.
 
 		pl011,<addr>
+		pl011,mmio32,<addr>
 			Start an early, polled-mode console on a pl011 serial
 			port at the specified address. The pl011 serial port
 			must already be setup and configured. Options are not
-			yet supported.
+			yet supported.  If 'mmio32' is specified, then only
+			the driver will use only 32-bit accessors to read/write
+			the device registers.
 
 		msm_serial,<addr>
 			Start an early, polled-mode console on an msm serial

drivers/tty/serial/amba-pl011.c +6 -3

index 373b152..6643ed9 100644
@@ -2301,10 +2301,13 @@ static struct console amba_console = {
 
 static void pl011_putc(struct uart_port *port, int c)
 {
-	while (readl(port->membase + REG_FR) & UART01x_FR_TXFF)
+	while (readl(port->membase + UART01x_FR) & UART01x_FR_TXFF)
 		;
-	writeb(c, port->membase + REG_DR);
-	while (readl(port->membase + REG_FR) & UART01x_FR_BUSY)
+	if (port->iotype == UPIO_MEM32)
+		writel(c, port->membase + UART01x_DR);
+	else
+		writeb(c, port->membase + UART01x_DR);
+	while (readl(port->membase + UART01x_FR) & UART01x_FR_BUSY)
 		;
 }

Signature · 3 lines

Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.

Greg Kroah-Hartman

2015-12-13 06:06 UTC #1 lore raw

PATCH 1/1 tty: amba-pl011: add support for 32-bit register access for earlycon

Quoted 10 lines · Timur Tabi

Add support the "mmio32" earlycon option for the pl011 device. If specified in the earlycon parameter, all reads/writes to pl011 registers during early console will use 32-bit accessors. Normally the function uses 8-bit writes.
Normal console uses the "access_32b" field of the vendor data structure to determine whether the registers needs 32-bit accessors. Early console is used before the vendor data is available, so we need a different mechanism to choose the accessor.

Quoted 8 lines

Example:
	earlycon=pl011,mmio32,0x3ced1000
Signed-off-by Timur Tabi <[email protected]>
---
This patch applies on top of Russell's 12-part amba-pl011.c patchset.

Which I didn't apply, so can you resend this after he resends his?

thanks,

greg k-h

Timur Tabi

author

2015-12-13 15:34 UTC #2 lore raw

PATCH 1/1 tty: amba-pl011: add support for 32-bit register access for earlycon

Quoted 10 lines · Greg Kroah-Hartman

Quoted 9 lines
Quoted 9 lines
Example:
	earlycon=pl011,mmio32,0x3ced1000
Signed-off-by Timur Tabi<[email protected]>
---
This patch applies on top of Russell's 12-part amba-pl011.c patchset.
Which I didn't apply, so can you resend this after he resends his?

Yes, I will resend all of my pl011-releated patches after Russell's patches are reworked and accepted.

Signature · 3 lines

Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the
Code Aurora Forum, hosted by The Linux Foundation.

Timur Tabi

author

2015-12-17 15:55 UTC #3 lore raw

PATCH 1/1 tty: amba-pl011: add support for 32-bit register access for earlycon

In reply to Greg Kroah-Hartman

Quoted 10 lines · Greg Kroah-Hartman

Quoted 8 lines
Example:
      earlycon=pl011,mmio32,0x3ced1000
Signed-off-by Timur Tabi <[email protected]>
---
This patch applies on top of Russell's 12-part amba-pl011.c patchset.
Which I didn't apply, so can you resend this after he resends his?

I see that some of Russell's patches are now in tty-next. Does that make them official? There was some disagreement about the usage of access_32b vs uap->port.iotype for determining whether we need 32-bit accessors or not.

Signature · 3 lines

Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.

Greg Kroah-Hartman

2015-12-17 16:27 UTC #4 lore raw

PATCH 1/1 tty: amba-pl011: add support for 32-bit register access for earlycon

Quoted 9 lines · Timur Tabi

Quoted 7 lines · Greg Kroah-Hartman
Quoted 7 lines
Example:
      earlycon=pl011,mmio32,0x3ced1000
Signed-off-by Timur Tabi <[email protected]>
---

Quoted 6 lines

Quoted 3 lines
Quoted 1 line
This patch applies on top of Russell's 12-part amba-pl011.c patchset.
Which I didn't apply, so can you resend this after he resends his?
I see that some of Russell's patches are now in tty-next. Does that make them official?

Unless Russell asks me to revert them, they will show up in the next merge window.

Quoted 3 lines

There was some disagreement about the usage of
access_32b vs uap->port.iotype for determining whether we need 32-bit accessors or not.

There was? I missed that, please send follow-on patches to resolve the issue if there is one.

thanks,

greg k-h

Timur Tabi

author

2015-12-17 16:47 UTC #5 lore raw

PATCH 1/1 tty: amba-pl011: add support for 32-bit register access for earlycon

Quoted 5 lines · Greg Kroah-Hartman

Quoted 3 lines
Quoted 3 lines
There was some disagreement about the usage of
access_32b vs uap->port.iotype for determining whether we need 32-bit accessors or not.
There was? I missed that, please send follow-on patches to resolve the issue if there is one.

I can submit a patch that provides an alternative implementation, but I'm pretty sure Russell won't like it.

For reference:

http://www.spinics.net/lists/linux-serial/msg19710.html

Russell said that UPIO_MEM is supposed to be literally only 8-bit access, but then Peter Hurley posted this:

http://www.spinics.net/lists/linux-serial/msg19930.html

which you applied. So my patch would remove access_32b and use UPIO_MEM32/UPIO_MEM instead. It would be a little weird having both patches in your tree, I guess.

Signature · 3 lines

Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the
Code Aurora Forum, hosted by The Linux Foundation.

Peter Hurley

2015-12-17 17:06 UTC #6 lore raw

PATCH 1/1 tty: amba-pl011: add support for 32-bit register access for earlycon

Quoted 11 lines · Timur Tabi

Quoted 5 lines · Greg Kroah-Hartman
Quoted 3 lines
Quoted 3 lines
There was some disagreement about the usage of
access_32b vs uap->port.iotype for determining whether we need 32-bit accessors or not.
There was? I missed that, please send follow-on patches to resolve the issue if there is one.
I can submit a patch that provides an alternative implementation, but I'm pretty sure Russell won't like it.
For reference:

Quoted 7 lines

http://www.spinics.net/lists/linux-serial/msg19710.html
Russell said that UPIO_MEM is supposed to be literally only 8-bit access, but then Peter Hurley posted this:
http://www.spinics.net/lists/linux-serial/msg19930.html
which you applied. So my patch would remove access_32b and use UPIO_MEM32/UPIO_MEM instead. It would be a little weird having both patches in your tree, I guess.

I think it'll be ok if you just send a patch to use UPIO_MEM32 instead; I think that situation mostly had to do with inertia and not wanting to rebase a series like that (which I can appreciate).

The worst that happens is Russell objects, but I think there's a good case for the simpler UPIO_MEM32 usage, which plays nice with earlycon.

Regards,
Peter Hurley