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ARM: dts: imx6: add Vivante GPU nodes

PATCH New Lucas Stach 2 participants 2 messages Dec 15, 2015 – Dec 21, 2015

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Lucas Stach

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PATCH v2 1/1 ARM: dts: imx6: add Vivante GPU nodes

This adds the device nodes for 2D, 3D and VG GPU cores.

Signed-off-by Russell King <[email protected]>
Signed-off-by Lucas Stach <[email protected]>
---
 arch/arm/boot/dts/imx6dl.dtsi  |  5 +++++
 arch/arm/boot/dts/imx6q.dtsi   | 15 +++++++++++++++
 arch/arm/boot/dts/imx6qdl.dtsi | 21 +++++++++++++++++++++
 3 files changed, 41 insertions(+)
arch/arm/boot/dts/imx6dl.dtsi +5 -0
index 4b0ec0703825..51c517a5cafd 100644
@@ -104,6 +104,11 @@
 		compatible = "fsl,imx-display-subsystem";
 		ports = <&ipu1_di0>, <&ipu1_di1>;
 	};
+
+	gpu-subsystem {
+		compatible = "fsl,imx-gpu-subsystem";
+		cores = <&gpu_2d>, <&gpu_3d>;
+	};
 };
 
 &gpt {
arch/arm/boot/dts/imx6q.dtsi +15 -0
index 399103b8e2c9..77d618b2870c 100644
@@ -153,6 +153,16 @@
 			status = "disabled";
 		};
 
+		gpu_vg: gpu at 02204000 {
+			compatible = "vivante,gc";
+			reg = <0x02204000 0x4000>;
+			interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clks IMX6QDL_CLK_OPENVG_AXI>,
+				 <&clks IMX6QDL_CLK_GPU2D_CORE>;
+			clock-names = "bus", "core";
+			power-domains = <&gpc 1>;
+		};
+
 		ipu2: ipu at 02800000 {
 			#address-cells = <1>;
 			#size-cells = <0>;

@@ -225,6 +235,11 @@
 		compatible = "fsl,imx-display-subsystem";
 		ports = <&ipu1_di0>, <&ipu1_di1>, <&ipu2_di0>, <&ipu2_di1>;
 	};
+
+	gpu-subsystem {
+		compatible = "fsl,imx-gpu-subsystem";
+		cores = <&gpu_2d>, <&gpu_3d>, <&gpu_vg>;
+	};
 };
 
 &hdmi {
arch/arm/boot/dts/imx6qdl.dtsi +21 -0
index 2b6cc8bf3c5c..d44e97bbfd1e 100644
@@ -147,6 +147,27 @@
 			};
 		};
 
+		gpu_3d: gpu at 00130000 {
+			compatible = "vivante,gc";
+			reg = <0x00130000 0x4000>;
+			interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clks IMX6QDL_CLK_GPU3D_AXI>,
+				 <&clks IMX6QDL_CLK_GPU3D_CORE>,
+				 <&clks IMX6QDL_CLK_GPU3D_SHADER>;
+			clock-names = "bus", "core", "shader";
+			power-domains = <&gpc 1>;
+		};
+
+		gpu_2d: gpu at 00134000 {
+			compatible = "vivante,gc";
+			reg = <0x00134000 0x4000>;
+			interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clks IMX6QDL_CLK_GPU2D_AXI>,
+				 <&clks IMX6QDL_CLK_GPU2D_CORE>;
+			clock-names = "bus", "core";
+			power-domains = <&gpc 1>;
+		};
+
 		timer at 00a00600 {
 			compatible = "arm,cortex-a9-twd-timer";
 			reg = <0x00a00600 0x20>;
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