clk: lpc32xx: add clock support for NXP LPC32xx
Subsystems (3)
Vladimir Zapolskiy
maintainerv2 cover clk: lpc32xx: add clock support for NXP LPC32xx
This changeset adds common clock framework driver for NXP LPC32xx boards.
The change can be applied without any dependencies, LPC32xx device tree and mach changes will be done, when this changeset is accepted.
The v1 version of CCF driver can be found here:
http://www.spinics.net/lists/arm-kernel/msg461632.html
The RFC version of CCF driver 9/11 can be found here:
http://www.spinics.net/lists/devicetree/msg100583.html
Changes from v1 to v2:
* removed dependency on the recent LPC32xx device tree changes, also removed LPC32xx device tree and mach changes, which depend on this series,
* use lowercase hex numbers in a DT binding example,
* incremented by 1 all clock values, possibly clock "0" may have a special meaning in future,
* removed explicit COMMON_CLK selection for NXP LPC18xx,
* LPC32XX_CLK_DEFINE() does not stringify clock names,
* fixed a minor bug in clk_pll_set_rate().
Changes from RFC to v1:
* added definitions of a missed IRDA clock,
* renamed compatible property from lpc32xx-scb to lpc32xx-clk
* switched to regmap interface instead of mmio, this is required to secure access to registers shared between pinmux, dma and clock driver, unfortunately this change has to pull some code snippets from common gate, divider and mux helpers rebased on regmap API,
* split clock definitions from the driver to be able to update dts files separately from CCF driver.
The driver is written from scratch, here are main functional differences with the legacy driver arch/arm/mach-lpc32xx/clock.c:
* serialized access to SCB registers,
* reworked routines to select PLL parameters,
* now the clock driver has detailed description of all clocks, the original driver misses several clock entries and most of fine grained clock controls, here every mux and divider are accounted,
* now clocks and clock hierarchies can be described in board DT file,
* sophisticated management of USB clocks, for example now USB device controller needs only one clock instead of USB PLL, USB OTG and USB device clocks,
* other benefits from a driver powered by CCF.
Patch 5/5 may produce false positives from checkpatch.pl, the fix to checkpatch is found in Andrew's tree
Vladimir Zapolskiy (5):
dt-bindings: clock: add description of LPC32xx clock controller
dt-bindings: clock: add description of LPC32xx USB clock controller
dt-bindings: clock: add NXP LPC32xx clock list for consumers
clk: lpc18xx: add NXP specific COMMON_CLK_NXP configuration symbol
clk: lpc32xx: add common clock framework driver
.../devicetree/bindings/clock/nxp,lpc3220-clk.txt | 30 + .../bindings/clock/nxp,lpc3220-usb-clk.txt | 22 + drivers/clk/Kconfig | 6 + drivers/clk/Makefile | 2 +- drivers/clk/nxp/Makefile | 1 + drivers/clk/nxp/clk-lpc32xx.c | 1569 ++++++++++++++++++++ include/dt-bindings/clock/lpc32xx-clock.h | 56 + 7 files changed, 1685 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt create mode 100644 drivers/clk/nxp/clk-lpc32xx.c create mode 100644 include/dt-bindings/clock/lpc32xx-clock.h
Signature · 1 line
2.1.4
Vladimir Zapolskiy
maintainerPATCH v2 1/5 dt-bindings: clock: add description of LPC32xx clock controller
NXP LPC32xx SoC has a clocking and power control unit (CPC) as a part of system control block (SCB). CPC is supplied by two external oscillators and it manages core and most of peripheral clocks, the change adds description of DT bindings for clock controller found on LPC32xx SoC series.
---
Changes from v1 to v2:
- none
.../devicetree/bindings/clock/nxp,lpc3220-clk.txt | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt
Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt new file +30 -0
@@ -0,0 +1,30 @@ +NXP LPC32xx Clock Controller + +Required properties: +- compatible: should be "nxp,lpc3220-clk" +- reg: should contain clock controller registers location and length +- #clock-cells: must be 1, the cell holds id of a clock provided by the + clock controller +- clocks: phandles of external oscillators, the list must contain one + 32768 Hz oscillator and may have one optional high frequency oscillator +- clock-names: list of external oscillator clock names, must contain + "xtal_32k" and may have optional "xtal" + +Examples: + + /* System Control Block */ + scb { + compatible = "simple-bus"; + ranges = <0x0 0x040004000 0x00001000>; + #address-cells = <1>; + #size-cells = <1>; + + clk: clock-controller at 0 { + compatible = "nxp,lpc3220-clk"; + reg = <0x00 0x114>; + #clock-cells = <1>; + + clocks = <&xtal_32k>, <&xtal>; + clock-names = "xtal_32k", "xtal"; + }; + };
Signature · 1 line
2.1.4
Rob Herring
maintainerPATCH v2 1/5 dt-bindings: clock: add description of LPC32xx clock controller
Quoted 7 lines · Vladimir Zapolskiy
NXP LPC32xx SoC has a clocking and power control unit (CPC) as a part of system control block (SCB). CPC is supplied by two external oscillators and it manages core and most of peripheral clocks, the change adds description of DT bindings for clock controller found on LPC32xx SoC series.
Signed-off-by Vladimir Zapolskiy <[email protected]>
Quoted 47 lines
---
Changes from v1 to v2:
- none.../devicetree/bindings/clock/nxp,lpc3220-clk.txt | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txtDocumentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt new file +30
-0@@ -0,0 +1,30 @@ +NXP LPC32xx Clock Controller + +Required properties: +- compatible: should be "nxp,lpc3220-clk" +- reg: should contain clock controller registers location and length +- #clock-cells: must be 1, the cell holds id of a clock provided by the + clock controller +- clocks: phandles of external oscillators, the list must contain one + 32768 Hz oscillator and may have one optional high frequency oscillator +- clock-names: list of external oscillator clock names, must contain + "xtal_32k" and may have optional "xtal" + +Examples: + + /* System Control Block */ + scb { + compatible = "simple-bus"; + ranges = <0x0 0x040004000 0x00001000>; + #address-cells = <1>; + #size-cells = <1>; + + clk: clock-controller at 0 { + compatible = "nxp,lpc3220-clk"; + reg = <0x00 0x114>; + #clock-cells = <1>; + + clocks = <&xtal_32k>, <&xtal>; + clock-names = "xtal_32k", "xtal"; + }; + };Signature · 1 line
2.1.4
Vladimir Zapolskiy
maintainerPATCH v2 2/5 dt-bindings: clock: add description of LPC32xx USB clock controller
In reply to Vladimir ZapolskiyNXP LPC32xx USB controller has a subdevice, which controls USB AHB slave, USB OTG, USB OHCI, USB device and I2C controller to USB phy clocks, this change adds description of the clock controller, for more details reference LPC32xx User's Manual, namely USB control, OTG clock control and OTG clock status registers.
---
Changes from v1 to v2:
- use lowercase hex numbers in a DT binding example
.../bindings/clock/nxp,lpc3220-usb-clk.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt
Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt new file +22 -0
@@ -0,0 +1,22 @@ +NXP LPC32xx USB Clock Controller + +Required properties: +- compatible: should be "nxp,lpc3220-usb-clk" +- reg: should contain clock controller registers location and length +- #clock-cells: must be 1, the cell holds id of a clock provided by the + USB clock controller + +Examples: + + usb { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x31020000 0x00001000>; + + usbclk: clock-controller at f00 { + compatible = "nxp,lpc3220-usb-clk"; + reg = <0xf00 0x100>; + #clock-cells = <1>; + }; + };
Signature · 1 line
2.1.4
Rob Herring
maintainerPATCH v2 2/5 dt-bindings: clock: add description of LPC32xx USB clock controller
Quoted 10 lines · Vladimir Zapolskiy
NXP LPC32xx USB controller has a subdevice, which controls USB AHB slave, USB OTG, USB OHCI, USB device and I2C controller to USB phy clocks, this change adds description of the clock controller, for more details reference LPC32xx User's Manual, namely USB control, OTG clock control and OTG clock status registers.
Signed-off-by Vladimir Zapolskiy <[email protected]>---
Changes from v1 to v2:
- use lowercase hex numbers in a DT binding example
Quoted 36 lines
.../bindings/clock/nxp,lpc3220-usb-clk.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txtDocumentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt new file +22
-0@@ -0,0 +1,22 @@ +NXP LPC32xx USB Clock Controller + +Required properties: +- compatible: should be "nxp,lpc3220-usb-clk" +- reg: should contain clock controller registers location and length +- #clock-cells: must be 1, the cell holds id of a clock provided by the + USB clock controller + +Examples: + + usb { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x31020000 0x00001000>; + + usbclk: clock-controller at f00 { + compatible = "nxp,lpc3220-usb-clk"; + reg = <0xf00 0x100>; + #clock-cells = <1>; + }; + };Signature · 1 line
2.1.4
Vladimir Zapolskiy
maintainerPATCH v2 3/5 dt-bindings: clock: add NXP LPC32xx clock list for consumers
In reply to Vladimir ZapolskiyThe change adds a list of NXP LPC32xx clocks, which can be requested by clock consumers.
---
Changes from v1 to v2:
- incremented by 1 all clock values, possibly clock "0" may have a special meaning in future
include/dt-bindings/clock/lpc32xx-clock.h | 56 +++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 include/dt-bindings/clock/lpc32xx-clock.h
include/dt-bindings/clock/lpc32xx-clock.h new file +56 -0
@@ -0,0 +1,56 @@ +/* +* Copyright (c) 2015 Vladimir Zapolskiy <[email protected]> +* +* This code is released using a dual license strategy: BSD/GPL +* You can choose the licence that better fits your requirements. +* +* Released under the terms of 3-clause BSD License +* Released under the terms of GNU General Public License Version 2.0 +* +*/ + +#ifndef __DT_BINDINGS_LPC32XX_CLOCK_H +#define __DT_BINDINGS_LPC32XX_CLOCK_H + +/* LPC32XX System Control Block clocks */ +#define LPC32XX_CLK_RTC 1 +#define LPC32XX_CLK_DMA 2 +#define LPC32XX_CLK_MLC 3 +#define LPC32XX_CLK_SLC 4 +#define LPC32XX_CLK_LCD 5 +#define LPC32XX_CLK_MAC 6 +#define LPC32XX_CLK_SD 7 +#define LPC32XX_CLK_DDRAM 8 +#define LPC32XX_CLK_SSP0 9 +#define LPC32XX_CLK_SSP1 10 +#define LPC32XX_CLK_UART3 11 +#define LPC32XX_CLK_UART4 12 +#define LPC32XX_CLK_UART5 13 +#define LPC32XX_CLK_UART6 14 +#define LPC32XX_CLK_IRDA 15 +#define LPC32XX_CLK_I2C1 16 +#define LPC32XX_CLK_I2C2 17 +#define LPC32XX_CLK_TIMER0 18 +#define LPC32XX_CLK_TIMER1 19 +#define LPC32XX_CLK_TIMER2 20 +#define LPC32XX_CLK_TIMER3 21 +#define LPC32XX_CLK_TIMER4 22 +#define LPC32XX_CLK_TIMER5 23 +#define LPC32XX_CLK_WDOG 24 +#define LPC32XX_CLK_I2S0 25 +#define LPC32XX_CLK_I2S1 26 +#define LPC32XX_CLK_SPI1 27 +#define LPC32XX_CLK_SPI2 28 +#define LPC32XX_CLK_MCPWM 29 +#define LPC32XX_CLK_HSTIMER 30 +#define LPC32XX_CLK_KEY 31 +#define LPC32XX_CLK_PWM1 32 +#define LPC32XX_CLK_PWM2 33 +#define LPC32XX_CLK_ADC 34 + +/* LPC32XX USB clocks */ +#define LPC32XX_USB_CLK_I2C 1 +#define LPC32XX_USB_CLK_DEVICE 2 +#define LPC32XX_USB_CLK_HOST 3 + +#endif /* __DT_BINDINGS_LPC32XX_CLOCK_H */
Signature · 1 line
2.1.4
Vladimir Zapolskiy
maintainerPATCH v2 4/5 clk: lpc18xx: add NXP specific COMMON_CLK_NXP configuration symbol
In reply to Vladimir ZapolskiyThe change adds COMMON_CLK_NXP configuration symbol and enables it for NXP LPC18XX architecture, this is needed to reuse drivers/clk/nxp folder for NXP common clock framework drivers other than LPC18XX one.
---
Changes from v1 to v2:
- removed explicit COMMON_CLK selection for NXP LPC18xx
drivers/clk/Kconfig | 5 +++++ drivers/clk/Makefile | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-)
drivers/clk/Kconfig +5 -0
@@ -175,6 +175,11 @@ config COMMON_CLK_PWM Adapter driver so that any PWM output can be (mis)used as clock signal at 50% duty cycle. +config COMMON_CLK_NXP + def_bool COMMON_CLK && ARCH_LPC18XX + ---help--- + Support for clock providers on NXP platforms. + config COMMON_CLK_PXA def_bool COMMON_CLK && ARCH_PXA ---help---
drivers/clk/Makefile +1 -1
@@ -62,8 +62,8 @@ endif obj-$(CONFIG_PLAT_ORION) += mvebu/ obj-$(CONFIG_ARCH_MESON) += meson/ obj-$(CONFIG_ARCH_MXS) += mxs/ -obj-$(CONFIG_ARCH_LPC18XX) += nxp/ obj-$(CONFIG_MACH_PISTACHIO) += pistachio/ +obj-$(CONFIG_COMMON_CLK_NXP) += nxp/ obj-$(CONFIG_COMMON_CLK_PXA) += pxa/ obj-$(CONFIG_COMMON_CLK_QCOM) += qcom/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
Signature · 1 line
2.1.4
Vladimir Zapolskiy
maintainerPATCH v2 5/5 clk: lpc32xx: add common clock framework driver
In reply to Vladimir ZapolskiyAdd support for all configurable clocks found on NXP LPC32xx SoC.
The list contains several heterogenous groups of clocks:
* system clocks including multiple dividers and muxes,
* x397 PLL, HCLK PLL and USB PLL,
* peripheral clocks inherited from rtc, hclk and pclk,
* USB controller clocks: AHB slave, I2C, OTG, OHCI and device.
---
Changes from v1 to v2:
- LPC32XX_CLK_DEFINE() does not stringify clock names
- fixed a minor bug in clk_pll_set_rate()
drivers/clk/Kconfig | 3 +- drivers/clk/nxp/Makefile | 1 + drivers/clk/nxp/clk-lpc32xx.c | 1569 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 1572 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/nxp/clk-lpc32xx.c
drivers/clk/Kconfig +2 -1
@@ -176,7 +176,8 @@ config COMMON_CLK_PWM at 50% duty cycle. config COMMON_CLK_NXP - def_bool COMMON_CLK && ARCH_LPC18XX + def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX) + select REGMAP_MMIO if ARCH_LPC32XX ---help--- Support for clock providers on NXP platforms.
drivers/clk/nxp/Makefile +1 -0
@@ -1,2 +1,3 @@ obj-$(CONFIG_ARCH_LPC18XX) += clk-lpc18xx-cgu.o obj-$(CONFIG_ARCH_LPC18XX) += clk-lpc18xx-ccu.o +obj-$(CONFIG_ARCH_LPC32XX) += clk-lpc32xx.o
drivers/clk/nxp/clk-lpc32xx.c new file +1569 -0
1,569 lines not on this page · raw message
Signature · 1 line
2.1.4
Vladimir Zapolskiy
maintainerv2 cover clk: lpc32xx: add clock support for NXP LPC32xx
In reply to Vladimir ZapolskiyHi Stephen, Michael,
Quoted 56 lines · Vladimir Zapolskiy
This changeset adds common clock framework driver for NXP LPC32xx boards.
The change can be applied without any dependencies, LPC32xx device tree and mach changes will be done, when this changeset is accepted.
The v1 version of CCF driver can be found here:
http://www.spinics.net/lists/arm-kernel/msg461632.htmlThe RFC version of CCF driver 9/11 can be found here:
http://www.spinics.net/lists/devicetree/msg100583.htmlChanges from v1 to v2:
* removed dependency on the recent LPC32xx device tree changes, also removed LPC32xx device tree and mach changes, which depend on this series,
* use lowercase hex numbers in a DT binding example,
* incremented by 1 all clock values, possibly clock "0" may have a special meaning in future,
* removed explicitCOMMON_CLKselection for NXP LPC18xx,
*LPC32XX_CLK_DEFINE()does not stringify clock names,
* fixed a minor bug inclk_pll_set_rate().Changes from RFC to v1:
* added definitions of a missed IRDA clock,
* renamed compatible property from lpc32xx-scb to lpc32xx-clk
* switched to regmap interface instead of mmio, this is required to secure access to registers shared between pinmux, dma and clock driver, unfortunately this change has to pull some code snippets from common gate, divider and mux helpers rebased on regmap API,
* split clock definitions from the driver to be able to update dts files separately from CCF driver.The driver is written from scratch, here are main functional differences with the legacy driver
arch/arm/mach-lpc32xx/clock.c:
* serialized access to SCB registers,
* reworked routines to select PLL parameters,
* now the clock driver has detailed description of all clocks, the original driver misses several clock entries and most of fine grained clock controls, here every mux and divider are accounted,
* now clocks and clock hierarchies can be described in board DT file,
* sophisticated management of USB clocks, for example now USB device controller needs only one clock instead of USB PLL, USB OTG and USB device clocks,
* other benefits from a driver powered by CCF.Patch 5/5 may produce false positives from checkpatch.pl, the fix to checkpatch is found in Andrew's tree
Vladimir Zapolskiy (5):
dt-bindings: clock: add description of LPC32xx clock controller
dt-bindings: clock: add description of LPC32xx USB clock controller
dt-bindings: clock: add NXP LPC32xx clock list for consumers
clk: lpc18xx: add NXP specificCOMMON_CLK_NXPconfiguration symbol
clk: lpc32xx: add common clock framework driver
Quoted 13 lines
.../devicetree/bindings/clock/nxp,lpc3220-clk.txt | 30 + .../bindings/clock/nxp,lpc3220-usb-clk.txt | 22 + drivers/clk/Kconfig | 6 + drivers/clk/Makefile | 2 +- drivers/clk/nxp/Makefile | 1 + drivers/clk/nxp/clk-lpc32xx.c | 1569 ++++++++++++++++++++ include/dt-bindings/clock/lpc32xx-clock.h | 56 + 7 files changed, 1685 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt create mode 100644 drivers/clk/nxp/clk-lpc32xx.c create mode 100644 include/dt-bindings/clock/lpc32xx-clock.h
this is a gentle ping, the first version of the driver was published in October, the only functional change is switching from iomap to regmap API to access the registers.
A couple of words about the change to mitigate your impression of apparently imperfect code.
The NXP LPC32xx platform is unmaintained and broken for about one and a half years, so I presume you won't get an ack from Roland, who is an official maintainer. Adding a CCF driver will be a huge progress, since it allows in +1 kernel release to fix the platform -- there is a critical problem in legacy IRQ handling based on hardware IRQs, irqchip driver change is ready as well, but CCF should go first, because it allows to remove a legacy clocksource/clockevent driver arch/arm/mach-lpc32xx/timer.c. That driver depends on legacy broken irqchip (hardware IRQs are used, irqchip with virtual IRQs will break the driver), it has a proper replacement drivers/clocksource/time-lpc32xx.c, but to use the new driver common clock support is needed. The CCF driver will let me remove tons of other legacy stuff as well, and this should be a step towards inclusion of the platform to multiarch builds.
If you find impossible to include this CCF driver to v4.5, please add the first 4 of 5 changes, dt bindings include file is needed to update DTS files independently on CCF driver inclusion status.
Thank you in advance.
Merry Christmas, Happy Holidays!
--
With best wishes,
Vladimir
Michael Turquette
Appliedv2 cover clk: lpc32xx: add clock support for NXP LPC32xx
Quoted 94 lines · Vladimir Zapolskiy
Hi Stephen, Michael,
Quoted 56 lines · Vladimir Zapolskiy
This changeset adds common clock framework driver for NXP LPC32xx boards.
The change can be applied without any dependencies, LPC32xx device tree and mach changes will be done, when this changeset is accepted.
The v1 version of CCF driver can be found here:
http://www.spinics.net/lists/arm-kernel/msg461632.htmlThe RFC version of CCF driver 9/11 can be found here:
http://www.spinics.net/lists/devicetree/msg100583.htmlChanges from v1 to v2:
* removed dependency on the recent LPC32xx device tree changes, also removed LPC32xx device tree and mach changes, which depend on this series,
* use lowercase hex numbers in a DT binding example,
* incremented by 1 all clock values, possibly clock "0" may have a special meaning in future,
* removed explicitCOMMON_CLKselection for NXP LPC18xx,
*LPC32XX_CLK_DEFINE()does not stringify clock names,
* fixed a minor bug inclk_pll_set_rate().Changes from RFC to v1:
* added definitions of a missed IRDA clock,
* renamed compatible property from lpc32xx-scb to lpc32xx-clk
* switched to regmap interface instead of mmio, this is required to secure access to registers shared between pinmux, dma and clock driver, unfortunately this change has to pull some code snippets from common gate, divider and mux helpers rebased on regmap API,
* split clock definitions from the driver to be able to update dts files separately from CCF driver.The driver is written from scratch, here are main functional differences with the legacy driver
arch/arm/mach-lpc32xx/clock.c:
* serialized access to SCB registers,
* reworked routines to select PLL parameters,
* now the clock driver has detailed description of all clocks, the original driver misses several clock entries and most of fine grained clock controls, here every mux and divider are accounted,
* now clocks and clock hierarchies can be described in board DT file,
* sophisticated management of USB clocks, for example now USB device controller needs only one clock instead of USB PLL, USB OTG and USB device clocks,
* other benefits from a driver powered by CCF.Patch 5/5 may produce false positives from checkpatch.pl, the fix to checkpatch is found in Andrew's tree
Vladimir Zapolskiy (5):
dt-bindings: clock: add description of LPC32xx clock controller
dt-bindings: clock: add description of LPC32xx USB clock controller
dt-bindings: clock: add NXP LPC32xx clock list for consumers
clk: lpc18xx: add NXP specificCOMMON_CLK_NXPconfiguration symbol
clk: lpc32xx: add common clock framework driverQuoted 13 lines
.../devicetree/bindings/clock/nxp,lpc3220-clk.txt | 30 + .../bindings/clock/nxp,lpc3220-usb-clk.txt | 22 + drivers/clk/Kconfig | 6 + drivers/clk/Makefile | 2 +- drivers/clk/nxp/Makefile | 1 + drivers/clk/nxp/clk-lpc32xx.c | 1569 ++++++++++++++++++++ include/dt-bindings/clock/lpc32xx-clock.h | 56 + 7 files changed, 1685 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt create mode 100644 drivers/clk/nxp/clk-lpc32xx.c create mode 100644 include/dt-bindings/clock/lpc32xx-clock.hthis is a gentle ping, the first version of the driver was published in October, the only functional change is switching from iomap to regmap API to access the registers.
A couple of words about the change to mitigate your impression of apparently imperfect code.
The NXP LPC32xx platform is unmaintained and broken for about one and a half years, so I presume you won't get an ack from Roland, who is an official maintainer. Adding a CCF driver will be a huge progress, since it allows in +1 kernel release to fix the platform -- there is a critical problem in legacy IRQ handling based on hardware IRQs, irqchip driver change is ready as well, but CCF should go first, because it allows to remove a legacy clocksource/clockevent driver
arch/arm/mach-lpc32xx/timer.c. That driver depends on legacy broken irqchip (hardware IRQs are used, irqchip with virtual IRQs will break the driver), it has a proper replacementdrivers/clocksource/time-lpc32xx.c, but to use the new driver common clock support is needed. The CCF driver will let me remove tons of other legacy stuff as well, and this should be a step towards inclusion of the platform to multiarch builds.
Quoted 3 lines
If you find impossible to include this CCF driver to v4.5, please add the first 4 of 5 changes, dt bindings include file is needed to update DTS files independently on CCF driver inclusion status.
Thanks for the helpful background information.
Applied to clk-next towards 4.5.
Regards,
Mike
Quoted 8 lines
Thank you in advance.
Merry Christmas, Happy Holidays!
--
With best wishes,
Vladimir