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arm: socfpga: set the fpga global bit to disable HPS to FPGA signals

PATCH New dinguyen at opensource.altera.com 4 participants 9 messages Jan 6, 2016 – Jan 8, 2016 FPGA manager framework

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#0 lore raw

PATCH 1/1 arm: socfpga: set the fpga global bit to disable HPS to FPGA signals

From: Dinh Nguyen <[email protected]>

We should be setting the FPGA Interface Group global bit that will correctly disable all interfaces between the FPGA and HPS.

---
 drivers/fpga/socfpga.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/fpga/socfpga.c +1 -1
index 4448250..431e159 100644
@@ -269,7 +269,7 @@ int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size)
 	/* Prior programming the FPGA, all bridges need to be shut off */
 
 	/* Disable all signals from hps peripheral controller to fpga */
-	writel(0, &sysmgr_regs->fpgaintfgrp_module);
+	writel(0, &sysmgr_regs->fpgaintfgrp_gbl);
 
 	/* Disable all signals from FPGA to HPS SDRAM */
 #define SDR_CTRLGRP_FPGAPORTRST_ADDRESS	0x5080
Signature · 1 line
2.6.2
#1 lore raw

PATCH 1/1 arm: socfpga: set the fpga global bit to disable HPS to FPGA signals

Quoted 18 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

We should be setting the FPGA Interface Group global bit that will correctly disable all interfaces between the FPGA and HPS.

---
 drivers/fpga/socfpga.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/fpga/socfpga.c +0 -0
index 4448250..431e159 100644
@@ -269,7 +269,7 @@ int socfpga_load(Altera_desc *desc, const void
 *rbf_data, size_t rbf_size) /* Prior programming the FPGA, all bridges

need to be shut off */

drivers/fpga/socfpga.c int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) · line 275

Quoted 6 lines
drivers/fpga/socfpga.c +1 -1
 	/* Disable all signals from hps peripheral controller to fpga */
-	writel(0, &sysmgr_regs->fpgaintfgrp_module);
+	writel(0, &sysmgr_regs->fpgaintfgrp_gbl);
 
 	/* Disable all signals from FPGA to HPS SDRAM */
 #define SDR_CTRLGRP_FPGAPORTRST_ADDRESS	0x5080

Looks fine,

btw Shouldn't you also fix the same thing in drivers/fpga/socfpga.c ? Even better, can't we have a single function to enable/disable the interfaces?

Best regards,
Marek Vasut

#2 lore raw

PATCH 1/1 arm: socfpga: set the fpga global bit to disable HPS to FPGA signals

Quoted 24 lines · Marek Vasut
Quoted 22 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

We should be setting the FPGA Interface Group global bit that will correctly disable all interfaces between the FPGA and HPS.

---
 drivers/fpga/socfpga.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/fpga/socfpga.c +0 -0
index 4448250..431e159 100644
@@ -269,7 +269,7 @@ int socfpga_load(Altera_desc *desc, const void
 *rbf_data, size_t rbf_size) /* Prior programming the FPGA, all bridges

need to be shut off */

drivers/fpga/socfpga.c +1 -1
 	/* Disable all signals from hps peripheral controller to fpga */
-	writel(0, &sysmgr_regs->fpgaintfgrp_module);
+	writel(0, &sysmgr_regs->fpgaintfgrp_gbl);
Quoted 8 lines
Quoted 2 lines

/* Disable all signals from FPGA to HPS SDRAM */
#define SDR_CTRLGRP_FPGAPORTRST_ADDRESS 0x5080

Looks fine,

btw Shouldn't you also fix the same thing in drivers/fpga/socfpga.c ? Even

I'm confused by what you mean here. The patch is for drivers/fpga/socfpga.c.

Quoted 2 lines

better, can't we have a single function to enable/disable the interfaces?

We probably could, but I don't see a need for other functions to enable/disable the interfaces.

Dinh

#3 lore raw

PATCH 1/1 arm: socfpga: set the fpga global bit to disable HPS to FPGA signals

Quoted 35 lines · Dinh Nguyen
Quoted 34 lines · Marek Vasut

On Wednesday, January 06, 2016 at 08:48:43 PM,
dinguyen at opensource.altera.com

Quoted 19 lines · wrote:

From: Dinh Nguyen <[email protected]>

We should be setting the FPGA Interface Group global bit that will correctly disable all interfaces between the FPGA and HPS.

---

 drivers/fpga/socfpga.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/fpga/socfpga.c +0 -0
index 4448250..431e159 100644
@@ -269,7 +269,7 @@ int socfpga_load(Altera_desc *desc, const void
 *rbf_data, size_t rbf_size) /* Prior programming the FPGA, all bridges

need to be shut off */

drivers/fpga/socfpga.c int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) · line 275

Quoted 8 lines
drivers/fpga/socfpga.c +1 -1
 	/* Disable all signals from hps peripheral controller to fpga */
 
-	writel(0, &sysmgr_regs->fpgaintfgrp_module);
+	writel(0, &sysmgr_regs->fpgaintfgrp_gbl);
 
 	/* Disable all signals from FPGA to HPS SDRAM */
 
 #define SDR_CTRLGRP_FPGAPORTRST_ADDRESS	0x5080

Looks fine,

Quoted 7 lines
Quoted 4 lines

btw Shouldn't you also fix the same thing in drivers/fpga/socfpga.c ? Even

I'm confused by what you mean here. The patch is for drivers/fpga/socfpga.c.

Oops, sorry, there is another one in arch/arm/mach-socfpga/misc.c . I mispasted the wrong filename.

Quoted 6 lines
Quoted 1 line

better, can't we have a single function to enable/disable the interfaces?

We probably could, but I don't see a need for other functions to enable/disable the interfaces.

Dinh

Best regards,
Marek Vasut

#4 lore raw

PATCH 1/1 arm: socfpga: set the fpga global bit to disable HPS to FPGA signals

Quoted 38 lines · Marek Vasut
Quoted 37 lines · Dinh Nguyen
Quoted 36 lines · Marek Vasut

On Wednesday, January 06, 2016 at 08:48:43 PM,
dinguyen at opensource.altera.com

Quoted 19 lines · wrote:

From: Dinh Nguyen <[email protected]>

We should be setting the FPGA Interface Group global bit that will correctly disable all interfaces between the FPGA and HPS.

---

 drivers/fpga/socfpga.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/fpga/socfpga.c +0 -0
index 4448250..431e159 100644
@@ -269,7 +269,7 @@ int socfpga_load(Altera_desc *desc, const void
 *rbf_data, size_t rbf_size) /* Prior programming the FPGA, all bridges

need to be shut off */

drivers/fpga/socfpga.c int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) · line 275

Quoted 8 lines
drivers/fpga/socfpga.c +1 -1
 	/* Disable all signals from hps peripheral controller to fpga */
 
-	writel(0, &sysmgr_regs->fpgaintfgrp_module);
+	writel(0, &sysmgr_regs->fpgaintfgrp_gbl);
 
 	/* Disable all signals from FPGA to HPS SDRAM */
 
 #define SDR_CTRLGRP_FPGAPORTRST_ADDRESS	0x5080

Looks fine,

Quoted 9 lines
Quoted 5 lines
Quoted 2 lines

btw Shouldn't you also fix the same thing in drivers/fpga/socfpga.c ? Even

I'm confused by what you mean here. The patch is for drivers/fpga/socfpga.c.

Oops, sorry, there is another one in arch/arm/mach-socfpga/misc.c . I mispasted the wrong filename.

Ah yes, then we should probably add a function to enable/disable the interfaces.

Dinh

#5 lore raw

PATCH 1/1 arm: socfpga: set the fpga global bit to disable HPS to FPGA signals

Quoted 42 lines · Dinh Nguyen
Quoted 41 lines · Marek Vasut
Quoted 40 lines · Dinh Nguyen
Quoted 38 lines · Marek Vasut

On Wednesday, January 06, 2016 at 08:48:43 PM,
dinguyen at opensource.altera.com

Quoted 19 lines · wrote:

From: Dinh Nguyen <[email protected]>

We should be setting the FPGA Interface Group global bit that will correctly disable all interfaces between the FPGA and HPS.

---

 drivers/fpga/socfpga.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/fpga/socfpga.c +0 -0
index 4448250..431e159 100644
@@ -269,7 +269,7 @@ int socfpga_load(Altera_desc *desc, const void
 *rbf_data, size_t rbf_size) /* Prior programming the FPGA, all bridges

need to be shut off */

drivers/fpga/socfpga.c int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) · line 275

Quoted 8 lines
drivers/fpga/socfpga.c +1 -1
 	/* Disable all signals from hps peripheral controller to fpga */
 
-	writel(0, &sysmgr_regs->fpgaintfgrp_module);
+	writel(0, &sysmgr_regs->fpgaintfgrp_gbl);
 
 	/* Disable all signals from FPGA to HPS SDRAM */
 
 #define SDR_CTRLGRP_FPGAPORTRST_ADDRESS	0x5080

Looks fine,

btw Shouldn't you also fix the same thing in drivers/fpga/socfpga.c ? Even

Quoted 8 lines
Quoted 5 lines
Quoted 2 lines

I'm confused by what you mean here. The patch is for drivers/fpga/socfpga.c.

Oops, sorry, there is another one in arch/arm/mach-socfpga/misc.c . I mispasted the wrong filename.

Ah yes, then we should probably add a function to enable/disable the interfaces.

Yes, it might make sense to unify the code a bit.

Best regards,
Marek Vasut

#6 lore raw

PATCH 1/1 arm: socfpga: set the fpga global bit to disable HPS to FPGA signals

In reply to Dinh Nguyen
Quoted 47 lines · Dinh Nguyen
Quoted 44 lines · Marek Vasut
Quoted 42 lines · Dinh Nguyen
Quoted 30 lines · Marek Vasut

On Wednesday, January 06, 2016 at 08:48:43 PM,
dinguyen at opensource.altera.com

Quoted 26 lines · wrote:

From: Dinh Nguyen <[email protected]>

We should be setting the FPGA Interface Group global bit that will correctly disable all interfaces between the FPGA and HPS.

---

 drivers/fpga/socfpga.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/fpga/socfpga.c +0 -0
index 4448250..431e159 100644
@@ -269,7 +269,7 @@ int socfpga_load(Altera_desc *desc, const void
 *rbf_data, size_t rbf_size) /* Prior programming the FPGA, all bridges

need to be shut off */

drivers/fpga/socfpga.c +1 -1
 	/* Disable all signals from hps peripheral controller to fpga */
 
-	writel(0, &sysmgr_regs->fpgaintfgrp_module);
+	writel(0, &sysmgr_regs->fpgaintfgrp_gbl);
 
 	/* Disable all signals from FPGA to HPS SDRAM */
Quoted 8 lines
Quoted 1 line

#define SDR_CTRLGRP_FPGAPORTRST_ADDRESS 0x5080

Looks fine,

btw Shouldn't you also fix the same thing in drivers/fpga/socfpga.c ? Even

I'm confused by what you mean here. The patch is for drivers/fpga/socfpga.c.

Quoted 7 lines
Quoted 3 lines

Oops, sorry, there is another one in arch/arm/mach-socfpga/misc.c . I mispasted the wrong filename.

Ah yes, then we should probably add a function to enable/disable the interfaces.

But I wonder if I wanted to enable the individual interfaces, i.e. the separate EMACs that is in fpgaintfgrp_module, would I need to enable the fpgaintfgrp_gbl bit?

Dinh

#7 lore raw

PATCH 1/1 arm: socfpga: set the fpga global bit to disable HPS to FPGA signals

Quoted 49 lines · Dinh Nguyen
Quoted 48 lines · Dinh Nguyen
Quoted 46 lines · Marek Vasut
Quoted 35 lines · Dinh Nguyen
Quoted 34 lines · Marek Vasut

On Wednesday, January 06, 2016 at 08:48:43 PM,
dinguyen at opensource.altera.com

Quoted 19 lines · wrote:

From: Dinh Nguyen <[email protected]>

We should be setting the FPGA Interface Group global bit that will correctly disable all interfaces between the FPGA and HPS.

---

 drivers/fpga/socfpga.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/fpga/socfpga.c +0 -0
index 4448250..431e159 100644
@@ -269,7 +269,7 @@ int socfpga_load(Altera_desc *desc, const void
 *rbf_data, size_t rbf_size) /* Prior programming the FPGA, all

bridges need to be shut off */

drivers/fpga/socfpga.c int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) · line 275

Quoted 8 lines
drivers/fpga/socfpga.c +1 -1
 	/* Disable all signals from hps peripheral controller to fpga */
 
-	writel(0, &sysmgr_regs->fpgaintfgrp_module);
+	writel(0, &sysmgr_regs->fpgaintfgrp_gbl);
 
 	/* Disable all signals from FPGA to HPS SDRAM */
 
 #define SDR_CTRLGRP_FPGAPORTRST_ADDRESS	0x5080

Looks fine,

Quoted 7 lines
Quoted 4 lines

btw Shouldn't you also fix the same thing in drivers/fpga/socfpga.c ? Even

I'm confused by what you mean here. The patch is for drivers/fpga/socfpga.c.

Oops, sorry, there is another one in arch/arm/mach-socfpga/misc.c . I mispasted the wrong filename.

Quoted 6 lines
Quoted 2 lines

Ah yes, then we should probably add a function to enable/disable the interfaces.

But I wonder if I wanted to enable the individual interfaces, i.e. the separate EMACs that is in fpgaintfgrp_module, would I need to enable the fpgaintfgrp_gbl bit?

Aren't you the one working for Altera? You're the one who should know the best :-) But I think this gbl bit is like the top-level killswitch, so you need to enable this one and only then you can fine-tune config of the subblocks (like the EMACs etc).

Best regards,
Marek Vasut

#8 lore raw

PATCH 1/1 arm: socfpga: set the fpga global bit to disable HPS to FPGA signals

Quoted 70 lines · Marek Vasut
Quoted 63 lines · Dinh Nguyen
Quoted 54 lines · Dinh Nguyen
Quoted 53 lines · Marek Vasut
Quoted 50 lines · Dinh Nguyen
Quoted 41 lines · Marek Vasut

On Wednesday, January 06, 2016 at 08:48:43 PM,
dinguyen at opensource.altera.com

Quoted 28 lines · wrote:

From: Dinh Nguyen <[email protected]>

We should be setting the FPGA Interface Group global bit that will
correctly disable all interfaces between the FPGA and HPS.

Signed-off-by: Dinh Nguyen <
dinguyen at opensource.altera.com>
---

 drivers/fpga/socfpga.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/fpga/socfpga.c +0 -0
index 4448250..431e159 100644
@@ -269,7 +269,7 @@ int socfpga_load(Altera_desc *desc,

const void
*rbf_data, size_t rbf_size) /* Prior programming the FPGA, all
bridges need to be shut off */

/* Disable all signals from hps peripheral
controller to fpga */

drivers/fpga/socfpga.c

Quoted 6 lines
drivers/fpga/socfpga.c +1 -1
-	writel(0, &sysmgr_regs->fpgaintfgrp_module);
+	writel(0, &sysmgr_regs->fpgaintfgrp_gbl);
 
 	/* Disable all signals from FPGA to HPS SDRAM */
 
 #define SDR_CTRLGRP_FPGAPORTRST_ADDRESS	0x5080

Looks fine,

Quoted 5 lines

btw Shouldn't you also fix the same thing in
drivers/fpga/socfpga.c ?
Even

I'm confused by what you mean here. The patch is for drivers/fpga/socfpga.c.

Quoted 7 lines
Quoted 3 lines

Oops, sorry, there is another one in arch/arm/mach -socfpga/misc.c . I
mispasted the wrong filename.

Ah yes, then we should probably add a function to enable/disable the
interfaces.

Quoted 5 lines

But I wonder if I wanted to enable the individual interfaces, i.e. the
separate EMACs that is in fpgaintfgrp_module, would I need to enable the
fpgaintfgrp_gbl bit?

Quoted 7 lines

Aren't you the one working for Altera? You're the one who should know the best
:-) But I think this gbl bit is like the top-level killswitch, so you need to
enable this one and only then you can fine-tune config of the subblocks (like
the EMACs etc).

We would need to enable the global bit to have the individual interface works. Each interface enable signal is a result of AND between indvidual enable register and global enable register.

Thanks
Chin Liang

Quoted 3 lines

Best regards,
Marek Vasut