Change DM_SEQ_ALIAS to be configurable for SPL

PATCH New Nathan Rossi 4 participants 8 messages Jan 7, 2016 – Jan 11, 2016

Subsystems (2)

Arm (32-bit) Arm/Zynq architecture

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Nathan Rossi

author

2016-01-07 17:00 UTC #0 lore raw

v3 cover Change DM_SEQ_ALIAS to be configurable for SPL

Add a config option for SPL_DM_SEQ_ALIAS and enable it for the Zynq targets which require it for SPI flash support in SPL.

Changes in v2:
* Add patches to enable the config for mvebu and socfpga targets.

Changes in v3:
* Removed de0nano and mcvevk boards from socfpga config patch

Nathan Rossi (4):
spl: dm: Add SPL_DM_SEQ_ALIAS config option
arm: zynq: Enable SPL_DM_SEQ_ALIAS for all Zynq configs
arm: mvebu: Select SPL_DM_SEQ_ALIAS
arm: socfpga: Enable SPL_DM_SEQ_ALIAS for all SOCFPGA configs

 arch/arm/Kconfig                   | 1 +
 configs/socfpga_arria5_defconfig   | 1 +
 configs/socfpga_cyclone5_defconfig | 1 +
 configs/socfpga_sockit_defconfig   | 1 +
 configs/socfpga_socrates_defconfig | 1 +
 configs/socfpga_sr1500_defconfig   | 1 +
 configs/zynq_microzed_defconfig    | 1 +
 configs/zynq_picozed_defconfig     | 1 +
 configs/zynq_zc702_defconfig       | 1 +
 configs/zynq_zc706_defconfig       | 1 +
 configs/zynq_zc770_xm010_defconfig | 1 +
 configs/zynq_zc770_xm011_defconfig | 1 +
 configs/zynq_zc770_xm012_defconfig | 1 +
 configs/zynq_zc770_xm013_defconfig | 1 +
 configs/zynq_zed_defconfig         | 1 +
 configs/zynq_zybo_defconfig        | 1 +
 drivers/core/Kconfig               | 9 +++++++++
 drivers/core/device.c              | 2 +-
 include/config_uncmd_spl.h         | 1 -
 include/configs/socfpga_common.h   | 1 -
 20 files changed, 26 insertions(+), 3 deletions(-)

Signature · 1 line

2.6.4

Nathan Rossi

author

2016-01-07 17:00 UTC #1 lore raw

PATCH v3 1/4 spl: dm: Add SPL_DM_SEQ_ALIAS config option

The Device Model sequence alias feature is required by some Uclasses. Instead of disabling the feature for all SPL targets allow it to be configured.

The config option is disabled by default to reduce code size for targets that are not interested or do not require this feature.

Signed-off-by Nathan Rossi <[email protected]>

Acked-by Simon Glass <[email protected]>

Acked-by Michal Simek <[email protected]>

Cc Simon Glass <[email protected]>

Cc Masahiro Yamada <[email protected]>

Cc Linus Walleij <[email protected]>

Cc Marek Vasut <[email protected]>

Cc Michal Simek <[email protected]>

Cc Stefan Roese <[email protected]>

---
v2: no changes.
v3: no changes.

---
 drivers/core/Kconfig       | 9 +++++++++
 drivers/core/device.c      | 2 +-
 include/config_uncmd_spl.h | 1 -
 3 files changed, 10 insertions(+), 2 deletions(-)

drivers/core/Kconfig +9 -0

index f332480..c5c9d2a 100644
@@ -60,6 +60,15 @@ config DM_SEQ_ALIAS
 	help
 	  Most boards will have a '/aliases' node containing the path to
 	  numbered devices (e.g. serial0 = &serial0). This feature can be
+	  disabled if it is not required.
+
+config SPL_DM_SEQ_ALIAS
+	bool "Support numbered aliases in device tree in SPL"
+	depends on DM
+	default n
+	help
+	  Most boards will have a '/aliases' node containing the path to
+	  numbered devices (e.g. serial0 = &serial0). This feature can be
 	  disabled if it is not required, to save code space in SPL.
 
 config REGMAP

drivers/core/device.c +1 -1

index 758f390..b237b88 100644
@@ -64,7 +64,7 @@ int device_bind(struct udevice *parent, const struct driver *drv,
 
 	dev->seq = -1;
 	dev->req_seq = -1;
-	if (CONFIG_IS_ENABLED(OF_CONTROL) && IS_ENABLED(CONFIG_DM_SEQ_ALIAS)) {
+	if (CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(DM_SEQ_ALIAS)) {
 		/*
 		* Some devices, such as a SPI bus, I2C bus and serial ports
 		* are numbered using aliases.

include/config_uncmd_spl.h +0 -1

index 6e299f6..3b198ae 100644
@@ -29,7 +29,6 @@
 #endif
 
 #undef CONFIG_DM_WARN
-#undef CONFIG_DM_SEQ_ALIAS
 #undef CONFIG_DM_STDIO
 
 #endif /* CONFIG_SPL_BUILD */

Signature · 1 line

2.6.4

Nathan Rossi

author

2016-01-07 17:00 UTC #2 lore raw

PATCH v3 2/4 arm: zynq: Enable SPL_DM_SEQ_ALIAS for all Zynq configs

In reply to Nathan Rossi

This feature is required in SPL to enable support for loading from SPI flash when the device is booted from QSPI.

Signed-off-by Nathan Rossi <[email protected]>

Cc Michal Simek <[email protected]>

---
v2: no changes.
v3: no changes.

---
 configs/zynq_microzed_defconfig    | 1 +
 configs/zynq_picozed_defconfig     | 1 +
 configs/zynq_zc702_defconfig       | 1 +
 configs/zynq_zc706_defconfig       | 1 +
 configs/zynq_zc770_xm010_defconfig | 1 +
 configs/zynq_zc770_xm011_defconfig | 1 +
 configs/zynq_zc770_xm012_defconfig | 1 +
 configs/zynq_zc770_xm013_defconfig | 1 +
 configs/zynq_zed_defconfig         | 1 +
 configs/zynq_zybo_defconfig        | 1 +
 10 files changed, 10 insertions(+)

configs/zynq_microzed_defconfig +1 -0

index e577c93..5420f83 100644
@@ -3,6 +3,7 @@ CONFIG_ARCH_ZYNQ=y
 CONFIG_TARGET_ZYNQ_MICROZED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynq-microzed"
 CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y

configs/zynq_picozed_defconfig +1 -0

index 7d52d8e..152d26b 100644
@@ -3,6 +3,7 @@ CONFIG_ARCH_ZYNQ=y
 CONFIG_TARGET_ZYNQ_PICOZED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynq-picozed"
 CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y

configs/zynq_zc702_defconfig +1 -0

index 9d1b40d..9328196 100644
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc702"
 CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y

configs/zynq_zc706_defconfig +1 -0

index bba91df..724c386 100644
@@ -3,6 +3,7 @@ CONFIG_ARCH_ZYNQ=y
 CONFIG_TARGET_ZYNQ_ZC706=y
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706"
 CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y

configs/zynq_zc770_xm010_defconfig +1 -0

index 96f0a79..62c1cb1 100644
@@ -3,6 +3,7 @@ CONFIG_ARCH_ZYNQ=y
 CONFIG_TARGET_ZYNQ_ZC770=y
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm010"
 CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y

configs/zynq_zc770_xm011_defconfig +1 -0

index b0c535e..db43987 100644
@@ -3,6 +3,7 @@ CONFIG_ARCH_ZYNQ=y
 CONFIG_TARGET_ZYNQ_ZC770=y
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm011"
 CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y

configs/zynq_zc770_xm012_defconfig +1 -0

index 7fb03eb..24a50a3 100644
@@ -3,6 +3,7 @@ CONFIG_ARCH_ZYNQ=y
 CONFIG_TARGET_ZYNQ_ZC770=y
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm012"
 CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y

configs/zynq_zc770_xm013_defconfig +1 -0

index 6766512..ab692af 100644
@@ -3,6 +3,7 @@ CONFIG_ARCH_ZYNQ=y
 CONFIG_TARGET_ZYNQ_ZC770=y
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm013"
 CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y

configs/zynq_zed_defconfig +1 -0

index 058bb05..5ee8c07 100644
@@ -3,6 +3,7 @@ CONFIG_ARCH_ZYNQ=y
 CONFIG_TARGET_ZYNQ_ZED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zed"
 CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y

configs/zynq_zybo_defconfig +1 -0

index 231483e..2f11494 100644
@@ -3,6 +3,7 @@ CONFIG_ARCH_ZYNQ=y
 CONFIG_TARGET_ZYNQ_ZYBO=y
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zybo"
 CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y

Signature · 1 line

2.6.4

Nathan Rossi

author

2016-01-07 17:00 UTC #3 lore raw

PATCH v3 3/4 arm: mvebu: Select SPL_DM_SEQ_ALIAS

In reply to Nathan Rossi

Select SPL_DM_SEQ_ALIAS which is required for certain uclasses, specifically SPI Flash.

Signed-off-by Nathan Rossi <[email protected]>

Reviewed-by Stefan Roese <[email protected]>

Cc Albert Aribaud <[email protected]>

Cc Stefan Roese <[email protected]>

---
v2: Added this patch
v3: no changes.

---
 arch/arm/Kconfig | 1 +
 1 file changed, 1 insertion(+)

arch/arm/Kconfig +1 -0

index 9bd6cf1..52b300d 100644
@@ -118,6 +118,7 @@ config ARCH_MVEBU
 	select OF_SEPARATE
 	select DM
 	select DM_SERIAL
+	select SPL_DM_SEQ_ALIAS
 
 config TARGET_DEVKIT3250
 	bool "Support devkit3250"

Signature · 1 line

2.6.4

Stefan Roese

2016-01-11 09:23 UTC #4 lore raw

PATCH v3 3/4 arm: mvebu: Select SPL_DM_SEQ_ALIAS

Quoted 20 lines · Nathan Rossi

Select SPL_DM_SEQ_ALIAS which is required for certain uclasses, specifically SPI Flash.
Signed-off-by Nathan Rossi <[email protected]>
Reviewed-by Stefan Roese <[email protected]>
Cc Albert Aribaud <[email protected]>
Cc Stefan Roese <[email protected]>
---
v2: Added this patch
v3: no changes.
---
  arch/arm/Kconfig | 1 +
  1 file changed, 1 insertion(+)
arch/arm/Kconfig +0 -0
index 9bd6cf1..52b300d 100644

arch/arm/Kconfig config ARCH_MVEBU · line 124

Quoted 7 lines

arch/arm/Kconfig +1 -0

@@ -118,6 +118,7 @@ config ARCH_MVEBU
  	select OF_SEPARATE
  	select DM
  	select DM_SERIAL
+	select SPL_DM_SEQ_ALIAS
 
  config TARGET_DEVKIT3250
  	bool "Support devkit3250"

Acked-by Stefan Roese <[email protected]>

Michal, please feel free to pull this via your repo if you like.

Thanks,
Stefan

Nathan Rossi

author

2016-01-07 17:00 UTC #5 lore raw

PATCH v3 4/4 arm: socfpga: Enable SPL_DM_SEQ_ALIAS for all SOCFPGA configs

In reply to Nathan Rossi

This feature is required in SPL to enable support for loading from SPI flash.

Also clean up the #define in socfpga_common.h.

Signed-off-by Nathan Rossi <[email protected]>

Reviewed-by Stefan Roese <[email protected]>

Cc Dinh Nguyen <[email protected]>

Cc Chin-Liang See <[email protected]>

Cc Marek Vasut <[email protected]>

Cc Stefan Roese <[email protected]>

---
v2: Added this patch
v3: Dropped config enablement for de0nano and mcvevk boards

---
 configs/socfpga_arria5_defconfig   | 1 +
 configs/socfpga_cyclone5_defconfig | 1 +
 configs/socfpga_sockit_defconfig   | 1 +
 configs/socfpga_socrates_defconfig | 1 +
 configs/socfpga_sr1500_defconfig   | 1 +
 include/configs/socfpga_common.h   | 1 -
 6 files changed, 5 insertions(+), 1 deletion(-)

configs/socfpga_arria5_defconfig +1 -0

index 68d12df..6e8976f 100644
@@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
 CONFIG_SPL_STACK_R_ADDR=0x00800000
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"
 CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SPL_STACK_R=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

configs/socfpga_cyclone5_defconfig +1 -0

index accee92..e31aa71 100644
@@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
 CONFIG_SPL_STACK_R_ADDR=0x00800000
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"
 CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SPL_STACK_R=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

configs/socfpga_sockit_defconfig +1 -0

index b4f41a9..59fbb2c 100644
@@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y
 CONFIG_SPL_STACK_R_ADDR=0x00800000
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit"
 CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SPL_STACK_R=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

configs/socfpga_socrates_defconfig +1 -0

index fe940f9..aaba8cb 100644
@@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y
 CONFIG_SPL_STACK_R_ADDR=0x00800000
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates"
 CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SPL_STACK_R=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

configs/socfpga_sr1500_defconfig +1 -0

index 3d98a63..a4f0835 100644
@@ -6,6 +6,7 @@ CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_SR1500=y
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
 CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_ADDR=0x00800000
 # CONFIG_CMD_IMLS is not set

include/configs/socfpga_common.h +0 -1

index a09e906..8de0ab9 100644
@@ -370,7 +370,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 
 /* SPL QSPI boot support */
 #ifdef CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_DM_SEQ_ALIAS		1
 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 #define CONFIG_SPL_SPI_LOAD
 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x40000

Signature · 1 line

2.6.4

Marek Vasut

2016-01-07 17:05 UTC #6 lore raw

PATCH v3 4/4 arm: socfpga: Enable SPL_DM_SEQ_ALIAS for all SOCFPGA configs

Quoted 9 lines · Nathan Rossi

This feature is required in SPL to enable support for loading from SPI flash.
Also clean up the #define in socfpga_common.h.
Signed-off-by Nathan Rossi <[email protected]>
Reviewed-by Stefan Roese <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Chin-Liang See <[email protected]>

Acked: Marek Vasut <[email protected]>

Quoted 1 line

Cc Stefan Roese <[email protected]>

[..]

Thanks!

Best regards,
Marek Vasut

Michal Simek

2016-01-11 09:26 UTC #7 lore raw

v3 cover Change DM_SEQ_ALIAS to be configurable for SPL

In reply to Nathan Rossi

Quoted 28 lines · Nathan Rossi

Add a config option for SPL_DM_SEQ_ALIAS and enable it for the Zynq targets which require it for SPI flash support in SPL.
Changes in v2:
* Add patches to enable the config for mvebu and socfpga targets.
Changes in v3:
* Removed de0nano and mcvevk boards from socfpga config patch
Nathan Rossi (4):
spl: dm: Add SPL_DM_SEQ_ALIAS config option
arm: zynq: Enable SPL_DM_SEQ_ALIAS for all Zynq configs
arm: mvebu: Select SPL_DM_SEQ_ALIAS
arm: socfpga: Enable SPL_DM_SEQ_ALIAS for all SOCFPGA configs
 arch/arm/Kconfig                   | 1 +
 configs/socfpga_arria5_defconfig   | 1 +
 configs/socfpga_cyclone5_defconfig | 1 +
 configs/socfpga_sockit_defconfig   | 1 +
 configs/socfpga_socrates_defconfig | 1 +
 configs/socfpga_sr1500_defconfig   | 1 +
 configs/zynq_microzed_defconfig    | 1 +
 configs/zynq_picozed_defconfig     | 1 +
 configs/zynq_zc702_defconfig       | 1 +
 configs/zynq_zc706_defconfig       | 1 +
 configs/zynq_zc770_xm010_defconfig | 1 +
 configs/zynq_zc770_xm011_defconfig | 1 +
 configs/zynq_zc770_xm012_defconfig | 1 +

Quoted 9 lines

 configs/zynq_zc770_xm013_defconfig | 1 +
 configs/zynq_zed_defconfig         | 1 +
 configs/zynq_zybo_defconfig        | 1 +
 drivers/core/Kconfig               | 9 +++++++++
 drivers/core/device.c              | 2 +-
 include/config_uncmd_spl.h         | 1 -
 include/configs/socfpga_common.h   | 1 -
 20 files changed, 26 insertions(+), 3 deletions(-)

Applied whole series to my tree and will send PR to Tom when merge window is open.

Thanks,
Michal

Signature · 14 lines

Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


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