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Third Round of Renesas ARM64 Based SoC DT Updates for v4.5

GIT PULL New Simon Horman 7 participants 20 messages Dec 18, 2015 – Jan 12, 2016

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#0 lore raw

Hi Olof, Hi Kevin, Hi Arnd,

Please consider these third round of Renesas ARM64 based SoC DT updates for v4.5.

This pull request is based on the previous round of such requests, tagged as renesas-arm64-dt2-for-v4.5, which you have already pulled.

The following changes since commit 672b79312c04016481a11d4b996b4512207ffbd3:

arm64: renesas: salvator-x: Sound DVC support (2015-11-26 11:31:43 +0900)

are available in the git repository at:

git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-dt3-for-v4.5

for you to fetch changes up to 2eb2b5066197eab00c55dcd1132f17836e4975b2:

arm64: renesas: r8a7795: fix SATA clock assignment (2015-12-18 10:07:29 +0900)

----------------------------------------------------------------
Third Round of Renesas ARM64 Based SoC DT Updates for v4.5

* Enable SATA
* Add salvator-x part number to DT bindings documentation
* Enable all four A57 cores instead of just one
* Enhanced audio support:
- Use CS2000 as AUDIO_CLK_B
- Set ak4613 In/Out pin as single-end

----------------------------------------------------------------
Gaku Inami (2):

      arm64: dts: r8a7795: Add PSCI node
      arm64: dts: r8a7795: Add Cortex-A57 CPU cores

Geert Uytterhoeven (1):
arm64: renesas: salvator-x: Add board part number to DT bindings

Kouei Abe (2):
arm64: dts: r8a7795: Add SATA controller node
arm64: dts: salvator-x: Enable SATA controller

Kuninori Morimoto (2):
arm64: renesas: salvator-x: set ak4613 In/Out pin as single-end
arm64: renesas: salvator-x: use CS2000 as AUDIO_CLK_B

Ulrich Hecht (1):
arm64: renesas: r8a7795: fix SATA clock assignment

Wolfram Sang (1):
arm64: renesas: r8a7795: add internal delay for i2c IPs

Yoshifumi Hosoya (1):
arm64: dts: r8a7795: Add pmu device nodes

 Documentation/devicetree/bindings/arm/shmobile.txt |  2 +-
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 51 +++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a7795.dtsi           | 64 ++++++++++++++++++++--
 3 files changed, 110 insertions(+), 7 deletions(-)
#1 lore raw

PATCH 1/10 arm64: renesas: salvator-x: set ak4613 In/Out pin as single-end

From: Kuninori Morimoto <[email protected]>

---
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 9 +++++++++
 1 file changed, 9 insertions(+)
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts +9 -0
index c5f709e7c0ba..beeacfaf18d0 100644
@@ -141,6 +141,15 @@
 		#sound-dai-cells = <0>;
 		reg = <0x10>;
 		clocks = <&rcar_sound 3>;
+
+		asahi-kasei,in1-single-end;
+		asahi-kasei,in2-single-end;
+		asahi-kasei,out1-single-end;
+		asahi-kasei,out2-single-end;
+		asahi-kasei,out3-single-end;
+		asahi-kasei,out4-single-end;
+		asahi-kasei,out5-single-end;
+		asahi-kasei,out6-single-end;
 	};
 };
 
Signature · 1 line
2.1.4
#2 lore raw

PATCH 2/10 arm64: renesas: salvator-x: use CS2000 as AUDIO_CLK_B

In reply to Simon Horman

From: Kuninori Morimoto <[email protected]>

CS2000 needs AUDIO_CLKOUT as master clock which is generated by Renesas sound, and Renesas sound needs CS2000 as ADUIO_CLK_B. Because of this relationship, it will be dead-lock when driver probe.

cs2000: clk_multiplier at 4f {
        ...
        clocks = <&rcar_sound 0>, <&x12_clk>;
        ...
};
&rcar_sound {
        ...
        assigned-clocks = <&cs2000>;
        ...
};

This patch is using dummy audio_clkout to avoid this issue.

---
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 38 ++++++++++++++++++++++
 1 file changed, 38 insertions(+)
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts +38 -0
index beeacfaf18d0..75af5ec5a4d4 100644
@@ -61,6 +61,16 @@
 		clock-frequency = <24576000>;
 	};
 
+	audio_clkout: audio_clkout {
+		/*
+		 * This is same as <&rcar_sound 0>
+		 * but needed to avoid cs2000/rcar_sound probe dead-lock
+		 */
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <11289600>;
+	};
+
 	rsnd_ak4613: sound {
 		compatible = "simple-audio-card";
 
@@ -151,6 +161,17 @@
 		asahi-kasei,out5-single-end;
 		asahi-kasei,out6-single-end;
 	};
+
+	cs2000: clk_multiplier at 4f {
+		#clock-cells = <0>;
+		compatible = "cirrus,cs2000-cp";
+		reg = <0x4f>;
+		clocks = <&audio_clkout>, <&x12_clk>;
+		clock-names = "clk_in", "ref_clk";
+
+		assigned-clocks = <&cs2000>;
+		assigned-clock-rates = <24576000>; /* 1/1 divide */
+	};
 };
 
 &rcar_sound {
@@ -166,6 +187,23 @@
 
 	status = "okay";
 
+	/* update <audio_clk_b> to <cs2000> */
+	clocks = <&cpg CPG_MOD 1005>,
+		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+		 <&audio_clk_a>, <&cs2000>,
+		 <&audio_clk_c>,
+		 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
+
 	rcar_sound,dai {
 		dai0 {
 			playback = <&ssi0 &src0 &dvc0>;
Signature · 1 line
2.1.4
#3 lore raw

PATCH 3/10 arm64: dts: r8a7795: Add PSCI node

In reply to Simon Horman

From: Gaku Inami <[email protected]>

Add PSCI node for r8a7795 SoC, and cpu node enable-method property is set to "psci".

---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)
arch/arm64/boot/dts/renesas/r8a7795.dtsi +6 -0
index b1902ea1dae4..051ff143506e 100644
@@ -26,6 +26,11 @@
 		i2c6 = &i2c6;
 	};
 
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -35,6 +40,7 @@
 			compatible = "arm,cortex-a57", "arm,armv8";
 			reg = <0x0>;
 			device_type = "cpu";
+			enable-method = "psci";
 		};
 	};
 
Signature · 1 line
2.1.4
#4 lore raw

PATCH 4/10 arm64: dts: r8a7795: Add Cortex-A57 CPU cores

In reply to Simon Horman

From: Gaku Inami <[email protected]>

Add Cortex-A57 CPU cores to r8a7795 SoC for a total of 4 x Cortex-A57.

---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 31 +++++++++++++++++++++++++------
 1 file changed, 25 insertions(+), 6 deletions(-)
arch/arm64/boot/dts/renesas/r8a7795.dtsi +25 -6
index 051ff143506e..4d43cf31418f 100644
@@ -35,13 +35,31 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		/* 1 core only at this point */
 		a57_0: cpu at 0 {
 			compatible = "arm,cortex-a57", "arm,armv8";
 			reg = <0x0>;
 			device_type = "cpu";
 			enable-method = "psci";
 		};
+
+		a57_1: cpu at 1 {
+			compatible = "arm,cortex-a57","arm,armv8";
+			reg = <0x1>;
+			device_type = "cpu";
+			enable-method = "psci";
+		};
+		a57_2: cpu at 2 {
+			compatible = "arm,cortex-a57","arm,armv8";
+			reg = <0x2>;
+			device_type = "cpu";
+			enable-method = "psci";
+		};
+		a57_3: cpu at 3 {
+			compatible = "arm,cortex-a57","arm,armv8";
+			reg = <0x3>;
+			device_type = "cpu";
+			enable-method = "psci";
+		};
 	};
 
 	extal_clk: extal {
@@ -84,6 +102,7 @@
 	soc {
 		compatible = "simple-bus";
 		interrupt-parent = <&gic>;
+
 		#address-cells = <2>;
 		#size-cells = <2>;
 		ranges;
@@ -96,7 +115,7 @@
 			reg = <0x0 0xf1010000 0 0x1000>,
 			      <0x0 0xf1020000 0 0x2000>;
 			interrupts = <GIC_PPI 9
-					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
+					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 		};
 
 		gpio0: gpio at e6050000 {
@@ -214,13 +233,13 @@
 		timer {
 			compatible = "arm,armv8-timer";
 			interrupts = <GIC_PPI 13
-					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 				     <GIC_PPI 14
-					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 				     <GIC_PPI 11
-					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 				     <GIC_PPI 10
-					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
+					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 		};
 
 		cpg: clock-controller at e6150000 {
Signature · 1 line
2.1.4
#5 lore raw

PATCH 5/10 arm64: dts: r8a7795: Add pmu device nodes

In reply to Simon Horman

From: Yoshifumi Hosoya <[email protected]>

Enabling the performance monitor unit on r8a7795.

---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/arm64/boot/dts/renesas/r8a7795.dtsi +12 -0
index 4d43cf31418f..b9229a49dabc 100644
@@ -230,6 +230,18 @@
 			power-domains = <&cpg>;
 		};
 
+		pmu {
+			compatible = "arm,armv8-pmuv3";
+			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-affinity = <&a57_0>,
+					     <&a57_1>,
+					     <&a57_2>,
+					     <&a57_3>;
+		};
+
 		timer {
 			compatible = "arm,armv8-timer";
 			interrupts = <GIC_PPI 13
Signature · 1 line
2.1.4
#6 lore raw

PATCH 5/10 arm64: dts: r8a7795: Add pmu device nodes

Quoted 17 lines · Simon Horman

From: Yoshifumi Hosoya <[email protected]>

Enabling the performance monitor unit on r8a7795.

---
  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 12 ++++++++++++
  1 file changed, 12 insertions(+)
arch/arm64/boot/dts/renesas/r8a7795.dtsi +0 -0
index 4d43cf31418f..b9229a49dabc 100644

arch/arm64/boot/dts/renesas/r8a7795.dtsi line 234

Quoted 5 lines
arch/arm64/boot/dts/renesas/r8a7795.dtsi +2 -0
@@ -230,6 +230,18 @@
  			power-domains = <&cpg>;
  		};
 
+		pmu {
+			compatible = "arm,armv8-pmuv3";

Please use arm,cortex-a57-pmu to be more specific. IIRC I mentioned this for some shmobile platform recently.

Signature · 2 lines
Regards,
Sudeep
#7 lore raw

PATCH 5/10 arm64: dts: r8a7795: Add pmu device nodes

Quoted 24 lines · Sudeep Holla
Quoted 21 lines · Simon Horman

From: Yoshifumi Hosoya <[email protected]>

Enabling the performance monitor unit on r8a7795.

---
  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 12 ++++++++++++
  1 file changed, 12 insertions(+)
arch/arm64/boot/dts/renesas/r8a7795.dtsi +0 -0
index 4d43cf31418f..b9229a49dabc 100644
@@ -230,6 +230,18 @@
              power-domains = <&cpg>;
          };
 
Quoted 5 lines

arch/arm64/boot/dts/renesas/r8a7795.dtsi line 234

Quoted 2 lines
arch/arm64/boot/dts/renesas/r8a7795.dtsi +2 -0
+        pmu {
+            compatible = "arm,armv8-pmuv3";

Please use arm,cortex-a57-pmu to be more specific. IIRC I mentioned this for some shmobile platform recently.

Yes. But as this patch has been applied already to some branches, I incorporated your a57-pmu hint with an additional update patch:

http://marc.info/?l=linux-sh&m=145011467914857

Feel free to squash if still possible.

Best regards

Dirk

#8 lore raw

PATCH 5/10 arm64: dts: r8a7795: Add pmu device nodes

Quoted 32 lines · Dirk Behme
Quoted 24 lines · Sudeep Holla
Quoted 21 lines · Simon Horman

From: Yoshifumi Hosoya <[email protected]>

Enabling the performance monitor unit on r8a7795.

---
  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 12 ++++++++++++
  1 file changed, 12 insertions(+)
arch/arm64/boot/dts/renesas/r8a7795.dtsi +0 -0
index 4d43cf31418f..b9229a49dabc 100644
@@ -230,6 +230,18 @@
              power-domains = <&cpg>;
          };
 
Quoted 5 lines

arch/arm64/boot/dts/renesas/r8a7795.dtsi line 234

Quoted 2 lines
arch/arm64/boot/dts/renesas/r8a7795.dtsi +2 -0
+        pmu {
+            compatible = "arm,armv8-pmuv3";

Please use arm,cortex-a57-pmu to be more specific. IIRC I mentioned this for some shmobile platform recently.

Quoted 7 lines

Yes. But as this patch has been applied already to some branches, I incorporated your a57-pmu hint with an additional update patch:

http://marc.info/?l=linux-sh&m=145011467914857

Feel free to squash if still possible.

Ah OK, I didn't know the exact dts name, sorry for the noise. Better if it was posted as part of this series :)

Signature · 2 lines
Regards,
Sudeep
#9 lore raw

PATCH 5/10 arm64: dts: r8a7795: Add pmu device nodes

Quoted 39 lines · Sudeep Holla
Quoted 36 lines · Dirk Behme
Quoted 24 lines · Sudeep Holla
Quoted 21 lines · Simon Horman

From: Yoshifumi Hosoya <[email protected]>

Enabling the performance monitor unit on r8a7795.

---
  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 12 ++++++++++++
  1 file changed, 12 insertions(+)
arch/arm64/boot/dts/renesas/r8a7795.dtsi +0 -0
index 4d43cf31418f..b9229a49dabc 100644
@@ -230,6 +230,18 @@
              power-domains = <&cpg>;
          };
 
Quoted 6 lines

arch/arm64/boot/dts/renesas/r8a7795.dtsi line 234

Quoted 2 lines
arch/arm64/boot/dts/renesas/r8a7795.dtsi +2 -0
+        pmu {
+            compatible = "arm,armv8-pmuv3";

Please use arm,cortex-a57-pmu to be more specific. IIRC I mentioned this
for some shmobile platform recently.

Yes. But as this patch has been applied already to some branches, I incorporated your a57-pmu hint with an additional update patch:

Quoted 7 lines
Quoted 4 lines

http://marc.info/?l=linux-sh&m=145011467914857

Feel free to squash if still possible.

Ah OK, I didn't know the exact dts name, sorry for the noise. Better if it was posted as part of this series :)

I finally found some time to test this

http://marc.info/?l=linux-sh&m=145011467914857

and surprisingly it doesn't seem to work:

Using "arm,cortex-a57-pmu" results in

hw perfevents: enabled with armv8_cortex_a57 PMU driver, 7 counters available
hw perfevents: failed to probe PMU!
hw perfevents: failed to register PMU devices!

while switching back to "arm,armv8-pmuv3" successfully gives

hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available

without any further error messages.

Any idea?

Best regards

Dirk

#10 lore raw

PATCH 5/10 arm64: dts: r8a7795: Add pmu device nodes

Quoted 5 lines · Dirk Behme
Quoted 4 lines · Sudeep Holla
Quoted 1 line · Dirk Behme

On 18.12.2015 11:16, Sudeep Holla wrote:

[...]

Quoted 18 lines
Quoted 7 lines
Quoted 7 lines
Quoted 3 lines

Please use arm,cortex-a57-pmu to be more specific. IIRC I mentioned this for some shmobile platform recently.

Yes. But as this patch has been applied already to some branches, I incorporated your a57-pmu hint with an additional update patch:

Quoted 7 lines
Quoted 4 lines

http://marc.info/?l=linux-sh&m=145011467914857

Feel free to squash if still possible.

Ah OK, I didn't know the exact dts name, sorry for the noise. Better if it was posted as part of this series :)

I finally found some time to test this

Quoted 7 lines

http://marc.info/?l=linux-sh&m=145011467914857

and surprisingly it doesn't seem to work:

Using "arm,cortex-a57-pmu" results in

hw perfevents: enabled with armv8_cortex_a57 PMU driver, 7 counters available

I had a quick look at the DT in the link above and IIUC A57 PMU's are successfully probed.

Quoted 3 lines

hw perfevents: failed to probe PMU!
hw perfevents: failed to register PMU devices!

This must be for A53 PMUs. So I suspect if the update DT is passed correctly to the kernel.

Quoted 7 lines

while switching back to "arm,armv8-pmuv3" successfully gives

hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available

without any further error messages.

Any idea?

You need to check if of_pmu_irq_cfg is failing.
Is the updated DT picked up correctly ?

Signature · 2 lines
Regards,
Sudeep
#11 lore raw

PATCH 5/10 arm64: dts: r8a7795: Add pmu device nodes

In reply to Dirk Behme
Quoted 51 lines · Dirk Behme
Quoted 39 lines · Sudeep Holla
Quoted 36 lines · Dirk Behme
Quoted 24 lines · Sudeep Holla
Quoted 21 lines · Simon Horman

From: Yoshifumi Hosoya <[email protected]>

Enabling the performance monitor unit on r8a7795.

---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/arm64/boot/dts/renesas/r8a7795.dtsi +0 -0
index 4d43cf31418f..b9229a49dabc 100644
@@ -230,6 +230,18 @@
             power-domains = <&cpg>;
         };
 
Quoted 6 lines

arch/arm64/boot/dts/renesas/r8a7795.dtsi line 234

Quoted 2 lines
arch/arm64/boot/dts/renesas/r8a7795.dtsi +2 -0
+        pmu {
+            compatible = "arm,armv8-pmuv3";

Please use arm,cortex-a57-pmu to be more specific. IIRC I mentioned this
for some shmobile platform recently.

Yes. But as this patch has been applied already to some branches, I incorporated your a57-pmu hint with an additional update patch:

Quoted 7 lines
Quoted 4 lines

http://marc.info/?l=linux-sh&m=145011467914857

Feel free to squash if still possible.

Ah OK, I didn't know the exact dts name, sorry for the noise. Better if it was posted as part of this series :)

I finally found some time to test this

Quoted 8 lines

http://marc.info/?l=linux-sh&m=145011467914857

and surprisingly it doesn't seem to work:

Using "arm,cortex-a57-pmu" results in

hw perfevents: enabled with armv8_cortex_a57 PMU driver, 7 counters available

This means all the probing logic worked for the A57 PMU.

Quoted 2 lines

hw perfevents: failed to probe PMU!
hw perfevents: failed to register PMU devices!

These are printed in arm_pmu_device_probe, and following the logic we must have succesfully allocated the struct pmu, but failed in either of_pmu_irq_cfg or init_fn (AKA armv8_a53_pmu_init).

In armv8_a53_pmu_init we call armv8pmu_probe_num_events, which will try to SMP cross-call to an A53 core to probe the number of countesr implemented. Perhaps the cross-call is failing.

Were the A53s online at this point?

Thanks,
Mark.

#12 lore raw

PATCH 5/10 arm64: dts: r8a7795: Add pmu device nodes

Quoted 70 lines · Mark Rutland
Quoted 51 lines · Dirk Behme
Quoted 39 lines · Sudeep Holla
Quoted 36 lines · Dirk Behme
Quoted 24 lines · Sudeep Holla
Quoted 21 lines · Simon Horman

From: Yoshifumi Hosoya <[email protected]>

Enabling the performance monitor unit on r8a7795.

---
  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 12 ++++++++++++
  1 file changed, 12 insertions(+)
arch/arm64/boot/dts/renesas/r8a7795.dtsi +0 -0
index 4d43cf31418f..b9229a49dabc 100644
@@ -230,6 +230,18 @@
              power-domains = <&cpg>;
          };
 
Quoted 6 lines

arch/arm64/boot/dts/renesas/r8a7795.dtsi line 234

Quoted 2 lines
arch/arm64/boot/dts/renesas/r8a7795.dtsi +2 -0
+        pmu {
+            compatible = "arm,armv8-pmuv3";

Please use arm,cortex-a57-pmu to be more specific. IIRC I mentioned this
for some shmobile platform recently.

Yes. But as this patch has been applied already to some branches, I incorporated your a57-pmu hint with an additional update patch:

Quoted 7 lines
Quoted 4 lines

http://marc.info/?l=linux-sh&m=145011467914857

Feel free to squash if still possible.

Ah OK, I didn't know the exact dts name, sorry for the noise. Better if it was posted as part of this series :)

I finally found some time to test this

Quoted 8 lines

http://marc.info/?l=linux-sh&m=145011467914857

and surprisingly it doesn't seem to work:

Using "arm,cortex-a57-pmu" results in

hw perfevents: enabled with armv8_cortex_a57 PMU driver, 7 counters available

This means all the probing logic worked for the A57 PMU.

Quoted 2 lines

hw perfevents: failed to probe PMU!
hw perfevents: failed to register PMU devices!

These are printed in arm_pmu_device_probe, and following the logic we must have succesfully allocated the struct pmu, but failed in either of_pmu_irq_cfg or init_fn (AKA armv8_a53_pmu_init).

Quoted 5 lines

In armv8_a53_pmu_init we call armv8pmu_probe_num_events, which will try to SMP cross-call to an A53 core to probe the number of countesr implemented. Perhaps the cross-call is failing.

Were the A53s online at this point?

Ah, indeed, the A53s failed to run.

Maybe anything like

http://lists.infradead.org/pipermail/linux-arm-kernel/2016-January/398773.html

helps to make this more obvious, then?

Thanks!

Best regards

Dirk

#13 lore raw

PATCH 6/10 arm64: renesas: salvator-x: Add board part number to DT bindings

In reply to Simon Horman

From: Geert Uytterhoeven <[email protected]>

---
 Documentation/devicetree/bindings/arm/shmobile.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
Documentation/devicetree/bindings/arm/shmobile.txt +1 -1
index 678a8184da24..9cf67e48f222 100644
@@ -59,7 +59,7 @@ Boards:
     compatible = "renesas,marzen", "renesas,r8a7779"
   - Porter (M2-LCDP)
     compatible = "renesas,porter", "renesas,r8a7791"
-  - Salvator-X
+  - Salvator-X (RTP0RC7795SIPB0010S)
     compatible = "renesas,salvator-x", "renesas,r8a7795";
   - SILK (RTP0RC7794LCB00011S)
     compatible = "renesas,silk", "renesas,r8a7794"
Signature · 1 line
2.1.4
#14 lore raw

PATCH 7/10 arm64: renesas: r8a7795: add internal delay for i2c IPs

In reply to Simon Horman

From: Wolfram Sang <[email protected]>

---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm64/boot/dts/renesas/r8a7795.dtsi +7 -0
index b9229a49dabc..e14251164480 100644
@@ -526,6 +526,7 @@
 			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 931>;
 			power-domains = <&cpg>;
+			i2c-scl-internal-delay-ns = <110>;
 			status = "disabled";
 		};
 
@@ -537,6 +538,7 @@
 			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 930>;
 			power-domains = <&cpg>;
+			i2c-scl-internal-delay-ns = <6>;
 			status = "disabled";
 		};
 
@@ -548,6 +550,7 @@
 			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 929>;
 			power-domains = <&cpg>;
+			i2c-scl-internal-delay-ns = <6>;
 			status = "disabled";
 		};
 
@@ -559,6 +562,7 @@
 			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 928>;
 			power-domains = <&cpg>;
+			i2c-scl-internal-delay-ns = <110>;
 			status = "disabled";
 		};
 
@@ -570,6 +574,7 @@
 			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 927>;
 			power-domains = <&cpg>;
+			i2c-scl-internal-delay-ns = <110>;
 			status = "disabled";
 		};
 
@@ -581,6 +586,7 @@
 			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 919>;
 			power-domains = <&cpg>;
+			i2c-scl-internal-delay-ns = <110>;
 			status = "disabled";
 		};
 
@@ -592,6 +598,7 @@
 			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 918>;
 			power-domains = <&cpg>;
+			i2c-scl-internal-delay-ns = <6>;
 			status = "disabled";
 		};
 
Signature · 1 line
2.1.4
#15 lore raw

PATCH 8/10 arm64: dts: r8a7795: Add SATA controller node

In reply to Simon Horman

From: Kouei Abe <[email protected]>

This adds SATA device node to r8a7795.dtsi.

[uli: adjusted for new MSTP clock scheme]
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm64/boot/dts/renesas/r8a7795.dtsi +8 -0
index e14251164480..9ce6a5ea6629 100644
@@ -767,5 +767,13 @@
 				};
 			};
 		};
+
+		sata: sata at ee300000 {
+			compatible = "renesas,sata-r8a7795";
+			reg = <0 0xee300000 0 0x1fff>;
+			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 915>;
+			status = "disabled";
+		};
 	};
 };
Signature · 1 line
2.1.4
#16 lore raw

PATCH 9/10 arm64: dts: salvator-x: Enable SATA controller

In reply to Simon Horman

From: Kouei Abe <[email protected]>

This enables SATA device in r8a7795-salvator-x.dts.

---
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts +4 -0
index 75af5ec5a4d4..265d12ff6022 100644
@@ -212,6 +212,10 @@
 	};
 };
 
+&sata {
+	status = "okay";
+};
+
 &ssi1 {
 	shared-pin;
 };
Signature · 1 line
2.1.4
#17 lore raw

PATCH 10/10 arm64: renesas: r8a7795: fix SATA clock assignment

In reply to Simon Horman

From: Ulrich Hecht <[email protected]>

SATA clock is 815, not 915.

---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/renesas/r8a7795.dtsi +1 -1
index 9ce6a5ea6629..bb353cde1253 100644
@@ -772,7 +772,7 @@
 			compatible = "renesas,sata-r8a7795";
 			reg = <0 0xee300000 0 0x1fff>;
 			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 915>;
+			clocks = <&cpg CPG_MOD 815>;
 			status = "disabled";
 		};
 	};
Signature · 1 line
2.1.4
#18 lore raw
In reply to Simon Horman
Quoted 10 lines · Simon Horman

Hi Olof, Hi Kevin, Hi Arnd,

Please consider these third round of Renesas ARM64 based SoC DT updates for v4.5.

This pull request is based on the previous round of such requests, tagged as renesas-arm64-dt2-for-v4.5, which you have already pulled.

Quoted 7 lines

The following changes since commit 672b79312c04016481a11d4b996b4512207ffbd3:

arm64: renesas: salvator-x: Sound DVC support (2015-11-26 11:31:43 +0900)

are available in the git repository at:

git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-dt3-for-v4.5

Merged, but:

Quoted 10 lines

arm64: dts: r8a7795: Add PSCI node
arm64: dts: r8a7795: Add Cortex-A57 CPU cores
arm64: renesas: salvator-x: Add board part number to DT bindings
arm64: dts: r8a7795: Add SATA controller node
arm64: dts: salvator-x: Enable SATA controller
arm64: renesas: salvator-x: set ak4613 In/Out pin as single-end
arm64: renesas: salvator-x: use CS2000 as AUDIO_CLK_B
arm64: renesas: r8a7795: fix SATA clock assignment
arm64: renesas: r8a7795: add internal delay for i2c IPs
arm64: dts: r8a7795: Add pmu device nodes

Please me more consistent in patch description prefixes.

-Olof

#19 lore raw
Quoted 32 lines · Olof Johansson
Quoted 10 lines · Simon Horman

Hi Olof, Hi Kevin, Hi Arnd,

Please consider these third round of Renesas ARM64 based SoC DT updates for v4.5.

This pull request is based on the previous round of such requests, tagged as renesas-arm64-dt2-for-v4.5, which you have already pulled.

Quoted 7 lines

The following changes since commit 672b79312c04016481a11d4b996b4512207ffbd3:

arm64: renesas: salvator-x: Sound DVC support (2015-11-26 11:31:43 +0900)

are available in the git repository at:

git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-dt3-for-v4.5

Merged, but:

Quoted 10 lines

arm64: dts: r8a7795: Add PSCI node
arm64: dts: r8a7795: Add Cortex-A57 CPU cores
arm64: renesas: salvator-x: Add board part number to DT bindings
arm64: dts: r8a7795: Add SATA controller node
arm64: dts: salvator-x: Enable SATA controller
arm64: renesas: salvator-x: set ak4613 In/Out pin as single-end
arm64: renesas: salvator-x: use CS2000 as AUDIO_CLK_B
arm64: renesas: r8a7795: fix SATA clock assignment
arm64: renesas: r8a7795: add internal delay for i2c IPs
arm64: dts: r8a7795: Add pmu device nodes

Quoted 1 line

Please me more consistent in patch description prefixes.

Sure, sorry for not being more attentive to that.