gpio-f7188x: Add F81866 GPIO supports

PATCH In review Peter Hung 3 participants 6 messages Jan 22, 2016 – Jan 28, 2016 GPIO

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Peter Hung

author

2016-01-22 07:23 UTC #0 lore raw

v2 cover gpio-f7188x: Add F81866 GPIO supports

Fintek F81866 is a SuperIO. It contains HWMON/GPIO/Serial Ports. and it has totally 72(9x8 sets) gpio pins.

Here is the PDF spec:
http://www.alldatasheet.com/datasheet-pdf/pdf/459085/FINTEK/F81866AD-I.html

The control method is the same with F7188x, but we should care the address of GPIO8x.

GPIO address is below:

    GPIO0x based: 0xf0
    GPIO1x based: 0xe0
    GPIO2x based: 0xd0
    GPIO3x based: 0xc0
    GPIO4x based: 0xb0
    GPIO5x based: 0xa0
    GPIO6x based: 0x90
    GPIO7x based: 0x80
    GPIO8x based: 0x88 <-- not 0x70.

Change Log:
V2:
1. V1 contains 2 patches, first is add F81866 and second is a filter to find enabled GPIO. But Simon say some mainboard maybe configure the SuperIO with wrong setting. So the V2 patch only implements F81866 GPIO control method the same with F7188x.

Peter Hung (1):
gpio-f7188x: Add F81866 GPIO supports

 drivers/gpio/Kconfig       |  4 ++--
 drivers/gpio/gpio-f7188x.c | 27 ++++++++++++++++++++++++---
 2 files changed, 26 insertions(+), 5 deletions(-)

Signature · 4 lines

Change Log:
V2
    
1.9.1

Peter Hung

author

2016-01-22 07:23 UTC #1 lore raw

PATCH v2 1/1 gpio-f7188x: Add F81866 GPIO supports

Add F81866 GPIO supports

Fintek F81866 is a SuperIO. It contains HWMON/GPIO/Serial Ports. and it has totally 72(9x8 sets) gpio pins.

Here is the PDF spec:
http://www.alldatasheet.com/datasheet-pdf/pdf/459085/FINTEK/F81866AD-I.html

The control method is the same with F7188x, but we should care the address of GPIO8x.

GPIO address is below:

    GPIO0x based: 0xf0
    GPIO1x based: 0xe0
    GPIO2x based: 0xd0
    GPIO3x based: 0xc0
    GPIO4x based: 0xb0
    GPIO5x based: 0xa0
    GPIO6x based: 0x90
    GPIO7x based: 0x80
    GPIO8x based: 0x88 <-- not 0x70.

Signed-off-by Peter Hung <[email protected]>

---
 drivers/gpio/Kconfig       |  4 ++--
 drivers/gpio/gpio-f7188x.c | 27 ++++++++++++++++++++++++---
 2 files changed, 26 insertions(+), 5 deletions(-)

drivers/gpio/Kconfig +2 -2

index cb212eb..c1ad573 100644
@@ -513,10 +513,10 @@ config GPIO_104_IDI_48
 	  via the idi_48_irq module parameter.
 
 config GPIO_F7188X
-	tristate "F71869, F71869A, F71882FG and F71889F GPIO support"
+	tristate "F71869, F71869A, F71882FG, F71889F and F81866 GPIO support"
 	help
 	  This option enables support for GPIOs found on Fintek Super-I/O
-	  chips F71869, F71869A, F71882FG and F71889F.
+	  chips F71869, F71869A, F71882FG, F71889F and F81866.
 
 	  To compile this driver as a module, choose M here: the module will
 	  be called f7188x-gpio.

drivers/gpio/gpio-f7188x.c +24 -3

index d62fd6b..0417798 100644
@@ -1,5 +1,5 @@
 /*
- * GPIO driver for Fintek Super-I/O F71869, F71869A, F71882 and F71889
+ * GPIO driver for Fintek Super-I/O F71869, F71869A, F71882, F71889 and F81866
  *
  * Copyright (C) 2010-2013 LaCie
  *

@@ -36,14 +36,16 @@
 #define SIO_F71869A_ID		0x1007	/* F71869A chipset ID */
 #define SIO_F71882_ID		0x0541	/* F71882 chipset ID */
 #define SIO_F71889_ID		0x0909	/* F71889 chipset ID */
+#define SIO_F81866_ID		0x1010	/* F81866 chipset ID */
 
-enum chips { f71869, f71869a, f71882fg, f71889f };
+enum chips { f71869, f71869a, f71882fg, f71889f, f81866 };
 
 static const char * const f7188x_names[] = {
 	"f71869",
 	"f71869a",
 	"f71882fg",
 	"f71889f",
+	"f81866",
 };
 
 struct f7188x_sio {

@@ -190,6 +192,18 @@ static struct f7188x_gpio_bank f71889_gpio_bank[] = {
 	F7188X_GPIO_BANK(70, 8, 0x80),
 };
 
+static struct f7188x_gpio_bank f81866_gpio_bank[] = {
+	F7188X_GPIO_BANK(0, 8, 0xF0),
+	F7188X_GPIO_BANK(10, 8, 0xE0),
+	F7188X_GPIO_BANK(20, 8, 0xD0),
+	F7188X_GPIO_BANK(30, 8, 0xC0),
+	F7188X_GPIO_BANK(40, 8, 0xB0),
+	F7188X_GPIO_BANK(50, 8, 0xA0),
+	F7188X_GPIO_BANK(60, 8, 0x90),
+	F7188X_GPIO_BANK(70, 8, 0x80),
+	F7188X_GPIO_BANK(80, 8, 0x88),
+};
+
 static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
 {
 	int err;

@@ -318,6 +332,10 @@ static int f7188x_gpio_probe(struct platform_device *pdev)
 		data->nr_bank = ARRAY_SIZE(f71889_gpio_bank);
 		data->bank = f71889_gpio_bank;
 		break;
+	case f81866:
+		data->nr_bank = ARRAY_SIZE(f81866_gpio_bank);
+		data->bank = f81866_gpio_bank;
+		break;
 	default:
 		return -ENODEV;
 	}

@@ -395,6 +413,9 @@ static int __init f7188x_find(int addr, struct f7188x_sio *sio)
 	case SIO_F71889_ID:
 		sio->type = f71889f;
 		break;
+	case SIO_F81866_ID:
+		sio->type = f81866;
+		break;
 	default:
 		pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
 		goto err;

@@ -485,6 +506,6 @@ static void __exit f7188x_gpio_exit(void)
 }
 module_exit(f7188x_gpio_exit);
 
-MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG and F71889F");
+MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG, F71889F and F81866");
 MODULE_AUTHOR("Simon Guinot <[email protected]>");
 MODULE_LICENSE("GPL");

Signature · 1 line

1.9.1

Simon Guinot

Acked-by on v2 1/1

2016-01-22 08:58 UTC #2 lore raw

Quoted 22 lines · Peter Hung

Add F81866 GPIO supports
Fintek F81866 is a SuperIO. It contains HWMON/GPIO/Serial Ports. and it has totally 72(9x8 sets) gpio pins.
Here is the PDF spec:
http://www.alldatasheet.com/datasheet-pdf/pdf/459085/FINTEK/F81866AD-I.html
The control method is the same with F7188x, but we should care the address of GPIO8x.
GPIO address is below:
    GPIO0x based: 0xf0
    GPIO1x based: 0xe0
    GPIO2x based: 0xd0
    GPIO3x based: 0xc0
    GPIO4x based: 0xb0
    GPIO5x based: 0xa0
    GPIO6x based: 0x90
    GPIO7x based: 0x80
    GPIO8x based: 0x88 <-- not 0x70.

Quoted 5 lines

Signed-off-by Peter Hung <[email protected]>

---
 drivers/gpio/Kconfig       |  4 ++--
 drivers/gpio/gpio-f7188x.c | 27 ++++++++++++++++++++++++---
 2 files changed, 26 insertions(+), 5 deletions(-)

Hi Peter,

Acked-by Simon Guinot <[email protected]>

Thanks,

Simon

Quoted 97 lines

drivers/gpio/Kconfig +2 -2

index cb212eb..c1ad573 100644
@@ -513,10 +513,10 @@ config GPIO_104_IDI_48
 	  via the idi_48_irq module parameter.
 
 config GPIO_F7188X
-	tristate "F71869, F71869A, F71882FG and F71889F GPIO support"
+	tristate "F71869, F71869A, F71882FG, F71889F and F81866 GPIO support"
 	help
 	  This option enables support for GPIOs found on Fintek Super-I/O
-	  chips F71869, F71869A, F71882FG and F71889F.
+	  chips F71869, F71869A, F71882FG, F71889F and F81866.
 
 	  To compile this driver as a module, choose M here: the module will
 	  be called f7188x-gpio.

drivers/gpio/gpio-f7188x.c +24 -3

index d62fd6b..0417798 100644
@@ -1,5 +1,5 @@
 /*
- * GPIO driver for Fintek Super-I/O F71869, F71869A, F71882 and F71889
+ * GPIO driver for Fintek Super-I/O F71869, F71869A, F71882, F71889 and F81866
  *
  * Copyright (C) 2010-2013 LaCie
  *

@@ -36,14 +36,16 @@
 #define SIO_F71869A_ID		0x1007	/* F71869A chipset ID */
 #define SIO_F71882_ID		0x0541	/* F71882 chipset ID */
 #define SIO_F71889_ID		0x0909	/* F71889 chipset ID */
+#define SIO_F81866_ID		0x1010	/* F81866 chipset ID */
 
-enum chips { f71869, f71869a, f71882fg, f71889f };
+enum chips { f71869, f71869a, f71882fg, f71889f, f81866 };
 
 static const char * const f7188x_names[] = {
 	"f71869",
 	"f71869a",
 	"f71882fg",
 	"f71889f",
+	"f81866",
 };
 
 struct f7188x_sio {

@@ -190,6 +192,18 @@ static struct f7188x_gpio_bank f71889_gpio_bank[] = {
 	F7188X_GPIO_BANK(70, 8, 0x80),
 };
 
+static struct f7188x_gpio_bank f81866_gpio_bank[] = {
+	F7188X_GPIO_BANK(0, 8, 0xF0),
+	F7188X_GPIO_BANK(10, 8, 0xE0),
+	F7188X_GPIO_BANK(20, 8, 0xD0),
+	F7188X_GPIO_BANK(30, 8, 0xC0),
+	F7188X_GPIO_BANK(40, 8, 0xB0),
+	F7188X_GPIO_BANK(50, 8, 0xA0),
+	F7188X_GPIO_BANK(60, 8, 0x90),
+	F7188X_GPIO_BANK(70, 8, 0x80),
+	F7188X_GPIO_BANK(80, 8, 0x88),
+};
+
 static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
 {
 	int err;

@@ -318,6 +332,10 @@ static int f7188x_gpio_probe(struct platform_device *pdev)
 		data->nr_bank = ARRAY_SIZE(f71889_gpio_bank);
 		data->bank = f71889_gpio_bank;
 		break;
+	case f81866:
+		data->nr_bank = ARRAY_SIZE(f81866_gpio_bank);
+		data->bank = f81866_gpio_bank;
+		break;
 	default:
 		return -ENODEV;
 	}

@@ -395,6 +413,9 @@ static int __init f7188x_find(int addr, struct f7188x_sio *sio)
 	case SIO_F71889_ID:
 		sio->type = f71889f;
 		break;
+	case SIO_F81866_ID:
+		sio->type = f81866;
+		break;
 	default:
 		pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
 		goto err;

@@ -485,6 +506,6 @@ static void __exit f7188x_gpio_exit(void)
 }
 module_exit(f7188x_gpio_exit);
 
-MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG and F71889F");
+MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG, F71889F and F81866");
 MODULE_AUTHOR("Simon Guinot <[email protected]>");
 MODULE_LICENSE("GPL");

Signature · 1 line

1.9.1

Peter Hung

author

2016-01-22 09:45 UTC #3 lore raw

Hi Simon,

Simon Guinot 於 2016/1/22 下午 04:58 寫道:

Quoted 5 lines · Peter Hung

Acked-by Simon Guinot <[email protected]>
Thanks,

Should I resend patch V3 to add Acked-by?

Signature · 6 lines

With Best Regards,
Peter Hung
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Simon Guinot

2016-01-23 12:16 UTC #4 lore raw

Quoted 10 lines · Peter Hung

Hi Simon,
Simon Guinot 於 2016/1/22 下午 04:58 寫道:
Quoted 5 lines · Peter Hung
Acked-by Simon Guinot <[email protected]>
Thanks,
Should I resend patch V3 to add Acked-by?

Hi Peter,

I am pretty sure that Linus will add it while applying the patch.

Simon

Linus Walleij

2016-01-28 09:07 UTC #5 lore raw

In reply to Peter Hung

Quoted 22 lines · Peter Hung

Add F81866 GPIO supports
Fintek F81866 is a SuperIO. It contains HWMON/GPIO/Serial Ports. and it has totally 72(9x8 sets) gpio pins.
Here is the PDF spec:
http://www.alldatasheet.com/datasheet-pdf/pdf/459085/FINTEK/F81866AD-I.html
The control method is the same with F7188x, but we should care the address of GPIO8x.
GPIO address is below:
    GPIO0x based: 0xf0
    GPIO1x based: 0xe0
    GPIO2x based: 0xd0
    GPIO3x based: 0xc0
    GPIO4x based: 0xb0
    GPIO5x based: 0xa0
    GPIO6x based: 0x90
    GPIO7x based: 0x80
    GPIO8x based: 0x88 <-- not 0x70.

Quoted 1 line

Signed-off-by Peter Hung <[email protected]>

This v2 patch applied with Simon's ACK.

Yours,
Linus Walleij