dm: tegra: Convert tegra20 and tegra124 video drivers to driver model
Subsystems (14)
v2 cover dm: tegra: Convert tegra20 and tegra124 video drivers to driver model
This series moves these two drivers over to use driver model for video.
This involves the following steps:
- Sync up some device tree files with Linux
- Implement a proper PWM driver
- Clean up and unify the driver code
- Modify the existing drivers to work with driver model
The tegra20 display driver uses device tree bindings invented in 2011 before Linux had this or anyone was able to agree a standard. It seems possible to move it to the new bindings (like tegra124) except for the issue of time delays between stages. It isn't clear how this should work, and Linux implements this by including all LCD definitions in the kernel source code, and not using any delays. This causes strange display artifacts on the display when starting up, but perhaps is harmless to the display. Future work will sync up the device tree more for seaboard, and thus tidy this up for nvidia boards.
A bug in the keyboard driver is also fixed by this series. The series is tested on seaboard and nyan-big, the two boards I have which support a display.
This series is available at u-boot-dm/tegra-working.
Changes in v2:
- Fix a checkpatch warning
- Fix erroneous Kconfig change for colibri
- Rebase to master
Simon Glass (23):
tegra: keyboard: Fix the init order
dm: video: Flush the cache after a puts()
tegra: mmc: Fix comments in the MMC driver init
tegra: dts: Sync up the tegra124 device tree files with Linux
tegra: dts: Sync up nyan-big files with Linux
tegra: gpio: Show the GPIO value for outputs
tegra: pwm: Add a driver for the tegra PWM
tegra: lcd: Merge tegra124-lcd.c into display.c
tegra: Allow driver model to be used for the PWM
tegra: Allow CONFIG_DM_VIDEO to be used as well as CONFIG_LCD
tegra: nyan-big: Move the LCD driver to driver model
tegra: video: Rename CONFIG_VIDEO_TEGRA to CONFIG_VIDEO_TEGRA20
tegra: dts: Sync tegra20.dtsi with Linux v4.4
tegra: video: Merge the display driver into one file
tegra: video: Move the check for CONFIG_OF_CONTROL to Kconfig
tegra: video: Merge the two config structures together
tegra: video: Convert tegra20 LCD driver to driver model
tegra: video: Remove the static variables
tegra: video: Move LCD enums into the driver
tegra: video: Move all fdt-decoding into a single function
tegra: Convert CONFIG_PWM_TEGRA to Kconfig
tegra: video: Move LCD driver to use the DM PWM driver
tegra: video: Clean up the old LCD/PWM driver code
arch/arm/dts/tegra124-jetson-tk1.dts | 13 + arch/arm/dts/tegra124-nyan-big.dts | 1676 ++++++++++++++++++----- arch/arm/dts/tegra124-nyan.dtsi | 718 ++++++++++ arch/arm/dts/tegra124-venice2.dts | 14 + arch/arm/dts/tegra124.dtsi | 693 ++++++++-- arch/arm/dts/tegra20-colibri.dts | 22 +- arch/arm/dts/tegra20-harmony.dts | 44 +- arch/arm/dts/tegra20-medcom-wide.dts | 26 +- arch/arm/dts/tegra20-paz00.dts | 43 +- arch/arm/dts/tegra20-plutux.dts | 8 - arch/arm/dts/tegra20-seaboard.dts | 36 +- arch/arm/dts/tegra20-tamonten.dtsi | 15 +- arch/arm/dts/tegra20-tec.dts | 10 +- arch/arm/dts/tegra20-trimslice.dts | 34 +- arch/arm/dts/tegra20-ventana.dts | 43 +- arch/arm/dts/tegra20-whistler.dts | 35 +- arch/arm/dts/tegra20.dtsi | 541 ++++++-- arch/arm/include/asm/arch-tegra/dc.h | 5 - arch/arm/include/asm/arch-tegra/pwm.h | 30 - arch/arm/include/asm/arch-tegra20/display.h | 108 -- arch/arm/mach-tegra/Kconfig | 1 + arch/arm/mach-tegra/Makefile | 1 - arch/arm/mach-tegra/board2.c | 24 +- arch/arm/mach-tegra/pwm.c | 89 -- arch/arm/mach-tegra/tegra20/Makefile | 2 - arch/arm/mach-tegra/tegra20/display.c | 378 ----- board/compal/paz00/paz00.c | 2 +- board/toradex/colibri_t20/colibri_t20.c | 2 +- configs/colibri_t20_defconfig | 6 + configs/harmony_defconfig | 6 + configs/medcom-wide_defconfig | 6 + configs/nyan-big_defconfig | 10 + configs/paz00_defconfig | 6 + configs/seaboard_defconfig | 6 + configs/tec_defconfig | 6 + configs/ventana_defconfig | 6 + drivers/gpio/tegra_gpio.c | 5 +- drivers/input/tegra-kbc.c | 2 +- drivers/mmc/tegra_mmc.c | 4 +- drivers/pwm/Kconfig | 9 + drivers/pwm/Makefile | 3 + drivers/pwm/tegra_pwm.c | 85 ++ drivers/video/Kconfig | 10 + drivers/video/Makefile | 2 +- drivers/video/simple_panel.c | 1 + drivers/video/tegra.c | 658 +++++++-- drivers/video/tegra124/Makefile | 1 - drivers/video/tegra124/display.c | 184 ++- drivers/video/tegra124/dp.c | 53 +- drivers/video/tegra124/sor.c | 162 ++- drivers/video/tegra124/sor.h | 45 +- drivers/video/tegra124/tegra124-lcd.c | 95 -- drivers/video/vidconsole-uclass.c | 1 + include/configs/colibri_t20.h | 4 - include/configs/harmony.h | 4 - include/configs/medcom-wide.h | 4 - include/configs/nyan-big.h | 3 - include/configs/paz00.h | 4 - include/configs/seaboard.h | 4 - include/configs/tec.h | 4 - include/configs/tegra-common-post.h | 10 +- include/configs/ventana.h | 4 - include/dt-bindings/clock/tegra124-car-common.h | 345 +++++ include/dt-bindings/clock/tegra124-car.h | 341 +---- include/dt-bindings/memory/tegra124-mc.h | 31 + include/dt-bindings/reset/tegra124-car.h | 12 + include/dt-bindings/thermal/tegra124-soctherm.h | 13 + include/fdtdec.h | 1 - lib/fdtdec.c | 1 - 69 files changed, 4596 insertions(+), 2174 deletions(-) create mode 100644 arch/arm/dts/tegra124-nyan.dtsi delete mode 100644 arch/arm/mach-tegra/pwm.c create mode 100644 drivers/pwm/tegra_pwm.c delete mode 100644 drivers/video/tegra124/tegra124-lcd.c create mode 100644 include/dt-bindings/clock/tegra124-car-common.h create mode 100644 include/dt-bindings/memory/tegra124-mc.h create mode 100644 include/dt-bindings/reset/tegra124-car.h create mode 100644 include/dt-bindings/thermal/tegra124-soctherm.h
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 1/23 tegra: keyboard: Fix the init order
We need to add the base tables before adding the function tables. Fix the init order so the keyboard scans keys correctly.
---
Changes in v2: None
drivers/input/tegra-kbc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/input/tegra-kbc.c +1 -1
@@ -312,6 +312,7 @@ static int tegra_kbd_probe(struct udevice *dev) __func__, ret);return ret; } +input_add_tables (input, false);if (priv->matrix.fn_keycode) { ret = input_add_table(input, KEY_FN, -1, priv->matrix.fn_keycode,
@@ -326,7 +327,6 @@ static int tegra_kbd_probe(struct udevice *dev) priv->input = input; input->dev = dev; input->read_keys = tegra_kbc_check; -input_add_tables (input, false);strcpy (sdev->name,"tegra-kbc" ); ret =input_stdio_register (sdev);if (ret) {
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 2/23 dm: video: Flush the cache after a puts()
In reply to Simon GlassThis helps keep the display consistent. puts() is used when printing the prompt, so is a useful way to make sure the current display contents is visible.
---
Changes in v2: None
drivers/video/vidconsole-uclass.c | 1 + 1 file changed, 1 insertion(+)
drivers/video/vidconsole-uclass.c +1 -0
@@ -139,6 +139,7 @@ static void vidconsole_puts(struct stdio_dev *sdev, const char *s)while (*s)vidconsole_put_char (dev, *s++); +video_sync (dev->parent); }/* Set up the number of rows and colours (rotated drivers override this) */
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 2/23 dm: video: Flush the cache after a puts()
Hi Simon,
Quoted 11 lines · On Sat, 30 Jan 2016 16:37:41 -0700 Simon Glass sjg at chromium.org wrote:
This helps keep the display consistent.
puts()is used when printing the prompt, so is a useful way to make sure the current display contents is visible.Signed-off-by Simon Glass <[email protected]>---
Changes in v2: None
drivers/video/vidconsole-uclass.c | 1 + 1 file changed, 1 insertion(+)
PATCH v2 3/23 tegra: mmc: Fix comments in the MMC driver init
In reply to Simon GlassFix the SoC names in two comments.
---
Changes in v2: None
drivers/mmc/tegra_mmc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/mmc/tegra_mmc.c +2 -2
@@ -674,7 +674,7 @@ void tegra_mmc_init(void) CONFIG_SYS_MMC_MAX_DEVICE);debug ("%s: count of Tegra210 sdhci nodes is %d\n" , __func__, count);if (process_nodes (blob, node_list, count)) { -printf ("%s: Error processing T30 mmc node(s)!\n" , __func__); +printf ("%s: Error processing T210 mmc node(s)!\n" , __func__);return ; }
@@ -684,7 +684,7 @@ void tegra_mmc_init(void) CONFIG_SYS_MMC_MAX_DEVICE);debug ("%s: count of Tegra124 sdhci nodes is %d\n" , __func__, count);if (process_nodes (blob, node_list, count)) { -printf ("%s: Error processing T30 mmc node(s)!\n" , __func__); +printf ("%s: Error processing T124 mmc node(s)!\n" , __func__);return ; }
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 4/23 tegra: dts: Sync up the tegra124 device tree files with Linux
In reply to Simon GlassSync up these files with Linux v4.4.
---
Changes in v2: None
arch/arm/dts/tegra124-jetson-tk1.dts | 13 + arch/arm/dts/tegra124-venice2.dts | 14 + arch/arm/dts/tegra124.dtsi | 693 +++++++++++++++++++----- include/dt-bindings/clock/tegra124-car-common.h | 345 ++++++++++++ include/dt-bindings/clock/tegra124-car.h | 341 +----------- include/dt-bindings/memory/tegra124-mc.h | 31 ++ include/dt-bindings/reset/tegra124-car.h | 12 + include/dt-bindings/thermal/tegra124-soctherm.h | 13 + 8 files changed, 994 insertions(+), 468 deletions(-) create mode 100644 include/dt-bindings/clock/tegra124-car-common.h create mode 100644 include/dt-bindings/memory/tegra124-mc.h create mode 100644 include/dt-bindings/reset/tegra124-car.h create mode 100644 include/dt-bindings/thermal/tegra124-soctherm.h
arch/arm/dts/tegra124-jetson-tk1.dts +13 -0
@@ -325,6 +325,19 @@ nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>; }; + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock at 0 { + compatible = "fixed-clock"; + reg = <0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + regulators { compatible = "simple-bus"; #address-cells = <1>;
arch/arm/dts/tegra124-venice2.dts +14 -0
@@ -93,4 +93,18 @@ status = "okay"; nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>; }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock at 0 { + compatible = "fixed-clock"; + reg = <0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + };
arch/arm/dts/tegra124.dtsi +557 -136
853 lines not on this page · raw message
include/dt-bindings/clock/tegra124-car-common.h new file +345 -0
345 lines not on this page · raw message
include/dt-bindings/clock/tegra124-car.h +9 -332
351 lines not on this page · raw message
include/dt-bindings/memory/tegra124-mc.h new file +31 -0
@@ -0,0 +1,31 @@ +#ifndef DT_BINDINGS_MEMORY_TEGRA124_MC_H +#define DT_BINDINGS_MEMORY_TEGRA124_MC_H + +#define TEGRA_SWGROUP_PTC 0 +#define TEGRA_SWGROUP_DC 1 +#define TEGRA_SWGROUP_DCB 2 +#define TEGRA_SWGROUP_AFI 3 +#define TEGRA_SWGROUP_AVPC 4 +#define TEGRA_SWGROUP_HDA 5 +#define TEGRA_SWGROUP_HC 6 +#define TEGRA_SWGROUP_MSENC 7 +#define TEGRA_SWGROUP_PPCS 8 +#define TEGRA_SWGROUP_SATA 9 +#define TEGRA_SWGROUP_VDE 10 +#define TEGRA_SWGROUP_MPCORELP 11 +#define TEGRA_SWGROUP_MPCORE 12 +#define TEGRA_SWGROUP_ISP2 13 +#define TEGRA_SWGROUP_XUSB_HOST 14 +#define TEGRA_SWGROUP_XUSB_DEV 15 +#define TEGRA_SWGROUP_ISP2B 16 +#define TEGRA_SWGROUP_TSEC 17 +#define TEGRA_SWGROUP_A9AVP 18 +#define TEGRA_SWGROUP_GPU 19 +#define TEGRA_SWGROUP_SDMMC1A 20 +#define TEGRA_SWGROUP_SDMMC2A 21 +#define TEGRA_SWGROUP_SDMMC3A 22 +#define TEGRA_SWGROUP_SDMMC4A 23 +#define TEGRA_SWGROUP_VIC 24 +#define TEGRA_SWGROUP_VI 25 + +#endif
include/dt-bindings/reset/tegra124-car.h new file +12 -0
@@ -0,0 +1,12 @@ +/* +* This header provides Tegra124-specific constants for binding +* nvidia,tegra124-car. +*/ + +#ifndef _DT_BINDINGS_RESET_TEGRA124_CAR_H +#define _DT_BINDINGS_RESET_TEGRA124_CAR_H + +#define TEGRA124_RESET (x) (6 * 32 + (x)) +#define TEGRA124_RST_DFLL_DVCO TEGRA124_RESET(0) + +#endif /* _DT_BINDINGS_RESET_TEGRA124_CAR_H */
include/dt-bindings/thermal/tegra124-soctherm.h new file +13 -0
@@ -0,0 +1,13 @@ +/* +* This header provides constants for binding nvidia,tegra124-soctherm. +*/ + +#ifndef _DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H +#define _DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H + +#define TEGRA124_SOCTHERM_SENSOR_CPU 0 +#define TEGRA124_SOCTHERM_SENSOR_MEM 1 +#define TEGRA124_SOCTHERM_SENSOR_GPU 2 +#define TEGRA124_SOCTHERM_SENSOR_PLLX 3 + +#endif
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 5/23 tegra: dts: Sync up nyan-big files with Linux
In reply to Simon GlassSync up these files with Linux v4.4. Some differences remain, principally that the addresses are still 32-bit in U-Boot.
---
Changes in v2: None
arch/arm/dts/tegra124-nyan-big.dts | 1676 ++++++++++++++++++++++++++++-------- arch/arm/dts/tegra124-nyan.dtsi | 718 +++++++++++++++ 2 files changed, 2038 insertions(+), 356 deletions(-) create mode 100644 arch/arm/dts/tegra124-nyan.dtsi
arch/arm/dts/tegra124-nyan-big.dts +1320 -356
@@ -1,7 +1,6 @@ /dts-v1/; -#include <dt-bindings/input/input.h> -#include "tegra124.dtsi" +#include "tegra124-nyan.dtsi" / { model = "Acer Chromebook 13 CB5-311";
@@ -9,6 +8,7 @@ aliases { console = &uarta; + stdout-path = &uarta; i2c0 = "/i2c at 7000d000"; i2c1 = "/i2c at 7000c000"; i2c2 = "/i2c at 7000c400";
@@ -23,14 +23,13 @@ spi1 = "/spi at 7000da00"; usb0 = "/usb at 7d000000"; usb1 = "/usb at 7d008000"; - }; - - memory { - reg = <0x80000000 0x80000000>; + usb2 = "/usb at 7d004000"; }; host1x at 50000000 { + u-boot,dm-pre-reloc; dc at 54200000 { + u-boot,dm-pre-reloc; display-timings { timing at 0 { clock-frequency = <69500000>;
@@ -46,372 +45,1337 @@ }; }; - sor at 54540000 { - status = "okay"; - - nvidia,dpaux = <&dpaux>; - nvidia,panel = <&panel>; - }; - - dpaux at 545c0000 { - status = "okay"; - }; - }; - - serial at 70006000 { - /* Debug connector on the bottom of the board near SD card. */ - status = "okay"; - }; - - pwm at 7000a000 { - status = "okay"; - }; - - i2c at 7000c000 { - status = "okay"; - clock-frequency = <100000>; - - acodec: audio-codec at 10 { - compatible = "maxim,max98090"; - reg = <0x10>; - interrupt-parent = <&gpio>; - interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; - }; - - temperature-sensor at 4c { - compatible = "ti,tmp451"; - reg = <0x4c>; - interrupt-parent = <&gpio>; - interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>; - - #thermal-sensor-cells = <1>; - }; - }; - - i2c at 7000c400 { - status = "okay"; - clock-frequency = <100000>; - }; - - i2c at 7000c500 { - status = "okay"; - clock-frequency = <400000>; - - tpm at 20 { - compatible = "infineon,slb9645tt"; - reg = <0x20>; - }; - }; - - hdmi_ddc: i2c at 7000c700 { - status = "okay"; - clock-frequency = <100000>; - }; - - i2c at 7000d000 { - status = "okay"; - clock-frequency = <400000>; - - pmic: pmic at 40 { - compatible = "ams,as3722"; - reg = <0x40>; - interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; - - ams,system-power-controller; - - #interrupt-cells = <2>; - interrupt-controller; - - gpio-controller; - #gpio-cells = <2>; - - pinctrl-names = "default"; - pinctrl-0 = <&as3722_default>; - - as3722_default: pinmux { - gpio0 { - pins = "gpio0"; - function = "gpio"; - bias-pull-down; - }; - - gpio1 { - pins = "gpio1"; - function = "gpio"; - bias-pull-up; - }; - - gpio2_4_7 { - pins = "gpio2", "gpio4", "gpio7"; - function = "gpio"; - bias-pull-up; - }; - - gpio3_6 { - pins = "gpio3", "gpio6"; - bias-high-impedance; - }; - - gpio5 { - pins = "gpio5"; - function = "clk32k-out"; - bias-pull-down; - }; - }; - }; - }; - - spi at 7000d400 { - status = "okay"; - spi-deactivate-delay = <200>; - spi-max-frequency = <3000000>; - - cros_ec: cros-ec at 0 { - compatible = "google,cros-ec-spi"; - spi-max-frequency = <3000000>; - interrupt-parent = <&gpio>; - interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>; - ec-interrupt = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; - reg = <0>; - - google,cros-ec-spi-msg-delay = <2000>; - - i2c-tunnel { - compatible = "google,cros-ec-i2c-tunnel"; - #address-cells = <1>; - #size-cells = <0>; - - google,remote-bus = <0>; - - charger: bq24735 at 9 { - compatible = "ti,bq24735"; - reg = <0x9>; - interrupt-parent = <&gpio>; - interrupts = <TEGRA_GPIO(J, 0) - GPIO_ACTIVE_HIGH>; - ti,ac-detect-gpios = <&gpio - TEGRA_GPIO(J, 0) - GPIO_ACTIVE_HIGH>; - }; - - battery: sbs-battery at b { - compatible = "sbs,sbs-battery"; - reg = <0xb>; - sbs,i2c-retry-count = <2>; - sbs,poll-retry-count = <10>; - power-supplies = <&charger>; - }; - }; - }; - }; - - spi at 7000da00 { - status = "okay"; - spi-max-frequency = <25000000>; - - flash at 0 { - compatible = "winbond,w25q32dw"; - reg = <0>; - }; - }; - - pmc at 7000e400 { - nvidia,invert-interrupt; - nvidia,suspend-mode = <0>; - nvidia,cpu-pwr-good-time = <500>; - nvidia,cpu-pwr-off-time = <300>; - nvidia,core-pwr-good-time = <641 3845>; - nvidia,core-pwr-off-time = <61036>; - nvidia,core-power-req-active-high; - nvidia,sys-clock-req-active-high; - }; - - hda at 70030000 { - status = "okay"; - }; - - sdhci at 700b0000 { /* WiFi/BT on this bus */ - status = "okay"; - power-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>; - bus-width = <4>; - no-1-8-v; - non-removable; - }; - - sdhci at 700b0400 { /* SD Card on this bus */ - status = "okay"; - cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; - power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; - wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>; - bus-width = <4>; - no-1-8-v; - }; - - sdhci at 700b0600 { /* eMMC on this bus */ - status = "okay"; - bus-width = <8>; - no-1-8-v; - non-removable; - }; - - ahub at 70300000 { - i2s at 70301100 { - status = "okay"; - }; - }; - - usb at 7d000000 { /* Rear external USB port. */ - status = "okay"; - nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>; - }; - - usb-phy at 7d000000 { - status = "okay"; - }; - - usb at 7d004000 { /* Internal webcam. */ - status = "okay"; - }; - - usb-phy at 7d004000 { - status = "okay"; - }; - - usb at 7d008000 { /* Left external USB port. */ - status = "okay"; - nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>; - }; - - usb-phy at 7d008000 { - status = "okay"; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - - enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; - power-supply = <&vdd_led>; - pwms = <&pwm 1 1000000>; - - default-brightness-level = <224>; - brightness-levels = - < 0 1 2 3 4 5 6 7 - 8 9 10 11 12 13 14 15 - 16 17 18 19 20 21 22 23 - 24 25 26 27 28 29 30 31 - 32 33 34 35 36 37 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - 256>; - }; - - clocks { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - clk32k_in: clock at 0 { - compatible = "fixed-clock"; - reg = <0>; - #clock-cells = <0>; - clock-frequency = <32768>; - }; - }; - - gpio at 6000d000 { - u-boot,dm-pre-reloc; - }; - - gpio-keys { - compatible = "gpio-keys"; - - lid { - label = "Lid"; - gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>; - linux,input-type = <5>; - linux,code = <KEY_RESERVED>; - debounce-interval = <1>; - gpio-key,wakeup; + dc at 54240000 { + status = "disabled"; }; - power { - label = "Power"; - gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; - linux,code = <KEY_POWER>; - debounce-interval = <30>; - gpio-key,wakeup; - }; }; panel: panel { compatible = "auo,b133xtn01"; backlight = <&backlight>; + ddc-i2c-bus = <&dpaux>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - vdd_led: regulator at 5 { - compatible = "regulator-fixed"; - reg = <5>; - regulator-name = "+VDD_LED"; - gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>; - enable-active-high; - }; + sdhci at 0,700b0400 { /* SD Card on this bus */ + wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>; }; sound { compatible = "nvidia,tegra-audio-max98090-nyan-big", + "nvidia,tegra-audio-max98090-nyan", "nvidia,tegra-audio-max98090"; - nvidia,model = "Acer Chromebook 13"; - - nvidia,audio-routing = - "Headphones", "HPR", - "Headphones", "HPL", - "Speakers", "SPKR", - "Speakers", "SPKL", - "Mic Jack", "MICBIAS", - "DMICL", "Int Mic", - "DMICR", "Int Mic", - "IN34", "Mic Jack"; - - nvidia,i2s-controller = <&tegra_i2s1>; - nvidia,audio-codec = <&acodec>; + nvidia,model = "GoogleNyanBig"; + }; - clocks = <&tegra_car TEGRA124_CLK_PLL_A>, - <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, - <&tegra_car TEGRA124_CLK_EXTERN1>; - clock-names = "pll_a", "pll_a_out0", "mclk"; + pinmux at 0,70000868 { + pinctrl-names = "default"; + pinctrl-0 = <&pinmux_default>; - nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(I, 7) GPIO_ACTIVE_HIGH>; + pinmux_default: common { + clk_32k_out_pa0 { + nvidia,pins = "clk_32k_out_pa0"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + uart3_cts_n_pa1 { + nvidia,pins = "uart3_cts_n_pa1"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap2_fs_pa2 { + nvidia,pins = "dap2_fs_pa2"; + nvidia,function = "i2s1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap2_sclk_pa3 { + nvidia,pins = "dap2_sclk_pa3"; + nvidia,function = "i2s1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap2_din_pa4 { + nvidia,pins = "dap2_din_pa4"; + nvidia,function = "i2s1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap2_dout_pa5 { + nvidia,pins = "dap2_dout_pa5"; + nvidia,function = "i2s1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc3_clk_pa6 { + nvidia,pins = "sdmmc3_clk_pa6"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + sdmmc3_cmd_pa7 { + nvidia,pins = "sdmmc3_cmd_pa7"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pb0 { + nvidia,pins = "pb0"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pb1 { + nvidia,pins = "pb1"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + sdmmc3_dat3_pb4 { + nvidia,pins = "sdmmc3_dat3_pb4"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc3_dat2_pb5 { + nvidia,pins = "sdmmc3_dat2_pb5"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc3_dat1_pb6 { + nvidia,pins = "sdmmc3_dat1_pb6"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc3_dat0_pb7 { + nvidia,pins = "sdmmc3_dat0_pb7"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + uart3_rts_n_pc0 { + nvidia,pins = "uart3_rts_n_pc0"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + uart2_txd_pc2 { + nvidia,pins = "uart2_txd_pc2"; + nvidia,function = "irda"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + uart2_rxd_pc3 { + nvidia,pins = "uart2_rxd_pc3"; + nvidia,function = "irda"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gen1_i2c_scl_pc4 { + nvidia,pins = "gen1_i2c_scl_pc4"; + nvidia,function = "i2c1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + gen1_i2c_sda_pc5 { + nvidia,pins = "gen1_i2c_sda_pc5"; + nvidia,function = "i2c1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + pc7 { + nvidia,pins = "pc7"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pg0 { + nvidia,pins = "pg0"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pg1 { + nvidia,pins = "pg1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pg2 { + nvidia,pins = "pg2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pg3 { + nvidia,pins = "pg3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pg4 { + nvidia,pins = "pg4"; + nvidia,function = "spi4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pg5 { + nvidia,pins = "pg5"; + nvidia,function = "spi4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pg6 { + nvidia,pins = "pg6"; + nvidia,function = "spi4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pg7 { + nvidia,pins = "pg7"; + nvidia,function = "spi4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ph0 { + nvidia,pins = "ph0"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ph1 { + nvidia,pins = "ph1"; + nvidia,function = "pwm1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ph2 { + nvidia,pins = "ph2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ph3 { + nvidia,pins = "ph3"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ph4 { + nvidia,pins = "ph4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ph5 { + nvidia,pins = "ph5"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ph6 { + nvidia,pins = "ph6"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ph7 { + nvidia,pins = "ph7"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pi0 { + nvidia,pins = "pi0"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pi1 { + nvidia,pins = "pi1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pi2 { + nvidia,pins = "pi2"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pi3 { + nvidia,pins = "pi3"; + nvidia,function = "spi4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pi4 { + nvidia,pins = "pi4"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pi5 { + nvidia,pins = "pi5"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pi6 { + nvidia,pins = "pi6"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pi7 { + nvidia,pins = "pi7"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pj0 { + nvidia,pins = "pj0"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pj2 { + nvidia,pins = "pj2"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + uart2_cts_n_pj5 { + nvidia,pins = "uart2_cts_n_pj5"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + uart2_rts_n_pj6 { + nvidia,pins = "uart2_rts_n_pj6"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pj7 { + nvidia,pins = "pj7"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pk0 { + nvidia,pins = "pk0"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pk1 { + nvidia,pins = "pk1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pk2 { + nvidia,pins = "pk2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pk3 { + nvidia,pins = "pk3"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pk4 { + nvidia,pins = "pk4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + spdif_out_pk5 { + nvidia,pins = "spdif_out_pk5"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + spdif_in_pk6 { + nvidia,pins = "spdif_in_pk6"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pk7 { + nvidia,pins = "pk7"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap1_fs_pn0 { + nvidia,pins = "dap1_fs_pn0"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap1_din_pn1 { + nvidia,pins = "dap1_din_pn1"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap1_dout_pn2 { + nvidia,pins = "dap1_dout_pn2"; + nvidia,function = "i2s0"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap1_sclk_pn3 { + nvidia,pins = "dap1_sclk_pn3"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + usb_vbus_en0_pn4 { + nvidia,pins = "usb_vbus_en0_pn4"; + nvidia,function = "usb"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + usb_vbus_en1_pn5 { + nvidia,pins = "usb_vbus_en1_pn5"; + nvidia,function = "usb"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + hdmi_int_pn7 { + nvidia,pins = "hdmi_int_pn7"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; + }; + ulpi_data7_po0 { + nvidia,pins = "ulpi_data7_po0"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ulpi_data0_po1 { + nvidia,pins = "ulpi_data0_po1"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ulpi_data1_po2 { + nvidia,pins = "ulpi_data1_po2"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ulpi_data2_po3 { + nvidia,pins = "ulpi_data2_po3"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ulpi_data3_po4 { + nvidia,pins = "ulpi_data3_po4"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ulpi_data4_po5 { + nvidia,pins = "ulpi_data4_po5"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ulpi_data5_po6 { + nvidia,pins = "ulpi_data5_po6"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ulpi_data6_po7 { + nvidia,pins = "ulpi_data6_po7"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap3_fs_pp0 { + nvidia,pins = "dap3_fs_pp0"; + nvidia,function = "i2s2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap3_din_pp1 { + nvidia,pins = "dap3_din_pp1"; + nvidia,function = "i2s2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap3_dout_pp2 { + nvidia,pins = "dap3_dout_pp2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap3_sclk_pp3 { + nvidia,pins = "dap3_sclk_pp3"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap4_fs_pp4 { + nvidia,pins = "dap4_fs_pp4"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap4_din_pp5 { + nvidia,pins = "dap4_din_pp5"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap4_dout_pp6 { + nvidia,pins = "dap4_dout_pp6"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap4_sclk_pp7 { + nvidia,pins = "dap4_sclk_pp7"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_col0_pq0 { + nvidia,pins = "kb_col0_pq0"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_col1_pq1 { + nvidia,pins = "kb_col1_pq1"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_col2_pq2 { + nvidia,pins = "kb_col2_pq2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_col3_pq3 { + nvidia,pins = "kb_col3_pq3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_col4_pq4 { + nvidia,pins = "kb_col4_pq4"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_col5_pq5 { + nvidia,pins = "kb_col5_pq5"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_col6_pq6 { + nvidia,pins = "kb_col6_pq6"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_col7_pq7 { + nvidia,pins = "kb_col7_pq7"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_row0_pr0 { + nvidia,pins = "kb_row0_pr0"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row1_pr1 { + nvidia,pins = "kb_row1_pr1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_row2_pr2 { + nvidia,pins = "kb_row2_pr2"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row3_pr3 { + nvidia,pins = "kb_row3_pr3"; + nvidia,function = "kbc"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row4_pr4 { + nvidia,pins = "kb_row4_pr4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_row5_pr5 { + nvidia,pins = "kb_row5_pr5"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row6_pr6 { + nvidia,pins = "kb_row6_pr6"; + nvidia,function = "kbc"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row7_pr7 { + nvidia,pins = "kb_row7_pr7"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_row8_ps0 { + nvidia,pins = "kb_row8_ps0"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row9_ps1 { + nvidia,pins = "kb_row9_ps1"; + nvidia,function = "uarta"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row10_ps2 { + nvidia,pins = "kb_row10_ps2"; + nvidia,function = "uarta"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_row11_ps3 { + nvidia,pins = "kb_row11_ps3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row12_ps4 { + nvidia,pins = "kb_row12_ps4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row13_ps5 { + nvidia,pins = "kb_row13_ps5"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row14_ps6 { + nvidia,pins = "kb_row14_ps6"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row15_ps7 { + nvidia,pins = "kb_row15_ps7"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_row16_pt0 { + nvidia,pins = "kb_row16_pt0"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row17_pt1 { + nvidia,pins = "kb_row17_pt1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gen2_i2c_scl_pt5 { + nvidia,pins = "gen2_i2c_scl_pt5"; + nvidia,function = "i2c2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + gen2_i2c_sda_pt6 { + nvidia,pins = "gen2_i2c_sda_pt6"; + nvidia,function = "i2c2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_cmd_pt7 { + nvidia,pins = "sdmmc4_cmd_pt7"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pu0 { + nvidia,pins = "pu0"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pu1 { + nvidia,pins = "pu1"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pu2 { + nvidia,pins = "pu2"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pu3 { + nvidia,pins = "pu3"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pu4 { + nvidia,pins = "pu4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pu5 { + nvidia,pins = "pu5"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pu6 { + nvidia,pins = "pu6"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pv0 { + nvidia,pins = "pv0"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pv1 { + nvidia,pins = "pv1"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + sdmmc3_cd_n_pv2 { + nvidia,pins = "sdmmc3_cd_n_pv2"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc1_wp_n_pv3 { + nvidia,pins = "sdmmc1_wp_n_pv3"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ddc_scl_pv4 { + nvidia,pins = "ddc_scl_pv4"; + nvidia,function = "i2c4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; + }; + ddc_sda_pv5 { + nvidia,pins = "ddc_sda_pv5"; + nvidia,function = "i2c4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; + }; + gpio_w2_aud_pw2 { + nvidia,pins = "gpio_w2_aud_pw2"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gpio_w3_aud_pw3 { + nvidia,pins = "gpio_w3_aud_pw3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap_mclk1_pw4 { + nvidia,pins = "dap_mclk1_pw4"; + nvidia,function = "extperiph1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + clk2_out_pw5 { + nvidia,pins = "clk2_out_pw5"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + uart3_txd_pw6 { + nvidia,pins = "uart3_txd_pw6"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + uart3_rxd_pw7 { + nvidia,pins = "uart3_rxd_pw7"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dvfs_pwm_px0 { + nvidia,pins = "dvfs_pwm_px0"; + nvidia,function = "cldvfs"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gpio_x1_aud_px1 { + nvidia,pins = "gpio_x1_aud_px1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dvfs_clk_px2 { + nvidia,pins = "dvfs_clk_px2"; + nvidia,function = "cldvfs"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gpio_x3_aud_px3 { + nvidia,pins = "gpio_x3_aud_px3"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gpio_x4_aud_px4 { + nvidia,pins = "gpio_x4_aud_px4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gpio_x5_aud_px5 { + nvidia,pins = "gpio_x5_aud_px5"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gpio_x6_aud_px6 { + nvidia,pins = "gpio_x6_aud_px6"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gpio_x7_aud_px7 { + nvidia,pins = "gpio_x7_aud_px7"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ulpi_clk_py0 { + nvidia,pins = "ulpi_clk_py0"; + nvidia,function = "spi1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ulpi_dir_py1 { + nvidia,pins = "ulpi_dir_py1"; + nvidia,function = "spi1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ulpi_nxt_py2 { + nvidia,pins = "ulpi_nxt_py2"; + nvidia,function = "spi1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ulpi_stp_py3 { + nvidia,pins = "ulpi_stp_py3"; + nvidia,function = "spi1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + sdmmc1_dat3_py4 { + nvidia,pins = "sdmmc1_dat3_py4"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc1_dat2_py5 { + nvidia,pins = "sdmmc1_dat2_py5"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc1_dat1_py6 { + nvidia,pins = "sdmmc1_dat1_py6"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc1_dat0_py7 { + nvidia,pins = "sdmmc1_dat0_py7"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc1_clk_pz0 { + nvidia,pins = "sdmmc1_clk_pz0"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc1_cmd_pz1 { + nvidia,pins = "sdmmc1_cmd_pz1"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pwr_i2c_scl_pz6 { + nvidia,pins = "pwr_i2c_scl_pz6"; + nvidia,function = "i2cpwr"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + pwr_i2c_sda_pz7 { + nvidia,pins = "pwr_i2c_sda_pz7"; + nvidia,function = "i2cpwr"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_dat0_paa0 { + nvidia,pins = "sdmmc4_dat0_paa0"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_dat1_paa1 { + nvidia,pins = "sdmmc4_dat1_paa1"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_dat2_paa2 { + nvidia,pins = "sdmmc4_dat2_paa2"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_dat3_paa3 { + nvidia,pins = "sdmmc4_dat3_paa3"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_dat4_paa4 { + nvidia,pins = "sdmmc4_dat4_paa4"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_dat5_paa5 { + nvidia,pins = "sdmmc4_dat5_paa5"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_dat6_paa6 { + nvidia,pins = "sdmmc4_dat6_paa6"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_dat7_paa7 { + nvidia,pins = "sdmmc4_dat7_paa7"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pbb0 { + nvidia,pins = "pbb0"; + nvidia,function = "vgp6"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + cam_i2c_scl_pbb1 { + nvidia,pins = "cam_i2c_scl_pbb1"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + nvidia,open-drain = <TEGRA_PIN_DISABLE>; + }; + cam_i2c_sda_pbb2 { + nvidia,pins = "cam_i2c_sda_pbb2"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + nvidia,open-drain = <TEGRA_PIN_DISABLE>; + }; + pbb3 { + nvidia,pins = "pbb3"; + nvidia,function = "vgp3"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pbb4 { + nvidia,pins = "pbb4"; + nvidia,function = "vgp4"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pbb5 { + nvidia,pins = "pbb5"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pbb6 { + nvidia,pins = "pbb6"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pbb7 { + nvidia,pins = "pbb7"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + cam_mclk_pcc0 { + nvidia,pins = "cam_mclk_pcc0"; + nvidia,function = "vi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pcc1 { + nvidia,pins = "pcc1"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pcc2 { + nvidia,pins = "pcc2"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + sdmmc4_clk_pcc4 { + nvidia,pins = "sdmmc4_clk_pcc4"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + clk2_req_pcc5 { + nvidia,pins = "clk2_req_pcc5"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pex_l0_rst_n_pdd1 { + nvidia,pins = "pex_l0_rst_n_pdd1"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pex_l0_clkreq_n_pdd2 { + nvidia,pins = "pex_l0_clkreq_n_pdd2"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pex_wake_n_pdd3 { + nvidia,pins = "pex_wake_n_pdd3"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pex_l1_rst_n_pdd5 { + nvidia,pins = "pex_l1_rst_n_pdd5"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pex_l1_clkreq_n_pdd6 { + nvidia,pins = "pex_l1_clkreq_n_pdd6"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + clk3_out_pee0 { + nvidia,pins = "clk3_out_pee0"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + clk3_req_pee1 { + nvidia,pins = "clk3_req_pee1"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap_mclk1_req_pee2 { + nvidia,pins = "dap_mclk1_req_pee2"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + hdmi_cec_pee3 { + nvidia,pins = "hdmi_cec_pee3"; + nvidia,function = "cec"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + sdmmc3_clk_lb_out_pee4 { + nvidia,pins = "sdmmc3_clk_lb_out_pee4"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + sdmmc3_clk_lb_in_pee5 { + nvidia,pins = "sdmmc3_clk_lb_in_pee5"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dp_hpd_pff0 { + nvidia,pins = "dp_hpd_pff0"; + nvidia,function = "dp"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + usb_vbus_en2_pff1 { + nvidia,pins = "usb_vbus_en2_pff1"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + nvidia,open-drain = <TEGRA_PIN_DISABLE>; + }; + pff2 { + nvidia,pins = "pff2"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + nvidia,open-drain = <TEGRA_PIN_DISABLE>; + }; + core_pwr_req { + nvidia,pins = "core_pwr_req"; + nvidia,function = "pwron"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + cpu_pwr_req { + nvidia,pins = "cpu_pwr_req"; + nvidia,function = "cpu"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pwr_int_n { + nvidia,pins = "pwr_int_n"; + nvidia,function = "pmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + reset_out_n { + nvidia,pins = "reset_out_n"; + nvidia,function = "reset_out_n"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + owr { + nvidia,pins = "owr"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; + }; + clk_32k_in { + nvidia,pins = "clk_32k_in"; + nvidia,function = "clk"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + jtag_rtck { + nvidia,pins = "jtag_rtck"; + nvidia,function = "rtck"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + }; }; }; - -#include "cros-ec-keyboard.dtsi"
arch/arm/dts/tegra124-nyan.dtsi new file +718 -0
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Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 6/23 tegra: gpio: Show the GPIO value for outputs
In reply to Simon GlassThe tegra GPIO controller has two ways of reading the value of a GPIO. It can supply the 'input' value (which is the value read from the pin) and the 'output' value (which is the value being driven from the pin. With a GPIO set to output mode, the 'input' value is always low which is not very useful.
This has the unfortunate result that setting a GPIO high still leaves it showing as low in the 'gpio status' command.
Adjust the driver to check which direction the GPIO is set to, then read the value from the appropriate register: 'input' for input GPIOs, 'output' for output GPIOs.
---
Changes in v2: None
drivers/gpio/tegra_gpio.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
drivers/gpio/tegra_gpio.c +4 -1
@@ -177,7 +177,10 @@ static int tegra_gpio_get_value(struct udevice *dev, unsigned offset)debug ("%s: pin = %d (port %d:bit %d)\n" , __func__, gpio,GPIO_FULLPORT (gpio),GPIO_BIT (gpio)); - val =readl (&state->bank->gpio_in[GPIO_PORT (gpio)]); +if (get_direction (gpio) ==DIRECTION_INPUT ) + val =readl (&state->bank->gpio_in[GPIO_PORT (gpio)]); +else + val =readl (&state->bank->gpio_out[GPIO_PORT (gpio)]);return (val >>GPIO_BIT (gpio)) &1 ; }
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 7/23 tegra: pwm: Add a driver for the tegra PWM
In reply to Simon GlassThis PWM supports four channels. The driver always uses the 32KHz clock, and adjusts the duty cycle accordingly.
---
Changes in v2: None
arch/arm/include/asm/arch-tegra/pwm.h | 2 + drivers/pwm/Makefile | 3 ++ drivers/pwm/tegra_pwm.c | 85 +++++++++++++++++++++++++++++++++++ 3 files changed, 90 insertions(+) create mode 100644 drivers/pwm/tegra_pwm.c
arch/arm/include/asm/arch-tegra/pwm.h +2 -0
@@ -27,6 +27,7 @@ struct pwm_ctlr {#define PWM_DIVIDER_SHIFT 0#define PWM_DIVIDER_MASK (0x1FFF << PWM_DIVIDER_SHIFT) +#ifndef CONFIG_PWM /** * Program the PWM with the given parameters. *
@@ -56,5 +57,6 @@ int pwm_request(const void *blob, int node, const char *prop_name);* @return 0 if ok, -1 if the device tree node was not found or invalid. */ int pwm_init (const void *blob); +#endif #endif /* __ASM_ARCH_TEGRA_PWM_H */
drivers/pwm/Makefile +3 -0
@@ -13,3 +13,6 @@ obj-$(CONFIG_DM_PWM) += pwm-uclass.o obj-$(CONFIG_PWM_ROCKCHIP) += rk_pwm.o obj-$(CONFIG_PWM_IMX) += pwm-imx.o pwm-imx-util.o +ifdef CONFIG_DM_PWM +obj-$(CONFIG_PWM_TEGRA) += tegra_pwm.o +endif
drivers/pwm/tegra_pwm.c new file +85 -0
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Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 8/23 tegra: lcd: Merge tegra124-lcd.c into display.c
In reply to Simon GlassThere isn't a lot of benefit of have two separate files. With driver model the code needs to be in the same driver, so it's better to have it in the same file.
---
Changes in v2: None
arch/arm/include/asm/arch-tegra/dc.h | 5 -- drivers/video/tegra124/Makefile | 1 - drivers/video/tegra124/display.c | 81 ++++++++++++++++++++++++++++- drivers/video/tegra124/tegra124-lcd.c | 95 ----------------------------------- 4 files changed, 79 insertions(+), 103 deletions(-) delete mode 100644 drivers/video/tegra124/tegra124-lcd.c
arch/arm/include/asm/arch-tegra/dc.h +0 -5
@@ -566,9 +566,4 @@ enum {#define DC_N_WINDOWS 5#define DC_REG_SAVE_SPACE (DC_N_WINDOWS + 5) -struct display_timing ; - -int display_init (void *lcdbase,int fb_bits_per_pixel, -struct display_timing *timing); -#endif /* __ASM_ARCH_TEGRA_DC_H */
drivers/video/tegra124/Makefile +0 -1
@@ -7,4 +7,3 @@ obj-y += display.o obj-y += dp.o obj-y += sor.o -obj-y += tegra124-lcd.o
drivers/video/tegra124/display.c +79 -2
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drivers/video/tegra124/tegra124-lcd.c deleted +0 -95
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Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 8/23 tegra: lcd: Merge tegra124-lcd.c into display.c
Quoted 7 lines · On Sat, 30 Jan 2016 16:37:47 -0700 Simon Glass sjg at chromium.org wrote:
There isn't a lot of benefit of have two separate files. With driver model the code needs to be in the same driver, so it's better to have it in the same file.
Signed-off-by Simon Glass <[email protected]>---
Quoted 8 lines
Changes in v2: None
arch/arm/include/asm/arch-tegra/dc.h | 5 -- drivers/video/tegra124/Makefile | 1 - drivers/video/tegra124/display.c | 81 ++++++++++++++++++++++++++++- drivers/video/tegra124/tegra124-lcd.c | 95 ----------------------------------- 4 files changed, 79 insertions(+), 103 deletions(-) delete mode 100644 drivers/video/tegra124/tegra124-lcd.c
PATCH v2 9/23 tegra: Allow driver model to be used for the PWM
In reply to Simon GlassWe can skip this manual init when using driver model for the PWM.
---
Changes in v2: None
arch/arm/mach-tegra/board2.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
arch/arm/mach-tegra/board2.c +2 -1
@@ -134,7 +134,8 @@ int board_init(void)pin_mux_spi ();#endif -#ifdef CONFIG_PWM_TEGRA +/* Init is handled automatically in the driver-model case */ +#if defined(CONFIG_PWM_TEGRA ) && !defined(CONFIG_PWM )if (pwm_init (gd->fdt_blob))debug ("%s: Failed to init pwm\n" , __func__);#endif
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 10/23 tegra: Allow CONFIG_DM_VIDEO to be used as well as CONFIG_LCD
In reply to Simon GlassWhile we transition to using driver model for video, we need to support both options.
---
Changes in v2: None
arch/arm/mach-tegra/board2.c | 8 ++++++-- include/configs/tegra-common-post.h | 10 ++++++++-- 2 files changed, 14 insertions(+), 4 deletions(-)
arch/arm/mach-tegra/board2.c +6 -2
@@ -139,8 +139,10 @@ int board_init(void)if (pwm_init (gd->fdt_blob))debug ("%s: Failed to init pwm\n" , __func__);#endif -#ifdef CONFIG_LCD +#if defined(CONFIG_LCD ) || defined(CONFIG_DM_VIDEO )pin_mux_display (); +#endif +#ifdef CONFIG_LCD tegra_lcd_check_next_stage (gd->fdt_blob,0 );#endif /* boot param addr */
@@ -169,11 +171,13 @@ int board_init(void)pin_mux_usb ();#endif -#ifdef CONFIG_LCD +#if defined(CONFIG_LCD ) || defined(CONFIG_DM_VIDEO ) board_id =tegra_board_id (); err =tegra_lcd_pmic_init (board_id);if (err)return err; +#endif +#ifdef CONFIG_LCD tegra_lcd_check_next_stage (gd->fdt_blob,0 );#endif
include/configs/tegra-common-post.h +8 -2
@@ -53,6 +53,12 @@#define STDOUT_LCD ""#endif +#ifdef CONFIG_DM_VIDEO +#define STDOUT_VIDEO ",vidconsole" +#else +#define STDOUT_VIDEO "" +#endif +#ifdef CONFIG_CROS_EC_KEYB #define STDOUT_CROS_EC ",cros-ec-keyb"#else
@@ -61,8 +67,8 @@#define TEGRA_DEVICE_SETTINGS \ "stdin=serial" STDIN_KBD_KBC STDIN_KBD_USB STDOUT_CROS_EC "\0" \ - "stdout=serial" STDOUT_LCD "\0" \ - "stderr=serial" STDOUT_LCD "\0" \ + "stdout=serial" STDOUT_LCD STDOUT_VIDEO "\0" \ + "stderr=serial" STDOUT_LCD STDOUT_VIDEO "\0" \ ""#ifndef BOARD_EXTRA_ENV_SETTINGS
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 11/23 tegra: nyan-big: Move the LCD driver to driver model
In reply to Simon GlassAdjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself.
---
Changes in v2: None
configs/nyan-big_defconfig | 9 +++ drivers/video/Kconfig | 1 + drivers/video/simple_panel.c | 1 + drivers/video/tegra124/display.c | 169 ++++++++++++++++----------------------- drivers/video/tegra124/dp.c | 53 ++++++++---- drivers/video/tegra124/sor.c | 162 +++++++++++++++++++++++++------------ drivers/video/tegra124/sor.h | 45 +++++------ include/configs/nyan-big.h | 2 - include/fdtdec.h | 1 - lib/fdtdec.c | 1 - 10 files changed, 246 insertions(+), 198 deletions(-)
configs/nyan-big_defconfig +9 -0
@@ -12,6 +12,8 @@ CONFIG_SYS_PROMPT="Tegra124 (Nyan-big) # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y CONFIG_CMD_TPM=y CONFIG_CMD_TPM_TEST=y CONFIG_CROS_EC_KEYB=y
@@ -20,6 +22,10 @@ CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_PWM=y CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y CONFIG_TPM_TIS_INFINEON=y
@@ -27,6 +33,9 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_DISPLAY=y CONFIG_I2C_EDID=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_TEGRA124=y +CONFIG_VIDEO_BRIDGE=y CONFIG_USE_PRIVATE_LIBGCC=y CONFIG_TPM=y +CONFIG_ERRNO_STR=y
drivers/video/Kconfig +1 -0
@@ -339,6 +339,7 @@ config VIDEO_SANDBOX_SDL config VIDEO_TEGRA124 bool "Enable video support on Tegra124" + depends on DM_VIDEO help Tegra124 supports many video output options including eDP and HDMI. At present only eDP is supported by U-Boot. This option
drivers/video/simple_panel.c +1 -0
@@ -85,6 +85,7 @@ static const struct panel_ops simple_panel_ops = {static const struct udevice_id simple_panel_ids[] = { { .compatible ="simple-panel" }, + { .compatible ="auo,b133xtn01" }, { } };
drivers/video/tegra124/display.c +69 -100
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drivers/video/tegra124/dp.c +36 -17
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drivers/video/tegra124/sor.c +111 -51
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drivers/video/tegra124/sor.h +19 -26
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include/configs/nyan-big.h +0 -2
@@ -38,10 +38,8 @@#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)/* LCD support */ -#define CONFIG_LCD #define CONFIG_PWM_TEGRA #define CONFIG_AS3722_POWER -#define LCD_BPP LCD_COLOR16#define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CMD_BMP
include/fdtdec.h +0 -1
@@ -120,7 +120,6 @@ enum fdt_compat_id {COMPAT_NVIDIA_TEGRA20_EMC_TABLE ,/* Tegra20 memory timing table */ COMPAT_NVIDIA_TEGRA20_NAND ,/* Tegra2 NAND controller */ COMPAT_NVIDIA_TEGRA20_PWM ,/* Tegra 2 PWM controller */ -COMPAT_NVIDIA_TEGRA124_DC ,/* Tegra 124 Display controller */ COMPAT_NVIDIA_TEGRA124_SOR ,/* Tegra 124 Serial Output Resource */ COMPAT_NVIDIA_TEGRA124_PMC ,/* Tegra 124 power mgmt controller */ COMPAT_NVIDIA_TEGRA20_DC, /* Tegra 2 Display controller */
lib/fdtdec.c +0 -1
@@ -27,7 +27,6 @@ static const char * const compat_names[COMPAT_COUNT] = {COMPAT (NVIDIA_TEGRA20_EMC_TABLE ,"nvidia,tegra20-emc-table" ),COMPAT (NVIDIA_TEGRA20_NAND ,"nvidia,tegra20-nand" ),COMPAT (NVIDIA_TEGRA20_PWM ,"nvidia,tegra20-pwm" ), -COMPAT (NVIDIA_TEGRA124_DC ,"nvidia,tegra124-dc" ),COMPAT (NVIDIA_TEGRA124_SOR ,"nvidia,tegra124-sor" ),COMPAT (NVIDIA_TEGRA124_PMC ,"nvidia,tegra124-pmc" ), COMPAT(NVIDIA_TEGRA20_DC, "nvidia,tegra20-dc"),
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 11/23 tegra: nyan-big: Move the LCD driver to driver model
Quoted 9 lines · On Sat, 30 Jan 2016 16:37:50 -0700 Simon Glass sjg at chromium.org wrote:
Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal
simple_paneldriver to handle the display itself. We also need to enable some options such as regulators, PWMs andDM_VIDEOitself.Signed-off-by Simon Glass <[email protected]>---
Changes in v2: None
Quoted 11 lines
configs/nyan-big_defconfig | 9 +++ drivers/video/Kconfig | 1 + drivers/video/simple_panel.c | 1 + drivers/video/tegra124/display.c | 169 ++++++++++++++++----------------------- drivers/video/tegra124/dp.c | 53 ++++++++---- drivers/video/tegra124/sor.c | 162 +++++++++++++++++++++++++------------ drivers/video/tegra124/sor.h | 45 +++++------ include/configs/nyan-big.h | 2 - include/fdtdec.h | 1 - lib/fdtdec.c | 1 - 10 files changed, 246 insertions(+), 198 deletions(-)
PATCH v2 12/23 tegra: video: Rename CONFIG_VIDEO_TEGRA to CONFIG_VIDEO_TEGRA20
In reply to Simon GlassThis option refers only to the tegra20 video driver, so name it as such to avoid confusion with tegra124.
Also move this option to Kconfig.
---
Changes in v2: None
arch/arm/mach-tegra/tegra20/Makefile | 2 +- board/toradex/colibri_t20/colibri_t20.c | 2 +- configs/colibri_t20_defconfig | 1 + configs/harmony_defconfig | 1 + configs/medcom-wide_defconfig | 1 + configs/paz00_defconfig | 1 + configs/seaboard_defconfig | 1 + configs/tec_defconfig | 1 + configs/ventana_defconfig | 1 + drivers/video/Kconfig | 8 ++++++++ drivers/video/Makefile | 2 +- include/configs/colibri_t20.h | 1 - include/configs/harmony.h | 1 - include/configs/medcom-wide.h | 1 - include/configs/paz00.h | 1 - include/configs/seaboard.h | 1 - include/configs/tec.h | 1 - include/configs/ventana.h | 1 - 18 files changed, 18 insertions(+), 10 deletions(-)
arch/arm/mach-tegra/tegra20/Makefile +1 -1
@@ -7,7 +7,7 @@ ifdef CONFIG_SPL_BUILD obj-y += cpu.o else -obj-$(CONFIG_VIDEO_TEGRA) += display.o +obj-$(CONFIG_VIDEO_TEGRA20) += display.o endif # The AVP is ARMv4T architecture so we must use special compiler
board/toradex/colibri_t20/colibri_t20.c +1 -1
@@ -114,7 +114,7 @@ void pin_mux_usb(void) }#endif -#ifdef CONFIG_VIDEO_TEGRA +#ifdef CONFIG_VIDEO_TEGRA20 /* * Routine: pin_mux_display * Description: setup the pin muxes/tristate values for the LCD interface)
configs/colibri_t20_defconfig +1 -0
@@ -14,4 +14,5 @@ CONFIG_CMD_GPIO=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_VIDEO_TEGRA20=y CONFIG_USE_PRIVATE_LIBGCC=y
configs/harmony_defconfig +1 -0
@@ -16,3 +16,4 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_VIDEO_TEGRA20=y
configs/medcom-wide_defconfig +1 -0
@@ -15,4 +15,5 @@ CONFIG_CMD_GPIO=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_VIDEO_TEGRA20=y CONFIG_USE_PRIVATE_LIBGCC=y
configs/paz00_defconfig +1 -0
@@ -15,4 +15,5 @@ CONFIG_CMD_GPIO=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_VIDEO_TEGRA20=y CONFIG_USE_PRIVATE_LIBGCC=y
configs/seaboard_defconfig +1 -0
@@ -15,4 +15,5 @@ CONFIG_CMD_GPIO=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_VIDEO_TEGRA20=y CONFIG_USE_PRIVATE_LIBGCC=y
configs/tec_defconfig +1 -0
@@ -15,4 +15,5 @@ CONFIG_CMD_GPIO=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_VIDEO_TEGRA20=y CONFIG_USE_PRIVATE_LIBGCC=y
configs/ventana_defconfig +1 -0
@@ -15,4 +15,5 @@ CONFIG_CMD_GPIO=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_VIDEO_TEGRA20=y CONFIG_USE_PRIVATE_LIBGCC=y
drivers/video/Kconfig +8 -0
@@ -337,6 +337,14 @@ config VIDEO_SANDBOX_SDL console device and can display stdout output. Within U-Boot is is a normal bitmap display and can display images as well as text. +config VIDEO_TEGRA20 + bool "Enable LCD support on Tegra20" + help + Tegra20 supports video output to an attached LCD panel as well as + other options such as HDMI. Only the LCD is supported in U-Boot. + This option enables this support which can be used on devices which + have an LCD display connected. + config VIDEO_TEGRA124 bool "Enable video support on Tegra124" depends on DM_VIDEO
drivers/video/Makefile +1 -1
@@ -55,7 +55,7 @@ obj-$(CONFIG_VIDEO_SED13806) += sed13806.o obj-$(CONFIG_VIDEO_SM501) += sm501.o obj-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o videomodes.o obj-$(CONFIG_VIDEO_SUNXI) += sunxi_display.o videomodes.o -obj-$(CONFIG_VIDEO_TEGRA) += tegra.o +obj-$(CONFIG_VIDEO_TEGRA20) += tegra.o obj-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o obj-$(CONFIG_VIDEO_VESA) += vesa_fb.o obj-$(CONFIG_FORMIKE) += formike.o
include/configs/colibri_t20.h +0 -1
@@ -55,7 +55,6 @@/* LCD support */ #define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define CONFIG_VIDEO_TEGRA #define LCD_BPP LCD_COLOR16#define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10
include/configs/harmony.h +0 -1
@@ -62,7 +62,6 @@/* LCD support */ #define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define CONFIG_VIDEO_TEGRA #define LCD_BPP LCD_COLOR16#define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10
include/configs/medcom-wide.h +0 -1
@@ -50,7 +50,6 @@/* LCD support */ #define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define CONFIG_VIDEO_TEGRA #define LCD_BPP LCD_COLOR16#define CONFIG_SYS_WHITE_ON_BLACK
include/configs/paz00.h +0 -1
@@ -50,7 +50,6 @@/* LCD support */ #define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define CONFIG_VIDEO_TEGRA #define LCD_BPP LCD_COLOR16#define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10
include/configs/seaboard.h +0 -1
@@ -68,7 +68,6 @@/* LCD support */ #define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define CONFIG_VIDEO_TEGRA #define LCD_BPP LCD_COLOR16#define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10
include/configs/tec.h +0 -1
@@ -50,7 +50,6 @@/* LCD support */ #define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define CONFIG_VIDEO_TEGRA #define LCD_BPP LCD_COLOR16#define CONFIG_SYS_WHITE_ON_BLACK
include/configs/ventana.h +0 -1
@@ -51,7 +51,6 @@/* LCD support */ #define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define CONFIG_VIDEO_TEGRA #define LCD_BPP LCD_COLOR16#define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 12/23 tegra: video: Rename CONFIG_VIDEO_TEGRA to CONFIG_VIDEO_TEGRA20
Quoted 21 lines · On Sat, 30 Jan 2016 16:37:51 -0700 Simon Glass sjg at chromium.org wrote:
This option refers only to the tegra20 video driver, so name it as such to avoid confusion with tegra124.
Also move this option to
Kconfig.Signed-off-by Simon Glass <[email protected]>---
Changes in v2: None
arch/arm/mach-tegra/tegra20/Makefile | 2 +- board/toradex/colibri_t20/colibri_t20.c | 2 +- configs/colibri_t20_defconfig | 1 + configs/harmony_defconfig | 1 + configs/medcom-wide_defconfig | 1 + configs/paz00_defconfig | 1 + configs/seaboard_defconfig | 1 + configs/tec_defconfig | 1 + configs/ventana_defconfig | 1 + drivers/video/Kconfig | 8 ++++++++ drivers/video/Makefile | 2 +-
Quoted 8 lines
include/configs/colibri_t20.h | 1 - include/configs/harmony.h | 1 - include/configs/medcom-wide.h | 1 - include/configs/paz00.h | 1 - include/configs/seaboard.h | 1 - include/configs/tec.h | 1 - include/configs/ventana.h | 1 - 18 files changed, 18 insertions(+), 10 deletions(-)
PATCH v2 13/23 tegra: dts: Sync tegra20.dtsi with Linux v4.4
In reply to Simon GlassThis file has changed quite a bit since it was set up. Sync it back with Linux v4.4. Adjust the users slightly to cope with the changes:
- the host1x node is now called host1x at 50000000
- we need a clocks node to provide the clk32k_in phandle
- active usb nodes need status = "okay"
- active i2c nodes need status = "okay"
---
Changes in v2: None
arch/arm/dts/tegra20-colibri.dts | 18 +- arch/arm/dts/tegra20-harmony.dts | 40 ++- arch/arm/dts/tegra20-medcom-wide.dts | 26 +- arch/arm/dts/tegra20-paz00.dts | 39 ++- arch/arm/dts/tegra20-plutux.dts | 8 - arch/arm/dts/tegra20-seaboard.dts | 28 +- arch/arm/dts/tegra20-tamonten.dtsi | 15 +- arch/arm/dts/tegra20-tec.dts | 10 +- arch/arm/dts/tegra20-trimslice.dts | 34 +-- arch/arm/dts/tegra20-ventana.dts | 39 ++- arch/arm/dts/tegra20-whistler.dts | 35 ++- arch/arm/dts/tegra20.dtsi | 539 +++++++++++++++++++++++++++-------- 12 files changed, 560 insertions(+), 271 deletions(-)
arch/arm/dts/tegra20-colibri.dts +17 -1
@@ -20,7 +20,7 @@ sdhci0 = "/sdhci at c8000600"; }; - host1x { + host1x at 50000000 { status = "okay"; dc at 54200000 { status = "okay";
@@ -32,16 +32,19 @@ }; usb at c5000000 { + statuc = "okay"; dr_mode = "otg"; }; usb at c5004000 { + statuc = "okay"; /* VBUS_LAN */ nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>; nvidia,vbus-gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>; }; usb at c5008000 { + statuc = "okay"; /* USBH_PEN */ nvidia,vbus-gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; };
@@ -88,6 +91,19 @@ cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; }; + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock at 0 { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + lcd_panel: panel { clock = <25175000>; xres = <640>;
arch/arm/dts/tegra20-harmony.dts +19 -21
@@ -21,7 +21,7 @@ reg = <0x00000000 0x40000000>; }; - host1x { + host1x at 50000000 { status = "okay"; dc at 54200000 { status = "okay";
@@ -46,30 +46,15 @@ }; }; - i2c at 7000c000 { - status = "disabled"; - }; - - i2c at 7000c400 { - status = "disabled"; - }; - - i2c at 7000c500 { - status = "disabled"; - }; - - i2c at 7000d000 { - status = "disabled"; - }; - - usb at c5000000 { - status = "disabled"; - }; - usb at c5004000 { + statuc = "okay"; nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) 0>; }; + usb at c5008000 { + status = "okay"; + }; + sdhci at c8000200 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
@@ -86,6 +71,19 @@ bus-width = <8>; }; + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock at 0 { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + lcd_panel: panel { clock = <42430000>; xres = <1024>;
arch/arm/dts/tegra20-medcom-wide.dts +3 -23
@@ -19,7 +19,7 @@ reg = <0x00000000 0x20000000>; }; - host1x { + host1x at 50000000 { status = "okay"; dc at 54200000 {
@@ -36,28 +36,8 @@ clock-frequency = <216000000>; }; - i2c at 7000c000 { - status = "disabled"; - }; - - i2c at 7000c400 { - status = "disabled"; - }; - - i2c at 7000c500 { - status = "disabled"; - }; - - i2c at 7000d000 { - status = "disabled"; - }; - - usb at c5000000 { - status = "disabled"; - }; - - usb at c5004000 { - status = "disabled"; + usb at c5008000 { + status = "okay"; }; lcd_panel: panel {
arch/arm/dts/tegra20-paz00.dts +16 -23
@@ -20,7 +20,7 @@ reg = <0x00000000 0x20000000>; }; - host1x { + host1x at 50000000 { status = "okay"; dc at 54200000 { status = "okay";
@@ -35,28 +35,8 @@ clock-frequency = < 216000000 >; }; - i2c at 7000c000 { - status = "disabled"; - }; - - i2c at 7000c400 { - status = "disabled"; - }; - - i2c at 7000c500 { - status = "disabled"; - }; - - i2c at 7000d000 { - status = "disabled"; - }; - - usb at c5000000 { - status = "disabled"; - }; - - usb at c5004000 { - status = "disabled"; + usb at c5008000 { + status = "okay"; }; sdhci at c8000000 {
@@ -72,6 +52,19 @@ bus-width = <8>; }; + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock at 0 { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + lcd_panel: panel { /* PAZ00 has 1024x600 */ clock = <54030000>;
arch/arm/dts/tegra20-plutux.dts +0 -8
@@ -38,12 +38,4 @@ i2c at 7000d000 { status = "disabled"; }; - - usb at c5000000 { - status = "disabled"; - }; - - usb at c5004000 { - status = "disabled"; - }; };
arch/arm/dts/tegra20-seaboard.dts +26 -2
@@ -31,7 +31,7 @@ reg = < 0x00000000 0x40000000 >; }; - host1x { + host1x at 50000000 { status = "okay"; dc at 54200000 { status = "okay";
@@ -44,6 +44,7 @@ /* This is not used in U-Boot, but is expected to be in kernel .dts */ i2c at 7000d000 { + status = "okay"; clock-frequency = <100000>; pmic at 34 { compatible = "ti,tps6586x";
@@ -75,18 +76,21 @@ }; i2c at 7000c000 { + status = "okay"; clock-frequency = <100000>; }; i2c at 7000c400 { - status = "disabled"; + status = "okay"; }; i2c at 7000c500 { + status = "okay"; clock-frequency = <100000>; }; kbc at 7000e200 { + status = "okay"; linux,keymap = <0x00020011 0x0003001f 0x0004001e 0x0005002c 0x000701d0 0x0107007d 0x02060064 0x02070038 0x03000006 0x03010005 0x03020013 0x03030012 0x03040021 0x03050020
@@ -114,6 +118,8 @@ }; emc@7000f400 { + #address-cells = <1>; + #size-cells = <0>; emc-table at 190000 { reg = < 190000 >; compatible = "nvidia,tegra20-emc-table";
@@ -151,6 +157,7 @@ }; usb at c5000000 { + status = "okay"; nvidia,vbus-gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>; dr_mode = "otg"; };
@@ -159,6 +166,10 @@ status = "disabled"; }; + usb at c5008000 { + status = "okay"; + }; + sdhci at c8000400 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
@@ -172,6 +183,19 @@ bus-width = <8>; }; + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock at 0 { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + lcd_panel: panel { /* Seaboard has 1366x768 */ clock = <70600000>;
arch/arm/dts/tegra20-tamonten.dtsi +14 -1
@@ -8,7 +8,7 @@ reg = <0x00000000 0x20000000>; }; - host1x { + host1x at 50000000 { hdmi { vdd-supply = <&hdmi_vdd_reg>; pll-supply = <&hdmi_pll_reg>;
@@ -483,6 +483,19 @@ status = "okay"; }; + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock at 0 { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + regulators { compatible = "simple-bus";
arch/arm/dts/tegra20-tec.dts +1 -9
@@ -19,7 +19,7 @@ reg = <0x00000000 0x20000000>; }; - host1x { + host1x at 50000000 { status = "okay"; dc at 54200000 {
@@ -52,14 +52,6 @@ status = "disabled"; }; - usb at c5000000 { - status = "disabled"; - }; - - usb at c5004000 { - status = "disabled"; - }; - lcd_panel: panel { clock = <33260000>; xres = <800>;
arch/arm/dts/tegra20-trimslice.dts +14 -20
@@ -26,27 +26,11 @@ clock-frequency = <216000000>; }; - i2c at 7000c000 { - status = "disabled"; - }; - spi at 7000c380 { status = "okay"; spi-max-frequency = <25000000>; }; - i2c at 7000c400 { - status = "disabled"; - }; - - i2c at 7000c500 { - status = "disabled"; - }; - - i2c at 7000d000 { - status = "disabled"; - }; - pcie-controller at 80003000 { status = "okay";
@@ -62,13 +46,10 @@ }; usb at c5000000 { + status = "okay"; nvidia,vbus-gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; }; - usb at c5004000 { - status = "disabled"; - }; - sdhci at c8000000 { status = "okay"; bus-width = <4>;
@@ -81,6 +62,19 @@ bus-width = <4>; }; + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock at 0 { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + regulators { compatible = "simple-bus"; #address-cells = <1>;
arch/arm/dts/tegra20-ventana.dts +16 -23
@@ -20,7 +20,7 @@ reg = <0x00000000 0x40000000>; }; - host1x { + host1x at 50000000 { status = "okay"; dc at 54200000 { status = "okay";
@@ -35,28 +35,8 @@ clock-frequency = < 216000000 >; }; - i2c at 7000c000 { - status = "disabled"; - }; - - i2c at 7000c400 { - status = "disabled"; - }; - - i2c at 7000c500 { - status = "disabled"; - }; - - i2c at 7000d000 { - status = "disabled"; - }; - - usb at c5000000 { - status = "disabled"; - }; - - usb at c5004000 { - status = "disabled"; + usb at c5008000 { + status = "okay"; }; sdhci at c8000400 {
@@ -72,6 +52,19 @@ bus-width = <8>; }; + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock at 0 { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + lcd_panel: panel { clock = <72072000>; xres = <1366>;
arch/arm/dts/tegra20-whistler.dts +17 -18
@@ -26,19 +26,8 @@ clock-frequency = < 216000000 >; }; - i2c at 7000c000 { - status = "disabled"; - }; - - i2c at 7000c400 { - status = "disabled"; - }; - - i2c at 7000c500 { - status = "disabled"; - }; - i2c at 7000d000 { + status = "okay"; clock-frequency = <100000>; pmic at 3c {
@@ -56,12 +45,8 @@ }; }; - usb at c5000000 { - status = "disabled"; - }; - - usb at c5004000 { - status = "disabled"; + usb at c5008000 { + status = "okay"; }; sdhci at c8000400 {
@@ -74,4 +59,18 @@ status = "okay"; bus-width = <8>; }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock at 0 { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + };
arch/arm/dts/tegra20.dtsi +417 -122
740 lines not on this page · raw message
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 14/23 tegra: video: Merge the display driver into one file
In reply to Simon GlassAt present we have code in arch/arm and code in drivers/video. Move it all into drivers/video since it is a display driver and our current approach is to put all driver code in drivers/.
Make a few functions static now that they are not used outside the file.
---
Changes in v2:
- Fix a checkpatch warning
arch/arm/include/asm/arch-tegra20/display.h | 21 -- arch/arm/mach-tegra/tegra20/Makefile | 2 - arch/arm/mach-tegra/tegra20/display.c | 378 -------------------------- drivers/video/tegra.c | 396 ++++++++++++++++++++++++++++ 4 files changed, 396 insertions(+), 401 deletions(-)
arch/arm/include/asm/arch-tegra20/display.h +0 -21
@@ -88,27 +88,6 @@ struct fdt_panel_config { };/** -* Register a new display based on device tree configuration. -* -* The frame buffer can be positioned by U-Boot or overriden by the fdt. -* You should pass in the U-Boot address here, and check the contents of -* struct fdt_disp_config to see what was actually chosen. -* -* @param blob Device tree blob -* @param default_lcd_base Default address of LCD frame buffer -* @return 0 if ok, -1 on error (unsupported bits per pixel) -*/ -int tegra_display_probe (const void *blob,void *default_lcd_base); - -/** -* Return the current display configuration -* -* @return pointer to display configuration, or NULL if there is no valid -* config -*/ -struct fdt_disp_config *tegra_display_get_config (void ); - -/** * Perform the next stage of the LCD init if it is time to do so. * * LCD init can be time-consuming because of the number of delays we need
arch/arm/mach-tegra/tegra20/Makefile +0 -2
@@ -6,8 +6,6 @@ ifdef CONFIG_SPL_BUILD obj-y += cpu.o -else -obj-$(CONFIG_VIDEO_TEGRA20) += display.o endif # The AVP is ARMv4T architecture so we must use special compiler
arch/arm/mach-tegra/tegra20/display.c +0 -378
381 lines not on this page · raw message
drivers/video/tegra.c +396 -0
414 lines not on this page · raw message
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 14/23 tegra: video: Merge the display driver into one file
Quoted 8 lines · On Sat, 30 Jan 2016 16:37:53 -0700 Simon Glass sjg at chromium.org wrote:
At present we have code in
arch/armand code indrivers/video. Move it all intodrivers/videosince it is a display driver and our current approach is to put all driver code indrivers/.Make a few functions static now that they are not used outside the file.
Signed-off-by Simon Glass <[email protected]>---
Quoted 8 lines
Changes in v2:
- Fix a checkpatch warningarch/arm/include/asm/arch-tegra20/display.h | 21 -- arch/arm/mach-tegra/tegra20/Makefile | 2 - arch/arm/mach-tegra/tegra20/display.c | 378 -------------------------- drivers/video/tegra.c | 396 ++++++++++++++++++++++++++++ 4 files changed, 396 insertions(+), 401 deletions(-)
PATCH v2 15/23 tegra: video: Move the check for CONFIG_OF_CONTROL to Kconfig
In reply to Simon GlassWe can check this in Kconfig now.
---
Changes in v2: None
drivers/video/Kconfig | 1 + drivers/video/tegra.c | 4 ---- 2 files changed, 1 insertion(+), 4 deletions(-)
drivers/video/Kconfig +1 -0
@@ -339,6 +339,7 @@ config VIDEO_SANDBOX_SDL config VIDEO_TEGRA20 bool "Enable LCD support on Tegra20" + depends on OF_CONTROL help Tegra20 supports video output to an attached LCD panel as well as other options such as HDMI. Only the LCD is supported in U-Boot.
drivers/video/tegra.c +0 -4
@@ -51,10 +51,6 @@ vidinfo_t panel_info = { .vl_col = -1, }; -#if !CONFIG_IS_ENABLED (OF_CONTROL ) -#error "You must enable CONFIG_OF_CONTROL to get Tegra LCD support" -#endif -static void update_window (struct dc_ctlr *dc,struct disp_ctl_win *win) {unsigned h_dda, v_dda;
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 15/23 tegra: video: Move the check for CONFIG_OF_CONTROL to Kconfig
Quoted 10 lines · On Sat, 30 Jan 2016 16:37:54 -0700 Simon Glass sjg at chromium.org wrote:
We can check this in
Kconfignow.Signed-off-by Simon Glass <[email protected]>---
Changes in v2: None
drivers/video/Kconfig | 1 + drivers/video/tegra.c | 4 ---- 2 files changed, 1 insertion(+), 4 deletions(-)
PATCH v2 16/23 tegra: video: Merge the two config structures together
In reply to Simon GlassWe have a structure for the display panel and another for the controller. There is some overlap between them. Merge them to simplify the driver.
---
Changes in v2: None
arch/arm/include/asm/arch-tegra20/display.h | 39 ---------------- drivers/video/tegra.c | 72 +++++++++++++++++++++-------- 2 files changed, 53 insertions(+), 58 deletions(-)
arch/arm/include/asm/arch-tegra20/display.h +0 -39
@@ -48,45 +48,6 @@ enum lcd_cache_t { FDT_LCD_CACHE_FLUSH, }; -/* Information about the display controller */ -struct fdt_disp_config { -int valid;/* config is valid */ -int width;/* width in pixels */ -int height;/* height in pixels */ -int bpp;/* number of bits per pixel */ - -/* -* log2 of number of bpp, in general, unless it bpp is 24 in which -* case this field holds 24 also! This is a U-Boot thing. -*/ -int log2_bpp; -struct disp_ctlr *disp;/* Display controller to use */ -fdt_addr_t frame_buffer;/* Address of frame buffer */ -unsigned pixel_clock;/* Pixel clock in Hz */ -uint horiz_timing[FDT_LCD_TIMING_COUNT ];/* Horizontal timing */ -uint vert_timing[FDT_LCD_TIMING_COUNT ];/* Vertical timing */ -int panel_node;/* node offset of panel information */ -}; - -/* Information about the LCD panel */ -struct fdt_panel_config { -int pwm_channel;/* PWM channel to use for backlight */ -enum lcd_cache_t cache_type; - -struct gpio_desc backlight_en;/* GPIO for backlight enable */ -struct gpio_desc lvds_shutdown;/* GPIO for lvds shutdown */ -struct gpio_desc backlight_vdd;/* GPIO for backlight vdd */ -struct gpio_desc panel_vdd;/* GPIO for panel vdd */ -/* -* Panel required timings -* Timing 1: delay between panel_vdd-rise and data-rise -* Timing 2: delay between data-rise and backlight_vdd-rise -* Timing 3: delay between backlight_vdd and pwm-rise -* Timing 4: delay between pwm-rise and backlight_en-rise -*/ -uint panel_timings[FDT_LCD_TIMINGS ]; -}; -/** * Perform the next stage of the LCD init if it is time to do so. *
drivers/video/tegra.c +53 -19
150 lines not on this page · raw message
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 16/23 tegra: video: Merge the two config structures together
Quoted 11 lines · On Sat, 30 Jan 2016 16:37:55 -0700 Simon Glass sjg at chromium.org wrote:
We have a structure for the display panel and another for the controller. There is some overlap between them. Merge them to simplify the driver.
Signed-off-by Simon Glass <[email protected]>---
Changes in v2: None
arch/arm/include/asm/arch-tegra20/display.h | 39 ---------------- drivers/video/tegra.c | 72 +++++++++++++++++++++-------- 2 files changed, 53 insertions(+), 58 deletions(-)
PATCH v2 17/23 tegra: video: Convert tegra20 LCD driver to driver model
In reply to Simon GlassMove this driver over to use driver model. This involves rearranging the code somewhat. The effect is that everything is run from the probe() method.
Boards which use this are fixed up, but only seaboard is tested.
---
Changes in v2:
- Fix a checkpatch warning
arch/arm/dts/tegra20-seaboard.dts | 4 + arch/arm/dts/tegra20.dtsi | 2 + arch/arm/include/asm/arch-tegra20/display.h | 26 -- board/compal/paz00/paz00.c | 2 +- configs/colibri_t20_defconfig | 4 + configs/harmony_defconfig | 6 +- configs/medcom-wide_defconfig | 4 + configs/paz00_defconfig | 4 + configs/seaboard_defconfig | 4 + configs/tec_defconfig | 4 + configs/ventana_defconfig | 4 + drivers/video/tegra.c | 385 +++++++++++++--------------- include/configs/colibri_t20.h | 2 - include/configs/harmony.h | 2 - include/configs/medcom-wide.h | 2 - include/configs/paz00.h | 2 - include/configs/seaboard.h | 2 - include/configs/tec.h | 2 - include/configs/ventana.h | 2 - 19 files changed, 208 insertions(+), 255 deletions(-)
arch/arm/dts/tegra20-seaboard.dts +4 -0
@@ -40,6 +40,10 @@ nvidia,panel = <&lcd_panel>; }; }; + + dc at 54240000 { + status = "disabled"; + }; }; /* This is not used in U-Boot, but is expected to be in kernel .dts */
arch/arm/dts/tegra20.dtsi +2 -0
@@ -10,6 +10,7 @@ interrupt-parent = <&lic>; host1x at 50000000 { + u-boot,dm-pre-reloc; compatible = "nvidia,tegra20-host1x", "simple-bus"; reg = <0x50000000 0x00024000>; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
@@ -77,6 +78,7 @@ }; dc at 54200000 { + u-boot,dm-pre-reloc; compatible = "nvidia,tegra20-dc"; reg = <0x54200000 0x00040000>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
arch/arm/include/asm/arch-tegra20/display.h +0 -26
@@ -48,30 +48,4 @@ enum lcd_cache_t { FDT_LCD_CACHE_FLUSH, }; -/** -* Perform the next stage of the LCD init if it is time to do so. -* -* LCD init can be time-consuming because of the number of delays we need -* while waiting for the backlight power supply, etc. This function can -* be called at various times during U-Boot operation to advance the -* initialization of the LCD to the next stage if sufficient time has -* passed since the last stage. It keeps track of what stage it is up to -* and the time that it is permitted to move to the next stage. -* -* The final call should have wait=1 to complete the init. -* -* @param blob fdt blob containing LCD information -* @param wait 1 to wait until all init is complete, and then return -* 0 to return immediately, potentially doing nothing if it is -* not yet time for the next init. -*/ -int tegra_lcd_check_next_stage (const void *blob,int wait); - -/** -* Set up the maximum LCD size so we can size the frame buffer. -* -* @param blob fdt blob containing LCD information -*/ -void tegra_lcd_early_init (const void *blob); -#endif /*__ASM_ARCH_TEGRA_DISPLAY_H*/
board/compal/paz00/paz00.c +1 -1
@@ -41,7 +41,7 @@ void pin_mux_mmc(void) }#endif -#ifdef CONFIG_LCD +#ifdef CONFIG_DM_VIDEO /* this is a weak define that we are overriding */ void pin_mux_display (void ) {
configs/colibri_t20_defconfig +4 -0
@@ -11,8 +11,12 @@ CONFIG_SYS_PROMPT="Colibri T20 # " # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set +CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_PWM=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_TEGRA20=y CONFIG_USE_PRIVATE_LIBGCC=y
configs/harmony_defconfig +5 -1
@@ -12,8 +12,12 @@ CONFIG_SYS_PROMPT="Tegra20 (Harmony) # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set +CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_PWM=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y -CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_TEGRA20=y +CONFIG_USE_PRIVATE_LIBGCC=y
configs/medcom-wide_defconfig +4 -0
@@ -12,8 +12,12 @@ CONFIG_SYS_PROMPT="Tegra20 (Medcom-Wide) # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set +CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_PWM=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_TEGRA20=y CONFIG_USE_PRIVATE_LIBGCC=y
configs/paz00_defconfig +4 -0
@@ -12,8 +12,12 @@ CONFIG_SYS_PROMPT="Tegra20 (Paz00) MOD # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set +CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_PWM=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_TEGRA20=y CONFIG_USE_PRIVATE_LIBGCC=y
configs/seaboard_defconfig +4 -0
@@ -12,8 +12,12 @@ CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set +CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_PWM=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_TEGRA20=y CONFIG_USE_PRIVATE_LIBGCC=y
configs/tec_defconfig +4 -0
@@ -12,8 +12,12 @@ CONFIG_SYS_PROMPT="Tegra20 (TEC) # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set +CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_PWM=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_TEGRA20=y CONFIG_USE_PRIVATE_LIBGCC=y
configs/ventana_defconfig +4 -0
@@ -12,8 +12,12 @@ CONFIG_SYS_PROMPT="Tegra20 (Ventana) # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set +CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_PWM=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_TEGRA20=y CONFIG_USE_PRIVATE_LIBGCC=y
drivers/video/tegra.c +172 -213
618 lines not on this page · raw message
include/configs/colibri_t20.h +0 -2
@@ -53,9 +53,7 @@#define CONFIG_TFTP_TSIZE /* LCD support */ -#define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define LCD_BPP LCD_COLOR16#define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10#define CONFIG_CMD_BMP
include/configs/harmony.h +0 -2
@@ -60,9 +60,7 @@#define CONFIG_CMD_DHCP /* LCD support */ -#define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define LCD_BPP LCD_COLOR16#define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10
include/configs/medcom-wide.h +0 -2
@@ -48,9 +48,7 @@#define CONFIG_CMD_DHCP /* LCD support */ -#define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define LCD_BPP LCD_COLOR16#define CONFIG_SYS_WHITE_ON_BLACK /* support the new (FDT-based) image format */
include/configs/paz00.h +0 -2
@@ -48,9 +48,7 @@#define CONFIG_CMD_DHCP /* LCD support */ -#define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define LCD_BPP LCD_COLOR16#define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10
include/configs/seaboard.h +0 -2
@@ -66,9 +66,7 @@#define CONFIG_USB_KEYBOARD /* LCD support */ -#define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define LCD_BPP LCD_COLOR16#define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10
include/configs/tec.h +0 -2
@@ -48,9 +48,7 @@#define CONFIG_CMD_DHCP /* LCD support */ -#define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define LCD_BPP LCD_COLOR16#define CONFIG_SYS_WHITE_ON_BLACK /* support the new (FDT-based) image format */
include/configs/ventana.h +0 -2
@@ -49,9 +49,7 @@#define CONFIG_USB_KEYBOARD /* LCD support */ -#define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define LCD_BPP LCD_COLOR16#define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 17/23 tegra: video: Convert tegra20 LCD driver to driver model
Quoted 23 lines · On Sat, 30 Jan 2016 16:37:56 -0700 Simon Glass sjg at chromium.org wrote:
Move this driver over to use driver model. This involves rearranging the code somewhat. The effect is that everything is run from the
probe()method.Boards which use this are fixed up, but only seaboard is tested.
Signed-off-by Simon Glass <[email protected]>---
Changes in v2:
- Fix a checkpatch warningarch/arm/dts/tegra20-seaboard.dts | 4 + arch/arm/dts/tegra20.dtsi | 2 + arch/arm/include/asm/arch-tegra20/display.h | 26 -- board/compal/paz00/paz00.c | 2 +- configs/colibri_t20_defconfig | 4 + configs/harmony_defconfig | 6 +- configs/medcom-wide_defconfig | 4 + configs/paz00_defconfig | 4 + configs/seaboard_defconfig | 4 + configs/tec_defconfig | 4 + configs/ventana_defconfig | 4 + drivers/video/tegra.c | 385 +++++++++++++---------------
Quoted 8 lines
include/configs/colibri_t20.h | 2 - include/configs/harmony.h | 2 - include/configs/medcom-wide.h | 2 - include/configs/paz00.h | 2 - include/configs/seaboard.h | 2 - include/configs/tec.h | 2 - include/configs/ventana.h | 2 - 19 files changed, 208 insertions(+), 255 deletions(-)
PATCH v2 18/23 tegra: video: Remove the static variables
In reply to Simon GlassWe can move the static variables into the driver-private data.
---
Changes in v2: None
drivers/video/tegra.c | 31 +++++++++++++++---------------- 1 file changed, 15 insertions(+), 16 deletions(-)
drivers/video/tegra.c +15 -16
@@ -2,7 +2,7 @@* Copyright (c) 2011 The Chromium OS Authors. * SPDX-License-Identifier: GPL-2.0+ */ -#define DEBUG +#include <common.h> #include <dm.h> #include <fdtdec.h>
@@ -31,11 +31,10 @@ enum stage_t { STAGE_DONE, }; -static enum stage_t stage;/* Current stage we are at */ -static unsigned long timer_next;/* Time we can move onto next stage */ -/* Information about the display controller */ struct tegra_lcd_priv { +enum stage_t stage;/* Current stage we are at */ +unsigned long timer_next;/* Time we can move onto next stage */ int width;/* width in pixels */ int height;/* height in pixels */ int bpp;/* number of bits per pixel */
@@ -497,10 +496,10 @@ static int fdt_decode_lcd(const void *blob, struct tegra_lcd_priv *priv)*/ static int handle_stage (const void *blob,struct tegra_lcd_priv *priv) { -debug ("%s: stage %d\n" , __func__, stage); +debug ("%s: stage %d\n" , __func__, priv->stage);/* do the things for this stage */ -switch (stage) { +switch (priv->stage) {case STAGE_START :/* * It is possible that the FDT has requested that the LCD be
@@ -542,12 +541,12 @@ static int handle_stage(const void *blob, struct tegra_lcd_priv *priv) }/* set up timer for next stage */ - timer_next =timer_get_us (); -if (stage <FDT_LCD_TIMINGS ) - timer_next += priv->panel_timings[stage] *1000 ; + priv->timer_next =timer_get_us (); +if (priv->stage <FDT_LCD_TIMINGS ) + priv->timer_next += priv->panel_timings[priv->stage] *1000 ;/* move to next stage */ - stage++; + priv->stage++;return 0 ; }
@@ -571,14 +570,14 @@ static int handle_stage(const void *blob, struct tegra_lcd_priv *priv)static int tegra_lcd_check_next_stage (const void *blob,struct tegra_lcd_priv *priv,int wait) { -if (stage ==STAGE_DONE ) +if (priv->stage ==STAGE_DONE )return 0 ; do { /* wait if we need to */ - debug("%s: stage %d\n", __func__, stage); - if (stage != STAGE_START) { - int delay = timer_next - timer_get_us(); + debug("%s: stage %d\n", __func__, priv->stage); + if (priv->stage != STAGE_START) { + int delay = priv->timer_next - timer_get_us(); if (delay > 0) { if (wait)
@@ -590,8 +589,8 @@ static int tegra_lcd_check_next_stage(const void *blob,if (handle_stage (blob, priv))return -1 ; - }while (wait && stage !=STAGE_DONE ); -if (stage ==STAGE_DONE ) + }while (wait && priv->stage !=STAGE_DONE ); +if (priv->stage ==STAGE_DONE )debug ("%s: LCD init complete\n" , __func__);return 0 ;
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 18/23 tegra: video: Remove the static variables
Quoted 9 lines · On Sat, 30 Jan 2016 16:37:57 -0700 Simon Glass sjg at chromium.org wrote:
We can move the static variables into the driver-private data.
Signed-off-by Simon Glass <[email protected]>---
Changes in v2: None
drivers/video/tegra.c | 31 +++++++++++++++---------------- 1 file changed, 15 insertions(+), 16 deletions(-)
PATCH v2 18/23 tegra: video: Remove the static variables
In reply to Simon Glassdrivers/video/tegra.c line 5
Quoted 10 lines · Simon Glass
drivers/video/tegra.c +1
-1@@ -2,7 +2,7 @@* Copyright (c) 2011 The Chromium OS Authors. * SPDX-License-Identifier: GPL-2.0+ */ -#define DEBUG +
This is an unrelated change.
PATCH v2 19/23 tegra: video: Move LCD enums into the driver
In reply to Simon GlassThere is no need to have these in a separate file as they are not referenced from anywhere else.
---
Changes in v2: None
arch/arm/include/asm/arch-tegra20/display.h | 22 ---------------------- drivers/video/tegra.c | 20 ++++++++++++++++++++ 2 files changed, 20 insertions(+), 22 deletions(-)
arch/arm/include/asm/arch-tegra20/display.h +0 -22
@@ -9,8 +9,6 @@#define __ASM_ARCH_TEGRA_DISPLAY_H#include <asm/arch-tegra/dc.h> -#include <fdtdec.h> -#include <asm/gpio.h> /* This holds information about a window which can be displayed */ struct disp_ctl_win {
@@ -28,24 +26,4 @@ struct disp_ctl_win { unsigned out_h; /* Height of output window in pixels */ }; -#define FDT_LCD_TIMINGS 4 - -enum { -FDT_LCD_TIMING_REF_TO_SYNC , -FDT_LCD_TIMING_SYNC_WIDTH , -FDT_LCD_TIMING_BACK_PORCH , -FDT_LCD_TIMING_FRONT_PORCH , - -FDT_LCD_TIMING_COUNT , -}; - -enum lcd_cache_t { -FDT_LCD_CACHE_OFF =0 , -FDT_LCD_CACHE_WRITE_THROUGH =1 <<0 , -FDT_LCD_CACHE_WRITE_BACK =1 <<1 , -FDT_LCD_CACHE_FLUSH =1 <<2 , -FDT_LCD_CACHE_WRITE_BACK_FLUSH =FDT_LCD_CACHE_WRITE_BACK | -FDT_LCD_CACHE_FLUSH , -}; -#endif /*__ASM_ARCH_TEGRA_DISPLAY_H*/
drivers/video/tegra.c +20 -0
@@ -31,6 +31,26 @@ enum stage_t { STAGE_DONE, }; +#define FDT_LCD_TIMINGS 4 + +enum { +FDT_LCD_TIMING_REF_TO_SYNC , +FDT_LCD_TIMING_SYNC_WIDTH , +FDT_LCD_TIMING_BACK_PORCH , +FDT_LCD_TIMING_FRONT_PORCH , + +FDT_LCD_TIMING_COUNT , +}; + +enum lcd_cache_t { +FDT_LCD_CACHE_OFF =0 , +FDT_LCD_CACHE_WRITE_THROUGH =1 <<0 , +FDT_LCD_CACHE_WRITE_BACK =1 <<1 , +FDT_LCD_CACHE_FLUSH =1 <<2 , +FDT_LCD_CACHE_WRITE_BACK_FLUSH =FDT_LCD_CACHE_WRITE_BACK | +FDT_LCD_CACHE_FLUSH , +}; +/* Information about the display controller */ struct tegra_lcd_priv {enum stage_t stage;/* Current stage we are@*/
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 19/23 tegra: video: Move LCD enums into the driver
Quoted 11 lines · On Sat, 30 Jan 2016 16:37:58 -0700 Simon Glass sjg at chromium.org wrote:
There is no need to have these in a separate file as they are not referenced from anywhere else.
Signed-off-by Simon Glass <[email protected]>---
Changes in v2: None
arch/arm/include/asm/arch-tegra20/display.h | 22 ---------------------- drivers/video/tegra.c | 20 ++++++++++++++++++++ 2 files changed, 20 insertions(+), 22 deletions(-)
PATCH v2 20/23 tegra: video: Move all fdt-decoding into a single function
In reply to Simon GlassJoin the two functions which decode the device tree and put them in the ofdata_to_platdata() method.
---
Changes in v2: None
drivers/video/tegra.c | 264 ++++++++++++++++++++------------------------------ 1 file changed, 105 insertions(+), 159 deletions(-)
drivers/video/tegra.c +105 -159
@@ -57,7 +57,6 @@ struct tegra_lcd_priv {unsigned long timer_next;/* Time we can move onto next stage */ int width;/* width in pixels */ int height;/* height in pixels */ -int bpp;/* number of bits per pixel */ /* * log2 of number of bpp, in general, unless it bpp is 24 in which
@@ -69,7 +68,6 @@ struct tegra_lcd_priv {unsigned pixel_clock;/* Pixel clock in Hz */ uint horiz_timing[FDT_LCD_TIMING_COUNT ];/* Horizontal timing */ uint vert_timing[FDT_LCD_TIMING_COUNT ];/* Vertical timing */ -int panel_node;/* node offset of panel information */ int pwm_channel;/* PWM channel to use for backlight */ enum lcd_cache_t cache_type;
@@ -318,109 +316,6 @@ static void debug_timing(const char *name, unsigned int timing[]) }/** -* Decode panel information from the fdt, according to a standard binding -* -* @param blob fdt blob -* @param node offset of fdt node to read from -* @param priv structure to store fdt config into -* @return 0 if ok, -ve on error -*/ -static int tegra_decode_panel (const void *blob,int node, -struct tegra_lcd_priv *priv) -{ -int front, back, ref; - - priv->width =fdtdec_get_int (blob, node,"xres" ,-1 ); - priv->height =fdtdec_get_int (blob, node,"yres" ,-1 ); - priv->pixel_clock =fdtdec_get_int (blob, node,"clock" ,0 ); -if (!priv->pixel_clock || priv->width ==-1 || priv->height ==-1 ) { -debug ("%s: Pixel parameters missing\n" , __func__); -return -FDT_ERR_NOTFOUND ; - } - - back =fdtdec_get_int (blob, node,"left-margin" ,-1 ); - front =fdtdec_get_int (blob, node,"right-margin" ,-1 ); - ref =fdtdec_get_int (blob, node,"hsync-len" ,-1 ); -if ((back | front | ref) ==-1 ) { -debug ("%s: Horizontal parameters missing\n" , __func__); -return -FDT_ERR_NOTFOUND ; - } - -/* Use a ref-to-sync of 1 always, and take this from the front porch */ - priv->horiz_timing[FDT_LCD_TIMING_REF_TO_SYNC ] =1 ; - priv->horiz_timing[FDT_LCD_TIMING_SYNC_WIDTH ] = ref; - priv->horiz_timing[FDT_LCD_TIMING_BACK_PORCH ] = back; - priv->horiz_timing[FDT_LCD_TIMING_FRONT_PORCH ] = front - - priv->horiz_timing[FDT_LCD_TIMING_REF_TO_SYNC ]; -debug_timing ("horiz" , priv->horiz_timing); - - back =fdtdec_get_int (blob, node,"upper-margin" ,-1 ); - front =fdtdec_get_int (blob, node,"lower-margin" ,-1 ); - ref =fdtdec_get_int (blob, node,"vsync-len" ,-1 ); -if ((back | front | ref) ==-1 ) { -debug ("%s: Vertical parameters missing\n" , __func__); -return -FDT_ERR_NOTFOUND ; - } - - priv->vert_timing[FDT_LCD_TIMING_REF_TO_SYNC ] =1 ; - priv->vert_timing[FDT_LCD_TIMING_SYNC_WIDTH ] = ref; - priv->vert_timing[FDT_LCD_TIMING_BACK_PORCH ] = back; - priv->vert_timing[FDT_LCD_TIMING_FRONT_PORCH ] = front - - priv->vert_timing[FDT_LCD_TIMING_REF_TO_SYNC ]; -debug_timing ("vert" , priv->vert_timing); - -return 0 ; -} - -/** -* Decode the display controller information from the fdt. -* -* @param blob fdt blob -* @param priv structure to store fdt priv into -* @return 0 if ok, -ve on error -*/ -static int tegra_display_decode_config (const void *blob,int node, -struct tegra_lcd_priv *priv) -{ -int rgb; -int bpp, bit; - - priv->disp = (struct disp_ctlr *)fdtdec_get_addr (blob, node,"reg" ); -if (!priv->disp) { -debug ("%s: No display controller address\n" , __func__); -return -1 ; - } - - rgb =fdt_subnode_offset (blob, node,"rgb" ); - - priv->panel_node =fdtdec_lookup_phandle (blob, rgb,"nvidia,panel" ); -if (priv->panel_node <0 ) { -debug ("%s: Cannot find panel information\n" , __func__); -return -1 ; - } - -if (tegra_decode_panel (blob, priv->panel_node, priv)) { -debug ("%s: Failed to decode panel information\n" , __func__); -return -1 ; - } - - bpp =fdtdec_get_int (blob, priv->panel_node,"nvidia,bits-per-pixel" , --1 ); - bit =ffs (bpp) -1 ; -if (bpp == (1 << bit)) - priv->log2_bpp = bit; -else - priv->log2_bpp = bpp; -if (bpp ==-1 ) { -debug ("%s: Pixel bpp parameters missing\n" , __func__); -return -FDT_ERR_NOTFOUND ; - } - priv->bpp = bpp; - -return 0 ; -} - -/** * Register a new display based on device tree configuration. * * The frame buffer can be positioned by U-Boot or overriden by the fdt.
@@ -467,51 +362,6 @@ static int tegra_display_probe(const void *blob, struct tegra_lcd_priv *priv, }/** -* Decode the panel information from the fdt. -* -* @param blob fdt blob -* @param priv structure to store fdt config into -* @return 0 if ok, -ve on error -*/ -static int fdt_decode_lcd (const void *blob,struct tegra_lcd_priv *priv) -{ -int display_node; - - display_node = priv->panel_node; -if (display_node <0 ) { -debug ("%s: No panel configuration available\n" , __func__); -return -1 ; - } - - priv->pwm_channel =pwm_request (blob, display_node,"nvidia,pwm" ); -if (priv->pwm_channel <0 ) { -debug ("%s: Unable to request PWM channel\n" , __func__); -return -1 ; - } - - priv->cache_type =fdtdec_get_int (blob, display_node, -"nvidia,cache-type" , -FDT_LCD_CACHE_WRITE_BACK_FLUSH ); - -/* These GPIOs are all optional */ -gpio_request_by_name_nodev (blob, display_node, -"nvidia,backlight-enable-gpios" ,0 , - &priv->backlight_en,GPIOD_IS_OUT ); -gpio_request_by_name_nodev (blob, display_node, -"nvidia,lvds-shutdown-gpios" ,0 , - &priv->lvds_shutdown,GPIOD_IS_OUT ); -gpio_request_by_name_nodev (blob, display_node, -"nvidia,backlight-vdd-gpios" ,0 , - &priv->backlight_vdd,GPIOD_IS_OUT ); -gpio_request_by_name_nodev (blob, display_node, -"nvidia,panel-vdd-gpios" ,0 , - &priv->panel_vdd,GPIOD_IS_OUT ); - -return fdtdec_get_int_array (blob, display_node,"nvidia,panel-timings" , - priv->panel_timings,FDT_LCD_TIMINGS ); -} - -/** * Handle the next stage of device init */ static int handle_stage (const void *blob,struct tegra_lcd_priv *priv)
@@ -624,15 +474,6 @@ static int tegra_lcd_probe(struct udevice *dev)const void *blob = gd->fdt_blob;int type =DCACHE_OFF ; -if (tegra_display_decode_config (blob, dev->of_offset, priv)) -return -1 ; - -/* get panel details */ -if (fdt_decode_lcd (blob, priv)) { -printf ("No valid LCD information in device tree\n" ); -return -1 ; - } -/* Initialize the Tegra display controller */ if (tegra_display_probe (blob, priv, (void *)plat->base)) {printf ("%s: Failed to probe display driver\n" , __func__);
@@ -660,6 +501,110 @@ static int tegra_lcd_probe(struct udevice *dev)return 0 ; } +static int tegra_lcd_ofdata_to_platdata (struct udevice *dev) +{ +struct tegra_lcd_priv *priv =dev_get_priv (dev); +const void *blob = gd->fdt_blob; +int node = dev->of_offset; +int front, back, ref; +int panel_node; +int rgb; +int bpp, bit; + + priv->disp = (struct disp_ctlr *)dev_get_addr (dev); +if (!priv->disp) { +debug ("%s: No display controller address\n" , __func__); +return -EINVAL ; + } + + rgb =fdt_subnode_offset (blob, node,"rgb" ); + + panel_node =fdtdec_lookup_phandle (blob, rgb,"nvidia,panel" ); +if (panel_node <0 ) { +debug ("%s: Cannot find panel information\n" , __func__); +return -EINVAL ; + } + + priv->width =fdtdec_get_int (blob, panel_node,"xres" ,-1 ); + priv->height =fdtdec_get_int (blob, panel_node,"yres" ,-1 ); + priv->pixel_clock =fdtdec_get_int (blob, panel_node,"clock" ,0 ); +if (!priv->pixel_clock || priv->width ==-1 || priv->height ==-1 ) { +debug ("%s: Pixel parameters missing\n" , __func__); +return -EINVAL ; + } + + back =fdtdec_get_int (blob, panel_node,"left-margin" ,-1 ); + front =fdtdec_get_int (blob, panel_node,"right-margin" ,-1 ); + ref =fdtdec_get_int (blob, panel_node,"hsync-len" ,-1 ); +if ((back | front | ref) ==-1 ) { +debug ("%s: Horizontal parameters missing\n" , __func__); +return -EINVAL ; + } + +/* Use a ref-to-sync of 1 always, and take this from the front porch */ + priv->horiz_timing[FDT_LCD_TIMING_REF_TO_SYNC ] =1 ; + priv->horiz_timing[FDT_LCD_TIMING_SYNC_WIDTH ] = ref; + priv->horiz_timing[FDT_LCD_TIMING_BACK_PORCH ] = back; + priv->horiz_timing[FDT_LCD_TIMING_FRONT_PORCH ] = front - + priv->horiz_timing[FDT_LCD_TIMING_REF_TO_SYNC ]; +debug_timing ("horiz" , priv->horiz_timing); + + back =fdtdec_get_int (blob, panel_node,"upper-margin" ,-1 ); + front =fdtdec_get_int (blob, panel_node,"lower-margin" ,-1 ); + ref =fdtdec_get_int (blob, panel_node,"vsync-len" ,-1 ); +if ((back | front | ref) ==-1 ) { +debug ("%s: Vertical parameters missing\n" , __func__); +return -EINVAL ; + } + + priv->vert_timing[FDT_LCD_TIMING_REF_TO_SYNC ] =1 ; + priv->vert_timing[FDT_LCD_TIMING_SYNC_WIDTH ] = ref; + priv->vert_timing[FDT_LCD_TIMING_BACK_PORCH ] = back; + priv->vert_timing[FDT_LCD_TIMING_FRONT_PORCH ] = front - + priv->vert_timing[FDT_LCD_TIMING_REF_TO_SYNC ]; +debug_timing ("vert" , priv->vert_timing); + + bpp =fdtdec_get_int (blob, panel_node,"nvidia,bits-per-pixel" ,-1 ); + bit =ffs (bpp) -1 ; +if (bpp == (1 << bit)) + priv->log2_bpp = bit; +else + priv->log2_bpp = bpp; +if (bpp ==-1 ) { +debug ("%s: Pixel bpp parameters missing\n" , __func__); +return -EINVAL ; + } + + priv->pwm_channel =pwm_request (blob, panel_node,"nvidia,pwm" ); +if (priv->pwm_channel <0 ) { +debug ("%s: Unable to request PWM channel\n" , __func__); +return -EINVAL ; + } + + priv->cache_type =fdtdec_get_int (blob, panel_node,"nvidia,cache-type" , +FDT_LCD_CACHE_WRITE_BACK_FLUSH ); + +/* These GPIOs are all optional */ +gpio_request_by_name_nodev (blob, panel_node, +"nvidia,backlight-enable-gpios" ,0 , + &priv->backlight_en,GPIOD_IS_OUT ); +gpio_request_by_name_nodev (blob, panel_node, +"nvidia,lvds-shutdown-gpios" ,0 , + &priv->lvds_shutdown,GPIOD_IS_OUT ); +gpio_request_by_name_nodev (blob, panel_node, +"nvidia,backlight-vdd-gpios" ,0 , + &priv->backlight_vdd,GPIOD_IS_OUT ); +gpio_request_by_name_nodev (blob, panel_node, +"nvidia,panel-vdd-gpios" ,0 , + &priv->panel_vdd,GPIOD_IS_OUT ); + +if (fdtdec_get_int_array (blob, panel_node,"nvidia,panel-timings" , + priv->panel_timings,FDT_LCD_TIMINGS )) +return -EINVAL ; + +return 0 ; +} +static int tegra_lcd_bind (struct udevice *dev) {struct video_uc_platdata *plat =dev_get_uclass_platdata (dev);
@@ -685,5 +630,6 @@ U_BOOT_DRIVER(tegra_lcd) = { .ops = &tegra_lcd_ops, .bind = tegra_lcd_bind, .probe = tegra_lcd_probe, + .ofdata_to_platdata = tegra_lcd_ofdata_to_platdata, .priv_auto_alloc_size = sizeof(struct tegra_lcd_priv), };
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 20/23 tegra: video: Move all fdt-decoding into a single function
Quoted 10 lines · On Sat, 30 Jan 2016 16:37:59 -0700 Simon Glass sjg at chromium.org wrote:
Join the two functions which decode the device tree and put them in the
ofdata_to_platdata()method.Signed-off-by Simon Glass <[email protected]>---
Changes in v2: None
drivers/video/tegra.c | 264 ++++++++++++++++++++------------------------------ 1 file changed, 105 insertions(+), 159 deletions(-)
PATCH v2 21/23 tegra: Convert CONFIG_PWM_TEGRA to Kconfig
In reply to Simon GlassMove this option to Kconfig and clean up the header files. Adjust the only user (the LCD driver) to work with the new driver.
---
Changes in v2:
- Fix erroneous Kconfig change for colibri
configs/colibri_t20_defconfig | 1 + configs/harmony_defconfig | 1 + configs/medcom-wide_defconfig | 1 + configs/nyan-big_defconfig | 1 + configs/paz00_defconfig | 1 + configs/seaboard_defconfig | 1 + configs/tec_defconfig | 1 + configs/ventana_defconfig | 1 + drivers/pwm/Kconfig | 8 ++++++++ include/configs/colibri_t20.h | 1 - include/configs/harmony.h | 1 - include/configs/medcom-wide.h | 1 - include/configs/nyan-big.h | 1 - include/configs/paz00.h | 1 - include/configs/seaboard.h | 1 - include/configs/tec.h | 1 - include/configs/ventana.h | 1 - 17 files changed, 16 insertions(+), 8 deletions(-)
configs/colibri_t20_defconfig +1 -0
@@ -14,6 +14,7 @@ CONFIG_CMD_GPIO=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y CONFIG_DM_PWM=y +CONFIG_PWM_TEGRA=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y
configs/harmony_defconfig +1 -0
@@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y CONFIG_DM_PWM=y +CONFIG_PWM_TEGRA=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y
configs/medcom-wide_defconfig +1 -0
@@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y CONFIG_DM_PWM=y +CONFIG_PWM_TEGRA=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y
configs/nyan-big_defconfig +1 -0
@@ -26,6 +26,7 @@ CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_PWM=y +CONFIG_PWM_TEGRA=y CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y CONFIG_TPM_TIS_INFINEON=y
configs/paz00_defconfig +1 -0
@@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y CONFIG_DM_PWM=y +CONFIG_PWM_TEGRA=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y
configs/seaboard_defconfig +1 -0
@@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y CONFIG_DM_PWM=y +CONFIG_PWM_TEGRA=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y
configs/tec_defconfig +1 -0
@@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y CONFIG_DM_PWM=y +CONFIG_PWM_TEGRA=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y
configs/ventana_defconfig +1 -0
@@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y CONFIG_DM_PWM=y +CONFIG_PWM_TEGRA=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y
drivers/pwm/Kconfig +8 -0
@@ -17,3 +17,11 @@ config PWM_ROCKCHIP programmable period and duty cycle. A 32-bit counter is used. Various options provided in the hardware (such as capture mode and continuous/single-shot) are not supported by the driver. + +config PWM_TEGRA + bool "Enable support for the Tegra PWM" + help + This PWM is found on Tegra 20 and other Nvidia SoCs. It supports + four channels with a programmable period and duty cycle. Only a + 32KHz clock is supported by the driver but the duty cycle is + configurable.
include/configs/colibri_t20.h +0 -1
@@ -53,7 +53,6 @@#define CONFIG_TFTP_TSIZE /* LCD support */ -#define CONFIG_PWM_TEGRA #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10#define CONFIG_CMD_BMP
include/configs/harmony.h +0 -1
@@ -60,7 +60,6 @@#define CONFIG_CMD_DHCP /* LCD support */ -#define CONFIG_PWM_TEGRA #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10
include/configs/medcom-wide.h +0 -1
@@ -48,7 +48,6 @@#define CONFIG_CMD_DHCP /* LCD support */ -#define CONFIG_PWM_TEGRA #define CONFIG_SYS_WHITE_ON_BLACK /* support the new (FDT-based) image format */
include/configs/nyan-big.h +0 -1
@@ -38,7 +38,6 @@#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)/* LCD support */ -#define CONFIG_PWM_TEGRA #define CONFIG_AS3722_POWER #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CMD_BMP
include/configs/paz00.h +0 -1
@@ -48,7 +48,6 @@#define CONFIG_CMD_DHCP /* LCD support */ -#define CONFIG_PWM_TEGRA #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10
include/configs/seaboard.h +0 -1
@@ -66,7 +66,6 @@#define CONFIG_USB_KEYBOARD /* LCD support */ -#define CONFIG_PWM_TEGRA #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10
include/configs/tec.h +0 -1
@@ -48,7 +48,6 @@#define CONFIG_CMD_DHCP /* LCD support */ -#define CONFIG_PWM_TEGRA #define CONFIG_SYS_WHITE_ON_BLACK /* support the new (FDT-based) image format */
include/configs/ventana.h +0 -1
@@ -49,7 +49,6 @@#define CONFIG_USB_KEYBOARD /* LCD support */ -#define CONFIG_PWM_TEGRA #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 22/23 tegra: video: Move LCD driver to use the DM PWM driver
In reply to Simon GlassUse the driver-model PWM driver in preference to the old code.
---
Changes in v2: None
arch/arm/dts/tegra20-colibri.dts | 4 ++++ arch/arm/dts/tegra20-harmony.dts | 4 ++++ arch/arm/dts/tegra20-medcom-wide.dts | 4 ++++ arch/arm/dts/tegra20-paz00.dts | 4 ++++ arch/arm/dts/tegra20-seaboard.dts | 4 ++++ arch/arm/dts/tegra20-tec.dts | 4 ++++ arch/arm/dts/tegra20-ventana.dts | 4 ++++ arch/arm/mach-tegra/Kconfig | 1 + drivers/pwm/Kconfig | 1 + drivers/video/tegra.c | 20 ++++++++++++++++---- 10 files changed, 46 insertions(+), 4 deletions(-)
arch/arm/dts/tegra20-colibri.dts +4 -0
@@ -104,6 +104,10 @@ }; }; + pwm: pwm at 7000a000 { + status = "okay"; + }; + lcd_panel: panel { clock = <25175000>; xres = <640>;
arch/arm/dts/tegra20-harmony.dts +4 -0
@@ -84,6 +84,10 @@ }; }; + pwm: pwm at 7000a000 { + status = "okay"; + }; + lcd_panel: panel { clock = <42430000>; xres = <1024>;
arch/arm/dts/tegra20-medcom-wide.dts +4 -0
@@ -40,6 +40,10 @@ status = "okay"; }; + pwm: pwm at 7000a000 { + status = "okay"; + }; + lcd_panel: panel { clock = <61715000>; xres = <1366>;
arch/arm/dts/tegra20-paz00.dts +4 -0
@@ -65,6 +65,10 @@ }; }; + pwm: pwm at 7000a000 { + status = "okay"; + }; + lcd_panel: panel { /* PAZ00 has 1024x600 */ clock = <54030000>;
arch/arm/dts/tegra20-seaboard.dts +4 -0
@@ -200,6 +200,10 @@ }; }; + pwm: pwm at 7000a000 { + status = "okay"; + }; + lcd_panel: panel { /* Seaboard has 1366x768 */ clock = <70600000>;
arch/arm/dts/tegra20-tec.dts +4 -0
@@ -52,6 +52,10 @@ status = "disabled"; }; + pwm: pwm at 7000a000 { + status = "okay"; + }; + lcd_panel: panel { clock = <33260000>; xres = <800>;
arch/arm/dts/tegra20-ventana.dts +4 -0
@@ -65,6 +65,10 @@ }; }; + pwm: pwm at 7000a000 { + status = "okay"; + }; + lcd_panel: panel { clock = <72072000>; xres = <1366>;
arch/arm/mach-tegra/Kconfig +1 -0
@@ -9,6 +9,7 @@ config TEGRA_COMMON select DM_KEYBOARD select DM_PCI select DM_PCI_COMPAT + select DM_PWM select DM_SERIAL select DM_SPI select DM_SPI_FLASH
drivers/pwm/Kconfig +1 -0
@@ -20,6 +20,7 @@ config PWM_ROCKCHIP config PWM_TEGRA bool "Enable support for the Tegra PWM" + depends on DM_PWM help This PWM is found on Tegra 20 and other Nvidia SoCs. It supports four channels with a programmable period and duty cycle. Only a
drivers/video/tegra.c +16 -4
@@ -6,6 +6,7 @@#include <common.h> #include <dm.h> #include <fdtdec.h> +#include <pwm.h> #include <video.h> #include <asm/system.h> #include <asm/gpio.h>
@@ -68,6 +69,7 @@ struct tegra_lcd_priv {unsigned pixel_clock;/* Pixel clock in Hz */ uint horiz_timing[FDT_LCD_TIMING_COUNT ];/* Horizontal timing */ uint vert_timing[FDT_LCD_TIMING_COUNT ];/* Vertical timing */ +struct udevice *pwm;int pwm_channel;/* PWM channel to use for backlight */ enum lcd_cache_t cache_type;
@@ -400,7 +402,8 @@ static int handle_stage(const void *blob, struct tegra_lcd_priv *priv)pinmux_set_func (PMUX_PINGRP_GPU ,PMUX_FUNC_PWM );pinmux_tristate_disable (PMUX_PINGRP_GPU ); -pwm_enable (priv->pwm_channel,32768 ,0xdf ,1 ); +pwm_set_config (priv->pwm, priv->pwm_channel,0xdf ,0xff ); +pwm_set_enable (priv->pwm, priv->pwm_channel, true);break ;case STAGE_BACKLIGHT_EN :if (dm_gpio_is_valid (&priv->backlight_en))
@@ -504,12 +507,14 @@ static int tegra_lcd_probe(struct udevice *dev)static int tegra_lcd_ofdata_to_platdata (struct udevice *dev) {struct tegra_lcd_priv *priv =dev_get_priv (dev); +struct fdtdec_phandle_args args;const void *blob = gd->fdt_blob;int node = dev->of_offset;int front, back, ref;int panel_node;int rgb;int bpp, bit; +int ret; priv->disp = (struct disp_ctlr *)dev_get_addr (dev);if (!priv->disp) {
@@ -575,12 +580,19 @@ static int tegra_lcd_ofdata_to_platdata(struct udevice *dev)return -EINVAL ; } - priv->pwm_channel =pwm_request (blob, panel_node,"nvidia,pwm" ); -if (priv->pwm_channel <0 ) { -debug ("%s: Unable to request PWM channel\n" , __func__); +if (fdtdec_parse_phandle_with_args (blob, panel_node,"nvidia,pwm" , +"#pwm-cells" ,0 ,0 , &args)) { +debug ("%s: Unable to decode PWM\n" , __func__);return -EINVAL ; } + ret =uclass_get_device_by_of_offset (UCLASS_PWM , args.node, &priv->pwm); +if (ret) { +debug ("%s: Unable to find PWM\n" , __func__); +return -EINVAL ; + } + priv->pwm_channel = args.args[0 ]; + priv->cache_type =fdtdec_get_int (blob, panel_node,"nvidia,cache-type" ,FDT_LCD_CACHE_WRITE_BACK_FLUSH );
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v2 22/23 tegra: video: Move LCD driver to use the DM PWM driver
Quoted 7 lines · On Sat, 30 Jan 2016 16:38:01 -0700 Simon Glass sjg at chromium.org wrote:
Use the driver-model PWM driver in preference to the old code.
Signed-off-by Simon Glass <[email protected]>---
Changes in v2: None
Quoted 11 lines
arch/arm/dts/tegra20-colibri.dts | 4 ++++ arch/arm/dts/tegra20-harmony.dts | 4 ++++ arch/arm/dts/tegra20-medcom-wide.dts | 4 ++++ arch/arm/dts/tegra20-paz00.dts | 4 ++++ arch/arm/dts/tegra20-seaboard.dts | 4 ++++ arch/arm/dts/tegra20-tec.dts | 4 ++++ arch/arm/dts/tegra20-ventana.dts | 4 ++++ arch/arm/mach-tegra/Kconfig | 1 + drivers/pwm/Kconfig | 1 + drivers/video/tegra.c | 20 ++++++++++++++++---- 10 files changed, 46 insertions(+), 4 deletions(-)
PATCH v2 23/23 tegra: video: Clean up the old LCD/PWM driver code
In reply to Simon GlassRemove the old PWM code. Remove calls to CONFIG_LCD functions now that we are using driver model for video.
---
Changes in v2:
- Rebase to master
arch/arm/include/asm/arch-tegra/pwm.h | 32 ------------- arch/arm/mach-tegra/Makefile | 1 - arch/arm/mach-tegra/board2.c | 27 +---------- arch/arm/mach-tegra/pwm.c | 89 ----------------------------------- 4 files changed, 2 insertions(+), 147 deletions(-) delete mode 100644 arch/arm/mach-tegra/pwm.c
arch/arm/include/asm/arch-tegra/pwm.h +0 -32
@@ -27,36 +27,4 @@ struct pwm_ctlr {#define PWM_DIVIDER_SHIFT 0#define PWM_DIVIDER_MASK (0x1FFF << PWM_DIVIDER_SHIFT) -#ifndef CONFIG_PWM -/** -* Program the PWM with the given parameters. -* -* @param channel PWM channel to update -* @param rate Clock rate to use for PWM, or 0 to leave alone -* @param pulse_width high pulse width: 0=always low, 1=1/256 pulse high, -* n = n/256 pulse high -* @param freq_divider frequency divider value (1 to use rate as is) -*/ -void pwm_enable (unsigned channel,int rate,int pulse_width,int freq_divider); - -/** -* Request a pwm channel as referenced by a device tree node. -* -* This channel can then be passed to pwm_enable(). -* -* @param blob Device tree blob -* @param node Node containing reference to pwm -* @param prop_name Property name of pwm reference -* @return channel number, if ok, else -1 -*/ -int pwm_request (const void *blob,int node,const char *prop_name); - -/** -* Set up the pwm controller, by looking it up in the fdt. -* -* @return 0 if ok, -1 if the device tree node was not found or invalid. -*/ -int pwm_init (const void *blob); -#endif -#endif /* __ASM_ARCH_TEGRA_PWM_H */
arch/arm/mach-tegra/Makefile +0 -1
@@ -12,7 +12,6 @@ obj-y += spl.o obj-y += cpu.o else obj-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o -obj-$(CONFIG_PWM_TEGRA) += pwm.o endif obj-$(CONFIG_ARM64) += arm64-mmu.o
arch/arm/mach-tegra/board2.c +2 -25
@@ -13,15 +13,9 @@#include <linux/sizes.h> #include <asm/io.h> #include <asm/arch/clock.h> -#ifdef CONFIG_LCD -#include <asm/arch/display.h> -#endif #include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> #include <asm/arch/pmu.h> -#ifdef CONFIG_PWM_TEGRA -#include <asm/arch/pwm.h> -#endif #include <asm/arch/tegra.h> #include <asm/arch-tegra/ap.h> #include <asm/arch-tegra/board.h>
@@ -135,16 +129,9 @@ int board_init(void)#endif /* Init is handled automatically in the driver-model case */ -#if defined(CONFIG_PWM_TEGRA ) && !defined(CONFIG_PWM ) -if (pwm_init (gd->fdt_blob)) -debug ("%s: Failed to init pwm\n" , __func__); -#endif -#if defined(CONFIG_LCD ) || defined(CONFIG_DM_VIDEO ) +#if defined(CONFIG_DM_VIDEO )pin_mux_display ();#endif -#ifdef CONFIG_LCD -tegra_lcd_check_next_stage (gd->fdt_blob,0 ); -#endif /* boot param addr */ gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE +0x100 );
@@ -171,15 +158,12 @@ int board_init(void)pin_mux_usb ();#endif -#if defined(CONFIG_LCD ) || defined(CONFIG_DM_VIDEO ) +#if defined(CONFIG_DM_VIDEO ) board_id =tegra_board_id (); err =tegra_lcd_pmic_init (board_id);if (err)return err;#endif -#ifdef CONFIG_LCD -tegra_lcd_check_next_stage (gd->fdt_blob,0 ); -#endif #ifdef CONFIG_TEGRA_NAND pin_mux_nand ();
@@ -226,9 +210,6 @@ int board_early_init_f(void)/* Initialize periph GPIOs */ gpio_early_init ();gpio_early_init_uart (); -#ifdef CONFIG_LCD -tegra_lcd_early_init (gd->fdt_blob); -#endif return 0 ; }
@@ -236,10 +217,6 @@ int board_early_init_f(void)int board_late_init (void ) { -#ifdef CONFIG_LCD -/* Make sure we finish initing the LCD */ -tegra_lcd_check_next_stage (gd->fdt_blob,1 ); -#endif #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE )if (tegra_cpu_is_non_secure ()) {printf ("CPU is in NS mode\n" );
arch/arm/mach-tegra/pwm.c deleted +0 -89
89 lines not on this page · raw message
Signature · 1 line
2.7.0.rc3.207.g0ac5344
v2 cover dm: tegra: Convert tegra20 and tegra124 video drivers to driver model
In reply to Simon GlassQuoted 18 lines · Simon Glass
This series moves these two drivers over to use driver model for video.
This involves the following steps:
- Sync up some device tree files with Linux
- Implement a proper PWM driver
- Clean up and unify the driver code
- Modify the existing drivers to work with driver modelThe tegra20 display driver uses device tree bindings invented in 2011 before Linux had this or anyone was able to agree a standard. It seems possible to move it to the new bindings (like tegra124) except for the issue of time delays between stages. It isn't clear how this should work, and Linux implements this by including all LCD definitions in the kernel source code, and not using any delays. This causes strange display artifacts on the display when starting up, but perhaps is harmless to the display. Future work will sync up the device tree more for seaboard, and thus tidy this up for nvidia boards.
Quoted 5 lines
A bug in the keyboard driver is also fixed by this series. The series is tested on seaboard and nyan-big, the two boards I have which support a display.
This series is available at u-boot-dm/tegra-working.
This changes the name of the output device from "lcd" to "vidconsole". Anyone who doesn't reset their environment to default when switching to this new U-Boot will lose their display output because of this. Is there any way to maintain compatibility?
Aside from that, I don't see any issues on Springbank (Seaboard), Harmony, Ventana, Paz00, or p2371-2180, so the series,
v2 cover dm: tegra: Convert tegra20 and tegra124 video drivers to driver model
Hi Stephen,
Quoted 27 lines · Stephen Warren
Quoted 26 lines · Simon Glass
This series moves these two drivers over to use driver model for video.
This involves the following steps:
- Sync up some device tree files with Linux
- Implement a proper PWM driver
- Clean up and unify the driver code
- Modify the existing drivers to work with driver modelThe tegra20 display driver uses device tree bindings invented in 2011 before
Linux had this or anyone was able to agree a standard. It seems possible to
move it to the new bindings (like tegra124) except for the issue of time delays between stages. It isn't clear how this should work, and Linux implements this by including all LCD definitions in the kernel source code,
and not using any delays. This causes strange display artifacts on the display when starting up, but perhaps is harmless to the display. Future work will sync up the device tree more for seaboard, and thus tidy this up for nvidia boards.A bug in the keyboard driver is also fixed by this series. The series is tested on seaboard and nyan-big, the two boards I have which support a display.
Quoted 7 lines
Quoted 1 line
This series is available at u-boot-dm/tegra-working.
This changes the name of the output device from "lcd" to "vidconsole". Anyone who doesn't reset their environment to default when switching to this new U-Boot will lose their display output because of this. Is there any way to maintain compatibility?
I could not think of one other than an egregious hack. It will certainly bite someone. Perhaps a hack that detects 'lcd' in the stdout env variable and prints a warning would be useful?
Quoted 4 lines
Aside from that, I don't see any issues on Springbank (Seaboard), Harmony, Ventana, Paz00, or p2371-2180, so the series,
Tested-by Stephen Warren <[email protected]>
Thanks very much for testing all those,.
Regards,
Simon
v2 cover dm: tegra: Convert tegra20 and tegra124 video drivers to driver model
Quoted 33 lines · Simon Glass
Hi Stephen,
Quoted 30 lines · Stephen Warren
Quoted 27 lines · Simon Glass
This series moves these two drivers over to use driver model for video.
This involves the following steps:
- Sync up some device tree files with Linux
- Implement a proper PWM driver
- Clean up and unify the driver code
- Modify the existing drivers to work with driver modelThe tegra20 display driver uses device tree bindings invented in 2011 before
Linux had this or anyone was able to agree a standard. It seems possible to
move it to the new bindings (like tegra124) except for the issue of time delays between stages. It isn't clear how this should work, and Linux implements this by including all LCD definitions in the kernel source code,
and not using any delays. This causes strange display artifacts on the display when starting up, but perhaps is harmless to the display. Future work will sync up the device tree more for seaboard, and thus tidy this up for nvidia boards.A bug in the keyboard driver is also fixed by this series. The series is tested on seaboard and nyan-big, the two boards I have which support a display.
This series is available at u-boot-dm/tegra-working.
Quoted 8 lines
Quoted 4 lines
This changes the name of the output device from "lcd" to "vidconsole". Anyone who doesn't reset their environment to default when switching to this new U-Boot will lose their display output because of this. Is there any way to maintain compatibility?
I could not think of one other than an egregious hack. It will certainly bite someone. Perhaps a hack that detects 'lcd' in the stdout env variable and prints a warning would be useful?
Can't the two drivers just respond to the same device name. Presumably a build would only have one or the other compiled in?
Or perhaps we can add a hook in the board-specific initialization code which re-writes the environment after loading it?
Printing a message would be useful if the user has a serial console plugged in, which will not always be the case. It is not possible on Paz00 (likely the most widely used T20 device) for example without taking the case apart and soldering to a very tiny connector; I expect almost nobody has done that.
v2 cover dm: tegra: Convert tegra20 and tegra124 video drivers to driver model
Hi Stephen,
Quoted 47 lines · Stephen Warren
Quoted 46 lines · Simon Glass
Hi Stephen,
Quoted 40 lines · Stephen Warren
Quoted 24 lines · Simon Glass
This series moves these two drivers over to use driver model for video.
This involves the following steps:
- Sync up some device tree files with Linux
- Implement a proper PWM driver
- Clean up and unify the driver code
- Modify the existing drivers to work with driver modelThe tegra20 display driver uses device tree bindings invented in 2011 before
Linux had this or anyone was able to agree a standard. It seems possible to
move it to the new bindings (like tegra124) except for the issue of time delays between stages. It isn't clear how this should work, and Linux implements this by including all LCD definitions in the kernel source code,
and not using any delays. This causes strange display artifacts on the display when starting up, but perhaps is harmless to the display. Future work will sync up the device tree more for seaboard, and thus tidy this up
for nvidia boards.Quoted 5 lines
A bug in the keyboard driver is also fixed by this series. The series is tested on seaboard and nyan-big, the two boards I have which support a display.
This series is available at u-boot-dm/tegra-working.
This changes the name of the output device from "lcd" to "vidconsole". Anyone who doesn't reset their environment to default when switching to this
new U-Boot will lose their display output because of this. Is there any way
to maintain compatibility?
Quoted 7 lines
Quoted 3 lines
I could not think of one other than an egregious hack. It will certainly bite someone. Perhaps a hack that detects 'lcd' in the stdout env variable and prints a warning would be useful?
Can't the two drivers just respond to the same device name. Presumably a build would only have one or the other compiled in?
I don't want to use 'lcd' for 'vidconsole' since 'vidconsole' is supposed to work for both LCD and video devices. The idea is to merge them. The only way I could think of to make it work was hack in stdio.c to automatically change 'lcd' to vidconsole. I was not brave enough to attempt that, but it might work. What do you think?
Quoted 9 lines
Or perhaps we can add a hook in the board-specific initialization code which re-writes the environment after loading it?
Printing a message would be useful if the user has a serial console plugged in, which will not always be the case. It is not possible on Paz00 (likely the most widely used T20 device) for example without taking the case apart and soldering to a very tiny connector; I expect almost nobody has done that.
Is that the shield thing? I'd really like to attempt that solder if there are instructions somewhere.
Regards,
Simon
v2 cover dm: tegra: Convert tegra20 and tegra124 video drivers to driver model
Quoted 55 lines · Simon Glass
Hi Stephen,
Quoted 52 lines · Stephen Warren
Quoted 49 lines · Simon Glass
Hi Stephen,
Quoted 34 lines · Stephen Warren
Quoted 24 lines · Simon Glass
This series moves these two drivers over to use driver model for video.
This involves the following steps:
- Sync up some device tree files with Linux
- Implement a proper PWM driver
- Clean up and unify the driver code
- Modify the existing drivers to work with driver modelThe tegra20 display driver uses device tree bindings invented in 2011 before
Linux had this or anyone was able to agree a standard. It seems possible to
move it to the new bindings (like tegra124) except for the issue of time delays between stages. It isn't clear how this should work, and Linux implements this by including all LCD definitions in the kernel source code,
and not using any delays. This causes strange display artifacts on the display when starting up, but perhaps is harmless to the display. Future work will sync up the device tree more for seaboard, and thus tidy this up
for nvidia boards.Quoted 5 lines
A bug in the keyboard driver is also fixed by this series. The series is tested on seaboard and nyan-big, the two boards I have which support a display.
This series is available at u-boot-dm/tegra-working.
Quoted 6 lines
This changes the name of the output device from "lcd" to "vidconsole". Anyone who doesn't reset their environment to default when switching to this
new U-Boot will lose their display output because of this. Is there any way
to maintain compatibility?I could not think of one other than an egregious hack. It will certainly bite someone. Perhaps a hack that detects 'lcd' in the stdout env variable and prints a warning would be useful?
Quoted 8 lines
Quoted 2 lines
Can't the two drivers just respond to the same device name. Presumably a build would only have one or the other compiled in?
I don't want to use 'lcd' for 'vidconsole' since 'vidconsole' is supposed to work for both LCD and video devices. The idea is to merge them. The only way I could think of to make it work was hack in
stdio.cto automatically change 'lcd' to vidconsole. I was not brave enough to attempt that, but it might work. What do you think?
That sounds like it should work. Isn't that simply:
#if SOMETHING
if (!strcmp(foo, "lcd"))
foo = "vidconsole";
#endif
Quoted 11 lines
Quoted 8 lines
Or perhaps we can add a hook in the board-specific initialization code which re-writes the environment after loading it?
Printing a message would be useful if the user has a serial console plugged in, which will not always be the case. It is not possible on Paz00 (likely the most widely used T20 device) for example without taking the case apart and soldering to a very tiny connector; I expect almost nobody has done that.
Is that the shield thing? I'd really like to attempt that solder if there are instructions somewhere.
It's the Toshiba AC100 laptop. There's some information at
https://ac100.grandou.net/doku.php (and numerous other places if you search Google for the model number.)
v2 cover dm: tegra: Convert tegra20 and tegra124 video drivers to driver model
Hi Stephen,
Quoted 82 lines · Stephen Warren
Quoted 74 lines · Simon Glass
Hi Stephen,
Quoted 60 lines · Stephen Warren
Quoted 58 lines · Simon Glass
Hi Stephen,
Quoted 49 lines · Stephen Warren
Quoted 30 lines · Simon Glass
This series moves these two drivers over to use driver model for video.
This involves the following steps:
- Sync up some device tree files with Linux
- Implement a proper PWM driver
- Clean up and unify the driver code
- Modify the existing drivers to work with driver modelThe tegra20 display driver uses device tree bindings invented in 2011 before
Linux had this or anyone was able to agree a standard. It seems possible
to
move it to the new bindings (like tegra124) except for the issue of time
delays between stages. It isn't clear how this should work, and Linux implements this by including all LCD definitions in the kernel source code,
and not using any delays. This causes strange display artifacts on the display when starting up, but perhaps is harmless to the display. Future
work will sync up the device tree more for seaboard, and thus tidy this
up
for nvidia boards.Quoted 6 lines
A bug in the keyboard driver is also fixed by this series. The series is
tested on seaboard and nyan-big, the two boards I have which support a display.This series is available at u-boot-dm/tegra-working.
This changes the name of the output device from "lcd" to "vidconsole". Anyone who doesn't reset their environment to default when switching to this
new U-Boot will lose their display output because of this. Is there any way
to maintain compatibility?Quoted 8 lines
Quoted 3 lines
I could not think of one other than an egregious hack. It will certainly bite someone. Perhaps a hack that detects 'lcd' in the stdout env variable and prints a warning would be useful?
Can't the two drivers just respond to the same device name. Presumably a build would only have one or the other compiled in?
Quoted 5 lines
I don't want to use 'lcd' for 'vidconsole' since 'vidconsole' is supposed to work for both LCD and video devices. The idea is to merge them. The only way I could think of to make it work was hack in
stdio.cto automatically change 'lcd' to vidconsole. I was not brave enough to attempt that, but it might work. What do you think?
Quoted 6 lines
That sounds like it should work. Isn't that simply:
#if SOMETHING
if (!strcmp(foo, "lcd"))foo = "vidconsole";#endif
I've sent a patch for this. Hopefully it will not offend too many people.
Quoted 15 lines
Quoted 15 lines
Quoted 13 lines
Or perhaps we can add a hook in the board-specific initialization code which
re-writes the environment after loading it?Printing a message would be useful if the user has a serial console plugged
in, which will not always be the case. It is not possible on Paz00 (likely
the most widely used T20 device) for example without taking the case apart
and soldering to a very tiny connector; I expect almost nobody has done that.
Quoted 7 lines
Quoted 2 lines
Is that the shield thing? I'd really like to attempt that solder if there are instructions somewhere.
It's the Toshiba AC100 laptop. There's some information at
https://ac100.grandou.net/doku.php (and numerous other places if you search Google for the model number.)
Ah OK I had forgotten about that, thanks.
Regards,
Smion
v2 cover dm: tegra: Convert tegra20 and tegra124 video drivers to driver model
In reply to Stephen WarrenHi,
Quoted 25 lines · Stephen Warren
Quoted 23 lines · Simon Glass
This series moves these two drivers over to use driver model for video.
This involves the following steps:
- Sync up some device tree files with Linux
- Implement a proper PWM driver
- Clean up and unify the driver code
- Modify the existing drivers to work with driver modelThe tegra20 display driver uses device tree bindings invented in 2011 before Linux had this or anyone was able to agree a standard. It seems possible to move it to the new bindings (like tegra124) except for the issue of time delays between stages. It isn't clear how this should work, and Linux implements this by including all LCD definitions in the kernel source code, and not using any delays. This causes strange display artifacts on the display when starting up, but perhaps is harmless to the display. Future work will sync up the device tree more for seaboard, and thus tidy this up for nvidia boards.
A bug in the keyboard driver is also fixed by this series. The series is tested on seaboard and nyan-big, the two boards I have which support a display.
Quoted 7 lines
Quoted 1 line
This series is available at u-boot-dm/tegra-working.
This changes the name of the output device from "lcd" to "vidconsole". Anyone who doesn't reset their environment to default when switching to this new U-Boot will lose their display output because of this. Is there any way to maintain compatibility?
Aside from that, I don't see any issues on Springbank (Seaboard), Harmony, Ventana, Paz00, or p2371-2180, so the series,
Tested-by Stephen Warren <[email protected]>
It looks like some of the patches have been applied and all Tegra boards are now giving Kconfig warnings.
Tom Warren, are you able to pick up the rest of the series?
Regards,
Simon
v2 cover dm: tegra: Convert tegra20 and tegra124 video drivers to driver model
Simon
Quoted 49 lines
-----Original Message-----
From: sjg at google.com [mailto:sjg at google.com] On Behalf Of Simon Glass
Sent: Sunday, February 14, 2016 6:19 PM
To: Stephen Warren <[email protected]>
Cc: U-Boot Mailing List <[email protected]>; Marcel Ziswiler <[email protected]>; Tom Warren <[email protected]>; Stephen Warren <[email protected]>; Pantelis Antoniou <panto@antoniou- consulting.com>; Marek Vasut <[email protected]>; Pavel Herrmann <[email protected]>; Anatolij Gustschin <[email protected]>
Subject: Re: [PATCH v2 00/23] dm: tegra: Convert tegra20 and tegra124 video drivers to driver modelHi,
Quoted 21 lines · Stephen Warren
Quoted 19 lines · Simon Glass
This series moves these two drivers over to use driver model for video.
This involves the following steps:
- Sync up some device tree files with Linux
- Implement a proper PWM driver
- Clean up and unify the driver code
- Modify the existing drivers to work with driver modelThe tegra20 display driver uses device tree bindings invented in 2011 before Linux had this or anyone was able to agree a standard. It seems possible to move it to the new bindings (like tegra124) except for the issue of time delays between stages. It isn't clear how this should work, and Linux implements this by including all LCD definitions in the kernel source code, and not using any delays. This causes strange display artifacts on the display when starting up, but perhaps is harmless to the display. Future work will sync up the device tree more for seaboard, and thus tidy this up for nvidia boards.
Quoted 8 lines
Quoted 5 lines
A bug in the keyboard driver is also fixed by this series. The series is tested on seaboard and nyan-big, the two boards I have which support a display.
This series is available at u-boot-dm/tegra-working.
This changes the name of the output device from "lcd" to "vidconsole".
Anyone who doesn't reset their environment to default when switching to this new U-Boot will lose their display output because of this. Is there any way to maintain compatibility?
Quoted 1 line
Quoted 8 lines
Quoted 3 lines
Aside from that, I don't see any issues on Springbank (Seaboard), Harmony, Ventana, Paz00, or p2371-2180, so the series,
Tested-by Stephen Warren <[email protected]>It looks like some of the patches have been applied and all Tegra boards are now giving
Kconfigwarnings.Tom Warren, are you able to pick up the rest of the series?
I had thought these had already gone in via the dm repo. If not, please list those that still need to be picked up and I'll take them in via tegra. Best to assign the appropriate ones to me in patchwork. Currently it seems they're all assigned to me. Which patches have already been applied?
Tom
--
nvpublic
Quoted 3 lines
Regards,
Simon
v2 cover dm: tegra: Convert tegra20 and tegra124 video drivers to driver model
Hi Tom,
Quoted 56 lines · Tom Warren
Simon
Quoted 53 lines
-----Original Message-----
From: sjg at google.com [mailto:sjg at google.com] On Behalf Of Simon Glass
Sent: Sunday, February 14, 2016 6:19 PM
To: Stephen Warren <[email protected]>
Cc: U-Boot Mailing List <[email protected]>; Marcel Ziswiler <[email protected]>; Tom Warren <[email protected]>; Stephen Warren <[email protected]>; Pantelis Antoniou <panto@antoniou- consulting.com>; Marek Vasut <[email protected]>; Pavel Herrmann <[email protected]>; Anatolij Gustschin <[email protected]>
Subject: Re: [PATCH v2 00/23] dm: tegra: Convert tegra20 and tegra124 video drivers to driver modelHi,
Quoted 21 lines · Stephen Warren
Quoted 19 lines · Simon Glass
This series moves these two drivers over to use driver model for video.
This involves the following steps:
- Sync up some device tree files with Linux
- Implement a proper PWM driver
- Clean up and unify the driver code
- Modify the existing drivers to work with driver modelThe tegra20 display driver uses device tree bindings invented in 2011 before Linux had this or anyone was able to agree a standard. It seems possible to move it to the new bindings (like tegra124) except for the issue of time delays between stages. It isn't clear how this should work, and Linux implements this by including all LCD definitions in the kernel source code, and not using any delays. This causes strange display artifacts on the display when starting up, but perhaps is harmless to the display. Future work will sync up the device tree more for seaboard, and thus tidy this up for nvidia boards.
Quoted 8 lines
Quoted 5 lines
A bug in the keyboard driver is also fixed by this series. The series is tested on seaboard and nyan-big, the two boards I have which support a display.
This series is available at u-boot-dm/tegra-working.
This changes the name of the output device from "lcd" to "vidconsole".
Anyone who doesn't reset their environment to default when switching to this new U-Boot will lose their display output because of this. Is there any way to maintain compatibility?
Quoted 4 lines
Aside from that, I don't see any issues on Springbank (Seaboard), Harmony, Ventana, Paz00, or p2371-2180, so the series,
Tested-by Stephen Warren <[email protected]>
Quoted 5 lines
Quoted 4 lines
It looks like some of the patches have been applied and all Tegra boards are now giving
Kconfigwarnings.Tom Warren, are you able to pick up the rest of the series?
I had thought these had already gone in via the dm repo. If not, please list those that still need to be picked up and I'll take them in via tegra. Best to assign the appropriate ones to me in patchwork. Currently it seems they're all assigned to me. Which patches have already been applied?
I think it was the follow-up patches to add the environment work-around that was applied.
6c88b51 video: tegra: Enable the 'lcd' env variable work-around a2931b3 dm: video: Add a temporary work-around for old stdout var
I see the original v2 series here:
http://patchwork.ozlabs.org/project/uboot/list/?delegate=4839
so that is what needs to be applied I think. Then the Tegra config issue should be fixed.
Regards,
Simon
v2 cover dm: tegra: Convert tegra20 and tegra124 video drivers to driver model
Simon,
Quoted 89 lines
-----Original Message-----
From: sjg at google.com [mailto:sjg at google.com] On Behalf Of Simon Glass
Sent: Tuesday, February 16, 2016 9:03 AM
To: Tom Warren <[email protected]>
Cc: Stephen Warren <[email protected]>; U-Boot Mailing List <u- boot at lists.denx.de>; Marcel Ziswiler <[email protected]>; Stephen Warren <[email protected]>; Pantelis Antoniou <panto@antoniou- consulting.com>; Marek Vasut <[email protected]>; Pavel Herrmann <[email protected]>; Anatolij Gustschin <[email protected]>
Subject: Re: [PATCH v2 00/23] dm: tegra: Convert tegra20 and tegra124 video drivers to driver modelHi Tom,
Quoted 41 lines · Tom Warren
Simon
Quoted 38 lines
-----Original Message-----
From: sjg at google.com [mailto:sjg at google.com] On Behalf Of Simon Glass
Sent: Sunday, February 14, 2016 6:19 PM
To: Stephen Warren <[email protected]>
Cc: U-Boot Mailing List <[email protected]>; Marcel Ziswiler <[email protected]>; Tom Warren <[email protected]>; Stephen Warren <[email protected]>; Pantelis Antoniou <panto@antoniou- consulting.com>; Marek Vasut <[email protected]>; Pavel Herrmann <[email protected]>; Anatolij Gustschin <[email protected]>
Subject: Re: [PATCH v2 00/23] dm: tegra: Convert tegra20 and tegra124 video drivers to driver modelHi,
Quoted 20 lines · Stephen Warren
Quoted 18 lines · Simon Glass
This series moves these two drivers over to use driver model for video.
This involves the following steps:
- Sync up some device tree files with Linux
- Implement a proper PWM driver
- Clean up and unify the driver code
- Modify the existing drivers to work with driver modelThe tegra20 display driver uses device tree bindings invented in 2011 before Linux had this or anyone was able to agree a standard. It seems possible to move it to the new bindings (like tegra124) except for the issue of time delays between stages. It isn't clear how this should work, and Linux implements this by including all LCD definitions in the kernel source code, and not using any delays. This causes strange display artifacts on the display when starting up, but perhaps is harmless to the display. Future work will sync up the device tree more for seaboard, and thus
tidy this up for nvidia boards.
Quoted 17 lines
Quoted 17 lines
Quoted 9 lines
Quoted 6 lines
A bug in the keyboard driver is also fixed by this series. The series is tested on seaboard and nyan-big, the two boards I have which support a display.
This series is available at u-boot-dm/tegra-working.
This changes the name of the output device from "lcd" to "vidconsole".
Anyone who doesn't reset their environment to default when switching to this new U-Boot will lose their display output because of this. Is there any way to maintain compatibility?
Quoted 4 lines
Aside from that, I don't see any issues on Springbank (Seaboard), Harmony, Ventana, Paz00, or p2371-2180, so the series,
Tested-by Stephen Warren <[email protected]>Quoted 5 lines
Quoted 4 lines
It looks like some of the patches have been applied and all Tegra boards are now giving
Kconfigwarnings.Tom Warren, are you able to pick up the rest of the series?
I had thought these had already gone in via the dm repo. If not, please list
those that still need to be picked up and I'll take them in via tegra. Best to assign the appropriate ones to me in patchwork. Currently it seems they're all assigned to me. Which patches have already been applied?
I think it was the follow-up patches to add the environment work-around that was applied.
6c88b51 video: tegra: Enable the 'lcd' env variable work-around a2931b3 dm: video: Add a temporary work-around for old stdout var
Quoted 6 lines
I see the original v2 series here:
http://patchwork.ozlabs.org/project/uboot/list/?delegate=4839
so that is what needs to be applied I think. Then the Tegra config issue should be fixed.
I've applied the 23 v2 DM video patches to u-boot-tegra/master, then rebased against current u-boot/master.
I see the 'warning: (TEGRA_COMMON) selects VIDCONSOLE_AS_LCD which has unmet direct dependencies (DM_VIDEO)' spew for almost every board (w/MAKEALL -s tegra).
Am I missing some patches?
--
nvpublic
Quoted 3 lines
Regards,
Simon
v2 cover dm: tegra: Convert tegra20 and tegra124 video drivers to driver model
Hi Tom,
Quoted 95 lines · Tom Warren
Simon,
Quoted 93 lines
-----Original Message-----
From: sjg at google.com [mailto:sjg at google.com] On Behalf Of Simon Glass
Sent: Tuesday, February 16, 2016 9:03 AM
To: Tom Warren <[email protected]>
Cc: Stephen Warren <[email protected]>; U-Boot Mailing List <u- boot at lists.denx.de>; Marcel Ziswiler <[email protected]>; Stephen Warren <[email protected]>; Pantelis Antoniou <panto@antoniou- consulting.com>; Marek Vasut <[email protected]>; Pavel Herrmann <[email protected]>; Anatolij Gustschin <[email protected]>
Subject: Re: [PATCH v2 00/23] dm: tegra: Convert tegra20 and tegra124 video drivers to driver modelHi Tom,
Quoted 41 lines · Tom Warren
Simon
Quoted 38 lines
-----Original Message-----
From: sjg at google.com [mailto:sjg at google.com] On Behalf Of Simon Glass
Sent: Sunday, February 14, 2016 6:19 PM
To: Stephen Warren <[email protected]>
Cc: U-Boot Mailing List <[email protected]>; Marcel Ziswiler <[email protected]>; Tom Warren <[email protected]>; Stephen Warren <[email protected]>; Pantelis Antoniou <panto@antoniou- consulting.com>; Marek Vasut <[email protected]>; Pavel Herrmann <[email protected]>; Anatolij Gustschin <[email protected]>
Subject: Re: [PATCH v2 00/23] dm: tegra: Convert tegra20 and tegra124 video drivers to driver modelHi,
Quoted 20 lines · Stephen Warren
Quoted 18 lines · Simon Glass
This series moves these two drivers over to use driver model for video.
This involves the following steps:
- Sync up some device tree files with Linux
- Implement a proper PWM driver
- Clean up and unify the driver code
- Modify the existing drivers to work with driver modelThe tegra20 display driver uses device tree bindings invented in 2011 before Linux had this or anyone was able to agree a standard. It seems possible to move it to the new bindings (like tegra124) except for the issue of time delays between stages. It isn't clear how this should work, and Linux implements this by including all LCD definitions in the kernel source code, and not using any delays. This causes strange display artifacts on the display when starting up, but perhaps is harmless to the display. Future work will sync up the device tree more for seaboard, and thus
tidy this up for nvidia boards.
Quoted 17 lines
Quoted 17 lines
Quoted 9 lines
Quoted 6 lines
A bug in the keyboard driver is also fixed by this series. The series is tested on seaboard and nyan-big, the two boards I have which support a display.
This series is available at u-boot-dm/tegra-working.
This changes the name of the output device from "lcd" to "vidconsole".
Anyone who doesn't reset their environment to default when switching to this new U-Boot will lose their display output because of this. Is there any way to maintain compatibility?
Quoted 4 lines
Aside from that, I don't see any issues on Springbank (Seaboard), Harmony, Ventana, Paz00, or p2371-2180, so the series,
Tested-by Stephen Warren <[email protected]>Quoted 5 lines
Quoted 4 lines
It looks like some of the patches have been applied and all Tegra boards are now giving
Kconfigwarnings.Tom Warren, are you able to pick up the rest of the series?
I had thought these had already gone in via the dm repo. If not, please list
those that still need to be picked up and I'll take them in via tegra. Best to assign the appropriate ones to me in patchwork. Currently it seems they're all assigned to me. Which patches have already been applied?
I think it was the follow-up patches to add the environment work-around that was applied.
6c88b51 video: tegra: Enable the 'lcd' env variable work-around a2931b3 dm: video: Add a temporary work-around for old stdout var
I see the original v2 series here:
http://patchwork.ozlabs.org/project/uboot/list/?delegate=4839
Quoted 7 lines
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so that is what needs to be applied I think. Then the Tegra config issue should be fixed.
I've applied the 23 v2 DM video patches to u-boot-tegra/master, then rebased against current u-boot/master.
I see the 'warning: (
TEGRA_COMMON) selectsVIDCONSOLE_AS_LCDwhich has unmet direct dependencies (DM_VIDEO)' spew for almost every board (w/MAKEALL -s tegra).Am I missing some patches?
I'll make some time to look but I am tied up most of the day so it will be later, sorry.
The original series is at u-boot-dm/rke-working if that helps.
Regards,
Simon
v2 cover dm: tegra: Convert tegra20 and tegra124 video drivers to driver model
Simon,
<snip>
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I think it was the follow-up patches to add the environment work-around that was applied.
6c88b51 video: tegra: Enable the 'lcd' env variable work-around a2931b3 dm: video: Add a temporary work-around for old stdout var
Quoted 7 lines
Quoted 6 lines
I see the original v2 series here:
http://patchwork.ozlabs.org/project/uboot/list/?delegate=4839
so that is what needs to be applied I think. Then the Tegra config issue should be fixed.
I've applied the 23 v2 DM video patches to u-boot-tegra/master, then
rebased against current u-boot/master.
Quoted 2 lines
I see the 'warning: (
TEGRA_COMMON) selectsVIDCONSOLE_AS_LCDwhichhas unmet direct dependencies (
DM_VIDEO)' spew for almost every board (w/MAKEALL -s tegra).Quoted 1 line
Quoted 6 lines
Quoted 1 line
Am I missing some patches?
I'll make some time to look but I am tied up most of the day so it will be later, sorry.
The original series is at u-boot-dm/rke-working if that helps.
I pulled down rke-working. The two commits you list above are *not* in that repo/branch. They _are_ in my u-boot-tegra/next branch (just pushed it to Denx). So building rke-working for tegra doesn't result in the DM_VIDEO warning, since the commits aren't there.
Back to you.
Tom
--
nvpublic
Quoted 3 lines
Regards,
Simon
v2 cover dm: tegra: Convert tegra20 and tegra124 video drivers to driver model
Hi Tom,
Quoted 29 lines · Tom Warren
Simon,
<snip>
Quoted 25 lines
Quoted 7 lines
Quoted 7 lines
I think it was the follow-up patches to add the environment work-around that was applied.
6c88b51 video: tegra: Enable the 'lcd' env variable work-around a2931b3 dm: video: Add a temporary work-around for old stdout var
Quoted 7 lines
Quoted 6 lines
I see the original v2 series here:
http://patchwork.ozlabs.org/project/uboot/list/?delegate=4839
so that is what needs to be applied I think. Then the Tegra config issue should be fixed.
I've applied the 23 v2 DM video patches to u-boot-tegra/master, then
rebased against current u-boot/master.
Quoted 2 lines
I see the 'warning: (
TEGRA_COMMON) selectsVIDCONSOLE_AS_LCDwhichhas unmet direct dependencies (
DM_VIDEO)' spew for almost every board (w/MAKEALL -s tegra).Quoted 2 lines
Am I missing some patches?
I'll make some time to look but I am tied up most of the day so it will be later, sorry.
Quoted 7 lines
Quoted 1 line
The original series is at u-boot-dm/rke-working if that helps.
I pulled down rke-working. The two commits you list above are *not* in that repo/branch. They _are_ in my u-boot-tegra/next branch (just pushed it to Denx). So building rke-working for tegra doesn't result in the
DM_VIDEOwarning, since the commits aren't there.Back to you.
Tom
I found that tegra boards without the display enabled generate this warning. I've sent a patch.
Regards,
Simon