ARM: uniphier: a collection of clean-ups and new clock driver

index 2d3ad15..4ed2656 100644
@@ -13,15 +13,12 @@
 #define DEVICE	0x00002002 /* Non-shareable Device */
 #define NORMAL	0x0000000e /* Normal Memory Write-Back, No Write-Allocate */
 
-#define TEXT_SECTION	((CONFIG_SPL_TEXT_BASE) >> (SECTION_SHIFT))
-#define STACK_SECTION	((CONFIG_SPL_STACK) >> (SECTION_SHIFT))
-
 	.section ".rodata"
 	.align 14
 ENTRY(init_page_table)
 	section = 0
 	.rept NR_SECTIONS
-	.if section == 0 || section == 1 || section == STACK_SECTION
+	.if section == 0 || section == 1
 	attr = NORMAL
 	.else
 	attr = DEVICE

index ea3ae54..491e78e 100644
@@ -5,7 +5,6 @@
 ifdef CONFIG_SPL_BUILD
 
 obj-y += lowlevel_init.o
-obj-y += init_page_table.o
 
 obj-y += init/ bcu/ memconf/ pll/ early-clk/ early-pinctrl/ dram/
 obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/

deleted file mode 100644
index 4ed2656..0000000
@@ -1,29 +0,0 @@
-/*
- * Copyright (C) 2015 Masahiro Yamada <[email protected]>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <config.h>
-#include <linux/linkage.h>
-
-/* page table */
-#define NR_SECTIONS	4096
-#define SECTION_SHIFT	20
-#define DEVICE	0x00002002 /* Non-shareable Device */
-#define NORMAL	0x0000000e /* Normal Memory Write-Back, No Write-Allocate */
-
-	.section ".rodata"
-	.align 14
-ENTRY(init_page_table)
-	section = 0
-	.rept NR_SECTIONS
-	.if section == 0 || section == 1
-	attr = NORMAL
-	.else
-	attr = DEVICE
-	.endif
-	.word (section << SECTION_SHIFT) | attr
-	section = section + 1
-	.endr
-END(init_page_table)

140 lines not on this page · raw message

index d2dbb1a..d8b63e9 100644
@@ -689,6 +689,7 @@ config TARGET_COLIBRI_PXA270
 
 config ARCH_UNIPHIER
 	bool "Socionext UniPhier SoCs"
+	select CLK_UNIPHIER
 	select CPU_V7
 	select SUPPORT_SPL
 	select SPL

index 9fcde39..a98b74b 100644
@@ -20,4 +20,6 @@ config SPL_CLK
 	  setting up clocks within SPL, and allows the same drivers to be
 	  used as U-Boot proper.
 
+source "drivers/clk/uniphier/Kconfig"
+
 endmenu

index c9144e3..c51db15 100644
@@ -10,3 +10,4 @@ obj-$(CONFIG_ROCKCHIP_RK3036) += clk_rk3036.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += clk_rk3288.o
 obj-$(CONFIG_SANDBOX) += clk_sandbox.o
 obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
+obj-$(CONFIG_CLK_UNIPHIER) += uniphier/

new file mode 100644
index 0000000..0e90c01
@@ -0,0 +1,13 @@
+config CLK_UNIPHIER
+	bool
+	select CLK
+	select SPL_CLK
+
+menu "Clock drivers for UniPhier SoCs"
+	depends on CLK_UNIPHIER
+
+config CLK_UNIPHIER_MIO
+	bool "Clock driver for UniPhier Media I/O block"
+	default y
+
+endmenu

new file mode 100644
index 0000000..a3168f9
@@ -0,0 +1,3 @@
+obj-y					+= clk-uniphier-core.o
+
+obj-$(CONFIG_CLK_UNIPHIER_MIO)		+= clk-uniphier-mio.o

index 5d4b2cf..de04de1 100644
@@ -9,6 +9,13 @@
 /include/ "skeleton.dtsi"
 
 / {
+	clocks {
+		refclk: ref {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+		};
+	};
+
 	soc: soc {
 		compatible = "simple-bus";
 		#address-cells = <1>;

index 856c207..6f15978 100644
@@ -136,6 +136,10 @@
 	};
 };
 
+&refclk {
+	clock-frequency = <24576000>;
+};
+
 &serial0 {
 	clock-frequency = <36864000>;
 };

index 244ccf6..a236dbc 100644
@@ -177,6 +177,10 @@
 	};
 };
 
+&refclk {
+	clock-frequency = <25000000>;
+};
+
 &serial0 {
 	clock-frequency = <73728000>;
 };

index 0049106..120767c 100644
@@ -171,6 +171,10 @@
 	};
 };
 
+&refclk {
+	clock-frequency = <20000000>;
+};
+
 &serial0 {
 	clock-frequency = <73728000>;
 };

index f481521..9ff9584 100644
@@ -30,6 +30,12 @@
 	};
 
 	clocks {
+		refclk: ref {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <24576000>;
+		};
+
 		arm_timer_clk: arm_timer_clk {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";

index cb28bc4..e765a4b 100644
@@ -136,6 +136,10 @@
 	};
 };
 
+&refclk {
+	clock-frequency = <25000000>;
+};
+
 &serial0 {
 	clock-frequency = <80000000>;
 };

index 3ba6a4a..c7423ff 100644
@@ -182,6 +182,10 @@
 	};
 };
 
+&refclk {
+	clock-frequency = <25000000>;
+};
+
 &serial0 {
 	clock-frequency = <88900000>;
 };

index de04de1..d3e5a74 100644
@@ -101,6 +101,14 @@
 			reg = <0x5f801000 0xe00>;
 		};
 
+		sysctrl: sysctrl at 61840000 {
+			/* specify compatible in each SoC DTSI */
+			reg = <0x61840000 0x4000>;
+			#clock-cells = <1>;
+			clock-names = "ref";
+			clocks = <&refclk>;
+		};
+
 		nand: nand at 68000000 {
 			compatible = "denali,denali-nand-dt";
 			reg = <0x68000000 0x20>, <0x68100000 0x1000>;

index 6f15978..6bd4b91 100644
@@ -160,3 +160,7 @@
 &pinctrl {
 	compatible = "socionext,ph1-ld4-pinctrl", "syscon";
 };
+
+&sysctrl {
+	compatible = "socionext,ph1-ld4-sysctrl";
+};

index a236dbc..984f99c 100644
@@ -200,3 +200,7 @@
 &pinctrl {
 	compatible = "socionext,ph1-pro4-pinctrl", "syscon";
 };
+
+&sysctrl {
+	compatible = "socionext,ph1-pro4-sysctrl";
+};

index 120767c..a836176 100644
@@ -194,3 +194,7 @@
 &pinctrl {
 	compatible = "socionext,ph1-pro5-pinctrl", "syscon";
 };
+
+&sysctrl {
+	compatible = "socionext,ph1-pro5-sysctrl";
+};

index 9ff9584..c7a8902 100644
@@ -206,6 +206,14 @@
 			interrupts = <0 83 4>;
 		};
 
+		sysctrl: sysctrl at f1840000 {
+			compatible = "socionext,ph1-sld3-sysctrl";
+			reg = <0xf1840000 0x4000>;
+			#clock-cells = <1>;
+			clock-names = "ref";
+			clocks = <&refclk>;
+		};
+
 		nand: nand at f8000000 {
 			compatible = "denali,denali-nand-dt";
 			reg = <0xf8000000 0x20>, <0xf8100000 0x1000>;

index e765a4b..9d97fb0 100644
@@ -160,3 +160,7 @@
 &pinctrl {
 	compatible = "socionext,ph1-sld8-pinctrl", "syscon";
 };
+
+&sysctrl {
+	compatible = "socionext,ph1-sld8-sysctrl";
+};

index c7423ff..f6f4bbe 100644
@@ -205,3 +205,7 @@
 &pinctrl {
 	compatible = "socionext,proxstream2-pinctrl", "syscon";
 };
+
+&sysctrl {
+	compatible = "socionext,proxstream2-sysctrl";
+};

index d3e5a74..43e5bea 100644
@@ -74,6 +74,12 @@
 			reg = <0x58c00000 0x400>, <0x59800000 0x2000>;
 		};
 
+		peri: perictrl at 59820000 {
+			/* specify compatible in each SoC DTSI */
+			reg = <0x59820000 0x200>;
+			#clock-cells = <1>;
+		};
+
 		timer at 60000200 {
 			compatible = "arm,cortex-a9-global-timer";
 			reg = <0x60000200 0x20>;

index 6bd4b91..5843097 100644
@@ -157,6 +157,12 @@
 	clock-frequency = <36864000>;
 };
 
+&peri {
+	compatible = "socionext,ph1-ld4-perictrl";
+	clock-names = "uart", "i2c";
+	clocks = <&sysctrl 3>, <&sysctrl 4>;
+};
+
 &pinctrl {
 	compatible = "socionext,ph1-ld4-pinctrl", "syscon";
 };

index 984f99c..0c2f02f 100644
@@ -197,6 +197,12 @@
 	clock-frequency = <73728000>;
 };
 
+&peri {
+	compatible = "socionext,ph1-pro4-perictrl";
+	clock-names = "uart", "fi2c";
+	clocks = <&sysctrl 3>, <&sysctrl 4>;
+};
+
 &pinctrl {
 	compatible = "socionext,ph1-pro4-pinctrl", "syscon";
 };

index a836176..305114c 100644
@@ -191,6 +191,12 @@
 	clock-frequency = <73728000>;
 };
 
+&peri {
+	compatible = "socionext,ph1-pro5-perictrl";
+	clock-names = "uart", "fi2c";
+	clocks = <&sysctrl 3>, <&sysctrl 4>;
+};
+
 &pinctrl {
 	compatible = "socionext,ph1-pro5-pinctrl", "syscon";
 };

index 9d97fb0..7a26b4a 100644
@@ -157,6 +157,12 @@
 	clock-frequency = <80000000>;
 };
 
+&peri {
+	compatible = "socionext,ph1-sld8-perictrl";
+	clock-names = "uart", "i2c";
+	clocks = <&sysctrl 3>, <&sysctrl 4>;
+};
+
 &pinctrl {
 	compatible = "socionext,ph1-sld8-pinctrl", "syscon";
 };

index f6f4bbe..f2faf25 100644
@@ -202,6 +202,12 @@
 	clock-frequency = <88900000>;
 };
 
+&peri {
+	compatible = "socionext,proxstream2-perictrl";
+	clock-names = "uart", "fi2c";
+	clocks = <&sysctrl 3>, <&sysctrl 4>;
+};
+
 &pinctrl {
 	compatible = "socionext,proxstream2-pinctrl", "syscon";
 };

index 43e5bea..59511bd 100644
@@ -74,6 +74,12 @@
 			reg = <0x58c00000 0x400>, <0x59800000 0x2000>;
 		};
 
+		mio: mioctrl at 59810000 {
+			/* specify compatible in each SoC DTSI */
+			reg = <0x59810000 0x800>;
+			#clock-cells = <1>;
+		};
+
 		peri: perictrl at 59820000 {
 			/* specify compatible in each SoC DTSI */
 			reg = <0x59820000 0x200>;

index 5843097..628a397 100644
@@ -157,6 +157,12 @@
 	clock-frequency = <36864000>;
 };
 
+&mio {
+	compatible = "socionext,ph1-ld4-mioctrl";
+	clock-names = "stdmac", "ehci";
+	clocks = <&sysctrl 10>, <&sysctrl 18>;
+};
+
 &peri {
 	compatible = "socionext,ph1-ld4-perictrl";
 	clock-names = "uart", "i2c";

index 0c2f02f..bfffe94 100644
@@ -197,6 +197,12 @@
 	clock-frequency = <73728000>;
 };
 
+&mio {
+	compatible = "socionext,ph1-pro4-mioctrl";
+	clock-names = "stdmac", "ehci";
+	clocks = <&sysctrl 10>, <&sysctrl 18>;
+};
+
 &peri {
 	compatible = "socionext,ph1-pro4-perictrl";
 	clock-names = "uart", "fi2c";

index 305114c..087b25a 100644
@@ -191,6 +191,12 @@
 	clock-frequency = <73728000>;
 };
 
+&mio {
+	compatible = "socionext,ph1-pro5-mioctrl";
+	clock-names = "stdmac";
+	clocks = <&sysctrl 10>;
+};
+
 &peri {
 	compatible = "socionext,ph1-pro5-perictrl";
 	clock-names = "uart", "fi2c";

index c7a8902..91c9ba5 100644
@@ -178,6 +178,14 @@
 			reg = <0x59800000 0x2000>;
 		};
 
+		mio: mioctrl at 59810000 {
+			compatible = "socionext,ph1-sld3-mioctrl";
+			reg = <0x59810000 0x800>;
+			#clock-cells = <1>;
+			clock-names = "stdmac", "ehci";
+			clocks = <&sysctrl 10>, <&sysctrl 18>;
+		};
+
 		usb0: usb at 5a800100 {
 			compatible = "socionext,uniphier-ehci", "generic-ehci";
 			status = "disabled";

index 7a26b4a..b9ef401 100644
@@ -157,6 +157,12 @@
 	clock-frequency = <80000000>;
 };
 
+&mio {
+	compatible = "socionext,ph1-sld8-mioctrl";
+	clock-names = "stdmac", "ehci";
+	clocks = <&sysctrl 10>, <&sysctrl 18>;
+};
+
 &peri {
 	compatible = "socionext,ph1-sld8-perictrl";
 	clock-names = "uart", "i2c";

index f2faf25..a70b135 100644
@@ -202,6 +202,12 @@
 	clock-frequency = <88900000>;
 };
 
+&mio {
+	compatible = "socionext,ph1-pro5-mioctrl";
+	clock-names = "stdmac";
+	clocks = <&sysctrl 10>;
+};
+
 &peri {
 	compatible = "socionext,proxstream2-perictrl";
 	clock-names = "uart", "fi2c";

index 628a397..7c8759f 100644
@@ -115,6 +115,7 @@
 		interrupts = <0 80 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb0>;
+		clocks = <&mio 3>, <&mio 6>;
 	};
 
 	usb1: usb at 5a810100 {

@@ -124,6 +125,7 @@
 		interrupts = <0 81 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb1>;
+		clocks = <&mio 4>, <&mio 6>;
 	};
 
 	usb2: usb at 5a820100 {

@@ -133,6 +135,7 @@
 		interrupts = <0 82 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb2>;
+		clocks = <&mio 5>, <&mio 6>;
 	};
 };
 

index bfffe94..cb5b8f1 100644
@@ -147,6 +147,7 @@
 		interrupts = <0 80 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb2>;
+		clocks = <&mio 3>, <&mio 6>;
 	};
 
 	usb3: usb at 5a810100 {

@@ -156,6 +157,7 @@
 		interrupts = <0 81 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb3>;
+		clocks = <&mio 4>, <&mio 6>;
 	};
 
 	usb0: usb at 65a00000 {

index 91c9ba5..85dde66 100644
@@ -191,6 +191,7 @@
 			status = "disabled";
 			reg = <0x5a800100 0x100>;
 			interrupts = <0 80 4>;
+			clocks = <&mio 3>, <&mio 6>;
 		};
 
 		usb1: usb at 5a810100 {

@@ -198,6 +199,7 @@
 			status = "disabled";
 			reg = <0x5a810100 0x100>;
 			interrupts = <0 81 4>;
+			clocks = <&mio 4>, <&mio 6>;
 		};
 
 		usb2: usb at 5a820100 {

@@ -205,6 +207,7 @@
 			status = "disabled";
 			reg = <0x5a820100 0x100>;
 			interrupts = <0 82 4>;
+			clocks = <&mio 5>, <&mio 6>;
 		};
 
 		usb3: usb at 5a830100 {

@@ -212,6 +215,7 @@
 			status = "disabled";
 			reg = <0x5a830100 0x100>;
 			interrupts = <0 83 4>;
+			clocks = <&mio 7>, <&mio 6>;
 		};
 
 		sysctrl: sysctrl at f1840000 {

index b9ef401..f93db83 100644
@@ -115,6 +115,7 @@
 		interrupts = <0 80 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb0>;
+		clocks = <&mio 3>, <&mio 6>;
 	};
 
 	usb1: usb at 5a810100 {

@@ -124,6 +125,7 @@
 		interrupts = <0 81 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb1>;
+		clocks = <&mio 4>, <&mio 6>;
 	};
 
 	usb2: usb at 5a820100 {

@@ -133,6 +135,7 @@
 		interrupts = <0 82 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb2>;
+		clocks = <&mio 5>, <&mio 6>;
 	};
 };
 

index 39f7185..9332374 100644
@@ -74,13 +74,6 @@ config USB_EHCI_MX6
 	---help---
 	  Enables support for the on-chip EHCI controller on i.MX6 SoCs.
 
-config USB_EHCI_UNIPHIER
-	bool "Support for UniPhier on-chip EHCI USB controller"
-	depends on ARCH_UNIPHIER && OF_CONTROL
-	default y
-	---help---
-	  Enables support for the on-chip EHCI controller on UniPhier SoCs.
-
 config USB_EHCI_GENERIC
 	bool "Support for generic EHCI USB controller"
 	depends on OF_CONTROL

index 6183b80..9a87d2b 100644
@@ -47,7 +47,6 @@ obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
 obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
 obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
 obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
-obj-$(CONFIG_USB_EHCI_UNIPHIER) += ehci-uniphier.o
 obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
 obj-$(CONFIG_USB_EHCI_VF) += ehci-vf.o
 obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o

index ee3cbad..535f96f 100644
@@ -27,5 +27,7 @@ CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_UNIPHIER_SERIAL=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_STORAGE=y

index 4b871d0..e369c45 100644
@@ -22,5 +22,7 @@ CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
 CONFIG_SPL_NAND_DENALI=y
 CONFIG_UNIPHIER_SERIAL=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_STORAGE=y