Use correct spelling of "U-Boot"

index c7c9e0a..83d2874 100644
@@ -460,7 +460,7 @@ The following options need to be configured:
 
 		CONFIG_SYS_CPC_REINIT_F
 		This CONFIG is defined when the CPC is configured as SRAM at the
-		time of U-boot entry and is required to be re-initialized.
+		time of U-Boot entry and is required to be re-initialized.
 
 		CONFIG_DEEP_SLEEP
 		Indicates this SoC supports deep sleep feature. If deep sleep is

@@ -2963,7 +2963,7 @@ CBFS (Coreboot Filesystem) support
 - Parallel Flash support:
 		CONFIG_SYS_NO_FLASH
 
-		Traditionally U-boot was run on systems with parallel NOR
+		Traditionally U-Boot was run on systems with parallel NOR
 		flash. This option is used to disable support for parallel NOR
 		flash. This option should be defined if the board does not have
 		parallel flash.

index 4b8053e..b21abc3 100644
@@ -41,5 +41,5 @@ lowlevel_init:
 	orr	r0, #0x00000004
 	str	r0, [r1]
 
-	/* Return to U-boot via saved link register */
+	/* Return to U-Boot via saved link register */
 	mov	pc, lr

index 31d1c9e..b7563ed 100644
@@ -37,7 +37,7 @@ _monitor_vectors:
 
 /*
  * secure monitor handler
- * U-boot calls this "software interrupt" in start.S
+ * U-Boot calls this "software interrupt" in start.S
  * This is executed on a "smc" instruction, we use a "smc #0" to switch
  * to non-secure state.
  * r0, r1, r2: passed to the callee

index 4cd84b0..3d19bbf 100644
@@ -1,6 +1,6 @@
 if ARM64
 
 config ARMV8_MULTIENTRY
-        boolean "Enable multiple CPUs to enter into U-boot"
+        boolean "Enable multiple CPUs to enter into U-Boot"
 
 endif

index 469bd05..f62916d 100644
@@ -59,7 +59,7 @@
 	status = "okay";
 };
 
-/* for U-boot only */
+/* for U-Boot only */
 / {
 	soc {
 		u-boot,dm-pre-reloc;

index e0a972f..dca408b 100644
@@ -61,7 +61,7 @@
 	status = "okay";
 };
 
-/* for U-boot only */
+/* for U-Boot only */
 / {
 	soc {
 		u-boot,dm-pre-reloc;

index 02e74a7..202a642 100644
@@ -66,7 +66,7 @@
 	status = "okay";
 };
 
-/* for U-boot only */
+/* for U-Boot only */
 / {
 	soc {
 		u-boot,dm-pre-reloc;

index d46e827..02a3362 100644
@@ -47,7 +47,7 @@
 	status = "okay";
 };
 
-/* for U-boot only */
+/* for U-Boot only */
 / {
 	soc {
 		u-boot,dm-pre-reloc;

index 1f3aee9..ff17945 100644
@@ -68,7 +68,7 @@
 	status = "okay";
 };
 
-/* for U-boot only */
+/* for U-Boot only */
 &serial0 {
        u-boot,dm-pre-reloc;
 };

index b58bf07..b5b6f65 100644
@@ -63,7 +63,7 @@
 	status = "okay";
 };
 
-/* for U-boot only */
+/* for U-Boot only */
 / {
 	soc {
 		u-boot,dm-pre-reloc;

index a49215e..c6c133a 100644
@@ -49,7 +49,7 @@
 	status = "okay";
 };
 
-/* for U-boot only */
+/* for U-Boot only */
 / {
 	soc {
 		u-boot,dm-pre-reloc;

index 63bd363..3703ad3 100644
@@ -45,7 +45,7 @@
 	status = "okay";
 };
 
-/* for U-boot only */
+/* for U-Boot only */
 / {
 	soc {
 		u-boot,dm-pre-reloc;

index dfc3455..5dc216d 100644
@@ -30,10 +30,10 @@ relocate_wait_code:
  * because that comes out to be the last 4KB of the iRAM
  * (Base Address - 0x02020000, Limit Address - 0x020740000).
  *
- * U-boot and kernel are aware of this code and flags by the simple
+ * U-Boot and kernel are aware of this code and flags by the simple
  * fact that we are implementing a workaround in the last 4KB
  * of the iRAM and we have already defined these flag and address
- * values in both kernel and U-boot for our use.
+ * values in both kernel and U-Boot for our use.
  */
 code_base:
 	b	 1f

index 51a8b3c..3f38f36 100644
@@ -283,5 +283,5 @@ lowlevel_init:
 
 #endif /* CONFIG_SPL_BUILD */
 
-	/* Return to U-boot via saved link register */
+	/* Return to U-Boot via saved link register */
 	mov	pc, lr

index 7cd0bbf..7ba5f1b 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index f31abfa..823a1df 100644
@@ -1,5 +1,5 @@
 /*
- * U-boot - start.S Startup file for Blackfin u-boot
+ * U-Boot - start.S Startup file for Blackfin U-Boot
  *
  * Copyright (c) 2005-2008 Analog Devices Inc.
  *

@@ -51,7 +51,7 @@ ENTRY(_start)
 #ifdef CONFIG_HW_WATCHDOG
 	/* Program the watchdog with default timeout of ~5 seconds.
 	 * That should be long enough to bootstrap ourselves up and
-	 * then the common u-boot code can take over.
+	 * then the common U-Boot code can take over.
 	 */
 	r1 = WDDIS;
 # ifdef __ADSPBF60x__

index ae1b813..f407fb2 100644
@@ -1,5 +1,5 @@
 /*
- * U-boot - u-boot.lds.S
+ * U-Boot - u-boot.lds.S
  *
  * Copyright (c) 2005-2010 Analog Device Inc.
  *

index b534a98..de02c69 100644
@@ -1,5 +1,5 @@
 #
-# U-boot Makefile
+# U-Boot Makefile
 #
 # Copyright (c) 2005-2008 Analog Devices Inc.
 #

index d2c31ae..1b56ca3 100644
@@ -57,7 +57,7 @@
 	.set noreorder
 
 ENTRY(_start)
-	/* U-boot entry point */
+	/* U-Boot entry point */
 	b	reset
 	 nop
 

index 68a5b94..183275b 100644
@@ -1,5 +1,5 @@
 /*
- *  U-boot - x86 Startup Code
+ *  U-Boot - x86 Startup Code
  *
  * (C) Copyright 2002
  * Daniel Engstr?m, Omicron Ceti AB, <[email protected]>

index 12154b6..28fccc0 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 0f134f9..7efe1bc 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 3a6abaa..e9e23ed 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 8de71a1..1be1d31 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 34ac563..c4882c9 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 9d8ecf1..c225f72 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index cedd821..53ec9e7 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 1ddb026..77acb42 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 6838cf0..bf7a2c4 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2007 Analog Device Inc.
 #

index 244f9e0..041c98e 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 66d2f05..13ed8bf 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index ffcdf1f..f7af8cd 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index cd0da27..1815fc5 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 234119a..4008e3a 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2007 Analog Device Inc.
 #

index 7c8cda0..eb1703e 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 6f4200b..e4d0caa 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 48bec28..08e2fad 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2007 Analog Device Inc.
 #

index 23c7101..3d534d2 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2007 Analog Device Inc.
 #

index 3bfd088..e4184ee 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 38e5da7..2ae79da 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 4ff989a..9a61775 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 68e24ab..c6c03ab 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) Switchfin Org. <[email protected]>
 #

index ff8ad43..1d662c6 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index ec99638..41e100d 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index be8056f..317098c 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 38dd3fb..835d5b7 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 98aca32..1e11b8c 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index c8764fb..e0f0c34 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index f2c9599..0777c78 100644
@@ -3,10 +3,10 @@ U-Boot for the Congatec QMX6 boards
 This file contains information for the port of U-Boot to the Congatec
 QMX6 boards.
 
-1. Building U-boot
+1. Building U-Boot
 ------------------
 
-- Build U-boot for Congatec QMX6 boards:
+- Build U-Boot for Congatec QMX6 boards:
 
 $ make mrproper
 $ make cgtqmx6eval_defconfig

@@ -17,7 +17,7 @@ This will generate the following binaries:
 - SPL
 - u-boot.img
 
-2. Flashing U-boot in the SPI NOR
+2. Flashing U-Boot in the SPI NOR
 ---------------------------------
 
 Copy SPL and u-boot.img to the exported TFTP directory of the

@@ -41,7 +41,7 @@ host PC (/tftpboot , for example).
 
 => sf write 0x12000000 0x10000 0x70000
 
-Reboot the board and the new U-boot should come up.
+Reboot the board and the new U-Boot should come up.
 
 3. Booting from the SD card
 ---------------------------

@@ -64,9 +64,9 @@ command:
 
 => bmode esdhc4
 
-And then the U-boot from the big slot will boot.
+And then the U-Boot from the big slot will boot.
 
-Note: If the "bmode" command is not available from your pre-installed U-boot,
+Note: If the "bmode" command is not available from your pre-installed U-Boot,
 these instruction will produce the same effect:
 
 => mw.l 0x20d8040 0x3850

index 865522f..c0271da 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2007 Analog Device Inc.
 #

index 4902b98..c840597 100644
@@ -86,9 +86,9 @@ Default Boot Method
 --------------------
 NAND boot
 
-Building U-boot
+Building U-Boot
 --------------
-To build the u-boot for BSC9131RDB:
+To build the U-Boot for BSC9131RDB:
 1. NAND Flash with sysclk 66MHz(J16 on RDB closed, default)
 	make BSC9131RDB_NAND
 2. NAND Flash with sysclk 100MHz(J16 on RDB open)

@@ -123,7 +123,7 @@ DDR Memory map
 
 Flashing Images
 ---------------
-To place a new u-boot image in the NAND flash and then boot
+To place a new U-Boot image in the NAND flash and then boot
 with that new image temporarily, use this:
 	tftp 1000000 u-boot-nand.bin
 	nand erase 0 100000

index f8377c9..ede95d4 100644
@@ -87,9 +87,9 @@ Default Boot Method
 --------------------
 NOR boot
 
-Building U-boot
+Building U-Boot
 --------------
-To build the u-boot for BSC9132QDS:
+To build the U-Boot for BSC9132QDS:
 1. NOR Flash
 	make BSC9132QDS_NOR_DDRCLK100 : For 100MHZ DDR CLK
 	make BSC9132QDS_NOR_DDRCLK133 : For 133MHZ DDR CLK

@@ -122,7 +122,7 @@ Memory map
 
 Flashing Images
 ---------------
-To place a new u-boot image in the NAND flash and then boot
+To place a new U-Boot image in the NAND flash and then boot
 with that new image temporarily, use this:
 	tftp 1000000 u-boot-nand.bin
 	nand erase 0 100000

index 3bc396b..2e249cb 100644
@@ -53,7 +53,7 @@ Settings of DIP-switch
   SW5[1:4]= 0110 and SW5[6]=0 for boot from SPI flash
 Note: 1 stands for 'off', 0 stands for 'on'
 
-Build and program u-boot to NOR flash
+Build and program U-Boot to NOR flash
 ==================================
 1. Build u-boot.bin image example:
 	export ARCH=powerpc

@@ -86,7 +86,7 @@ There are four banks in C29XPCIE board, example to change bank booting:
 	- bank 4 on the flash 0x3000000~0x3ffffff
 	or set SW5[7]= ON/OFF and SW5[7]= ON/OFF, then power on again.
 
-Build and program u-boot to SPI flash
+Build and program U-Boot to SPI flash
 ==================================
 1. Build u-boot-spi.bin image
 	make C29xPCIE_SPIFLASH_config; make

index 7e53f1f..646cc02 100644
@@ -12,7 +12,7 @@ Memory map from core's view
 0x05_1000_0000 .. 0x05_FFFF_FFFF	IFC region #2
 0x80_8000_0000 .. 0xFF_FFFF_FFFF	DDR region #2
 
-Other addresses are either reserved, or not used directly by u-boot.
+Other addresses are either reserved, or not used directly by U-Boot.
 This list should be updated when more addresses are used.
 
 Booting Linux flavors which do not support 48-bit VA (< Linux 3.18)

index 375e97c..6ddad92 100644
@@ -103,7 +103,7 @@ Memory map from core's view
 0x05_1000_0000 .. 0x05_FFFF_FFFF	IFC region #2
 0x80_8000_0000 .. 0xFF_FFFF_FFFF	DDR region #2
 
-Other addresses are either reserved, or not used directly by u-boot.
+Other addresses are either reserved, or not used directly by U-Boot.
 This list should be updated when more addresses are used.
 
 IFC region map from core's view

index 7fc2569..6708ca9 100644
@@ -87,7 +87,7 @@ Memory map from core's view
 0x05_1000_0000 .. 0x05_FFFF_FFFF	IFC region #2
 0x80_8000_0000 .. 0xFF_FFFF_FFFF	DDR region #2
 
-Other addresses are either reserved, or not used directly by u-boot.
+Other addresses are either reserved, or not used directly by U-Boot.
 This list should be updated when more addresses are used.
 
 IFC region map from core's view

index 3178d49..92a8384 100644
@@ -49,7 +49,7 @@ Changed files:
 - include/asm-m68k/timer.h		Timer structure and definition
 - include/asm-m68k/types.h		Data types definition
 - include/asm-m68k/uart.h		Uart structure and definition
-- include/asm-m68k/u-boot.h		u-boot structure
+- include/asm-m68k/u-boot.h		U-Boot structure
 
 - include/configs/M52277EVB.h		Board specific configuration file
 

@@ -77,7 +77,7 @@ CONFIG_MCFRTC		-- define to use common CF RTC driver
 CONFIG_SYS_MCFRTC_BASE		-- provide base address for RTC in immap.h
 CONFIG_SYS_RTC_OSCILLATOR	-- define RTC clock frequency
 RTC_DEBUG		-- define to show RTC debug message
-CONFIG_CMD_DATE		-- enable to use date feature in u-boot
+CONFIG_CMD_DATE		-- enable to use date feature in U-Boot
 
 CONFIG_MCFTMR		-- define to use DMA timer
 CONFIG_MCFPIT		-- define to use PIT timer

@@ -102,7 +102,7 @@ CONFIG_SYS_CSn_CTRL	-- defines the Chip Select Control register
 
 CONFIG_SYS_SDRAM_BASE	-- defines the DRAM Base
 
-CONFIG_LCD and CONFIG_CMD_USB are not supported in this current u-boot,
+CONFIG_LCD and CONFIG_CMD_USB are not supported in this current U-Boot,
 update will be provided at later time
 
 2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL

@@ -113,7 +113,7 @@ update will be provided@later time
 	SRAM:		0x80000000-0x8FFFFFFF (256MB)
 	IP:		0xF0000000-0xFFFFFFFF (256MB)
 
-2.2. For the initial bringup, we adopted a consistent memory scheme between u-boot and
+2.2. For the initial bringup, we adopted a consistent memory scheme between U-Boot and
 	linux kernel, you can customize it based on your system requirements:
 	Flash0:		0x00000000-0x00FFFFFF (16MB)
 

index f51609f..2ed5c76 100644
@@ -13,7 +13,7 @@ Created 06/05/2007
 
 2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL
 ===========================================
-2.1. For the initial bringup, we adopted a consistent memory scheme between u-boot and
+2.1. For the initial bringup, we adopted a consistent memory scheme between U-Boot and
 	linux kernel, you can customize it based on your system requirements:
 	SDR:	0x00000000-0x00ffffff
 	SRAM0:	0x20010000-0x20017fff

index 84fc1ec..224e79c 100644
@@ -47,7 +47,7 @@ Changed files:
 - include/asm-m68k/timer.h		Timer structure and definition
 - include/asm-m68k/types.h		Data types definition
 - include/asm-m68k/uart.h		Uart structure and definition
-- include/asm-m68k/u-boot.h		u-boot structure
+- include/asm-m68k/u-boot.h		U-Boot structure
 
 - include/configs/M53017EVB.h		Board specific configuration file
 

@@ -75,7 +75,7 @@ CONFIG_MCFRTC			-- define to use common CF RTC driver
 CONFIG_SYS_MCFRTC_BASE		-- provide base address for RTC in immap.h
 CONFIG_SYS_RTC_OSCILLATOR	-- define RTC clock frequency
 RTC_DEBUG			-- define to show RTC debug message
-CONFIG_CMD_DATE			-- enable to use date feature in u-boot
+CONFIG_CMD_DATE			-- enable to use date feature in U-Boot
 
 CONFIG_MCFFEC			-- define to use common CF FEC driver
 CONFIG_MII			-- enable to use MII driver

@@ -118,7 +118,7 @@ CONFIG_SYS_SDRAM_BASE		-- defines the DRAM Base
 	SRAM:		0x80000000-0x8FFFFFFF (256MB)
 	IP:		0xFC000000-0xFFFFFFFF (256MB)
 
-2.2. For the initial bringup, we adopted a consistent memory scheme between u-boot and
+2.2. For the initial bringup, we adopted a consistent memory scheme between U-Boot and
 	linux kernel, you can customize it based on your system requirements:
 	Flash0:		0x00000000-0x00FFFFFF (16MB)
 	DDR:		0x40000000-0x4FFFFFFF (256MB)

index 52eac7b..582e0c3 100644
@@ -46,7 +46,7 @@ Changed files:
 - include/asm-m68k/timer.h		Timer structure and definition
 - include/asm-m68k/types.h		Data types definition
 - include/asm-m68k/uart.h		Uart structure and definition
-- include/asm-m68k/u-boot.h		u-boot structure
+- include/asm-m68k/u-boot.h		U-Boot structure
 
 - include/configs/M5373EVB.h		Board specific configuration file
 

@@ -74,7 +74,7 @@ CONFIG_MCFRTC		-- define to use common CF RTC driver
 CONFIG_SYS_MCFRTC_BASE		-- provide base address for RTC in immap.h
 CONFIG_SYS_RTC_OSCILLATOR	-- define RTC clock frequency
 RTC_DEBUG		-- define to show RTC debug message
-CONFIG_CMD_DATE		-- enable to use date feature in u-boot
+CONFIG_CMD_DATE		-- enable to use date feature in U-Boot
 
 CONFIG_MCFFEC		-- define to use common CF FEC driver
 CONFIG_MII		-- enable to use MII driver

@@ -117,7 +117,7 @@ CONFIG_SYS_SDRAM_BASE	-- defines the DRAM Base
 	SRAM:		0x80000000-0x8FFFFFFF (256MB)
 	IP:		0xF0000000-0xFFFFFFFF (256MB)
 
-2.2. For the initial bringup, we adopted a consistent memory scheme between u-boot and
+2.2. For the initial bringup, we adopted a consistent memory scheme between U-Boot and
 	linux kernel, you can customize it based on your system requirements:
 	Flash0:		0x00000000-0x00FFFFFF (16MB)
 

index c70c4c5..c563ad9 100644
@@ -48,7 +48,7 @@ Changed files:
 - include/asm-m68k/timer.h		Timer structure and definition
 - include/asm-m68k/types.h		Data types definition
 - include/asm-m68k/uart.h		Uart structure and definition
-- include/asm-m68k/u-boot.h		u-boot structure
+- include/asm-m68k/u-boot.h		U-Boot structure
 
 - include/configs/M54455EVB.h	Board specific configuration file
 

@@ -78,7 +78,7 @@ CONFIG_MCFRTC		-- define to use common CF RTC driver
 CONFIG_SYS_MCFRTC_BASE		-- provide base address for RTC in immap.h
 CONFIG_SYS_RTC_OSCILLATOR	-- define RTC clock frequency
 RTC_DEBUG		-- define to show RTC debug message
-CONFIG_CMD_DATE		-- enable to use date feature in u-boot
+CONFIG_CMD_DATE		-- enable to use date feature in U-Boot
 
 CONFIG_MCFFEC		-- define to use common CF FEC driver
 CONFIG_MII		-- enable to use MII driver

@@ -91,7 +91,7 @@ CONFIG_SYS_FEC1_PINMUX		-- Set FEC1 Pin configuration
 CONFIG_SYS_FEC0_MIIBASE	-- Set FEC0 MII base register
 CONFIG_SYS_FEC1_MIIBASE	-- Set FEC0 MII base register
 MCFFEC_TOUT_LOOP	-- set FEC timeout loop
-CONFIG_HAS_ETH1		-- define to enable second FEC in u-boot
+CONFIG_HAS_ETH1		-- define to enable second FEC in U-Boot
 
 CONFIG_ISO_PARTITION	-- enable ISO read/write
 CONFIG_DOS_PARTITION	-- enable DOS read/write

@@ -136,7 +136,7 @@ CONFIG_EXTRA_CLOCK	-- Enable extra clock such as vco, flexbus, pci, etc
 
 CONFIG_SYS_MBAR		-- define MBAR offset
 
-CONFIG_SYS_ATMEL_BOOT		-- To determine the u-boot is booted from Atmel or Intel
+CONFIG_SYS_ATMEL_BOOT		-- To determine the U-Boot is booted from Atmel or Intel
 
 CONFIG_MONITOR_IS_IN_RAM -- Not support
 

@@ -163,7 +163,7 @@ CONFIG_SYS_SDRAM_BASE1	-- defines the DRAM Base 1
 	FlexBus:	0xC0000000-0xDFFFFFFF (512MB)
 	IP:		0xF0000000-0xFFFFFFFF (256MB)
 
-2.2. For the initial bringup, we adopted a consistent memory scheme between u-boot and
+2.2. For the initial bringup, we adopted a consistent memory scheme between U-Boot and
 	linux kernel, you can customize it based on your system requirements:
 	Atmel boot:
 	Flash0:		0x00000000-0x0007FFFF (512KB)

index ce497c0..30c5ded 100644
@@ -54,7 +54,7 @@ Changed files:
 - include/asm-m68k/timer.h		Timer structure and definition
 - include/asm-m68k/types.h		Data types definition
 - include/asm-m68k/uart.h		Uart structure and definition
-- include/asm-m68k/u-boot.h		u-boot structure
+- include/asm-m68k/u-boot.h		U-Boot structure
 
 - include/configs/M5475EVB.h		Board specific configuration file
 

@@ -88,7 +88,7 @@ CONFIG_SYS_FEC1_PINMUX		-- Set FEC1 Pin configuration
 CONFIG_SYS_FEC0_MIIBASE	-- Set FEC0 MII base register
 CONFIG_SYS_FEC1_MIIBASE	-- Set FEC0 MII base register
 MCFFEC_TOUT_LOOP	-- set FEC timeout loop
-CONFIG_HAS_ETH1		-- define to enable second FEC in u-boot
+CONFIG_HAS_ETH1		-- define to enable second FEC in U-Boot
 
 CONFIG_CMD_USB		-- enable USB commands
 CONFIG_USB_OHCI_NEW	-- enable USB OHCI driver

index be7ef32..697cee4 100644
@@ -70,7 +70,7 @@ Freescale MPC8313ERDB Board
 
 5.	Downloading and Flashing Images
 
-5.1	Reflash U-boot Image using U-boot
+5.1	Reflash U-Boot Image using U-Boot
 
 	NOR flash:
 

@@ -81,7 +81,7 @@ Freescale MPC8313ERDB Board
 	first, to make sure that the TFTP load will succeed before it
 	goes ahead and wipes out your current firmware.  And of course,
 	have an alternate means of programming the flash available
-	if the new u-boot doesn't boot.
+	if the new U-Boot doesn't boot.
 
 	NAND flash:
 

index b32132d..8ad6d81 100644
@@ -63,7 +63,7 @@ Freescale MPC8315ERDB Board
 
 5.	Downloading and Flashing Images
 
-5.1	Reflash U-boot Image using U-boot
+5.1	Reflash U-Boot Image using U-Boot
 
 	NOR flash:
 

index 6f89829..9a46da0 100644
@@ -22,10 +22,10 @@ Freescale MPC8323ERDB Board
 
 3.	Downloading and Flashing Images
 
-3.1	Reflash U-boot Image using U-boot
+3.1	Reflash U-Boot Image using U-Boot
 
 	N.b, have an alternate means of programming
-	the flash available if the new u-boot doesn't boot.
+	the flash available if the new U-Boot doesn't boot.
 
 	First try a:
 

@@ -44,7 +44,7 @@ Freescale MPC8323ERDB Board
 	erase fe000000 +$filesize
 	cp.b $loadaddr fe000000 $filesize
 
-	To keep your old u-boot's environment variables, do a:
+	To keep your old U-Boot's environment variables, do a:
 
 	saveenv
 

index 4142aa9..d141cd3 100644
@@ -97,7 +97,7 @@ Freescale MPC832XEMDS Board
 		make MPC832XEMDS_config
 		make
 
-	MPC832x support PCI 33MHz and PCI 66MHz, to make u-boot support PCI:
+	MPC832x support PCI 33MHz and PCI 66MHz, to make U-Boot support PCI:
 
 		1)Make sure the DIP SW support PCI mode as described in Section 1.1.
 

@@ -113,7 +113,7 @@ Freescale MPC832XEMDS Board
 
 	tftp 10000 u-boot.bin
 
-5.1 Reflash U-boot Image using U-boot
+5.1 Reflash U-Boot Image using U-Boot
 
 	tftp 20000 u-boot.bin
 	protect off fe000000 fe0fffff

index faf21c9..dbb1517 100644
@@ -90,7 +90,7 @@ Freescale MPC837xEMDS Board
 
 	tftp 40000 u-boot.bin
 
-5.1 Reflash U-boot Image using U-boot
+5.1 Reflash U-Boot Image using U-Boot
 
 	tftp 40000 u-boot.bin
 	protect off fe000000 fe1fffff

index cfb6efa..12df2f2 100644
@@ -84,7 +84,7 @@ Freescale MPC837xE-RDB Board
 
 	tftp $loadaddr u-boot.bin
 
-5.1 Reflash U-boot Image using U-boot
+5.1 Reflash U-Boot Image using U-Boot
 
 	tftp $loadaddr u-boot.bin
 	protect off fe000000 fe0fffff

index 3d12a96..86c3ccd 100644
@@ -3,7 +3,7 @@ Overview
 MPC8569MDS is composed of two boards - PB (Processor Board) and PIB (Platform
 I/O Board). The mpc8569 PowerTM processor is mounted on PB board.
 
-Building U-boot
+Building U-Boot
 -----------
 	make MPC8569MDS_config
 	make

@@ -22,10 +22,10 @@ Memory Map
 0xfe00_0000   0xffff_ffff     Flash                   32MB
 
 
-Flashing u-boot Images
+Flashing U-Boot Images
 ---------------
 
-Use the following commands to program u-boot image into flash:
+Use the following commands to program U-Boot image into flash:
 
 	=> tftp 1000000 u-boot.bin
 	=> protect off all

index 57fd2ad..f1ffdd1 100644
@@ -3,7 +3,7 @@ Overview
 MPC8572DS is a high-performance computing, evaluation and development platform
 supporting the mpc8572 PowerTM processor.
 
-Building U-boot
+Building U-Boot
 -----------
 	make MPC8572DS_config
 	make

@@ -22,14 +22,14 @@ Memory Map
 0xe800_0000 - 0xebff_ffff	Alternate bank		64MB
 0xec00_0000 - 0xefff_ffff	Boot bank		64MB
 
-0xebf8_0000 - 0xebff_ffff	Alternate u-boot address	512KB
-0xeff8_0000 - 0xefff_ffff	Boot u-boot address		512KB
+0xebf8_0000 - 0xebff_ffff	Alternate U-Boot address	512KB
+0xeff8_0000 - 0xefff_ffff	Boot U-Boot address		512KB
 
 
 Flashing Images
 ---------------
 
-To place a new u-boot image in the alternate flash bank and then reset with that
+To place a new U-Boot image in the alternate flash bank and then reset with that
  new image temporarily, use this:
 
 	tftp 1000000 u-boot.bin

@@ -135,7 +135,7 @@ Implementing AMP(Asymmetric MultiProcessing)
 
 5. Bring up two cores separately:
 
-	a. Power on the board, under u-boot prompt:
+	a. Power on the board, under U-Boot prompt:
 		=> setenv <serverip>
 		=> setenv <ipaddr>
 		=> setenv bootargs root=/dev/ram rw console=ttyS0,115200

@@ -154,7 +154,7 @@ Implementing AMP(Asymmetric MultiProcessing)
 		=> fdt chosen $initrd_start $initrd_end
 		=> bootm prep
 		=> cpu 1 release $bootm_low - $fdtaddr -
-	c. Bring up core0's kernel(on the same u-boot console):
+	c. Bring up core0's kernel(on the same U-Boot console):
 		=> setenv bootm_low 0
 		=> setenv bootm_size 0x20000000
 		=> tftp 1000000 8572/uImage.core0

@@ -162,5 +162,5 @@ Implementing AMP(Asymmetric MultiProcessing)
 		=> tftp c00000 8572/mpc8572ds_core0.dtb
 		=> bootm 1000000 2000000 c00000
 
-Please note only core0 will run u-boot, core1 starts kernel directly after
+Please note only core0 will run U-Boot, core1 starts kernel directly after
 "cpu release" command is issued.

index 31a9af3..066e625 100644
@@ -27,7 +27,7 @@ To Flash U-Boot into the booting bank:
 	cp.b 1000000 fff00000 $filesize
 
 
-To Flash U-boot into the alternate bank
+To Flash U-Boot into the alternate bank
 
 	tftp 1000000 u-boot.bin
 	erase fbf00000 +$filesize

index d8fe0a4..77909a8 100644
@@ -80,7 +80,7 @@ Switches:
 3. Flash U-Boot
 ---------------
 The flash range 0xEF800000 to 0xEFFFFFFF can be divided into 2 halves.
-It is possible to use either half to boot using u-boot.  Switch 5 bit 2
+It is possible to use either half to boot using U-Boot.  Switch 5 bit 2
 is used for this purpose.
 
 0xEF800000 to 0xEFBFFFFF - 4MB

@@ -102,7 +102,7 @@ To Flash U-Boot into the booting bank (0xEFC00000 - 0xEFFFFFFF):
 or use tftpflash command:
 	run tftpflash
 
-To Flash U-boot into the alternative bank (0xEF800000 - 0xEFBFFFFF):
+To Flash U-Boot into the alternative bank (0xEF800000 - 0xEFBFFFFF):
 
 	tftp 1000000 u-boot.bin
 	erase efb00000 +$filesize

@@ -113,7 +113,7 @@ To Flash U-boot into the alternative bank (0xEF800000 - 0xEFBFFFFF):
 -------------
 NOTE:  RIO and PCI are mutually exclusive, so they share an address
 
-For 32-bit u-boot, devices are mapped so that the virtual address ==
+For 32-bit U-Boot, devices are mapped so that the virtual address ==
 the physical address, and the map looks liks this:
 
 	Memory Range			Device		Size

@@ -130,7 +130,7 @@ the physical address, and the map looks liks this:
 	0xffc1_0000	0xffc1_ffff	PCI2/PEX2 IO	64K
 	0xef80_0000	0xefff_ffff	Flash		8M
 
-For 36-bit-enabled u-boot, the virtual map is the same as for 32-bit.
+For 36-bit-enabled U-Boot, the virtual map is the same as for 32-bit.
 However, the physical map is altered to reside in 36-bit space, as follows.
 Addresses are no longer mapped with VA == PA.  All accesses from
 software use the VA; the PA is only used for setting up windows

index f9d6324..a248fb2 100644
@@ -1,7 +1,7 @@
 FREESCALE MX28EVK
 ==================
 
-Supported hardware: MX28EVK rev C and D are supported in U-boot.
+Supported hardware: MX28EVK rev C and D are supported in U-Boot.
 
 Files of the MX28EVK port
 --------------------------

index 7232b53..6f6841f 100644
@@ -71,7 +71,7 @@ exec -c "noinitrd console=ttymxc0,115200 root=/dev/nfsroot rootfstype=nfsroot nf
 Flashing U-Boot
 --------------------------------
 
-U-boot should be stored on the NOR flash.
+U-Boot should be stored on the NOR flash.
 
 The boot storage can be select using the switches on the personality board
 (SW1-SW2) and on the DEBUG board (SW4-SW10).

@@ -96,7 +96,7 @@ Creating 6 MTD partitions on "mxc_nor_flash.0":
 To erase the whole partition:
 $ flash_eraseall /dev/mtd0
 
-Writing u-boot:
+Writing U-Boot:
 dd if=u-boot.bin of=/dev/mtd0
 
 To boot from NOR, you have to select the switches as follows:

index d48c7ba..1edccf6 100644
@@ -1,7 +1,7 @@
-How to use U-boot on Freescale MX6UL 14x14 EVK
+How to use U-Boot on Freescale MX6UL 14x14 EVK
 -----------------------------------------------
 
-- Build U-boot for MX6UL 14x14 EVK:
+- Build U-Boot for MX6UL 14x14 EVK:
 
 $ make mrproper
 $ make mx6ul_14x14_evk_defconfig

@@ -28,5 +28,5 @@ switch label numbers reference).
 - Connect the USB cable between the EVK and the PC for the console.
 (The USB console connector is the one close the push buttons)
 
-- Insert the micro SD card in the board, power it up and U-boot messages should
+- Insert the micro SD card in the board, power it up and U-Boot messages should
 come up.

index cde246d..105942f 100644
@@ -95,7 +95,7 @@ is set to spi-flash instead of to SLIC/TDM/DAC and tdm_can_sel is set to TDM
 instead of to CAN/UART1.
 
 
-Build and burn u-boot to NOR flash
+Build and burn U-Boot to NOR flash
 ==================================
 1. Build u-boot.bin image
 	export ARCH=powerpc

@@ -131,7 +131,7 @@ CPLD NOR bank selection register address 0xFFB00009 Bit[0]:
 1 - boot from lower 4 sectors
 
 
-Build and burn u-boot to NAND flash
+Build and burn U-Boot to NAND flash
 ===================================
 1. Build u-boot.bin image
 	export ARCH=powerpc

@@ -146,7 +146,7 @@ Build and burn u-boot to NAND flash
 3. Check SW4[1:4]= 1000 and SW6[4]=1, then power on.
 
 
-Build and burn u-boot to SPI flash
+Build and burn U-Boot to SPI flash
 ==================================
 1. Build u-boot-spi.bin image
 	make P1010RDB_SPIFLASH_config; make

index c5d1419..dc82f0d 100644
@@ -112,14 +112,14 @@ To enable FlexCAN:
 
 To enable SDHC in case of NOR/NAND/SPI boot
    a) For temporary use case in runtime without reboot system
-      run 'mux sdhc' in u-boot to validate SDHC with invalidating IFC.
+      run 'mux sdhc' in U-Boot to validate SDHC with invalidating IFC.
 
    b) For long-term use case
       set 'esdhc' in hwconfig and save it.
 
 To enable IFC in case of SD boot
    a) For temporary use case in runtime without reboot system
-      run 'mux ifc' in u-boot to validate IFC with invalidating SDHC.
+      run 'mux ifc' in U-Boot to validate IFC with invalidating SDHC.
 
    b) For long-term use case
       set 'ifc' in hwconfig and save it.

index bb0f280..c00e3ba 100644
@@ -172,16 +172,16 @@ Start Address  End Address      Description			Size
 128MB NOR Flash memory Map
 --------------------------
 Start Address   End Address     Definition			Max size
-0xEFF40000      0xEFFFFFFF      u-boot (current bank)		768KB
-0xEFF20000      0xEFF3FFFF      u-boot env (current bank)	128KB
+0xEFF40000      0xEFFFFFFF      U-Boot (current bank)		768KB
+0xEFF20000      0xEFF3FFFF      U-Boot env (current bank)	128KB
 0xEFF00000      0xEFF1FFFF      FMAN Ucode (current bank)	128KB
 0xEFE00000      0xEFE3FFFF      QE firmware (current bank)	256KB
 0xED300000      0xEFEFFFFF      rootfs (alt bank)		44MB
 0xEC800000      0xEC8FFFFF      Hardware device tree (alt bank) 1MB
 0xEC020000      0xEC7FFFFF      Linux.uImage (alt bank)		7MB + 875KB
 0xEC000000      0xEC01FFFF      RCW (alt bank)			128KB
-0xEBF40000      0xEBFFFFFF      u-boot (alt bank)		768KB
-0xEBF20000      0xEBF3FFFF      u-boot env (alt bank)		128KB
+0xEBF40000      0xEBFFFFFF      U-Boot (alt bank)		768KB
+0xEBF20000      0xEBF3FFFF      U-Boot env (alt bank)		128KB
 0xEBF00000      0xEBF1FFFF      FMAN ucode (alt bank)		128KB
 0xEBE00000      0xEBE3FFFF      QE firmware (alt bank)		256KB
 0xE9300000      0xEBEFFFFF      rootfs (current bank)		44MB

@@ -221,11 +221,11 @@ Software configurations and board settings
 
    Switching between default bank0 and alternate bank4 on NOR flash
    To change boot source to vbank4:
-	via software:   run command 'qixis_reset altbank' in u-boot.
+	via software:   run command 'qixis_reset altbank' in U-Boot.
 	via DIP-switch: set SW6[1:4] = '0100'
 
    To change boot source to vbank0:
-	via software:   run command 'qixis_reset' in u-boot.
+	via software:   run command 'qixis_reset' in U-Boot.
 	via DIP-Switch: set SW6[1:4] = '0000'
 
 2. NAND Boot:

@@ -273,8 +273,8 @@ e) For SDXC:	      set adaptor=sdxc in hwconfig
 -------------------------------
 PBL initializes the internal CPC-SRAM and copy SPL(160K) to SRAM.
 SPL further initializes DDR using SPD and environment variables
-and copy u-boot(768 KB) from NAND/SPI/SD device to DDR.
-Finally SPL transers control to u-boot for futher booting.
+and copy U-Boot(768 KB) from NAND/SPI/SD device to DDR.
+Finally SPL transers control to U-Boot for futher booting.
 
 SPL has following features:
  - Executes within 256K

@@ -294,14 +294,14 @@ Run time view of SPL framework
 -------------------------------------------------
 |STACK		   | 0xFFFD8000 (22KB)		|
 -------------------------------------------------
-|U-boot SPL	   | 0xFFFD8000 (160KB)		|
+|U-Boot SPL	   | 0xFFFD8000 (160KB)		|
 -------------------------------------------------
 
 NAND Flash memory Map on T1024QDS
 -------------------------------------------------------------
 Start		End		Definition	Size
-0x000000	0x0FFFFF	u-boot		1MB
-0x100000	0x15FFFF	u-boot env	8KB
+0x000000	0x0FFFFF	U-Boot		1MB
+0x100000	0x15FFFF	U-Boot env	8KB
 0x160000	0x17FFFF	FMAN Ucode	128KB
 0x180000	0x19FFFF	QE Firmware	128KB
 

@@ -309,8 +309,8 @@ Start		End		Definition	Size
 SD Card memory Map on T1024QDS
 ----------------------------------------------------
 Block		#blocks		Definition	Size
-0x008		2048		u-boot img	1MB
-0x800		0016		u-boot env	8KB
+0x008		2048		U-Boot img	1MB
+0x800		0016		U-Boot env	8KB
 0x820		0256		FMAN Ucode	128KB
 0x920		0256		QE Firmware	128KB
 

@@ -318,8 +318,8 @@ Block		#blocks		Definition	Size
 SPI Flash memory Map on T1024QDS
 ----------------------------------------------------
 Start		End		Definition	Size
-0x000000	0x0FFFFF	u-boot img	1MB
-0x100000	0x101FFF	u-boot env	8KB
+0x000000	0x0FFFFF	U-Boot img	1MB
+0x100000	0x101FFF	U-Boot env	8KB
 0x110000	0x12FFFF	FMAN Ucode	128KB
 0x130000	0x14FFFF	QE Firmware	128KB
 

index 7d3794a..a0af25a 100644
@@ -145,8 +145,8 @@ Start Address  End Address      Description			Size
 128MB NOR Flash Memory Layout
 -----------------------------
 Start Address   End Address     Definition			Max size
-0xEFF40000      0xEFFFFFFF      u-boot (current bank)		768KB
-0xEFF20000      0xEFF3FFFF      u-boot env (current bank)	128KB
+0xEFF40000      0xEFFFFFFF      U-Boot (current bank)		768KB
+0xEFF20000      0xEFF3FFFF      U-Boot env (current bank)	128KB
 0xEFF00000      0xEFF1FFFF      FMAN Ucode (current bank)	128KB
 0xEFE00000      0xEFE3FFFF      QE firmware (current bank)	256KB
 0xED300000      0xEFDFFFFF      rootfs (alt bank)		44MB

@@ -158,8 +158,8 @@ Start Address   End Address     Definition			Max size
 0xEC700000	0xEC7FFFFF	HV.uImage (alternate bank)	1MB
 0xEC020000      0xEC6FFFFF      Linux.uImage (alt bank)		~7MB
 0xEC000000      0xEC01FFFF      RCW (alt bank)			128KB
-0xEBF40000      0xEBFFFFFF      u-boot (alt bank)		768KB
-0xEBF20000      0xEBF3FFFF      u-boot env (alt bank)		128KB
+0xEBF40000      0xEBFFFFFF      U-Boot (alt bank)		768KB
+0xEBF20000      0xEBF3FFFF      U-Boot env (alt bank)		128KB
 0xEBF00000      0xEBF1FFFF      FMAN ucode (alt bank)		128KB
 0xEBE00000      0xEBE3FFFF      QE firmware (alt bank)		256KB
 0xE9300000      0xEBDFFFFF      rootfs (current bank)		44MB

@@ -198,18 +198,18 @@ Software configurations and board settings
    Switching between default bank0 and alternate bank4 on NOR flash
    To change boot source to vbank4:
    on T1024RDB:
-	via software:   run command 'cpld reset altbank' in u-boot.
+	via software:   run command 'cpld reset altbank' in U-Boot.
 	via DIP-switch: set SW3[5:7] = '100'
    on T1023RDB:
-	via software:   run command 'switch bank4' in u-boot.
+	via software:   run command 'switch bank4' in U-Boot.
 	via DIP-switch: set SW3[5:7] = '100'
 
    To change boot source to vbank0:
    on T1024RDB:
-	via software:   run command 'cpld reset' in u-boot.
+	via software:   run command 'cpld reset' in U-Boot.
 	via DIP-Switch: set SW3[5:7] = '000'
    on T1023RDB:
-	via software:   run command 'switch bank0' in u-boot.
+	via software:   run command 'switch bank0' in U-Boot.
 	via DIP-switch: set SW3[5:7] = '000'
 
 2. NAND Boot:

@@ -255,8 +255,8 @@ Software configurations and board settings
 -------------------------------
 PBL initializes the internal CPC-SRAM and copy SPL(160K) to SRAM.
 SPL further initializes DDR using SPD and environment variables
-and copy u-boot(768 KB) from NAND/SPI/SD device to DDR.
-Finally SPL transers control to u-boot for futher booting.
+and copy U-Boot(768 KB) from NAND/SPI/SD device to DDR.
+Finally SPL transers control to U-Boot for futher booting.
 
 SPL has following features:
  - Executes within 256K

@@ -276,14 +276,14 @@ Run time view of SPL framework
 -------------------------------------------------
 |STACK		   | 0xFFFD8000 (22KB)		|
 -------------------------------------------------
-|U-boot SPL	   | 0xFFFD8000 (160KB)		|
+|U-Boot SPL	   | 0xFFFD8000 (160KB)		|
 -------------------------------------------------
 
 NAND Flash memory Map on T1024RDB
 -------------------------------------------------------------
 Start		End		Definition	Size
-0x000000	0x0FFFFF	u-boot		1MB(2 block)
-0x100000	0x17FFFF	u-boot env	512KB(1 block)
+0x000000	0x0FFFFF	U-Boot		1MB(2 block)
+0x100000	0x17FFFF	U-Boot env	512KB(1 block)
 0x180000	0x1FFFFF	FMAN Ucode	512KB(1 block)
 0x200000	0x27FFFF	QE Firmware	512KB(1 block)
 

@@ -291,16 +291,16 @@ Start		End		Definition	Size
 NAND Flash memory Map on T1023RDB
 ----------------------------------------------------
 Start		End		Definition	Size
-0x000000	0x0FFFFF	u-boot		1MB
-0x100000	0x15FFFF	u-boot env	8KB
+0x000000	0x0FFFFF	U-Boot		1MB
+0x100000	0x15FFFF	U-Boot env	8KB
 0x160000	0x17FFFF	FMAN Ucode	128KB
 
 
 SD Card memory Map on T102xRDB
 ----------------------------------------------------
 Block		#blocks		Definition	Size
-0x008		2048		u-boot img	1MB
-0x800		0016		u-boot env	8KB
+0x008		2048		U-Boot img	1MB
+0x800		0016		U-Boot env	8KB
 0x820		0256		FMAN Ucode	128KB
 0x920		0256		QE Firmware	128KB(only T1024RDB)
 

@@ -308,8 +308,8 @@ Block		#blocks		Definition	Size
 64MB SPI Flash memory Map on T102xRDB
 ----------------------------------------------------
 Start		End		Definition	Size
-0x000000	0x0FFFFF	u-boot img	1MB
-0x100000	0x101FFF	u-boot env	8KB
+0x000000	0x0FFFFF	U-Boot img	1MB
+0x100000	0x101FFF	U-Boot env	8KB
 0x110000	0x12FFFF	FMAN Ucode	128KB
 0x130000	0x14FFFF	QE Firmware	128KB(only T1024RDB)
 0x300000	0x3FFFFF	device tree	128KB

index 8160ca0..6c5ffc0 100644
@@ -118,15 +118,15 @@ Start Address  End Address      Description                     Size
 NOR Flash memory Map on T1040QDS
 --------------------------------
  Start          End             Definition                       Size
-0xEFF40000      0xEFFFFFFF      u-boot (current bank)            768KB
-0xEFF20000      0xEFF3FFFF      u-boot env (current bank)        128KB
+0xEFF40000      0xEFFFFFFF      U-Boot (current bank)            768KB
+0xEFF20000      0xEFF3FFFF      U-Boot env (current bank)        128KB
 0xEFF00000      0xEFF1FFFF      FMAN Ucode (current bank)        128KB
 0xED300000      0xEFEFFFFF      rootfs (alt bank)                44MB
 0xEC800000      0xEC8FFFFF      Hardware device tree (alt bank)  1MB
 0xEC020000      0xEC7FFFFF      Linux.uImage (alt bank)          7MB + 875KB
 0xEC000000      0xEC01FFFF      RCW (alt bank)                   128KB
-0xEBF40000      0xEBFFFFFF      u-boot (alt bank)                768KB
-0xEBF20000      0xEBF3FFFF      u-boot env (alt bank)            128KB
+0xEBF40000      0xEBFFFFFF      U-Boot (alt bank)                768KB
+0xEBF20000      0xEBF3FFFF      U-Boot env (alt bank)            128KB
 0xEBF00000      0xEBF1FFFF      FMAN ucode (alt bank)            128KB
 0xE9300000      0xEBEFFFFF      rootfs (current bank)            44MB
 0xE8800000      0xE88FFFFF      Hardware device tree (cur bank)  11MB + 512KB

@@ -138,7 +138,7 @@ Various Software configurations/environment variables/commands
 --------------------------------------------------------------
 The below commands apply to T1040QDS
 
-1. U-boot environment variable hwconfig
+1. U-Boot environment variable hwconfig
    The default hwconfig is:
 	hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=cs0_cs1;usb1:
 					dr_mode=host,phy_type=utmi

index b9d2212..98b3f63 100644
@@ -186,15 +186,15 @@ Start Address  End Address      Description                     Size
 NOR Flash memory Map
 ---------------------
  Start          End             Definition                       Size
-0xEFF40000      0xEFFFFFFF      u-boot (current bank)            768KB
-0xEFF20000      0xEFF3FFFF      u-boot env (current bank)        128KB
+0xEFF40000      0xEFFFFFFF      U-Boot (current bank)            768KB
+0xEFF20000      0xEFF3FFFF      U-Boot env (current bank)        128KB
 0xEFF00000      0xEFF1FFFF      FMAN Ucode (current bank)        128KB
 0xED300000      0xEFEFFFFF      rootfs (alt bank)                44MB
 0xEC800000      0xEC8FFFFF      Hardware device tree (alt bank)  1MB
 0xEC020000      0xEC7FFFFF      Linux.uImage (alt bank)          7MB + 875KB
 0xEC000000      0xEC01FFFF      RCW (alt bank)                   128KB
-0xEBF40000      0xEBFFFFFF      u-boot (alt bank)                768KB
-0xEBF20000      0xEBF3FFFF      u-boot env (alt bank)            128KB
+0xEBF40000      0xEBFFFFFF      U-Boot (alt bank)                768KB
+0xEBF20000      0xEBF3FFFF      U-Boot env (alt bank)            128KB
 0xEBF00000      0xEBF1FFFF      FMAN ucode (alt bank)            128KB
 0xE9300000      0xEBEFFFFF      rootfs (current bank)            44MB
 0xE8800000      0xE88FFFFF      Hardware device tree (cur bank)  11MB + 512KB

@@ -206,7 +206,7 @@ Various Software configurations/environment variables/commands
 --------------------------------------------------------------
 The below commands apply to the board
 
-1. U-boot environment variable hwconfig
+1. U-Boot environment variable hwconfig
    The default hwconfig is:
 	hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=cs0_cs1;usb1:
 					dr_mode=host,phy_type=utmi

@@ -228,8 +228,8 @@ NAND boot with 2 Stage boot loader
 ----------------------------------
 PBL initialise the internal SRAM and copy SPL(160KB) in SRAM.
 SPL further initialise DDR using SPD and environment variables and copy
-u-boot(768 KB) from flash to DDR.
-Finally SPL transer control to u-boot for futher booting.
+U-Boot(768 KB) from flash to DDR.
+Finally SPL transer control to U-Boot for futher booting.
 
 SPL has following features:
  - Executes within 256K

@@ -250,30 +250,30 @@ SPL has following features:
  -----------------------------------------------
  STACK       | 0xFFFD8000 (22KB)               |
  -----------------------------------------------
- U-boot SPL  | 0xFFFD8000 (160KB)              |
+ U-Boot SPL  | 0xFFFD8000 (160KB)              |
  -----------------------------------------------
 
 NAND Flash memory Map on T104xRDB
 ------------------------------------------
  Start		 End		Definition			Size
-0x000000	0x0FFFFF	u-boot                          1MB
-0x180000	0x19FFFF	u-boot env                      128KB
+0x000000	0x0FFFFF	U-Boot                          1MB
+0x180000	0x19FFFF	U-Boot env                      128KB
 0x280000	0x29FFFF	FMAN Ucode                      128KB
 0x380000	0x39FFFF	QE Firmware                     128KB
 
 SD Card memory Map on T104xRDB
 ------------------------------------------
  Block		#blocks		Definition			Size
-0x008		2048		u-boot                          1MB
-0x800		0024		u-boot env                      8KB
+0x008		2048		U-Boot                          1MB
+0x800		0024		U-Boot env                      8KB
 0x820		0256		FMAN Ucode                      128KB
 0x920		0256		QE Firmware                     128KB
 
 SPI Flash memory Map on T104xRDB
 ------------------------------------------
  Start		 End		Definition			Size
-0x000000	0x0FFFFF	u-boot                          1MB
-0x100000	0x101FFF	u-boot env                      8KB
+0x000000	0x0FFFFF	U-Boot                          1MB
+0x100000	0x101FFF	U-Boot env                      8KB
 0x110000	0x12FFFF	FMAN Ucode                      128KB
 0x130000	0x14FFFF	QE Firmware                     128KB
 

index 83060c1..2a2a0e5 100755
@@ -92,7 +92,7 @@ XFI:
  10GBASE-KR scenario.
  So, for XFI usage, there are two scenarios, one will use fiber cable,
  another will use copper cable. An hwconfig env "fsl_10gkr_copper" is
- introduced to indicate a XFI port will use copper cable, and U-boot
+ introduced to indicate a XFI port will use copper cable, and U-Boot
  will fixup the dtb accordingly.
  It's used as: fsl_10gkr_copper:<10g_mac_name>
  The <10g_mac_name> can be fm1_10g1, fm1_10g2, fm1_10g3, fm1_10g4, they

@@ -108,7 +108,7 @@ XFI:
  - T2080QDS can support 1G-KX by using SGMII protocol, but serdes lane
  runs in 1G-KX mode. By default, the lane runs in SGMII mode, to set a lane
  in 1G-KX mode, need to set corresponding bit in SerDes Protocol Configuration
- Register 1 (PCCR1), and U-boot fixup the dtb for kernel to do proper
+ Register 1 (PCCR1), and U-Boot fixup the dtb for kernel to do proper
  initialization.
  Hwconfig "fsl_1gkx" is used to indicate a lane runs in 1G-KX mode, MAC
  1/2/5/6/9/10 are available for 1G-KX, MAC 3/4 run in RGMII mode. To set a

@@ -142,15 +142,15 @@ Start Address  End Address      Description			Size
 128M NOR Flash memory Map
 -------------------------
 Start Address   End Address	Definition			Max size
-0xEFF40000	0xEFFFFFFF	u-boot (current bank)		768KB
-0xEFF20000	0xEFF3FFFF	u-boot env (current bank)	128KB
+0xEFF40000	0xEFFFFFFF	U-Boot (current bank)		768KB
+0xEFF20000	0xEFF3FFFF	U-Boot env (current bank)	128KB
 0xEFF00000	0xEFF1FFFF	FMAN Ucode (current bank)	128KB
 0xED300000	0xEFEFFFFF	rootfs (alt bank)		44MB
 0xEC800000	0xEC8FFFFF	Hardware device tree (alt bank)	1MB
 0xEC020000	0xEC7FFFFF	Linux.uImage (alt bank)		7MB + 875KB
 0xEC000000	0xEC01FFFF	RCW (alt bank)			128KB
-0xEBF40000	0xEBFFFFFF	u-boot (alt bank)		768KB
-0xEBF20000	0xEBF3FFFF	u-boot env (alt bank)		128KB
+0xEBF40000	0xEBFFFFFF	U-Boot (alt bank)		768KB
+0xEBF20000	0xEBF3FFFF	U-Boot env (alt bank)		128KB
 0xEBF00000	0xEBF1FFFF	FMAN ucode (alt bank)		128KB
 0xE9300000	0xEBEFFFFF	rootfs (current bank)		44MB
 0xE8800000	0xE88FFFFF	Hardware device tree (cur bank)	1MB

@@ -172,11 +172,11 @@ Software configurations and board settings
 
    Switching between default bank0 and alternate bank4 on NOR flash
    To change boot source to vbank4:
-	by software:   run command 'qixis_reset altbank' in u-boot.
+	by software:   run command 'qixis_reset altbank' in U-Boot.
 	by DIP-switch: set SW6[1:4] = '0100'
 
    To change boot source to vbank0:
-	by software:   run command 'qixis_reset' in u-boot.
+	by software:   run command 'qixis_reset' in U-Boot.
 	by DIP-Switch: set SW6[1:4] = '0000'
 
 2. NAND Boot:

@@ -216,8 +216,8 @@ Software configurations and board settings
 -------------------------------
 PBL initializes the internal CPC-SRAM and copy SPL(160K) to SRAM.
 SPL further initializes DDR using SPD and environment variables
-and copy u-boot(768 KB) from NAND/SPI/SD device to DDR.
-Finally SPL transers control to u-boot for futher booting.
+and copy U-Boot(768 KB) from NAND/SPI/SD device to DDR.
+Finally SPL transers control to U-Boot for futher booting.
 
 SPL has following features:
  - Executes within 256K

@@ -237,30 +237,30 @@ Run time view of SPL framework
 -------------------------------------------------
 |STACK		   | 0xFFFD8000 (22KB)		|
 -------------------------------------------------
-|U-boot SPL	   | 0xFFFD8000 (160KB)		|
+|U-Boot SPL	   | 0xFFFD8000 (160KB)		|
 -------------------------------------------------
 
 NAND Flash memory Map on T2080QDS
 --------------------------------------------------------------
 Start		End		Definition	Size
-0x000000	0x0FFFFF	u-boot img	1MB  (2 blocks)
-0x100000	0x17FFFF	u-boot env	512KB (1 block)
+0x000000	0x0FFFFF	U-Boot img	1MB  (2 blocks)
+0x100000	0x17FFFF	U-Boot env	512KB (1 block)
 0x180000	0x1FFFFF	FMAN ucode	512KB (1 block)
 
 
 Micro SD Card memory Map on T2080QDS
 ----------------------------------------------------
 Block		#blocks		Definition	Size
-0x008		2048		u-boot img	1MB
-0x800		0016		u-boot env	8KB
+0x008		2048		U-Boot img	1MB
+0x800		0016		U-Boot env	8KB
 0x820		0128		FMAN ucode	64KB
 
 
 SPI Flash memory Map on T2080QDS
 ----------------------------------------------------
 Start		End		Definition	Size
-0x000000	0x0FFFFF	u-boot img	1MB
-0x100000	0x101FFF	u-boot env	8KB
+0x000000	0x0FFFFF	U-Boot img	1MB
+0x100000	0x101FFF	U-Boot env	8KB
 0x110000	0x11FFFF	FMAN ucode	64KB
 
 

index 24484cd..42b2b92 100644
@@ -107,16 +107,16 @@ Start Address  End Address      Description			Size
 128M NOR Flash memory Map
 -------------------------
 Start Address   End Address	Definition			Max size
-0xEFF40000	0xEFFFFFFF	u-boot (current bank)		768KB
-0xEFF20000	0xEFF3FFFF	u-boot env (current bank)	128KB
+0xEFF40000	0xEFFFFFFF	U-Boot (current bank)		768KB
+0xEFF20000	0xEFF3FFFF	U-Boot env (current bank)	128KB
 0xEFF00000	0xEFF1FFFF	FMAN Ucode (current bank)	128KB
 0xEFE00000	0xEFE3FFFF	PHY CS4315 firmware		256KB
 0xED300000	0xEFEFFFFF	rootfs (alt bank)		44MB
 0xEC800000	0xEC8FFFFF	Hardware device tree (alt bank)	1MB
 0xEC020000	0xEC7FFFFF	Linux.uImage (alt bank)		7MB + 875KB
 0xEC000000	0xEC01FFFF	RCW (alt bank)			128KB
-0xEBF40000	0xEBFFFFFF	u-boot (alt bank)		768KB
-0xEBF20000	0xEBF3FFFF	u-boot env (alt bank)		128KB
+0xEBF40000	0xEBFFFFFF	U-Boot (alt bank)		768KB
+0xEBF20000	0xEBF3FFFF	U-Boot env (alt bank)		128KB
 0xEBF00000	0xEBF1FFFF	FMAN ucode (alt bank)		128KB
 0xEBE00000	0xEBE3FFFF	PHY CS4315 firmware (alt bank)	256KB
 0xE9300000	0xEBEFFFFF	rootfs (current bank)		44MB

@@ -155,11 +155,11 @@ Software configurations and board settings
 
    Switching between default bank and alternate bank on NOR flash
    To change boot source to vbank4:
-	via software:   run command 'cpld reset altbank' in u-boot.
+	via software:   run command 'cpld reset altbank' in U-Boot.
 	via DIP-switch: set SW3[5:7] = '100'
 
    To change boot source to vbank0:
-	via software:   run command 'cpld reset' in u-boot.
+	via software:   run command 'cpld reset' in U-Boot.
 	via DIP-Switch: set SW3[5:7] = '000'
 
 2. NAND Boot:

@@ -197,8 +197,8 @@ Software configurations and board settings
 -------------------------------
 PBL initializes the internal CPC-SRAM and copy SPL(160K) to SRAM.
 SPL further initializes DDR using SPD and environment variables
-and copy u-boot(768 KB) from NAND/SPI/SD device to DDR.
-Finally SPL transers control to u-boot for futher booting.
+and copy U-Boot(768 KB) from NAND/SPI/SD device to DDR.
+Finally SPL transers control to U-Boot for futher booting.
 
 SPL has following features:
  - Executes within 256K

@@ -218,14 +218,14 @@ Run time view of SPL framework
 -------------------------------------------------
 |STACK		   | 0xFFFD8000 (22KB)		|
 -------------------------------------------------
-|U-boot SPL	   | 0xFFFD8000 (160KB)		|
+|U-Boot SPL	   | 0xFFFD8000 (160KB)		|
 -------------------------------------------------
 
 NAND Flash memory Map on T2080RDB
 --------------------------------------------------------------
 Start		End		Definition	Size
-0x000000	0x0FFFFF	u-boot img	1MB  (2 blocks)
-0x100000	0x17FFFF	u-boot env	512KB (1 block)
+0x000000	0x0FFFFF	U-Boot img	1MB  (2 blocks)
+0x100000	0x17FFFF	U-Boot env	512KB (1 block)
 0x180000	0x1FFFFF	FMAN ucode	512KB (1 block)
 0x200000	0x27FFFF	CS4315 ucode	512KB (1 block)
 

@@ -233,8 +233,8 @@ Start		End		Definition	Size
 Micro SD Card memory Map on T2080RDB
 ----------------------------------------------------
 Block		#blocks		Definition	Size
-0x008		2048		u-boot img	1MB
-0x800		0016		u-boot env	8KB
+0x008		2048		U-Boot img	1MB
+0x800		0016		U-Boot env	8KB
 0x820		0128		FMAN ucode	64KB
 0x8a0		0512		CS4315 ucode	256KB
 

@@ -242,8 +242,8 @@ Block		#blocks		Definition	Size
 SPI Flash memory Map on T2080RDB
 ----------------------------------------------------
 Start		End		Definition	Size
-0x000000	0x0FFFFF	u-boot img	1MB
-0x100000	0x101FFF	u-boot env	8KB
+0x000000	0x0FFFFF	U-Boot img	1MB
+0x100000	0x101FFF	U-Boot env	8KB
 0x110000	0x11FFFF	FMAN ucode	64KB
 0x120000        0x15FFFF        CS4315 ucode	256KB
 

index 3962fee..bf23814 100644
@@ -86,7 +86,7 @@ Board Features
 	10GBASE-KR scenario.
 	So, for XFI usage, there are two scenarios, one will use fiber cable,
 	another will use copper cable. An hwconfig env "fsl_10gkr_copper" is
-	introduced to indicate a XFI port will use copper cable, and U-boot
+	introduced to indicate a XFI port will use copper cable, and U-Boot
 	will fixup the dtb accordingly.
 	It's used as: fsl_10gkr_copper:<10g_mac_name>
 	The <10g_mac_name> can be fm1_10g1, fm1_10g2, fm2_10g1, fm2_10g2, they

@@ -118,7 +118,7 @@ The physical address of the last (boot page translation) varies with the actual
 
 Voltage ID and VDD override
 --------------------
-T4240 has a VID feature. U-boot reads the VID efuses and adjust the voltage
+T4240 has a VID feature. U-Boot reads the VID efuses and adjust the voltage
 accordingly. The voltage can also be override by command vdd_override. The
 syntax is
 

@@ -144,8 +144,8 @@ Users can set the final voltage directly.
 -------------------------------
 PBL initializes the internal SRAM and copy SPL(160K) in SRAM.
 SPL further initialise DDR using SPD and environment variables
-and copy u-boot(768 KB) from NAND/SD device to DDR.
-Finally SPL transers control to u-boot for futher booting.
+and copy U-Boot(768 KB) from NAND/SD device to DDR.
+Finally SPL transers control to U-Boot for futher booting.
 
 SPL has following features:
  - Executes within 256K

@@ -165,21 +165,21 @@ Run time view of SPL framework
 -------------------------------------------------
 |STACK		| 0xFFFD8000	(22KB)		|
 -------------------------------------------------
-|U-boot SPL	| 0xFFFD8000 	(160KB)		|
+|U-Boot SPL	| 0xFFFD8000 	(160KB)		|
 -------------------------------------------------
 
 NAND Flash memory Map on T4QDS
 --------------------------------------------------------------
 Start		End		Definition	Size
-0x000000	0x0FFFFF	u-boot img	1MB
-0x140000	0x15FFFF	u-boot env      128KB
+0x000000	0x0FFFFF	U-Boot img	1MB
+0x140000	0x15FFFF	U-Boot env      128KB
 0x160000	0x17FFFF	FMAN Ucode      128KB
 
 Micro SD Card memory Map on T4QDS
 ----------------------------------------------------
 Block		#blocks		Definition	Size
-0x008		2048		u-boot img	1MB
-0x800		0016		u-boot env	8KB
+0x008		2048		U-Boot img	1MB
+0x800		0016		U-Boot env	8KB
 0x820		0128		FMAN ucode	64KB
 
 Switch Settings: (ON is 1, OFF is 0)

index 697e5c8..9418907 100644
@@ -16,13 +16,13 @@ The i.MX6 has a BOOT ROM PPL (Primary Program Loader) which supports loading
 an executable image from various boot devices.
 
 The Gateworks Ventana board config uses an SPL build configuration. This
-will build the following artifacts from u-boot source:
+will build the following artifacts from U-Boot source:
  - SPL - Secondary Program Loader that the i.MX6 BOOT ROM (Primary Program
          Loader) boots.  This detects CPU/DRAM configuration, configures
          The DRAM controller, loads u-boot.img from the detected boot device,
          and jumps to it.  As this is booted from the PPL, it has an IVT/DCD
          table.
- - u-boot.img - The main u-boot core which is u-boot.bin with a image header.
+ - u-boot.img - The main U-Boot core which is u-boot.bin with a image header.
 
 
 2. Build

@@ -71,15 +71,15 @@ kobs-ng init -v -x --search_exponent=1 SPL
 The kobs-ng application uses an imximage which contains the Image Vector Table
 (IVT) and Device Configuration Data (DCD) structures that the i.MX6 BOOT ROM
 requires to boot.  The kobs-ng adds the Firmware Configuration Block (FCB) and
-Discovered Bad Block Table (DBBT).  The SPL build artifact from u-boot is
+Discovered Bad Block Table (DBBT).  The SPL build artifact from U-Boot is
 an imximage.
 
-The u-boot.img, which is the non SPL u-boot binary appended to a u-boot image
+The u-boot.img, which is the non SPL U-Boot binary appended to a U-Boot image
 header must be programmed in the NAND flash boot device at an offset hard
 coded in the SPL. For the Ventana boards, this has been chosen to be 14MB.
-The image can be programmed from either u-boot or Linux:
+The image can be programmed from either U-Boot or Linux:
 
-u-boot:
+U-Boot:
 Ventana > setenv mtdparts mtdparts=nand:14m(spl),2m(uboot),1m(env),-(rootfs)
 Ventana > tftp ${loadaddr} u-boot.img && nand erase.part uboot && \
           nand write ${loadaddr} uboot ${filesize}

@@ -104,7 +104,7 @@ More details about the i.MX6 BOOT ROM can be found in the IMX6 reference manual.
 
 When the IMX6 eFUSE settings have been factory programmed to boot from
 micro-SD the SPL will be loaded from offset 0x400 (1KB). Once the SPL is
-booted, it will load and execute U-boot (u-boot.img) from offset 69KB
+booted, it will load and execute U-Boot (u-boot.img) from offset 69KB
 on the micro-SD (defined by CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR).
 
 While it is technically possible to enable the SPL to be able to load

index 5b05ba8..cbf1612 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2007 Analog Device Inc.
 #

index caba16f..44fa684 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2010 Analog Device Inc.
 #

index 7f4fc99..b85d776 100644
@@ -60,7 +60,7 @@ Keymile kmeter1 Board
     Bytes transferred = 204204 (31dac hex)
     =>
 
-4.1 Reflash U-boot Image using U-boot
+4.1 Reflash U-Boot Image using U-Boot
 
     => run update
     ..... done

index 4f375a8..8caa360 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) Switchfin Org. <[email protected]>
 #

index e2d60cc..3c142e0 100644
@@ -30,21 +30,21 @@ image.
 Restoring a corrupted or missing flash image:
 =============================================
 
-Note that U-boot versions up to and including 2009.06 had essentially
-two copies of u-boot in flash; one at the very beginning, which set
+Note that U-Boot versions up to and including 2009.06 had essentially
+two copies of U-Boot in flash; one at the very beginning, which set
 the HRCW, and one at the very end, which was the image that was run.
 As of this point in time, the two have been combined into just one
 at the beginning of flash, which provides both the HRCW, and the image
 that is executed.  This frees up the remainder of flash for other uses.
-Use of the u-boot command "fli" will indicate what parts are in use.
-Details for storing U-boot to flash using a Wind River ICE can be found
+Use of the U-Boot command "fli" will indicate what parts are in use.
+Details for storing U-Boot to flash using a Wind River ICE can be found
 on page 19 of the board manual (request ERG-00328-001).  The following
 is a summary of that information:
 
   - Connect ICE and establish connection to it from WorkBench/OCD.
   - Ensure you have background mode (BKM) in the OCD terminal window.
   - Select the appropriate flash type (listed above)
-  - Prepare a u-boot image by using the Wind River Convert utility;
+  - Prepare a U-Boot image by using the Wind River Convert utility;
     by using "Convert and Add file" on the ELF file from your build.
     Convert from FF80_0000 to FFFF_FFFF (or to FF83_FFFF if you are
     trying to preserve your old environment settings and user flash).

@@ -55,9 +55,9 @@ is a summary of that information:
 
 Note that some versions of the register files used with Workbench
 would zero some TSEC registers, which inhibits ethernet operation
-by u-boot when this register file is played to the target.  Using
+by U-Boot when this register file is played to the target.  Using
 "INN" in the OCD terminal window instead of "IN" before the "GO"
-will not play the register file, and allow u-boot to use the TSEC
+will not play the register file, and allow U-Boot to use the TSEC
 interface while executed from the ICE "GO" command.
 
 Alternatively, you can locate the register file which will be named

@@ -74,7 +74,7 @@ as u-boot.bin.
 Updating U-Boot with U-Boot:
 ============================
 
-This procedure is very similar to other boards that have u-boot installed.
+This procedure is very similar to other boards that have U-Boot installed.
 Assuming that the network has been configured, and that the new u-boot.bin
 has been copied to the TFTP server, the commands are:
 

@@ -98,7 +98,7 @@ There are three configuration choices:
 
 The 1st does not enable CONFIG_PCI, and assumes that the PCI slot
 will be left empty (M66EN high), and so the board will operate with
-a base clock of 66MHz.  Note that you need both PCI enabled in u-boot
+a base clock of 66MHz.  Note that you need both PCI enabled in U-Boot
 and linux in order to have functional PCI under linux.  The only
 reason for choosing to not enable PCI would be if you had a very
 early (rev 1.0) CPU with possible PCI issues.

index feac5e3..0def245 100644
@@ -7,10 +7,10 @@ memory. It also has 128MB SDRAM 100MHz LBC memory, with both a PCI-e,
 and a PCI-X slot, dual mini-DB9 for UART, and dual RJ-45 for eTSEC
 ethernet connections.
 
-U-boot Configuration:
+U-Boot Configuration:
 =====================
 
-The following possible u-boot configuration targets are available:
+The following possible U-Boot configuration targets are available:
 
 	1) sbc8548_config
 	2) sbc8548_PCI_33_config

@@ -23,7 +23,7 @@ of each choice are listed below.
 
 Choice #1 does not enable CONFIG_PCI, and assumes that the PCI slot
 will be left empty (M66EN high), and so the board will operate with
-a base clock of 66MHz.	Note that you need both PCI enabled in u-boot
+a base clock of 66MHz.	Note that you need both PCI enabled in U-Boot
 and linux in order to have functional PCI under linux.
 
 The second enables PCI support and builds for a 33MHz clock rate.  Note

@@ -100,13 +100,13 @@ from the board's socket to resolve the above i2c address overlap
 issue and allow SPD autodetection of RAM to work.
 
 
-Updating U-boot with U-boot:
+Updating U-Boot with U-Boot:
 ============================
 
-Note that versions of u-boot up to and including 2009.08 had u-boot stored
+Note that versions of U-Boot up to and including 2009.08 had U-Boot stored
 at 0xfff8_0000 -> 0xffff_ffff (512k).  Currently it is being stored from
 0xfffa_0000 -> 0xffff_ffff (384k).  If you use an old macro/script to
-update u-boot with u-boot and it uses the old address, you will render
+update U-Boot with U-Boot and it uses the old address, you will render
 your board inoperable, and you will require JTAG recovery.
 
 The following steps list how to update with the current address:

@@ -120,11 +120,11 @@ The following steps list how to update with the current address:
 	protect on all
 
 The "md" steps in the above are just a precautionary step that allow
-you to confirm the u-boot version that was downloaded, and then confirm
+you to confirm the U-Boot version that was downloaded, and then confirm
 that it was copied to flash.
 
 The above assumes that you are using the default board settings which
-have u-boot in the 8MB flash, tied to /CS0.
+have U-Boot in the 8MB flash, tied to /CS0.
 
 If you are running the default 8MB /CS0 settings but want to store an
 image in the SODIMM that is built with CONFIG_SYS_ALT_BOOT enabled,

@@ -139,7 +139,7 @@ image in the SODIMM that is built with CONFIG_SYS_ALT_BOOT enabled,
 	protect on all
 
 Finally, if you are running the alternate 64MB /CS0 settings and want
-to update the in-use u-boot image, then (again with CONFIG_SYS_ALT_BOOT
+to update the in-use U-Boot image, then (again with CONFIG_SYS_ALT_BOOT
 enabled) the steps will become:
 
 	tftp u-boot.bin

@@ -155,7 +155,7 @@ Hardware Reference:
 ===================
 
 The following contains some summary information on hardware settings
-that are relevant to u-boot, based on the board manual.	 For the
+that are relevant to U-Boot, based on the board manual.	 For the
 most up to date and complete details of the board, please request the
 reference manual ERG-00327-001.pdf from www.windriver.com
 

@@ -166,7 +166,7 @@ Sodimm flash:
 	intel V28F128Jx, 16384x8 (4 devices) at 0xfb80_0000
 	Note that this address reflects the default setting for
 	the JTAG debugging tools, but since the alignment is
-	rather inconvenient, u-boot puts it at 0xec00_0000.
+	rather inconvenient, U-Boot puts it at 0xec00_0000.
 
 
 	Jumpers:

@@ -193,7 +193,7 @@ is jumpered parallel to the LBC-SDRAM, then /CS0 is for the
 SODIMM flash and /CS6 is for the boot flash.  Note that in this
 alternate setting, you also need to switch SW2.8 to ON.
 See the setting CONFIG_SYS_ALT_BOOT if you want to use this setting
-and boot u-boot from the 64MB SODIMM
+and boot U-Boot from the 64MB SODIMM
 
 
 	Switches:

@@ -257,7 +257,7 @@ fb80_0000	ff7f_ffff	CS6	32	SODIMM flash (64MB) [*]
 ff80_0000	ffff_ffff	CS0	8	Boot flash (8MB)
 
 [*] fb80 represents the default programmed by WR JTAG register files,
-    but u-boot places the flash at either ec00 or fc00 based on JP12.
+    but U-Boot places the flash at either ec00 or fc00 based on JP12.
 
 The EPLD on CS5 demuxes the following devices at the following offsets:
 

index d07f1cc..4999b77 100644
@@ -30,15 +30,15 @@ PCI:
 4. Reflashing U-Boot
 --------------------
 The board has two independent flash devices which can be used for dual
-booting, or for u-boot backup and recovery.  A two pin jumper on the
+booting, or for U-Boot backup and recovery.  A two pin jumper on the
 three pin JP10 determines which device is attached to /CS0 line.
 
-Assuming one device has a functional u-boot, and the other device has
+Assuming one device has a functional U-Boot, and the other device has
 a recently installed non-functional image, to perform a recovery from
 that non-functional image goes essentially as follows:
 
 a) power down the board and jumper JP10 to select the functional image.
-b) power on the board and let it get to u-boot prompt.
+b) power on the board and let it get to U-Boot prompt.
 c) while on, using static precautions, move JP10 back to the failed image.
 d) use "md fff00000" to confirm you are looking at the failed image
 e) turn off write protect with "prot off all"

index b417ff0..5d0a45d 100644
@@ -1,7 +1,7 @@
-How to use U-boot on Solid-run mx6 Hummingboard and Cubox-i
+How to use U-Boot on Solid-run mx6 Hummingboard and Cubox-i
 -----------------------------------------------------------
 
-- Build U-boot for Hummingboard/Cubox-i:
+- Build U-Boot for Hummingboard/Cubox-i:
 
 $ make mrproper
 $ make mx6cuboxi_defconfig

@@ -17,5 +17,5 @@ sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync
 
 sudo dd if=u-boot.img of=/dev/mmcblk0 bs=1k seek=69; sync
 
-- Insert the SD card in the board, power it up and U-boot messages should
+- Insert the SD card in the board, power it up and U-Boot messages should
 come up.

index 2e029f5..1ce8f64 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 93a01e4..0fe25e8 100644
@@ -1,5 +1,5 @@
 #
-# U-boot - Makefile
+# U-Boot - Makefile
 #
 # Copyright (c) 2005-2008 Analog Device Inc.
 #

index 0fe5c3b..05baff6 100644
@@ -3,7 +3,7 @@ U-Boot port for Texas Instruments Keystone II EVM boards
 
 Author: Murali Karicheri <[email protected]>
 
-This README has information on the u-boot port for K2HK, K2E, and K2L EVM boards.
+This README has information on the U-Boot port for K2HK, K2E, and K2L EVM boards.
 Documentation for this board can be found at
 http://www.advantech.com/Support/TI-EVM/EVMK2HX_sd.aspx
 https://www.einfochips.com/index.php/partnerships/texas-instruments/k2e-evm.html

@@ -23,7 +23,7 @@ The K2L SoC details are available at
 Board configuration:
 ====================
 
-Some of the peripherals that are configured by u-boot
+Some of the peripherals that are configured by U-Boot
 +------+-------+-------+-----------+-----------+-------+-------+----+
 |      |DDR3   |NAND   |MSM SRAM   |ETH ports  |UART   |I2C    |SPI |
 +------+-------+-------+-----------+-----------+-------+-------+----+

@@ -37,7 +37,7 @@ There are only 2 eth port installed on the boards.
 There are separate PLLs to drive clocks to Tetris ARM and Peripherals.
 To bring up SMP Linux on this board, there is a boot monitor
 code that will be installed in MSMC SRAM. There is command available
-to install this image from u-boot.
+to install this image from U-Boot.
 
 The port related files can be found at following folders
  keystone2 SoC related files: arch/arm/cpu/armv7/keystone/

@@ -48,7 +48,7 @@ include/configs/k2hk_evm.h
 include/configs/k2e_evm.h
 include/configs/k2l_evm.h
 
-As u-boot is migrating to Kconfig there is also board defconfig files
+As U-Boot is migrating to Kconfig there is also board defconfig files
 configs/k2e_evm_defconfig
 configs/k2hk_evm_defconfig
 configs/k2l_evm_defconfig

@@ -80,7 +80,7 @@ Need Code Composer Studio (CCS) installed on a PC to load and run u-boot-dtb.bin
 on EVM. See instructions at below link for installing CCS on a Windows PC.
 http://processors.wiki.ti.com/index.php/MCSDK_UG_Chapter_Getting_Started#
 Installing_Code_Composer_Studio
-Use u-boot-dtb.bin from the build folder for loading and running u-boot binary
+Use u-boot-dtb.bin from the build folder for loading and running U-Boot binary
 on EVM. Follow instructions at
 K2HK http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup
 K2E  http://processors.wiki.ti.com/index.php/EVMK2E_Hardware_Setup

@@ -94,7 +94,7 @@ Start CCS on a Windows machine and Launch Target
 configuration as instructed at http://processors.wiki.ti.com/index.php/
 MCSDK_UG_Chapter_Exploring#Loading_and_Running_U-Boot_on_EVM_through_CCS.
 The instructions provided in the above link uses a script for
-loading the u-boot binary on the target EVM. Instead do the following:-
+loading the U-Boot binary on the target EVM. Instead do the following:-
 
 1. Right click to "Texas Instruments XDS2xx USB Emulator_0/CortexA15_1 core (D
    is connected: Unknown)" at the debug window (This is created once Target

@@ -126,41 +126,41 @@ SPI NOR Flash programming instructions
 U-Boot image can be flashed to first 512KB of the NOR flash using following
 instructions:
 
-1. Start CCS and run U-boot as described above.
+1. Start CCS and run U-Boot as described above.
 2. Suspend Target. Select Run -> Suspend from top level menu
    CortexA15_1 (Free Running)"
 3. Load u-boot-spi.gph binary from build folder on to DDR address 0x87000000
    through CCS as described in step 2 of "Load and Run U-Boot on K2HK/K2E/K2L
    EVM using CCS", but using address 0x87000000.
-4. Free Run the target as described earlier (step 4) to get u-boot prompt
-5. At the U-Boot console type following to setup u-boot environment variables.
+4. Free Run the target as described earlier (step 4) to get U-Boot prompt
+5. At the U-Boot console type following to setup U-Boot environment variables.
    setenv addr_uboot 0x87000000
    setenv filesize <size in hex of u-boot-spi.gph rounded to hex 0x10000>
    run burn_uboot_spi
-   Once u-boot prompt is available, Power OFF the EVM. Set the SW1 dip switch
+   Once U-Boot prompt is available, Power OFF the EVM. Set the SW1 dip switch
    to "SPI Little Endian Boot mode" as per instruction at
    http://processors.wiki.ti.com/index.php/*_Hardware_Setup.
-6. Power ON the EVM. The EVM now boots with u-boot image on the NOR flash.
+6. Power ON the EVM. The EVM now boots with U-Boot image on the NOR flash.
 
 AEMIF NAND Flash programming instructions
 ======================================
 U-Boot image can be flashed to first 1024KB of the NAND flash using following
 instructions:
 
-1. Start CCS and run U-boot as described above.
+1. Start CCS and run U-Boot as described above.
 2. Suspend Target. Select Run -> Suspend from top level menu
    CortexA15_1 (Free Running)"
 3. Load MLO binary from build folder on to DDR address 0x87000000
    through CCS as described in step 2 of "Load and Run U-Boot on K2HK EVM
    using CCS", but using address 0x87000000.
-4. Free Run the target as described earlier (step 4) to get u-boot prompt
-5. At the U-Boot console type following to setup u-boot environment variables.
+4. Free Run the target as described earlier (step 4) to get U-Boot prompt
+5. At the U-Boot console type following to setup U-Boot environment variables.
    setenv filesize <size in hex of MLO rounded to hex 0x10000>
    run burn_uboot_nand
-   Once u-boot prompt is available, Power OFF the EVM. Set the SW1 dip switch
+   Once U-Boot prompt is available, Power OFF the EVM. Set the SW1 dip switch
    to "ARM NAND Boot mode" as per instruction at
    http://processors.wiki.ti.com/index.php/*_Hardware_Setup.
-6. Power ON the EVM. The EVM now boots with u-boot image on the NAND flash.
+6. Power ON the EVM. The EVM now boots with U-Boot image on the NAND flash.
 
 Load and Run U-Boot on keystone EVMs using UART download
 ========================================================

@@ -171,4 +171,4 @@ Open BMC and regular UART terminals.
 2. Using BMC terminal set the ARM-UART bootmode and reboot the EVM
    BMC> bootmode #4
    MBC> reboot
-3. When xmodem is complete you should see the u-boot starts on the UART port
+3. When xmodem is complete you should see the U-Boot starts on the UART port

index c6c0132..6345416 100644
@@ -9,7 +9,7 @@ SoCs: mx6 quad, mx6 dual lite and mx6 solo.
 For more details about Wandboard, please refer to:
 http://www.wandboard.org/
 
-Building U-boot for Wandboard
+Building U-Boot for Wandboard
 -----------------------------
 
 To build U-Boot for the Wandboard:

@@ -17,7 +17,7 @@ To build U-Boot for the Wandboard:
 $ make wandboard_config
 $ make
 
-Flashing U-boot into the SD card
+Flashing U-Boot into the SD card
 --------------------------------
 
 - After the 'make' command completes, the generated 'SPL' binary must be

@@ -36,4 +36,4 @@ as the mx6 processor)
 
 - Connect the serial cable to the host PC
 
-- Power up the board and U-boot messages will appear in the serial console.
+- Power up the board and U-Boot messages will appear in the serial console.

index 22f9055..3cfd22e 100644
@@ -1,4 +1,4 @@
-How to Update U-boot on Warp board
+How to Update U-Boot on Warp board
 ----------------------------------
 
 Required software on the host PC:

@@ -7,13 +7,13 @@ Required software on the host PC:
 
 - dfu-util: http://dfu-util.sourceforge.net/releases/
 
-Build U-boot for Warp:
+Build U-Boot for Warp:
 
 $ make mrproper
 $ make warp_config
 $ make
 
-This will generate the U-boot binary called u-boot.imx.
+This will generate the U-Boot binary called u-boot.imx.
 
 Put warp board in USB download mode
 

@@ -29,7 +29,7 @@ Load u-boot.imx via USB:
 
 $ sudo ./imx_usb u-boot.imx
 
-Then U-boot should start and its messages will appear in the console program.
+Then U-Boot should start and its messages will appear in the console program.
 
 Use the default environment variables:
 

@@ -43,7 +43,7 @@ Transfer u-boot.imx that will be flashed into the eMMC:
 
 $ sudo dfu-util -D u-boot.imx -a boot
 
-Then on the U-boot prompt the following message should be seen after a
+Then on the U-Boot prompt the following message should be seen after a
 successful upgrade:
 
 #DOWNLOAD ... OK

@@ -53,4 +53,4 @@ Remove power from the warp board.
 
 Put warp board into normal boot mode
 
-Power up the board and the new updated U-boot should boot from eMMC
+Power up the board and the new updated U-Boot should boot from eMMC

index 17bc747..66b97bc 100644
@@ -9,7 +9,7 @@ performance changes:
 
 
 ----------------------------------------
-SDRAM0_CFG0[PMU] = 1 (U-boot default for Bamboo, Yosemite and Yellowstone)
+SDRAM0_CFG0[PMU] = 1 (U-Boot default for Bamboo, Yosemite and Yellowstone)
 ----------------------------------------
 Stream benchmark results
 -------------------------------------------------------------

index f32108f..de669cb 100644
@@ -1,20 +1,20 @@
-U-boot for arm64
+U-Boot for arm64
 
 Summary
 =======
-No hardware platform of arm64 is available now. The u-boot is
+No hardware platform of arm64 is available now. The U-Boot is
 simulated on Foundation Model and Fast Model for ARMv8.
 
 Notes
 =====
 
-1. Currenly, u-boot run at the highest exception level processor
+1. Currenly, U-Boot run at the highest exception level processor
    supported and jump to EL2 or optionally EL1 before enter OS.
 
-2. U-boot for arm64 is compiled with AArch64-gcc. AArch64-gcc
+2. U-Boot for arm64 is compiled with AArch64-gcc. AArch64-gcc
    use rela relocation format, a tool(tools/relocate-rela) by Scott Wood
    is used to encode the initial addend of rela to u-boot.bin. After running,
-   the u-boot will be relocated to destination again.
+   the U-Boot will be relocated to destination again.
 
 3. Fdt should be placed at a 2-megabyte boundary and within the first 512
    megabytes from the start of the kernel image. So, fdt_high should be

index 6fcc3bd..889c8a9 100644
@@ -227,15 +227,15 @@ Start Address	End Address	Description	Size
 NOR Flash memory Map on B4860 and B4420QDS
 ------------------------------------------
  Start		 End		Definition			Size
-0xEFF40000	0xEFFFFFFF	u-boot (current bank)		768KB
-0xEFF20000	0xEFF3FFFF	u-boot env (current bank)	128KB
+0xEFF40000	0xEFFFFFFF	U-Boot (current bank)		768KB
+0xEFF20000	0xEFF3FFFF	U-Boot env (current bank)	128KB
 0xEFF00000	0xEFF1FFFF	FMAN Ucode (current bank)	128KB
 0xEF300000	0xEFEFFFFF	rootfs (alternate bank)		12MB
 0xEE800000	0xEE8FFFFF	device tree (alternate bank)	1MB
 0xEE020000	0xEE6FFFFF	Linux.uImage (alternate bank)	6MB+896KB
 0xEE000000	0xEE01FFFF	RCW (alternate bank)		128KB
-0xEDF40000	0xEDFFFFFF	u-boot (alternate bank)		768KB
-0xEDF20000	0xEDF3FFFF	u-boot env (alternate bank)	128KB
+0xEDF40000	0xEDFFFFFF	U-Boot (alternate bank)		768KB
+0xEDF20000	0xEDF3FFFF	U-Boot env (alternate bank)	128KB
 0xEDF00000	0xEDF1FFFF	FMAN ucode (alternate bank)	128KB
 0xED300000	0xEDEFFFFF	rootfs (current bank)		12MB
 0xEC800000	0xEC8FFFFF	device tree (current bank)	1MB

@@ -246,7 +246,7 @@ Various Software configurations/environment variables/commands
 --------------------------------------------------------------
 The below commands apply to both B4860QDS and B4420QDS.
 
-1. U-boot environment variable hwconfig
+1. U-Boot environment variable hwconfig
    The default hwconfig is:
 	hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=cs0_cs1;usb1:
 					dr_mode=host,phy_type=ulpi

@@ -267,7 +267,7 @@ The below commands apply to both B4860QDS and B4420QDS.
 4. To change personality of board
    For changing personality from B4860 to B4420
 	1)Boot from vbank0
-	2)Flash vbank2 with b4420 rcw and u-boot
+	2)Flash vbank2 with b4420 rcw and U-Boot
 	3)Give following commands to uboot prompt
 	   => mw.b ffdf0040 0x30;
 	   => mw.b ffdf0010 0x00;

@@ -309,7 +309,7 @@ The below commands apply to both B4860QDS and B4420QDS.
 
    When using [DEFAULT] RCW, which including 2 * 1G SGMII on board and 2 * 1G
    SGMII on SGMII riser card.
-   Under U-boot these network interfaces are recognized as:
+   Under U-Boot these network interfaces are recognized as:
    FM1 at DTSEC3, FM1 at DTSEC4, FM1 at DTSEC5 and FM1 at DTSEC6.
 
    On Linux the interfaces are renamed as:

@@ -322,7 +322,7 @@ The below commands apply to both B4860QDS and B4420QDS.
    Serdes protocosl tested:
    0x18, 0x9e (serdes1, serdes2)
 
-   Under U-boot these network interfaces are recognized as:
+   Under U-Boot these network interfaces are recognized as:
    FM1 at DTSEC3, FM1 at DTSEC4 and  e1000#0.
 
    On Linux the interfaces are renamed as:

@@ -333,8 +333,8 @@ NAND boot with 2 Stage boot loader
 ----------------------------------
 PBL initialise the internal SRAM and copy SPL(160KB) in SRAM.
 SPL further initialise DDR using SPD and environment variables and copy
-u-boot(768 KB) from flash to DDR.
-Finally SPL transer control to u-boot for futher booting.
+U-Boot(768 KB) from flash to DDR.
+Finally SPL transer control to U-Boot for futher booting.
 
 SPL has following features:
  - Executes within 256K

@@ -355,12 +355,12 @@ SPL has following features:
  -----------------------------------------------
  STACK       | 0xFFFD8000 (22KB)               |
  -----------------------------------------------
- U-boot SPL  | 0xFFFD8000 (160KB)              |
+ U-Boot SPL  | 0xFFFD8000 (160KB)              |
  -----------------------------------------------
 
 NAND Flash memory Map on B4860 and B4420QDS
 ------------------------------------------
  Start		 End		Definition			Size
-0x000000	0x0FFFFF	u-boot                          1MB
-0x140000	0x15FFFF	u-boot env                      128KB
+0x000000	0x0FFFFF	U-Boot                          1MB
+0x140000	0x15FFFF	U-Boot env                      128KB
 0x1A0000	0x1BFFFF	FMAN Ucode                      128KB

index fe36909..7ce5ae4 100644
@@ -1,4 +1,4 @@
-The biggest problem when trying to compile U-boot with clang is that
+The biggest problem when trying to compile U-Boot with clang is that
 almost all archs rely on storing gd in a global register and clang user
 manual states: "clang does not support global register variables; this
 is unlikely to be implemented soon because it requires additional LLVM

@@ -17,9 +17,9 @@ will also fail to compile, but there is in no strict reason to do so
 in the ARM world, since crt0.S takes care of this. These assignments
 can be avoided by changing the init calls but this is not in mainline yet.
 
-NOTE: without the -mllvm -arm-use-movt=0 flags u-boot will compile
+NOTE: without the -mllvm -arm-use-movt=0 flags U-Boot will compile
 fine, but llvm might hardcode addresses in movw / movt pairs, which
-cannot be relocated and u-boot will fail at runtime.
+cannot be relocated and U-Boot will fail at runtime.
 
 Debian (based)
 --------------

@@ -45,7 +45,7 @@ export CROSS_COMPILE=arm-gnueabi-freebsd-
 gmake CC="clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd -no-integrated-as -mllvm -arm-use-movt=0" rpi_defconfig
 gmake CC="clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd -no-integrated-as -mllvm -arm-use-movt=0" -j8
 
-Given that u-boot will default to gcc, above commands can be
+Given that U-Boot will default to gcc, above commands can be
 simplified with a simple wrapper script, listed below.
 
 /usr/local/bin/arm-gnueabi-freebsd-gcc

index 30e05da..ed7e47d 100644
@@ -1,4 +1,4 @@
-U-boot config options used in fec_mxc.c
+U-Boot config options used in fec_mxc.c
 
 CONFIG_FEC_MXC
 	Selects fec_mxc.c to be compiled into u-boot. Can read out the

index 1243a12..cd71ec8 100644
@@ -61,7 +61,7 @@ The ways to configure the ddr interleaving mode
 	 "hwconfig=fsl_ddr:ctlr_intlv=bank"			\
 	 ......
 
-2. Run u-boot "setenv" command to configure the memory interleaving mode.
+2. Run U-Boot "setenv" command to configure the memory interleaving mode.
    Either numerical or string value is accepted.
 
   # disable memory controller interleaving

@@ -125,7 +125,7 @@ hwconfig=fsl_ddr:ecc=off
 
 Memory testing options for mpc85xx
 ==================================
-1. Memory test can be done once U-boot prompt comes up using mtest, or
+1. Memory test can be done once U-Boot prompt comes up using mtest, or
 2. Memory test can be done with Power-On-Self-Test function, activated at
    compile time.
 

@@ -267,7 +267,7 @@ For DDR parameter tuning up and debugging, the interactive DDR debugger can
 be activated by setting the environment variable "ddr_interactive" to any
 value.  (The value of ddr_interactive may have a meaning in the future, but,
 for now, the presence of the variable will cause the debugger to run.)  Once
-activated, U-boot will show the prompt "FSL DDR>" before enabling the DDR
+activated, U-Boot will show the prompt "FSL DDR>" before enabling the DDR
 controller.  The available commands are printed by typing "help".
 
 Another way to enter the interactive DDR debugger without setting the

@@ -275,7 +275,7 @@ environment variable is to send the 'd' character early during the boot
 process.  To save booting time, no additional delay is added, so the window
 to send the key press is very short -- basically, it is the time before the
 memory controller code starts to run.  For example, when rebooting from
-within u-boot, the user must press 'd' IMMEDIATELY after hitting enter to
+within U-Boot, the user must press 'd' IMMEDIATELY after hitting enter to
 initiate a 'reset' command.  In case of power on/reset, the user can hold
 down the 'd' key while applying power or hitting the board's reset button.
 

@@ -341,7 +341,7 @@ help
 	no argument	- print a list of all commands
 
 go
-	no argument	- program memory controller(s) and continue with U-boot
+	no argument	- program memory controller(s) and continue with U-Boot
 
 Examples of debugging flow
 

index 7c9a4ac..1823fb2 100644
@@ -37,7 +37,7 @@ As the fuses are arranged in banks of 8 words:
 bank = 4
 word = 2
 
-And the U-boot command would be:
+And the U-Boot command would be:
 
 => fuse read 4 2
 Reading bank 4:

@@ -58,7 +58,7 @@ As the fuses are arranged in banks of 8 words:
 bank = 4
 word = 3
 
-And the U-boot command would be:
+And the U-Boot command would be:
 
 => fuse read 4 3
 Reading bank 4:

index c85febc..9d5c08f 100644
@@ -17,7 +17,7 @@ Motorola M68K series of CPUs.
 Bernhard Kuhn ported U-Boot 0.4.0 to the Motorola Coldfire
 architecture. The patches of Bernhard support the MCF5272 and
 MCF5282. A great disadvantage of these patches was that they needed
-a pre-bootloader to start u-boot. Because of this, a new port was
+a pre-bootloader to start U-Boot. Because of this, a new port was
 created which no longer needs a first stage booter.
 
 Although this port is intended to cover all M68k processors, only

@@ -53,8 +53,8 @@ To configure the board, type: make M5272C3_config
 
 U-Boot Memory Map:
 ------------------
-0xffe00000 - 0xffe3ffff		u-boot
-0xffe04000 - 0xffe05fff		environment (embedded in u-boot!)
+0xffe00000 - 0xffe3ffff		U-Boot
+0xffe04000 - 0xffe05fff		environment (embedded in U-Boot!)
 0xffe40000 - 0xffffffff		free for linux/applications
 
 

@@ -65,13 +65,13 @@ Board specific code is located in: board/m5282evb
 To configure the board, type: make M5272C3_config
 
 At the moment the code isn't fully implemented and still needs a pre-loader!
-The preloader must initialize the processor and then start u-boot. The board
+The preloader must initialize the processor and then start U-Boot. The board
 must be configured for a pre-loader (see 4.1)
 
 For the preloader, please see
 http://mailman.uclinux.org/pipermail/uclinux-dev/2003-December/023384.html
 
-U-boot is configured to run at 0x20000 at default. This can be configured by
+U-Boot is configured to run at 0x20000 at default. This can be configured by
 change CONFIG_SYS_TEXT_BASE in board/m5282evb/config.mk and CONFIG_SYS_MONITOR_BASE in
 include/configs/M5282EVB.h.
 

@@ -91,10 +91,10 @@ make EB+MCF-EV123_internal_config	for internal FLASH
 
 4.1 Configuration to use a pre-loader
 -------------------------------------
-If u-boot should be loaded to RAM and started by a pre-loader
+If U-Boot should be loaded to RAM and started by a pre-loader
 CONFIG_MONITOR_IS_IN_RAM must be defined. If it is defined the
 initial vector table and basic processor initialization will not
-be compiled in. The start address of u-boot must be adjusted in
+be compiled in. The start address of U-Boot must be adjusted in
 the boards config header file (CONFIG_SYS_MONITOR_BASE) and Makefile
 (CONFIG_SYS_TEXT_BASE) to the load address.
 

@@ -105,7 +105,7 @@ CONFIG_MCF52x2	-- defined for all MCF52x2 CPUs
 CONFIG_M5272	-- defined for all Motorola MCF5272 CPUs
 
 CONFIG_MONITOR_IS_IN_RAM
-		-- defined if u-boot is loaded by a pre-loader
+		-- defined if U-Boot is loaded by a pre-loader
 
 CONFIG_SYS_MBAR	-- defines the base address of the MCF5272 configuration registers
 CONFIG_SYS_INIT_RAM_ADDR

@@ -130,7 +130,7 @@ CONFIG_MCF52x2	-- defined for all MCF52x2 CPUs
 CONFIG_M5282	-- defined for all Motorola MCF5282 CPUs
 
 CONFIG_MONITOR_IS_IN_RAM
-		-- defined if u-boot is loaded by a pre-loader
+		-- defined if U-Boot is loaded by a pre-loader
 
 CONFIG_SYS_MBAR	-- defines the base address of the MCF5282 internal register space
 CONFIG_SYS_INIT_RAM_ADDR

index c8db8a0..8614696 100644
@@ -13,4 +13,4 @@ How to flash using a MIPS Navigator Probe:
       reset
       flash-boot /path/to/u-boot/u-boot.bin
 
-  - You should now be able to reboot your Malta to a U-boot shell.
+  - You should now be able to reboot your Malta to a U-Boot shell.

index ad520ab..cf14231 100644
@@ -4,7 +4,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-U-boot provides a set of interfaces for creating and using simple, text
+U-Boot provides a set of interfaces for creating and using simple, text
 based menus. Menus are displayed as lists of labeled entries on the
 console, and an entry can be selected by entering its label.
 

index d456103..7a8b706 100644
@@ -80,7 +80,7 @@ Freescale MPC83xx ADS Boards
 
 	tftp 10000 u-boot.bin
 
-5.1 Reflash U-boot Image using U-boot
+5.1 Reflash U-Boot Image using U-Boot
 
     tftp 10000 u-boot.bin
     protect off fe000000 fe09ffff

index 8da768a..72c7bd7 100644
@@ -1,7 +1,7 @@
 Spin table in cache
 =====================================
 As specified by ePAPR v1.1, the spin table needs to be in cached memory. After
-DDR is initialized and U-boot relocates itself into DDR, the spin table is
+DDR is initialized and U-Boot relocates itself into DDR, the spin table is
 accessible for core 0. It is part of release.S, within 4KB range after
 __secondary_start_page. For other cores to use the spin table, the booting
 process is described below:

index 28bbcbe..ef92739 100644
@@ -107,7 +107,7 @@ Updated 13-July-2004 Jon Loeliger
 2. MEMORY MAP TO WORK WITH LINUX KERNEL
 
 2.1. For the initial bringup, we adopted a consistent memory scheme
-     between u-boot and linux kernel, you can customize it based on your
+     between U-Boot and linux kernel, you can customize it based on your
      system requirements:
 
      0x0000_0000     0x7fff_ffff     DDR		     2G

@@ -192,7 +192,7 @@ straightforward.
     and future revisions of 8540/8560.
 
 
-4.4 Reflash U-boot Image using U-boot
+4.4 Reflash U-Boot Image using U-Boot
 
     tftp 10000 u-boot.bin
     protect off fff80000 ffffffff

index bc5db0c..79d71cb 100644
@@ -25,7 +25,7 @@ The 85xx CDS code base is known to compile using:
 Memory Map
 ----------
 
-The memory map for u-boot and linux has been extended w.r.t. the ADS
+The memory map for U-Boot and linux has been extended w.r.t. the ADS
 platform to allow for utilization of all 85xx CDS devices.  The memory
 map is setup for linux to operate properly.  The linux source when
 configured for MPC85xx CDS has been updated to reflect the new memory

@@ -55,14 +55,14 @@ The CDS board  has two flash banks, each 8MB in size (2^23 = 0x00800000).
 There is a switch which allows the boot-bank to be selected.  The switch
 settings for updating flash are given below.
 
-The u-boot commands for copying the boot-bank into the secondary bank are
+The U-Boot commands for copying the boot-bank into the secondary bank are
 as follows:
 
      erase ff780000 ff7fffff
      cp.b fff80000 ff780000 80000
 
 
-U-boot/kermit commands for downloading an image, then copying
+U-Boot/kermit commands for downloading an image, then copying
 it into the secondary bank:
 
      loadb

@@ -76,7 +76,7 @@ it into the secondary bank:
      cp.b $loadaddr ff780000 80000
 
 
-U-boot commands for downloading an image via tftp and flashing
+U-Boot commands for downloading an image via tftp and flashing
 it into the second bank:
 
      tftp 10000 <u-boot.bin.image>

@@ -211,7 +211,7 @@ Memory Map:
    Flash Bank 2 @ 0xff000000
    Ram @ 0
 
-Commands for downloading a u-boot image to memory from edink:
+Commands for downloading a U-Boot image to memory from edink:
 
    env -c
    time -s 4/8/2004 4:30p

index ed2e568..6ea73b9 100644
@@ -1,4 +1,4 @@
-Booting U-boot on a MXS processor
+Booting U-Boot on a MXS processor
 =================================
 
 This document describes the MXS U-Boot port. This document mostly covers topics

@@ -23,7 +23,7 @@ Contents
 2) Compiling U-Boot for a MXS based board
 3) Installation of U-Boot for a MXS based board to SD card
 4) Installation of U-Boot into NAND flash on a MX28 based board
-5) Installation of U-boot into SPI NOR flash on a MX28 based board
+5) Installation of U-Boot into SPI NOR flash on a MX28 based board
 
 1) Prerequisites
 ----------------

@@ -95,19 +95,19 @@ Next, configure U-Boot for a MXS based board
 
 Examples:
 
-1. For building U-boot for Denx M28EVK board:
+1. For building U-Boot for Denx M28EVK board:
 
 	$ make m28evk_config
 
-2. For building U-boot for Freescale MX28EVK board:
+2. For building U-Boot for Freescale MX28EVK board:
 
 	$ make mx28evk_config
 
-3. For building U-boot for Freescale MX23EVK board:
+3. For building U-Boot for Freescale MX23EVK board:
 
 	$ make mx23evk_config
 
-4. For building U-boot for Olimex MX23 Olinuxino board:
+4. For building U-Boot for Olimex MX23 Olinuxino board:
 
 	$ make mx23_olinuxino_config
 

@@ -267,7 +267,7 @@ There are two possibilities when preparing an image writable to NAND flash.
 5) Installation of U-Boot into SPI NOR flash on a MX28 based board
 ------------------------------------------------------------------
 
-The u-boot.sb file can be directly written to SPI NOR from U-boot prompt.
+The u-boot.sb file can be directly written to SPI NOR from U-Boot prompt.
 
 Load u-boot.sb into RAM, this can be done in several ways and one way is to use
 tftp:

@@ -278,7 +278,7 @@ Probe the SPI NOR flash:
 
 (SPI NOR should be succesfully detected in this step)
 
-Erase the blocks where U-boot binary will be written to:
+Erase the blocks where U-Boot binary will be written to:
        => sf erase 0x0 0x80000
 
 Write u-boot.sb to SPI NOR:

@@ -287,4 +287,4 @@ Write u-boot.sb to SPI NOR:
 Power off the board and set the boot mode DIP switches to boot from the SPI NOR
 according to MX28 manual section 12.2.1 (Table 12-2)
 
-Last step is to power up the board and U-boot should start from SPI NOR.
+Last step is to power up the board and U-Boot should start from SPI NOR.

index 8a004ca..ef243d1 100644
@@ -1,4 +1,4 @@
- U-boot for Odroid X2/U3/XU3
+ U-Boot for Odroid X2/U3/XU3
 ========================
 
 1. Summary

@@ -36,7 +36,7 @@ https://github.com/hardkernel/u-boot/tree/odroidxu3-v2012.07/sd_fuse/hardkernel
 
 4. Boot media layout
 ====================
-The table below shows SD/eMMC cards layout for U-boot.
+The table below shows SD/eMMC cards layout for U-Boot.
 The block offset is starting from 0 and the block size is 512B.
  -------------------------------------
 |  Binary   | Block offset| part type |

@@ -44,7 +44,7 @@ The block offset is starting from 0 and the block size is 512B.
  -------------------------------------
 | Bl1       | 1    | 0    |  1 (boot) |
 | Bl2       | 31   | 30   |  1 (boot) |
-| U-boot    | 63   | 62   |  1 (boot) |
+| U-Boot    | 63   | 62   |  1 (boot) |
 | Tzsw      | 2111 | 2110 |  1 (boot) |
 | Uboot Env | 2560 | 2560 |  0 (user) |
  -------------------------------------

@@ -62,18 +62,18 @@ From the downloaded files, You can find:
 without problem)
 
 This is all you need to boot this board. But if you want to use your custom
-u-boot then you need to change u-boot.bin with your own u-boot binary*
+U-Boot then you need to change u-boot.bin with your own U-Boot binary*
 and run the script "sd_fusing.sh" - this script is valid only for SD card.
 
 *note:
-The proper binary file of current U-boot is u-boot-dtb.bin.
+The proper binary file of current U-Boot is u-boot-dtb.bin.
 
 quick steps for Linux:
 - Download all files from the link at point 3 and extract it if needed.
 - put any SD card into the SD reader
 - check the device with "dmesg"
 - run ./sd_fusing.sh /dev/sdX - where X is SD card device (but not a partition)
-Check if Hardkernel U-boot is booting, and next do the same with your U-boot.
+Check if Hardkernel U-Boot is booting, and next do the same with your U-Boot.
 
 6. Prepare the eMMC boot card
    with a eMMC card reader (boot from eMMC card slot)

@@ -92,19 +92,19 @@ eMMC partition - its size is usually very small, about 1-4 MiB.
 If you have an eMMC->microSD adapter you can prepare the card as in point 5.
 But then the device can boot only from the SD card slot.
 
-8. Prepare the boot media using Hardkernel U-boot
+8. Prepare the boot media using Hardkernel U-Boot
 =================================================
-You can update the U-boot to the custom one if you have a working bootloader
+You can update the U-Boot to the custom one if you have a working bootloader
 delivered with the board on the eMMC/SD card. Then follow the steps:
 - install the android fastboot tool
 - connect a micro usb cable to the board
-- on the U-boot prompt, run command: fastboot (as a root)
+- on the U-Boot prompt, run command: fastboot (as a root)
 - on the host, run command: "fastboot flash bootloader u-boot-dtb.bin"
-- the custom U-boot should start after the board resets.
+- the custom U-Boot should start after the board resets.
 
 9. Partition layout
 ====================
-Default U-boot environment is setup for fixed partition layout.
+Default U-Boot environment is setup for fixed partition layout.
 
 Partition table: MSDOS. Disk layout and files as listed in the table below.
  ----- ------ ------ ------ -------- ---------------------------------

index bd175eb..cc182c9 100644
@@ -5,8 +5,8 @@
  */
 
 The 'pxe' commands provide a near subset of the functionality provided by
-the PXELINUX boot loader. This allows U-boot based systems to be controlled
-remotely using the same PXE based techniques that many non U-boot based servers
+the PXELINUX boot loader. This allows U-Boot based systems to be controlled
+remotely using the same PXE based techniques that many non U-Boot based servers
 use.
 
 Commands

@@ -99,7 +99,7 @@ with # are treated as comments. White space between and at the beginning of
 lines is ignored.
 
 The size of pxe files and the number of labels is only limited by the amount
-of RAM available to U-boot. Memory for labels is dynamically allocated as
+of RAM available to U-Boot. Memory for labels is dynamically allocated as
 they're parsed, and memory for pxe files is statically allocated, and its
 location is given by the pxefile_addr_r environment variable. The pxe code is
 not aware of the size of the pxefile memory and will outgrow it if pxe files

@@ -206,38 +206,38 @@ to be downloaded, and boot with the command line "root=/dev/sdb1"
 
 Differences with PXELINUX
 =========================
-The biggest difference between U-boot's pxe and PXELINUX is that since
-U-boot's pxe support is written entirely in C, it can run on any platform
-with network support in U-boot. Here are some other differences between
-PXELINUX and U-boot's pxe support.
+The biggest difference between U-Boot's pxe and PXELINUX is that since
+U-Boot's pxe support is written entirely in C, it can run on any platform
+with network support in U-Boot. Here are some other differences between
+PXELINUX and U-Boot's pxe support.
 
-- U-boot's pxe does not support the PXELINUX DHCP option codes specified
+- U-Boot's pxe does not support the PXELINUX DHCP option codes specified
   in RFC 5071, but could be extended to do so.
 
-- when U-boot's pxe fails to boot, it will return control to U-boot,
-  allowing another command to run, other U-boot command, instead of resetting
+- when U-Boot's pxe fails to boot, it will return control to U-Boot,
+  allowing another command to run, other U-Boot command, instead of resetting
   the machine like PXELINUX.
 
-- U-boot's pxe doesn't rely on or provide an UNDI/PXE stack in memory, it
-  only uses U-boot.
+- U-Boot's pxe doesn't rely on or provide an UNDI/PXE stack in memory, it
+  only uses U-Boot.
 
-- U-boot's pxe doesn't provide the full menu implementation that PXELINUX
+- U-Boot's pxe doesn't provide the full menu implementation that PXELINUX
   does, only a simple text based menu using the commands described in
   this README.	With PXELINUX, it's possible to have a graphical boot
-  menu, submenus, passwords, etc. U-boot's pxe could be extended to support
+  menu, submenus, passwords, etc. U-Boot's pxe could be extended to support
   a more robust menuing system like that of PXELINUX's.
 
-- U-boot's pxe expects U-boot uimg's as kernels.  Anything that would work
-  with the 'bootm' command in U-boot could work with the 'pxe boot' command.
+- U-Boot's pxe expects U-Boot uimg's as kernels.  Anything that would work
+  with the 'bootm' command in U-Boot could work with the 'pxe boot' command.
 
-- U-boot's pxe only recognizes a single file on the initrd command line.  It
+- U-Boot's pxe only recognizes a single file on the initrd command line.  It
   could be extended to support multiple.
 
-- in U-boot's pxe, the localboot command doesn't necessarily cause a local
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