ARM: support for ICP DAS LP-8x4x
Subsystems (15)
Re: [PATCH v3 10/21] mtd: support BB SRAM on ICP DAS LP-8x4x
In reply to Brian NorrisQuoted 25 lines · Brian Norris
Hi Sergei,
Quoted 10 lines · Sergei Ianovich
This provides an MTD device driver for 512kB of battery backed up SRAM on ICPDAS LP-8X4X programmable automation controllers.
SRAM chip is connected via FPGA and is not accessible without a driver, unlike flash memory which is wired to CPU MMU.
This SRAM becomes an excellent persisent storage of volatile process data like counter values and sensor statuses. Storing those data in flash or mmc card is not a viable solution.
Quoted 8 lines
Signed-off-by Sergei Ianovich <[email protected]>---
v2..v3
* no changes (except number 08/16 -> 10/21)v0..v2
* use device tree
* use devm helpers where possibleWhat's the status of this series? Is the rest of this platform support going in via other trees yet? I have a few trivial comments, but this driver mostly looks good as-is.
(...)
Quoted 4 lines
You'll need a (trivial) DT binding doc in
Documentation/devicetree/bindings/to go with this. You might also need to split thearch/arm/boot/dts/stuff out to a separate patch, so the MTD driver can go in the MTD tree separate from the ARM tree bits.
(...)
Quoted 5 lines
With that, you have my:
Reviewed-by Brian Norris <[email protected]>and I can merge this to the MTD tree if/when you'd like.
Thanks for response, the rest of the series is stuck on a DMA driver with no development activity. I'll fix the comments, separate ARM staff and refile the patch.
PATCH v3 11/21 ARM: pxa: support ICP DAS LP-8x4x FPGA irq
In reply to Sergei IanovichICP DAS LP-8x4x contains FPGA chip. The chip functions as a interrupt source providing 16 additional interrupts among other things. The interrupt lines are muxed to a GPIO pin. GPIO pins are in turn muxed to a CPU interrupt line.
Until pxa is completely converted to device tree, it is impossible to use IRQCHIP_DECLARE() and the irqdomain needs to added manually.
---
v2..v3
* no changes (except number 09/16 -> 10/21)
v0..v2
* extract irqchip and move to drivers/irqchip/
* use device tree
* use devm helpers where possible
.../bindings/interrupt-controller/irq-lp8x4x.txt | 49 +++++ arch/arm/boot/dts/pxa27x-lp8x4x.dts | 10 + drivers/irqchip/Kconfig | 5 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-lp8x4x.c | 205 +++++++++++++++++++++ 5 files changed, 270 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt create mode 100644 drivers/irqchip/irq-lp8x4x.c
Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt new file +49 -0
@@ -0,0 +1,49 @@ +ICP DAS LP-8x4x FPGA Interrupt Controller + +ICP DAS LP-8x4x contains FPGA chip. The chip functions as a interrupt +source providing 16 additional interrupts among other things. + +Required properties: +- compatible : should be "icpdas,irq-lp8x4x" + +- reg: physical base address of the controller and length of memory mapped + region. + +- interrupt-controller : identifies the node as an interrupt controller + +- #interrupt-cells : should be 1 + +- interrupts : should provide interrupt + +- interrupt-parent : should provide a link to interrupt controller either + explicitly and implicitly from a parent node + +Example: + + fpga: fpga at 17000006 { + compatible = "icpdas,irq-lp8x4x"; + reg = <0x17000006 0x16>; + interrupt-parent = <&gpio>; + interrupts = <3 IRQ_TYPE_EDGE_RISING>; + #interrupt-cells = <1>; + interrupt-controller; + status = "okay"; + }; + + uart at 17009050 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x17009050 0x10 + 0x17009030 0x02>; + interrupt-parent = <&fpga>; + interrupts = <13>; + status = "okay"; + }; + + uart at 17009060 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x17009060 0x10 + 0x17009032 0x02>; + interrupt-parent = <&fpga>; + interrupts = <14>; + status = "okay"; + };
arch/arm/boot/dts/pxa27x-lp8x4x.dts +10 -0
@@ -167,6 +167,16 @@ reg = <0xa000 0x1000 0x901e 0x1>; }; + + fpgairq: irq at 9006 { + compatible = "icpdas,irq-lp8x4x"; + reg = <0x9006 0x16>; + interrupt-parent = <&gpio>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + #interrupt-cells = <1>; + interrupt-controller; + status = "okay"; + }; }; }; };
drivers/irqchip/Kconfig +5 -0
@@ -35,6 +35,11 @@ config IMGPDC_IRQ select GENERIC_IRQ_CHIP select IRQ_DOMAIN +config LP8X4X_IRQ + bool + depends on OF + select IRQ_DOMAIN + config ORION_IRQCHIP bool select IRQ_DOMAIN
drivers/irqchip/Makefile +1 -0
@@ -22,3 +22,4 @@ obj-$(CONFIG_RENESAS_IRQC) += irq-renesas-irqc.o obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o obj-$(CONFIG_TB10X_IRQC) += irq-tb10x.o +obj-$(CONFIG_LP8X4X_IRQ) += irq-lp8x4x.o
drivers/irqchip/irq-lp8x4x.c new file +205 -0
205 lines not on this page · raw message
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1.8.4.2
Re: [PATCH v3 11/21] ARM: pxa: support ICP DAS LP-8x4x FPGA irq
Quoted 11 lines · Sergei Ianovich
ICP DAS LP-8x4x contains FPGA chip. The chip functions as a interrupt source providing 16 additional interrupts among other things. The interrupt lines are muxed to a GPIO pin. GPIO pins are in turn muxed to a CPU interrupt line.
Until pxa is completely converted to device tree, it is impossible to use
IRQCHIP_DECLARE()and the irqdomain needs to added manually.Signed-off-by Sergei Ianovich <[email protected]>CC Arnd Bergmann <[email protected]>CC Linus Walleij <[email protected]>
(...)
Quoted 1 line
+++
b/drivers/irqchip/irq-lp8x4x.c
Usually combined GPIO+IRQ controllers are put into drivers/gpio but this is a bit special as it seems to handle also non-GPIO-related IRQs so let's get some input on this.
drivers/irqchip/irq-lp8x4x.c line 36
Quoted 5 lines
drivers/irqchip/irq-lp8x4x.c new file +5
-0+static unsigned char irq_sys_enabled; +static unsigned char irq_high_enabled; +static void *base; +static int irq_base; +static int num_irq =16 ;
Please use the state container design pattern and get rid of these global variables.
This documentation patch describes this pattern and has been merged for v3.14, so please read this:
http://marc.info/?l=linux-kernel&m=138615980524966&w=2
drivers/irqchip/irq-lp8x4x.c line 41
Quoted 4 lines
drivers/irqchip/irq-lp8x4x.c new file +4
-0+static void lp8x4x_mask_irq (struct irq_data *d) +{ +unsigned mask; +int irq = d->irq - irq_base;
Don't calculate hardware IRQ numbers from offsets. Use irqdomain, which is done for exactly this purpose.
drivers/irqchip/irq-lp8x4x.c line 49
Quoted 2 lines
drivers/irqchip/irq-lp8x4x.c new file +2
-0+if (irq <8 ) { + irq_high_enabled &= ~(1 << irq);
I usually use the BIT() macro for this, like:
#include <linux/bitops.h>
irq_high_enabled &= ~BIT(irq);
drivers/irqchip/irq-lp8x4x.c line 103
Quoted 7 lines
drivers/irqchip/irq-lp8x4x.c new file +7
-0+static struct irq_chip lp8x4x_irq_chip = { + .name ="FPGA" , + .irq_ack = lp8x4x_mask_irq, + .irq_mask = lp8x4x_mask_irq, + .irq_mask_ack = lp8x4x_mask_irq, + .irq_unmask = lp8x4x_unmask_irq, +};
After you have added your state container you will have a handle to your struct gpio_chip in the cookie passed to as irqdata.
Then you need to mark the GPIO lines used for IRQs by doing something similar to this patch in your startup() and shutdown() callbacks:
http://marc.info/?l=linux-gpio&m=138547223832167&w=2
drivers/irqchip/irq-lp8x4x.c line 41
Quoted 5 lines
drivers/irqchip/irq-lp8x4x.c new file +5
-0+static void lp8x4x_irq_handler (unsigned int irq,struct irq_desc *desc) +{> +static void lp8x4x_unmask_irq(struct irq_data *d) +{ +unsigned mask; +int irq = d->irq - irq_base;
Use the irqdomain.
drivers/irqchip/irq-lp8x4x.c line 117
Quoted 11 lines
drivers/irqchip/irq-lp8x4x.c new file +11
-0+int loop, n; +unsigned long mask; +struct irq_chip *chip =irq_desc_get_chip (desc); + +chained_irq_enter (chip, desc); + + do { + loop = 0; + mask = ioread8(base + CLRHILVINT) & 0xff; + mask |= (ioread8(base + SECOINT) & 0x1f) << 8; + mask |= (ioread8(base + PRIMINT) & 0xe0) << 8;
#define these magic constants so we know what they mean. 0x1f, 0xe0...
drivers/irqchip/irq-lp8x4x.c line 124
Quoted 7 lines
drivers/irqchip/irq-lp8x4x.c new file +7
-0+ mask &= (irq_high_enabled | (irq_sys_enabled <<8 )); +for_each_set_bit (n, &mask,BITS_PER_LONG ) { + loop =1 ; + +generic_handle_irq (irq_base + n); + } + }while (loop);
If you're going to do it like this then have "loop" be a bool variable.
However I don't quite like this construction, an eternal for() loop with a break; statement works too, but try to just use the mask and get rid of the "loop" helper variable.
Quoted 1 line
+
iowrite8(0, base + EOI);
This looks dangerous, what are you doing here?
drivers/irqchip/irq-lp8x4x.c line 151
Quoted 3 lines
drivers/irqchip/irq-lp8x4x.c new file +3
-0+static int lp8x4x_irq_probe (struct platform_device *pdev) +{ +struct resource *rm, *ri;
Explain these names. Usually we call them "res" or something simple like this.
drivers/irqchip/irq-lp8x4x.c line 170
Quoted 5 lines
drivers/irqchip/irq-lp8x4x.c new file +5
-0+ irq_base =irq_alloc_descs (-1 ,0 , num_irq,0 ); +if (irq_base <0 ) { +dev_err (&pdev->dev,"Failed to allocate IRQ numbers\n" ); +return irq_base; + }
Instead of doing this, create the descriptors by calling irq_create_mapping() on all the hardware lines after adding the irq domain.
drivers/irqchip/irq-lp8x4x.c line 177
Quoted 6 lines
drivers/irqchip/irq-lp8x4x.c new file +6
-0+ domain =irq_domain_add_legacy (np, num_irq, irq_base,0 , + &lp8x4x_irq_domain_ops,NULL ); +if (!domain) { +dev_err (&pdev->dev,"Failed to add IRQ domain\n" ); +return -ENOMEM ; + }
Why are you using a legacy irqdomain? You're not dependent on any specific base so use a linear domain.
drivers/irqchip/irq-lp8x4x.c line 186
Quoted 8 lines
drivers/irqchip/irq-lp8x4x.c new file +8
-0+iowrite8 (0 , base +CLRRISEINT ); +iowrite8 (0 , base +ENRISEINT ); +iowrite8 (0 , base +CLRFALLINT ); +iowrite8 (0 , base +ENFALLINT ); +iowrite8 (0 , base +CLRHILVINT ); +iowrite8 (0 , base +ENHILVINT ); +iowrite8 (0 , base +ENSYSINT ); +iowrite8 (0 , base +SECOINT );
Add a comment explaining what you're doing here.
drivers/irqchip/irq-lp8x4x.c line 205
Quoted 5 lines
drivers/irqchip/irq-lp8x4x.c new file +5
-0+static int __init lp8x4x_irq_init (void ) +{ +return platform_driver_register (&lp8x4x_irq_driver); +} +postcore_initcall (lp8x4x_irq_init);
Do you *have* to do it this early? I guess if it's used for the UARTs then yes, but make a case for it...
Yours,
Linus Walleij
Re: [PATCH v3 11/21] ARM: pxa: support ICP DAS LP-8x4x FPGA irq
Quoted 4 lines · Linus Walleij
On Tue, Dec 17, 2013 at 8:37 PM, Sergei Ianovich <[email protected]> wrote:
Usually combined GPIO+IRQ controllers are put intodrivers/gpiobut this is a bit special as it seems to handle also non-GPIO-related IRQs so let's get some input on this.
This one is a plain IRQ controller. It has simple input lines, not GPIO pins. The chip reports its status to upper level interrupt controller. The upper level controller is PXA GPIO in this case.
(...)
Quoted 12 lines
drivers/irqchip/irq-lp8x4x.c line 103
Quoted 7 lines
drivers/irqchip/irq-lp8x4x.c new file +7
-0+static struct irq_chip lp8x4x_irq_chip = { + .name ="FPGA" , + .irq_ack = lp8x4x_mask_irq, + .irq_mask = lp8x4x_mask_irq, + .irq_mask_ack = lp8x4x_mask_irq, + .irq_unmask = lp8x4x_unmask_irq, +};After you have added your state container you will have a handle to your struct
gpio_chipin the cookie passed to as irqdata.
Quoted 4 lines
Then you need to mark the GPIO lines used for IRQs by doing something similar to this patch in your
startup()andshutdown()callbacks:
http://marc.info/?l=linux-gpio&m=138547223832167&w=2
The chip requires no GPIO initialization.
(...)
Quoted 3 lines
Quoted 1 line
+
iowrite8(0, base + EOI);This looks dangerous, what are you doing here?
This is done in kernel source which comes with the device. The controller won't work without this line.
I cannot know for sure, as I don't have board datasheets or drawings. I suspect, this clears GPIO line which reports interrupts to the upper level controller.
(...)
Quoted 8 lines
drivers/irqchip/irq-lp8x4x.c line 205
Quoted 5 lines
drivers/irqchip/irq-lp8x4x.c new file +5
-0+static int __init lp8x4x_irq_init (void ) +{ +return platform_driver_register (&lp8x4x_irq_driver); +} +postcore_initcall (lp8x4x_irq_init);Do you *have* to do it this early? I guess if it's used for the UARTs then yes, but make a case for it...
PXA isn't DT-only at the moment. As a result, it is impossible to use IRQCHIP_DECLARE(). So drivers for the on-CPU IRQs and GPIO-IRQs are loaded using postcore_initcall(). We need to have all irq domain drivers loaded prior to DT parsing in order to allow normal initialization of IRQ resources with DT. I'll update the commit message.
The rest of review comment are implemented. The changes don't affect any other patches in the series. Should I repost the whole series?
Or only this patch?
Thanks.
Re: [PATCH v3 11/21] ARM: pxa: support ICP DAS LP-8x4x FPGA irq
Quoted 9 lines · Sergei Ianovich
Quoted 4 lines · Linus Walleij
On Tue, Dec 17, 2013 at 8:37 PM, Sergei Ianovich <[email protected]> wrote:
Usually combined GPIO+IRQ controllers are put intodrivers/gpiobut this is a bit special as it seems to handle also non-GPIO-related IRQs so let's get some input on this.This one is a plain IRQ controller. It has simple input lines, not GPIO pins. The chip reports its status to upper level interrupt controller. The upper level controller is PXA GPIO in this case.
Hm I don't know why I was deluded into thinking this had something to do with GPIO. I must have been soft in the head. Sorry about all those comments ...
I'll re-read the irqchip driver v3.1.
Yours,
Linus Walleij
Re: [PATCH v3 11/21] ARM: pxa: support ICP DAS LP-8x4x FPGA irq
Quoted 4 lines · Linus Walleij
On Wed, Jan 8, 2014 at 8:01 PM, Sergei Ianovich <[email protected]> wrote:
Hm I don't know why I was deluded into thinking this had something to do with GPIO. I must have been soft in the head. Sorry about all those comments ...
It's not your fault for sure. My commit message wasn't clear enough and needed clarifications. It is better now.
Thanks for constructive reviewing.
PATCH v3 11/21 ARM: pxa: support ICP DAS LP-8x4x FPGA irq
In reply to Sergei IanovichICP DAS LP-8x4x contains FPGA chip. The chip functions as an interrupt source providing 16 additional interrupts among other things. The interrupt lines are muxed to a GPIO pin of a 2nd level PXA-GPIO interrupt controller. GPIO pins of the 2nd level controller are in turn muxed to a CPU interrupt line.
Until pxa is completely converted to device tree, it is impossible to use IRQCHIP_DECLARE() and the irqdomain needs to added manually. Drivers for the on-CPU IRQs and GPIO-IRQs are loaded using postcore_initcall(). We need to have all irq domain drivers loaded prior to DT parsing in order to allow normal initialization of IRQ resources with DT.
---
v3..v3.1
fixes according to Linus Walleij review comments:
* update commit message
* use state container instead of global variables
* get hardware irq nums from irq_data, don't calculate them
* use BIT() macro
* add defines for system irq register masks
* replace cycle control variable with break
* use better names for resource variables
* add a linear domain instead of a legacy one
* use irq_create_mapping() instead of irq_alloc_desc()
v2..v3
* no changes (except number 09/16 -> 11/21)
v0..v2
* extract irqchip and move to drivers/irqchip/
* use device tree
* use devm helpers where possible
.../bindings/interrupt-controller/irq-lp8x4x.txt | 49 +++++ arch/arm/boot/dts/pxa27x-lp8x4x.dts | 10 + drivers/irqchip/Kconfig | 5 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-lp8x4x.c | 238 +++++++++++++++++++++ 5 files changed, 303 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt create mode 100644 drivers/irqchip/irq-lp8x4x.c
Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt new file +49 -0
@@ -0,0 +1,49 @@ +ICP DAS LP-8x4x FPGA Interrupt Controller + +ICP DAS LP-8x4x contains FPGA chip. The chip functions as a interrupt +source providing 16 additional interrupts among other things. + +Required properties: +- compatible : should be "icpdas,irq-lp8x4x" + +- reg: physical base address of the controller and length of memory mapped + region. + +- interrupt-controller : identifies the node as an interrupt controller + +- #interrupt-cells : should be 1 + +- interrupts : should provide interrupt + +- interrupt-parent : should provide a link to interrupt controller either + explicitly and implicitly from a parent node + +Example: + + fpga: fpga at 17000006 { + compatible = "icpdas,irq-lp8x4x"; + reg = <0x17000006 0x16>; + interrupt-parent = <&gpio>; + interrupts = <3 IRQ_TYPE_EDGE_RISING>; + #interrupt-cells = <1>; + interrupt-controller; + status = "okay"; + }; + + uart at 17009050 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x17009050 0x10 + 0x17009030 0x02>; + interrupt-parent = <&fpga>; + interrupts = <13>; + status = "okay"; + }; + + uart at 17009060 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x17009060 0x10 + 0x17009032 0x02>; + interrupt-parent = <&fpga>; + interrupts = <14>; + status = "okay"; + };
arch/arm/boot/dts/pxa27x-lp8x4x.dts +10 -0
@@ -167,6 +167,16 @@ reg = <0xa000 0x1000 0x901e 0x1>; }; + + fpgairq: irq at 9006 { + compatible = "icpdas,irq-lp8x4x"; + reg = <0x9006 0x16>; + interrupt-parent = <&gpio>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + #interrupt-cells = <1>; + interrupt-controller; + status = "okay"; + }; }; }; };
drivers/irqchip/Kconfig +5 -0
@@ -35,6 +35,11 @@ config IMGPDC_IRQ select GENERIC_IRQ_CHIP select IRQ_DOMAIN +config LP8X4X_IRQ + bool + depends on OF + select IRQ_DOMAIN + config ORION_IRQCHIP bool select IRQ_DOMAIN
drivers/irqchip/Makefile +1 -0
@@ -22,3 +22,4 @@ obj-$(CONFIG_RENESAS_IRQC) += irq-renesas-irqc.o obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o obj-$(CONFIG_TB10X_IRQC) += irq-tb10x.o +obj-$(CONFIG_LP8X4X_IRQ) += irq-lp8x4x.o
drivers/irqchip/irq-lp8x4x.c new file +238 -0
238 lines not on this page · raw message
Signature · 1 line
1.8.4.2
Re: [PATCH v3.1 11/21] ARM: pxa: support ICP DAS LP-8x4x FPGA irq
This is looking much better!
Quoted 1 line · Sergei Ianovich
+++
b/drivers/irqchip/irq-lp8x4x.c
(...)
You could add some kerneldoc to this following struct (OK nitpick, but still nice, especially for the last two variables).
drivers/irqchip/irq-lp8x4x.c line 46
Quoted 12 lines
drivers/irqchip/irq-lp8x4x.c new file +12
-0+struct lp8x4x_irq_data { +void *base; +struct irq_domain *domain; +unsigned long num_irq; +unsigned char irq_sys_enabled; +unsigned char irq_high_enabled; +}; + +static void lp8x4x_mask_irq (struct irq_data *d) +{ +unsigned mask; +unsigned long irq = d->hwirq;
Name the local variable hwirq too so we know what it is.
drivers/irqchip/irq-lp8x4x.c line 57
Quoted 11 lines
drivers/irqchip/irq-lp8x4x.c new file +11
-0+struct lp8x4x_irq_data *host =irq_data_get_irq_chip_data (d); + +if (!host) { +pr_err ("lp8x4x: missing host data for irq %i\n" , d->irq); +return ; + } + +if (irq >= host->num_irq) { +pr_err ("lp8x4x: wrong irq handler for irq %i\n" , d->irq); +return ; + }
This is on the hotpath. Do you *really* need these two checks?
(...)
drivers/irqchip/irq-lp8x4x.c line 78
Quoted 4 lines
drivers/irqchip/irq-lp8x4x.c new file +4
-0+static void lp8x4x_unmask_irq (struct irq_data *d) +{ +unsigned mask; +unsigned long irq = d->hwirq;
Name the variable "hwirq".
drivers/irqchip/irq-lp8x4x.c line 57
Quoted 11 lines
drivers/irqchip/irq-lp8x4x.c new file +11
-0+struct lp8x4x_irq_data *host =irq_data_get_irq_chip_data (d); + +if (!host) { +pr_err ("lp8x4x: missing host data for irq %i\n" , d->irq); +return ; + } + +if (irq >= host->num_irq) { +pr_err ("lp8x4x: wrong irq handler for irq %i\n" , d->irq); +return ; + }
Again overzealous error checks.
(...)
drivers/irqchip/irq-lp8x4x.c line 130
Quoted 9 lines
drivers/irqchip/irq-lp8x4x.c new file +9
-0+static void lp8x4x_irq_handler (unsigned int irq,struct irq_desc *desc) +{ +int n; +unsigned long mask; +struct irq_chip *chip =irq_desc_get_chip (desc); +struct lp8x4x_irq_data *host =irq_desc_get_handler_data (desc); + +if (!host) +return ;
I don't think this happens either?
drivers/irqchip/irq-lp8x4x.c line 143
Quoted 12 lines
drivers/irqchip/irq-lp8x4x.c new file +12
-0+chained_irq_enter (chip, desc); + +for (;;) { + mask =ioread8 (host->base +CLRHILVINT ) &0xff ; + mask |= (ioread8 (host->base +SECOINT ) &SECOINT_MASK ) <<8 ; + mask |= (ioread8 (host->base +PRIMINT ) &PRIMINT_MASK ) <<8 ; + mask &= host->irq_high_enabled | (host->irq_sys_enabled <<8 ); +if (mask ==0 ) +break ; +for_each_set_bit (n, &mask,BITS_PER_LONG ) +generic_handle_irq (irq_find_mapping (host->domain, n)); + }
I like the looks of this.
If you fix this:
Yours,
Linus Walleij
PATCH v3 11/21 ARM: pxa: support ICP DAS LP-8x4x FPGA irq
In reply to Sergei IanovichICP DAS LP-8x4x contains FPGA chip. The chip functions as an interrupt source providing 16 additional interrupts among other things. The interrupt lines are muxed to a GPIO pin of a 2nd level PXA-GPIO interrupt controller. GPIO pins of the 2nd level controller are in turn muxed to a CPU interrupt line.
Until pxa is completely converted to device tree, it is impossible to use IRQCHIP_DECLARE() and the irqdomain needs to added manually. Drivers for the on-CPU IRQs and GPIO-IRQs are loaded using postcore_initcall(). We need to have all irq domain drivers loaded prior to DT parsing in order to allow normal initialization of IRQ resources with DT.
---
v3.1..v3.2
fixes to apply Linus Walleij's "Reviewed-by":
* add kerneldoc comment for state container struct
* rename irq -> hwirq for clarity
* drop overzealous error checks from the hotpaths
v3..v3.1
fixes according to Linus Walleij review comments:
* update commit message
* use state container instead of global variables
* get hardware irq nums from irq_data, don't calculate them
* use BIT() macro
* add defines for system irq register masks
* replace cycle control variable with break
* use better names for resource variables
* add a linear domain instead of a legacy one
* use irq_create_mapping() instead of irq_alloc_desc()
v2..v3
* no changes (except number 09/16 -> 11/21)
v0..v2
* extract irqchip and move to drivers/irqchip/
* use device tree
* use devm helpers where possible
.../bindings/interrupt-controller/irq-lp8x4x.txt | 49 +++++ arch/arm/boot/dts/pxa27x-lp8x4x.dts | 10 + drivers/irqchip/Kconfig | 5 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-lp8x4x.c | 227 +++++++++++++++++++++ 5 files changed, 292 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt create mode 100644 drivers/irqchip/irq-lp8x4x.c
Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt new file +49 -0
@@ -0,0 +1,49 @@ +ICP DAS LP-8x4x FPGA Interrupt Controller + +ICP DAS LP-8x4x contains FPGA chip. The chip functions as a interrupt +source providing 16 additional interrupts among other things. + +Required properties: +- compatible : should be "icpdas,irq-lp8x4x" + +- reg: physical base address of the controller and length of memory mapped + region. + +- interrupt-controller : identifies the node as an interrupt controller + +- #interrupt-cells : should be 1 + +- interrupts : should provide interrupt + +- interrupt-parent : should provide a link to interrupt controller either + explicitly and implicitly from a parent node + +Example: + + fpga: fpga at 17000006 { + compatible = "icpdas,irq-lp8x4x"; + reg = <0x17000006 0x16>; + interrupt-parent = <&gpio>; + interrupts = <3 IRQ_TYPE_EDGE_RISING>; + #interrupt-cells = <1>; + interrupt-controller; + status = "okay"; + }; + + uart at 17009050 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x17009050 0x10 + 0x17009030 0x02>; + interrupt-parent = <&fpga>; + interrupts = <13>; + status = "okay"; + }; + + uart at 17009060 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x17009060 0x10 + 0x17009032 0x02>; + interrupt-parent = <&fpga>; + interrupts = <14>; + status = "okay"; + };
arch/arm/boot/dts/pxa27x-lp8x4x.dts +10 -0
@@ -167,6 +167,16 @@ reg = <0xa000 0x1000 0x901e 0x1>; }; + + fpgairq: irq at 9006 { + compatible = "icpdas,irq-lp8x4x"; + reg = <0x9006 0x16>; + interrupt-parent = <&gpio>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + #interrupt-cells = <1>; + interrupt-controller; + status = "okay"; + }; }; }; };
drivers/irqchip/Kconfig +5 -0
@@ -35,6 +35,11 @@ config IMGPDC_IRQ select GENERIC_IRQ_CHIP select IRQ_DOMAIN +config LP8X4X_IRQ + bool + depends on OF + select IRQ_DOMAIN + config ORION_IRQCHIP bool select IRQ_DOMAIN
drivers/irqchip/Makefile +1 -0
@@ -22,3 +22,4 @@ obj-$(CONFIG_RENESAS_IRQC) += irq-renesas-irqc.o obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o obj-$(CONFIG_TB10X_IRQC) += irq-tb10x.o +obj-$(CONFIG_LP8X4X_IRQ) += irq-lp8x4x.o
drivers/irqchip/irq-lp8x4x.c new file +227 -0
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Signature · 1 line
1.8.4.2
PATCH v3 12/21 serial: support for 16550A serial ports on LP-8x4x
In reply to Sergei IanovichThe patch adds support for 3 additional LP-8x4x built-in serial ports.
The device can also host up to 8 extension cards with 4 serial ports on each card for a total of 35 ports. However, I don't have the hardware to test extension cards, so they are not supported, yet.
---
v2..v3
* no changes (except number 10/16 -> 12/21)
v0..v2
* register platform driver instead of platform device
* use device tree
* use devm helpers where possible
.../devicetree/bindings/serial/lp8x4x-serial.txt | 35 +++++ arch/arm/boot/dts/pxa27x-lp8x4x.dts | 25 ++++ arch/arm/configs/lp8x4x_defconfig | 1 + drivers/tty/serial/8250/8250_lp8x4x.c | 162 +++++++++++++++++++++ drivers/tty/serial/8250/Kconfig | 12 ++ drivers/tty/serial/8250/Makefile | 1 + 6 files changed, 236 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/lp8x4x-serial.txt create mode 100644 drivers/tty/serial/8250/8250_lp8x4x.c
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt new file +35 -0
@@ -0,0 +1,35 @@ +UART ports on ICP DAS LP-8x4x + +ICP DAS LP-8x4x contains three additional serial ports interfaced via +Analog Devices ADM213EA chips in addition to 3 serial ports on PXA CPU. + +Required properties: +- compatible : should be "icpdas,uart-lp8x4x" + +- reg : should provide 16 byte man IO memory region and 1 byte region for + termios + +- interrupts : should provide interrupt + +- interrupt-parent : should provide a link to interrupt controller either + explicitly and implicitly from a parent node + +Examples (from pxa27x-lp8x4x.dts): + + uart at 17009050 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x17009050 0x10 + 0x17009030 0x02>; + interrupt-parent = <&fpga>; + interrupts = <13>; + status = "okay"; + }; + + uart at 17009060 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x17009060 0x10 + 0x17009032 0x02>; + interrupt-parent = <&fpga>; + interrupts = <14>; + status = "okay"; + };
arch/arm/boot/dts/pxa27x-lp8x4x.dts +25 -0
@@ -155,6 +155,7 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0 5 0x3000000 0x10000>; + interrupt-parent = <&fpgairq>; rtc at 901c { compatible = "ds,rtc-ds1302";
@@ -177,6 +178,30 @@ interrupt-controller; status = "okay"; }; + + uart at 9050 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x9050 0x10 + 0x9030 0x02>; + interrupts = <13>; + status = "okay"; + }; + + uart at 9060 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x9060 0x10 + 0x9032 0x02>; + interrupts = <14>; + status = "okay"; + }; + + uart at 9070 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x9070 0x10 + 0x9034 0x02>; + interrupts = <15>; + status = "okay"; + }; }; }; };
arch/arm/configs/lp8x4x_defconfig +1 -0
@@ -112,6 +112,7 @@ CONFIG_SERIAL_8250_EXTENDED=y CONFIG_SERIAL_8250_MANY_PORTS=y CONFIG_SERIAL_8250_SHARE_IRQ=y CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_8250_LP8X4X=m CONFIG_HW_RANDOM=y CONFIG_I2C=m # CONFIG_I2C_COMPAT is not set
drivers/tty/serial/8250/8250_lp8x4x.c new file +162 -0
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drivers/tty/serial/8250/Kconfig +12 -0
@@ -311,3 +311,15 @@ config SERIAL_PXA can enable its onboard serial ports by enabling this option. If you choose M here, the module name will be 8250_pxa. + +config SERIAL_8250_LP8X4X + tristate "Support 16550A ports on ICP DAS LP-8x4x" + depends on OF && SERIAL_8250 && SERIAL_8250_MANY_PORTS && ARCH_PXA + select LP8X4X_IRQ + help + In addition to serial ports on PXA270 SoC, LP-8x4x has 1 dual + RS232/RS485 port, 1 RS485 port and 1 RS232 port. + + Say N here, unless you plan to run this kernel on a LP-8x4x system. + + If you choose M here, the module name will be 8250_lp8x4x.
drivers/tty/serial/8250/Makefile +1 -0
@@ -17,6 +17,7 @@ obj-$(CONFIG_SERIAL_8250_ACCENT) += 8250_accent.o obj-$(CONFIG_SERIAL_8250_BOCA) += 8250_boca.o obj-$(CONFIG_SERIAL_8250_EXAR_ST16C554) += 8250_exar_st16c554.o obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o +obj-$(CONFIG_SERIAL_8250_LP8X4X) += 8250_lp8x4x.o obj-$(CONFIG_SERIAL_8250_FSL) += 8250_fsl.o obj-$(CONFIG_SERIAL_8250_DW) += 8250_dw.o obj-$(CONFIG_SERIAL_8250_EM) += 8250_em.o
Signature · 1 line
1.8.4.2
Re: [PATCH v3 12/21] serial: support for 16550A serial ports on LP-8x4x
Hi,
Quoted 9 lines · Sergei Ianovich
The patch adds support for 3 additional LP-8x4x built-in serial ports.
The device can also host up to 8 extension cards with 4 serial ports on each card for a total of 35 ports. However, I don't have the hardware to test extension cards, so they are not supported, yet.
Signed-off-by Sergei Ianovich <[email protected]>CC Heikki Krogerus <[email protected]>
Looks OK to me, though normally I would prefer the arch code and the driver to be handled in separate patches. FWIW...
Thanks,
Signature · 1 line
heikki
PATCH v3 13/21 misc: support for LP-8x4x custom parallel bus
In reply to Sergei IanovichThis patch implements probing for the bus and reporting the number of available expansion slots.
---
v2..v3
* fixed goto after bus_register
* number change (11/16 -> 13/21)
v0..v2
* use device tree
* use devm helpers where possible
.../devicetree/bindings/misc/lp8x4x-bus.txt | 16 ++ Documentation/misc-devices/lp8x4x_bus.txt | 30 ++++ arch/arm/boot/dts/pxa27x-lp8x4x.dts | 5 + arch/arm/configs/lp8x4x_defconfig | 1 + drivers/misc/Kconfig | 13 ++ drivers/misc/Makefile | 1 + drivers/misc/lp8x4x_bus.c | 167 +++++++++++++++++++++ 7 files changed, 233 insertions(+) create mode 100644 Documentation/devicetree/bindings/misc/lp8x4x-bus.txt create mode 100644 Documentation/misc-devices/lp8x4x_bus.txt create mode 100644 drivers/misc/lp8x4x_bus.c
Documentation/devicetree/bindings/misc/lp8x4x-bus.txt new file +16 -0
@@ -0,0 +1,16 @@ +Custom parallel bus on ICP DAS LP-8x4x industrial computers + +See Documentation/misc-devices/lp8x4x_bus.txt for details. + +Required properties: +- compatible : should be "icpdas,backplane-lp8x4x" + +- reg: physical base address of the slot count register and the length + of the memory mapped region. + +Example: + + backplane { + compatible = "icpdas,backplane-lp8x4x"; + reg = <0x17009046 0x2>; + };
Documentation/misc-devices/lp8x4x_bus.txt new file +30 -0
@@ -0,0 +1,30 @@ +Kernel driver lpx8x4x_bus +====================== + +Supported hardare: +Custom parallel bus on ICP DAS LP-8x4x industrial computers + +Data sheet: +Not freely available + +Author: +Sergei Ianovich <[email protected]> + +Description +----------- + +http://www.icpdas.com/root/product/solutions/pac/linpac/lp-8x4x_hardware.html + +LP-8x4x is an ARM-based industrial computer with a custom parallel bus to +connect expansion modules with digital input/output, analog input/output, +serial, CAN and other types of ports. + +The bus is implemented by a FPGA. + +SYSFS +----- + +/sys/bus/icpdas/devices/backplane: + +slot_count + RO - shows total number of expansion slots on the device
arch/arm/boot/dts/pxa27x-lp8x4x.dts +5 -0
@@ -202,6 +202,11 @@ interrupts = <15>; status = "okay"; }; + + backplane { + compatible = "icpdas,backplane-lp8x4x"; + reg = <0x9046 0x2>; + }; }; }; };
arch/arm/configs/lp8x4x_defconfig +1 -0
@@ -62,6 +62,7 @@ CONFIG_PROC_DEVICETREE=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=2 CONFIG_EEPROM_AT24=m +CONFIG_LP8X4X_BUS=m CONFIG_SCSI=y # CONFIG_SCSI_PROC_FS is not set CONFIG_BLK_DEV_SD=y
drivers/misc/Kconfig +13 -0
@@ -515,6 +515,19 @@ config SRAM the genalloc API. It is supposed to be used for small on-chip SRAM areas found on many SoCs. +config LP8X4X_BUS + tristate "ICP DAS LP-8x4x industrial IO bus" + depends on OF && ARCH_PXA + select SYSFS + ---help--- + This is a driver for ICP DAS LP-8x4x programmable automation + controller. It exposes a custom parallel bus. The bus services + data acquisition and control modules. + + Say N, unless you plan to run this kernel on a LP-8x4x system. + + If you say M here, the module will be called lp8x4x_bus. + source "drivers/misc/c2port/Kconfig" source "drivers/misc/eeprom/Kconfig" source "drivers/misc/cb710/Kconfig"
drivers/misc/Makefile +1 -0
@@ -53,3 +53,4 @@ obj-$(CONFIG_VMWARE_VMCI) += vmw_vmci/ obj-$(CONFIG_LATTICE_ECP3_CONFIG) += lattice-ecp3-config.o obj-$(CONFIG_SRAM) += sram.o obj-y += mic/ +obj-$(CONFIG_LP8X4X_BUS) += lp8x4x_bus.o
drivers/misc/lp8x4x_bus.c new file +167 -0
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1.8.4.2
PATCH v3 14/21 misc: support for LP-8x4x rotary switch
In reply to Sergei IanovichReorder backplane resources by start address.
Reorder backplane attributes alphabetically.
---
v2..v3
* new patch
.../devicetree/bindings/misc/lp8x4x-bus.txt | 8 ++-- Documentation/misc-devices/lp8x4x_bus.txt | 3 ++ arch/arm/boot/dts/pxa27x-lp8x4x.dts | 3 +- drivers/misc/lp8x4x_bus.c | 43 ++++++++++++++++++---- 4 files changed, 45 insertions(+), 12 deletions(-)
Documentation/devicetree/bindings/misc/lp8x4x-bus.txt +5 -3
@@ -5,12 +5,14 @@ See Documentation/misc-devices/lp8x4x_bus.txt for details. Required properties: - compatible : should be "icpdas,backplane-lp8x4x" -- reg: physical base address of the slot count register and the length - of the memory mapped region. +- reg: physical base addresses and region lengths of + * the rotary switch + * the slot count register Example: backplane { compatible = "icpdas,backplane-lp8x4x"; - reg = <0x17009046 0x2>; + reg = <0x0 0x2 + 0x9046 0x2>; };
Documentation/misc-devices/lp8x4x_bus.txt +3 -0
@@ -26,5 +26,8 @@ SYSFS /sys/bus/icpdas/devices/backplane: +rotary + RO - shows position of LP-8x4x rotary switch (0-9) + slot_count RO - shows total number of expansion slots on the device
arch/arm/boot/dts/pxa27x-lp8x4x.dts +2 -1
@@ -205,7 +205,8 @@ backplane { compatible = "icpdas,backplane-lp8x4x"; - reg = <0x9046 0x2>; + reg = <0x0 0x2 + 0x9046 0x2>; }; }; };
drivers/misc/lp8x4x_bus.c +35 -8
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Signature · 1 line
1.8.4.2
PATCH v3 15/21 misc: support for LP-8x4x DIP switch
In reply to Sergei Ianovich---
v2..v3
* new patch
.../devicetree/bindings/misc/lp8x4x-bus.txt | 2 ++ Documentation/misc-devices/lp8x4x_bus.txt | 3 +++ arch/arm/boot/dts/pxa27x-lp8x4x.dts | 1 + drivers/misc/lp8x4x_bus.c | 26 ++++++++++++++++++++++ 4 files changed, 32 insertions(+)
Documentation/devicetree/bindings/misc/lp8x4x-bus.txt +2 -0
@@ -7,6 +7,7 @@ Required properties: - reg: physical base addresses and region lengths of * the rotary switch + * the 8bit DIP switch * the slot count register Example:
@@ -14,5 +15,6 @@ Example: backplane { compatible = "icpdas,backplane-lp8x4x"; reg = <0x0 0x2 + 0x9002 0x2 0x9046 0x2>; };
Documentation/misc-devices/lp8x4x_bus.txt +3 -0
@@ -26,6 +26,9 @@ SYSFS /sys/bus/icpdas/devices/backplane: +dip + RO - shows status of LP-8x4x 8bit DIP switch + rotary RO - shows position of LP-8x4x rotary switch (0-9)
arch/arm/boot/dts/pxa27x-lp8x4x.dts +1 -0
@@ -206,6 +206,7 @@ backplane { compatible = "icpdas,backplane-lp8x4x"; reg = <0x0 0x2 + 0x9002 0x2 0x9046 0x2>; }; };
drivers/misc/lp8x4x_bus.c +26 -0
@@ -26,6 +26,7 @@ struct lp8x4x_master {unsigned int slot_count;void *count_addr;void *rotary_addr; +void *dip_addr;struct device dev; };
@@ -67,9 +68,20 @@ static ssize_t rotary_show(struct device *dev,static DEVICE_ATTR_RO (rotary); +static ssize_t dip_show (struct device *dev, +struct device_attribute *attr,char *buf) +{ + struct lp8x4x_master *m = container_of(dev, struct lp8x4x_master, dev); + +return sprintf (buf,"0x%02x\n" ,ioread8 (m->dip_addr) ^0xff ); +} + +static DEVICE_ATTR_RO (dip); +static struct attribute *master_dev_attrs[] = { &dev_attr_slot_count.attr, &dev_attr_rotary.attr, + &dev_attr_dip.attr,NULL , };ATTRIBUTE_GROUPS (master_dev);
@@ -118,6 +130,20 @@ static int __init lp8x4x_bus_probe(struct platform_device *pdev) res =platform_get_resource (pdev,IORESOURCE_MEM , r++);if (!res) { +dev_err (&pdev->dev,"Failed to get DIP switch address\n" ); + err = -ENODEV ; + goto err_free; + } + + m->dip_addr =devm_ioremap_resource (&pdev->dev, res); +if (IS_ERR (m->dip_addr)) { +dev_err (&pdev->dev,"Failed to ioremap DIP switch address\n" ); + err =PTR_ERR (m->dip_addr); + goto err_free; + } + + res =platform_get_resource (pdev,IORESOURCE_MEM , r++); +if (!res) {dev_err (&pdev->dev,"could not get slot count address\n" ); err = -ENODEV ; goto err_free;
Signature · 1 line
1.8.4.2
PATCH v3 16/21 misc: support for writing to LP-8x4x EEPROM
In reply to Sergei Ianovichat24c128 write protection is implemented by a separate GPIO line. EEPROM driver doesn't provide this option, so we implement it in the board-specific device.
---
v2..v3
* new patch
.../devicetree/bindings/misc/lp8x4x-bus.txt | 3 ++ Documentation/misc-devices/lp8x4x_bus.txt | 3 ++ arch/arm/boot/dts/pxa27x-lp8x4x.dts | 1 + drivers/misc/lp8x4x_bus.c | 50 ++++++++++++++++++++++ 4 files changed, 57 insertions(+)
Documentation/devicetree/bindings/misc/lp8x4x-bus.txt +3 -0
@@ -10,6 +10,8 @@ Required properties: * the 8bit DIP switch * the slot count register +- eeprom-gpios : should point to active-low write enable GPIO + Example: backplane {
@@ -17,4 +19,5 @@ Example: reg = <0x0 0x2 0x9002 0x2 0x9046 0x2>; + eeprom-gpios = <&gpio 4 0>; };
Documentation/misc-devices/lp8x4x_bus.txt +3 -0
@@ -29,6 +29,9 @@ SYSFS dip RO - shows status of LP-8x4x 8bit DIP switch +eeprom_write_enable + RW - controls write access to board's EEPROM (1 - enable) + rotary RO - shows position of LP-8x4x rotary switch (0-9)
arch/arm/boot/dts/pxa27x-lp8x4x.dts +1 -0
@@ -208,6 +208,7 @@ reg = <0x0 0x2 0x9002 0x2 0x9046 0x2>; + eeprom-gpios = <&gpio 4 0>; }; }; };
drivers/misc/lp8x4x_bus.c +50 -0
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1.8.4.2
PATCH v3 17/21 misc: support for serial slots in LP-8x4x
In reply to Sergei IanovichSerial modules (I-870xxW series) implement DCON protocol which allows one-master-many-slaves configuration over RS-485. When these modules are installed into the device, they could be accessed using the 2nd PXA built-in UART port (/dev/ttyS1). However, it seems that addresses are not processed by the modules. So the parallel bus needs to select which slot is connected.
---
v2..v3
* no changes (except number 12/16 -> 17/21)
v0..v2
* use device tree
* use devm helpers where possible
.../devicetree/bindings/misc/lp8x4x-bus.txt | 2 + Documentation/misc-devices/lp8x4x_bus.txt | 15 +++++- arch/arm/boot/dts/pxa27x-lp8x4x.dts | 1 + drivers/misc/lp8x4x_bus.c | 63 ++++++++++++++++++++++ 4 files changed, 80 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/misc/lp8x4x-bus.txt +2 -0
@@ -8,6 +8,7 @@ Required properties: - reg: physical base addresses and region lengths of * the rotary switch * the 8bit DIP switch + * the serial slot select register * the slot count register - eeprom-gpios : should point to active-low write enable GPIO
@@ -18,6 +19,7 @@ Example: compatible = "icpdas,backplane-lp8x4x"; reg = <0x0 0x2 0x9002 0x2 + 0x9004 0x2 0x9046 0x2>; eeprom-gpios = <&gpio 4 0>; };
Documentation/misc-devices/lp8x4x_bus.txt +14 -1
@@ -19,13 +19,26 @@ LP-8x4x is an ARM-based industrial computer with a custom parallel bus to connect expansion modules with digital input/output, analog input/output, serial, CAN and other types of ports. -The bus is implemented by a FPGA. +The bus is implemented by a FPGA. There are two major groups of expansion +modules: serial and parallel. + +Serial modules (I-870xxW series) implement DCON protocol which allows one- +master-many-slaves configuration over RS-485. When these modules are installed +into the device, they could be accessed using the 2nd PXA built-in UART port +(/dev/ttyS1). However, it seems that addresses are not processed by +the modules. So the parallel bus needs to select which slot is connected. SYSFS ----- /sys/bus/icpdas/devices/backplane: +active_slot + RW - connects the select slot for serial communications. If there + is a parallel module in the selected slot, it simply ignores + incoming packets. So it is safe to activate any available + slot. + dip RO - shows status of LP-8x4x 8bit DIP switch
arch/arm/boot/dts/pxa27x-lp8x4x.dts +1 -0
@@ -207,6 +207,7 @@ compatible = "icpdas,backplane-lp8x4x"; reg = <0x0 0x2 0x9002 0x2 + 0x9004 0x2 0x9046 0x2>; eeprom-gpios = <&gpio 4 0>; };
drivers/misc/lp8x4x_bus.c +63 -0
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Signature · 1 line
1.8.4.2
PATCH v3 18/21 misc: support for parallel slots in LP-8x4x
In reply to Sergei IanovichThis patch enumerates parallel modules in expansion slots and exposes model numbers via sysfs.
---
v2..v3
* no changes (except number 13/16 -> 18/21)
v0..v2
* use device tree
* use devm helpers where possible
.../devicetree/bindings/misc/lp8x4x-bus.txt | 9 ++ Documentation/misc-devices/lp8x4x_bus.txt | 8 ++ arch/arm/boot/dts/pxa27x-lp8x4x.dts | 8 ++ drivers/misc/lp8x4x_bus.c | 119 +++++++++++++++++++++ 4 files changed, 144 insertions(+)
Documentation/devicetree/bindings/misc/lp8x4x-bus.txt +9 -0
@@ -7,6 +7,7 @@ Required properties: - reg: physical base addresses and region lengths of * the rotary switch + * 8 plugable industrial IO slots * the 8bit DIP switch * the serial slot select register * the slot count register
@@ -18,6 +19,14 @@ Example: backplane { compatible = "icpdas,backplane-lp8x4x"; reg = <0x0 0x2 + 0x1000 0x10 + 0x2000 0x10 + 0x3000 0x10 + 0x4000 0x10 + 0x5000 0x10 + 0x6000 0x10 + 0x7000 0x10 + 0x8000 0x10 0x9002 0x2 0x9004 0x2 0x9046 0x2>;
Documentation/misc-devices/lp8x4x_bus.txt +8 -0
@@ -28,6 +28,9 @@ into the device, they could be accessed using the 2nd PXA built-in UART port (/dev/ttyS1). However, it seems that addresses are not processed by the modules. So the parallel bus needs to select which slot is connected. +Parallel modules allow much faster communication. There are accessed using +IO memory through the FPGA. Their ports are exposed via sysfs. + SYSFS -----
@@ -50,3 +53,8 @@ rotary slot_count RO - shows total number of expansion slots on the device + +/sys/bus/icpdas/devices/slot%02i: + +model + RO - shows expansion module model number
arch/arm/boot/dts/pxa27x-lp8x4x.dts +8 -0
@@ -206,6 +206,14 @@ backplane { compatible = "icpdas,backplane-lp8x4x"; reg = <0x0 0x2 + 0x1000 0x10 + 0x2000 0x10 + 0x3000 0x10 + 0x4000 0x10 + 0x5000 0x10 + 0x6000 0x10 + 0x7000 0x10 + 0x8000 0x10 0x9002 0x2 0x9004 0x2 0x9046 0x2>;
drivers/misc/lp8x4x_bus.c +119 -0
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1.8.4.2
PATCH v3 19/21 misc: support for I-8041 in LP-8x4x
In reply to Sergei IanovichStatus of I-8041 32 digital output channels can be managed via sysfs now.
http://www.icpdas.com/products/Remote_IO/i-8ke/i-8041w.htm
---
v2..v3
v0..v2
* no changes (except number 14/16 -> 19/21)
Documentation/misc-devices/lp8x4x_bus.txt | 4 ++ drivers/misc/lp8x4x_bus.c | 67 ++++++++++++++++++++++++++++++- 2 files changed, 69 insertions(+), 2 deletions(-)
Documentation/misc-devices/lp8x4x_bus.txt +4 -0
@@ -58,3 +58,7 @@ slot_count model RO - shows expansion module model number + +output_status + RW - set status of digital output channels on the module in + the expansion slot. Value can be read back.
drivers/misc/lp8x4x_bus.c +65 -2
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1.8.4.2
PATCH v3 20/21 misc: support for I-8042 in LP-8x4x
In reply to Sergei IanovichStatus of I-8042 16 digital output channels can be managed via sysfs.
Status of I-8042 16 digital input channels can be read via sysfs.
http://www.icpdas.com/products/Remote_IO/i-8ke/i-8042w.htm
---
v2..v3
v0..v2
* no changes (except number 15/16 -> 20/21)
Documentation/misc-devices/lp8x4x_bus.txt | 4 ++ drivers/misc/lp8x4x_bus.c | 76 ++++++++++++++++++++++++++++++- 2 files changed, 78 insertions(+), 2 deletions(-)
Documentation/misc-devices/lp8x4x_bus.txt +4 -0
@@ -59,6 +59,10 @@ slot_count model RO - shows expansion module model number +input_status + RO - get status of digital input channels on the module in + the expansion slot. + output_status RW - set status of digital output channels on the module in the expansion slot. Value can be read back.
drivers/misc/lp8x4x_bus.c +74 -2
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Signature · 1 line
1.8.4.2
PATCH v3 21/21 misc: support for I-8024 in LP-8x4x
In reply to Sergei IanovichStatus of I-8042 4 analog output channels can be managed via sysfs.
http://www.icpdas.com/root/product/solutions/remote_io/rs-485/i-8k_i-87k/i-8024w.html
---
v2..v3
* use usleep_range instead of custom nsleep
* number change (16/16 -> 21/21)
v0..v2
* no changes
Documentation/misc-devices/lp8x4x_bus.txt | 15 ++++++ drivers/misc/lp8x4x_bus.c | 78 +++++++++++++++++++++++++++++++ 2 files changed, 93 insertions(+)
Documentation/misc-devices/lp8x4x_bus.txt +15 -0
@@ -66,3 +66,18 @@ input_status output_status RW - set status of digital output channels on the module in the expansion slot. Value can be read back. + +analog_output + RW - set status of analog output channels on the module in + the expansion slot. Tested with voltage output. Bits 0-13: + 0x00c0 is -10.0V + 0x2000 is 0.0V + 0x3f40 is +10.0V + + So 1 unit of output is 1.25 mV. + + Bits 15 and 14 determine which channel to apply the value: + 0x0000 is channel 1 + 0x4000 is channel 2 + 0x8000 is channel 3 + 0xc000 is channel 4
drivers/misc/lp8x4x_bus.c +78 -0
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Signature · 1 line
1.8.4.2
v4 cover ARM: support for ICP DAS LP-8x4x (with dts)
In reply to Sergei IanovichHi Arnd,
We had an intensive discussion of the series in the beginning of December 2013 [1]. The discussion resulted in 3 versions of the series in less than 3 weeks. Then there was a decision to block this series until Daniel Mack's DMA-engine-for-PXA series is ready.
Unfortunately Daniel neigther agrees to review my trivial temporary solution to the DMA-in-device-tree (patch 7 of 21), nor he is active in DMA series development. There is no progress for 3 months.
As with any big out of tree series, its support is painful. It requires extensive merging when doing bisects, on each step.
It would great if the decision to block could be reconsidered, and we could move forward.
Best,
Sergei Ianovich
1. http://linux-kernel.2935.n7.nabble.com/PATCH-00-11-ARM-support-for-ICP-DAS-LP-8x4x-td761919.html
PATCH v4 1/21 serial: rewrite pxa2xx-uart to use 8250_core
pxa2xx-uart was a separate uart platform driver. It was declaring the same device names and numbers as 8250 driver. As a result, it was impossible to use 8250 driver on PXA SoCs.
Upon closer examination pxa2xx-uart turned out to be a clone of 8250_core driver.
Workaround for Erratum #19 according to Marvel(R) PXA270M Processor Specification Update (April 19, 2010) is dropped. 8250_core reads from FIFO immediately after checking DR bit in LSR.
---
Resenging together with the rest of the series as the series breaks without this one at [PATCH 12/21]
no changes v3..v4
changes v2..v3
* remove devm_free/put as suggested by Heikki Krogerus
* use SET_SYSTEM_SLEEP_PM_OPS macro to set pm ops as suggested by Heikki Krogerus
changes v1..v2
* actually implement workaround for E74 in dl_write as spooted by James Cameron
* added comment about E19 in commit message
arch/arm/configs/am200epdkit_defconfig | 3 +- arch/arm/configs/cm_x2xx_defconfig | 3 +- arch/arm/configs/cm_x300_defconfig | 3 +- arch/arm/configs/colibri_pxa270_defconfig | 3 +- arch/arm/configs/colibri_pxa300_defconfig | 3 +- arch/arm/configs/corgi_defconfig | 4 +- arch/arm/configs/em_x270_defconfig | 3 +- arch/arm/configs/ezx_defconfig | 3 +- arch/arm/configs/h5000_defconfig | 3 +- arch/arm/configs/imote2_defconfig | 3 +- arch/arm/configs/lpd270_defconfig | 3 +- arch/arm/configs/lubbock_defconfig | 3 +- arch/arm/configs/mainstone_defconfig | 3 +- arch/arm/configs/mmp2_defconfig | 3 +- arch/arm/configs/pcm027_defconfig | 3 +- arch/arm/configs/pxa168_defconfig | 3 +- arch/arm/configs/pxa255-idp_defconfig | 3 +- arch/arm/configs/pxa3xx_defconfig | 3 +- arch/arm/configs/pxa910_defconfig | 3 +- arch/arm/configs/raumfeld_defconfig | 3 +- arch/arm/configs/spitz_defconfig | 4 +- arch/arm/configs/trizeps4_defconfig | 3 +- arch/arm/configs/viper_defconfig | 4 +- arch/arm/configs/xcep_defconfig | 3 +- drivers/tty/serial/8250/8250_pxa.c | 178 ++++++ drivers/tty/serial/8250/Kconfig | 9 + drivers/tty/serial/8250/Makefile | 1 + drivers/tty/serial/Kconfig | 23 - drivers/tty/serial/Makefile | 1 - drivers/tty/serial/pxa.c | 971 ------------------------------ 30 files changed, 236 insertions(+), 1022 deletions(-) create mode 100644 drivers/tty/serial/8250/8250_pxa.c delete mode 100644 drivers/tty/serial/pxa.c
arch/arm/configs/am200epdkit_defconfig +2 -1
@@ -60,8 +60,9 @@ CONFIG_BLK_DEV_IDECS=m CONFIG_NETDEVICES=y CONFIG_NET_ETHERNET=y CONFIG_SMC91X=m +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y # CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set # CONFIG_HWMON is not set
arch/arm/configs/cm_x2xx_defconfig +2 -1
@@ -96,8 +96,9 @@ CONFIG_KEYBOARD_PXA27x=m CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_UCB1400=m # CONFIG_SERIO_SERPORT is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y CONFIG_LEGACY_PTY_COUNT=16 # CONFIG_HW_RANDOM is not set CONFIG_I2C=y
arch/arm/configs/cm_x300_defconfig +2 -1
@@ -80,8 +80,9 @@ CONFIG_TOUCHSCREEN_WM97XX=m # CONFIG_TOUCHSCREEN_WM9713 is not set # CONFIG_SERIO is not set # CONFIG_LEGACY_PTYS is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y # CONFIG_HW_RANDOM is not set CONFIG_I2C=y CONFIG_I2C_PXA=y
arch/arm/configs/colibri_pxa270_defconfig +2 -1
@@ -103,8 +103,9 @@ CONFIG_INPUT_TOUCHSCREEN=y CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=m CONFIG_SERIO_LIBPS2=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_I2C=y CONFIG_I2C_CHARDEV=y
arch/arm/configs/colibri_pxa300_defconfig +2 -1
@@ -31,8 +31,9 @@ CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_MISC=y CONFIG_INPUT_GPIO_ROTARY_ENCODER=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_DEBUG_GPIO=y # CONFIG_HWMON is not set
arch/arm/configs/corgi_defconfig +2 -2
@@ -131,10 +131,10 @@ CONFIG_TOUCHSCREEN_ADS7846=y CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=m # CONFIG_SERIO is not set -CONFIG_SERIAL_8250=m +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_CS=m CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y # CONFIG_LEGACY_PTYS is not set CONFIG_I2C=y CONFIG_I2C_PXA=y
arch/arm/configs/em_x270_defconfig +2 -1
@@ -90,8 +90,9 @@ CONFIG_TOUCHSCREEN_WM97XX=m # CONFIG_TOUCHSCREEN_WM9705 is not set # CONFIG_TOUCHSCREEN_WM9713 is not set # CONFIG_SERIO_SERPORT is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y CONFIG_LEGACY_PTY_COUNT=16 # CONFIG_HW_RANDOM is not set CONFIG_I2C=y
arch/arm/configs/ezx_defconfig +2 -1
@@ -215,8 +215,9 @@ CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=y CONFIG_INPUT_PCAP=y # CONFIG_SERIO is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y CONFIG_LEGACY_PTY_COUNT=8 # CONFIG_HW_RANDOM is not set CONFIG_I2C=y
arch/arm/configs/h5000_defconfig +2 -1
@@ -47,8 +47,9 @@ CONFIG_MTD_PHYSMAP=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y CONFIG_LEGACY_PTY_COUNT=32 # CONFIG_HW_RANDOM is not set # CONFIG_HWMON is not set
arch/arm/configs/imote2_defconfig +2 -1
@@ -193,8 +193,9 @@ CONFIG_INPUT_TOUCHSCREEN=y CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=y # CONFIG_SERIO is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y CONFIG_LEGACY_PTY_COUNT=8 # CONFIG_HW_RANDOM is not set CONFIG_I2C=y
arch/arm/configs/lpd270_defconfig +2 -1
@@ -38,8 +38,9 @@ CONFIG_SMC91X=y CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO_SERPORT is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y # CONFIG_HW_RANDOM is not set CONFIG_FB=y CONFIG_FB_PXA=y
arch/arm/configs/lubbock_defconfig +2 -1
@@ -37,8 +37,9 @@ CONFIG_PCMCIA_PCNET=y CONFIG_INPUT_EVDEV=y # CONFIG_SERIO_SERPORT is not set CONFIG_SERIO_SA1111=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y # CONFIG_VGA_CONSOLE is not set CONFIG_USB_GADGET=y CONFIG_USB_G_SERIAL=m
arch/arm/configs/mainstone_defconfig +2 -1
@@ -34,8 +34,9 @@ CONFIG_SMC91X=y CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO_SERPORT is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y CONFIG_FB=y CONFIG_FB_PXA=y # CONFIG_VGA_CONSOLE is not set
arch/arm/configs/mmp2_defconfig +2 -1
@@ -44,8 +44,9 @@ CONFIG_SMC91X=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y # CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_I2C=y
arch/arm/configs/pcm027_defconfig +2 -1
@@ -60,8 +60,9 @@ CONFIG_SMC91X=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y # CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_I2C=y
arch/arm/configs/pxa168_defconfig +2 -1
@@ -40,8 +40,9 @@ CONFIG_SMC91X=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y # CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set # CONFIG_HWMON is not set
arch/arm/configs/pxa255-idp_defconfig +2 -1
@@ -35,8 +35,9 @@ CONFIG_SMC91X=y CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO_SERPORT is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y CONFIG_FB=y CONFIG_FB_PXA=y # CONFIG_VGA_CONSOLE is not set
arch/arm/configs/pxa3xx_defconfig +2 -1
@@ -56,8 +56,9 @@ CONFIG_KEYBOARD_PXA27x=y CONFIG_KEYBOARD_PXA930_ROTARY=y CONFIG_MOUSE_PXA930_TRKBALL=y CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y # CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_I2C=y
arch/arm/configs/pxa910_defconfig +2 -1
@@ -40,8 +40,9 @@ CONFIG_SMC91X=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y CONFIG_SPI=y CONFIG_FB=y CONFIG_MMP_DISP=y
arch/arm/configs/raumfeld_defconfig +2 -1
@@ -67,8 +67,9 @@ CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_EETI=m CONFIG_INPUT_MISC=y CONFIG_INPUT_GPIO_ROTARY_ENCODER=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_I2C=y CONFIG_I2C_CHARDEV=y
arch/arm/configs/spitz_defconfig +2 -2
@@ -128,10 +128,10 @@ CONFIG_TOUCHSCREEN_ADS7846=y CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=m # CONFIG_SERIO is not set -CONFIG_SERIAL_8250=m +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_CS=m CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y # CONFIG_LEGACY_PTYS is not set CONFIG_SPI=y CONFIG_SPI_PXA2XX=y
arch/arm/configs/trizeps4_defconfig +2 -1
@@ -132,8 +132,9 @@ CONFIG_INPUT_TOUCHSCREEN=y CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=m CONFIG_SERIO_LIBPS2=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_I2C=y CONFIG_I2C_CHARDEV=y
arch/arm/configs/viper_defconfig +2 -2
@@ -101,11 +101,11 @@ CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=m # CONFIG_CONSOLE_TRANSLATIONS is not set # CONFIG_VT_CONSOLE is not set -CONFIG_SERIAL_8250=m +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_NR_UARTS=5 CONFIG_SERIAL_8250_RUNTIME_UARTS=5 CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y # CONFIG_LEGACY_PTYS is not set CONFIG_I2C=y CONFIG_I2C_CHARDEV=y
arch/arm/configs/xcep_defconfig +2 -1
@@ -60,8 +60,9 @@ CONFIG_NET_ETHERNET=y # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set # CONFIG_DEVKMEM is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y # CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_I2C=m
drivers/tty/serial/8250/8250_pxa.c new file +178 -0
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drivers/tty/serial/8250/Kconfig +9 -0
@@ -302,3 +302,12 @@ config SERIAL_8250_RT288X If you have a Ralink RT288x/RT305x SoC based board and want to use the serial port, say Y to this option. The driver can handle up to 2 serial ports. If unsure, say N. + +config SERIAL_PXA + tristate "PXA serial port support" + depends on SERIAL_8250 && (ARCH_PXA || ARCH_MMP) + help + If you have a machine based on an Intel XScale PXA2xx CPU you + can enable its onboard serial ports by enabling this option. + + If you choose M here, the module name will be 8250_pxa.
drivers/tty/serial/8250/Makefile +1 -0
@@ -20,3 +20,4 @@ obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o obj-$(CONFIG_SERIAL_8250_FSL) += 8250_fsl.o obj-$(CONFIG_SERIAL_8250_DW) += 8250_dw.o obj-$(CONFIG_SERIAL_8250_EM) += 8250_em.o +obj-$(CONFIG_SERIAL_PXA) += 8250_pxa.o
drivers/tty/serial/Kconfig +0 -23
@@ -395,29 +395,6 @@ config SERIAL_MPSC_CONSOLE help Say Y here if you want to support a serial console on a Marvell MPSC. -config SERIAL_PXA - bool "PXA serial port support" - depends on ARCH_PXA || ARCH_MMP - select SERIAL_CORE - help - If you have a machine based on an Intel XScale PXA2xx CPU you - can enable its onboard serial ports by enabling this option. - -config SERIAL_PXA_CONSOLE - bool "Console on PXA serial port" - depends on SERIAL_PXA - select SERIAL_CORE_CONSOLE - help - If you have enabled the serial port on the Intel XScale PXA - CPU you can make it the console by answering Y to this option. - - Even if you say Y here, the currently visible virtual console - (/dev/tty0) will still be used as the system console by default, but - you can alter that using a kernel command line option such as - "console=ttySA0". (Try "man bootparam" or see the documentation of - your boot loader (lilo or loadlin) about how to pass options to the - kernel at boot time.) - config SERIAL_SA1100 bool "SA1100 serial port support" depends on ARCH_SA1100
drivers/tty/serial/Makefile +0 -1
@@ -20,7 +20,6 @@ obj-$(CONFIG_SERIAL_8250) += 8250/ obj-$(CONFIG_SERIAL_AMBA_PL010) += amba-pl010.o obj-$(CONFIG_SERIAL_AMBA_PL011) += amba-pl011.o obj-$(CONFIG_SERIAL_CLPS711X) += clps711x.o -obj-$(CONFIG_SERIAL_PXA) += pxa.o obj-$(CONFIG_SERIAL_PNX8XXX) += pnx8xxx_uart.o obj-$(CONFIG_SERIAL_SA1100) += sa1100.o obj-$(CONFIG_SERIAL_BCM63XX) += bcm63xx_uart.o
drivers/tty/serial/pxa.c deleted +0 -971
971 lines not on this page · raw message
Signature · 1 line
1.8.4.2
Re: [PATCH v4 01/21] serial: rewrite pxa2xx-uart to use 8250_core
Quoted 11 lines · Sergei Ianovich
pxa2xx-uart was a separate uart platform driver. It was declaring the same device names and numbers as 8250 driver. As a result, it was impossible to use 8250 driver on PXA SoCs.
Upon closer examination pxa2xx-uart turned out to be a clone of 8250_core driver.
Workaround for Erratum #19 according to Marvel(R) PXA270M Processor Specification Update (April 19, 2010) is dropped. 8250_core reads from FIFO immediately after checking DR bit in LSR.
Quoted 7 lines
Signed-off-by Sergei Ianovich <[email protected]>Reviewed-by Heikki Krogerus <[email protected]>Reviewed-by James Cameron <[email protected]>---
Resenging together with the rest of the series as the series breaks without this one at [PATCH 12/21]
Whatever happened with merging this? I'm asking because either this or fixes to PXA uart are needed to coexist with the 8250 driver and for earlycon to work.
Rob
PATCH v4 2/21 ARM: dts: pxa2xx fix compatible strings
In reply to Sergei Ianovich---
v3..v4
v2..v3
v1..v2
* no changes
arch/arm/boot/dts/pxa2xx.dtsi | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)
arch/arm/boot/dts/pxa2xx.dtsi +2 -3
@@ -18,7 +18,6 @@ serial1 = &btuart; serial2 = &stuart; serial3 = &hwuart; - i2c0 = &pwri2c; i2c1 = &pxai2c1; };
@@ -113,14 +112,14 @@ }; usb0: ohci at 4c000000 { - compatible = "mrvl,pxa-ohci"; + compatible = "marvell,pxa-ohci"; reg = <0x4c000000 0x10000>; interrupts = <3>; status = "disabled"; }; mmc0: mmc at 41100000 { - compatible = "mrvl,pxa-mmc"; + compatible = "marvell,pxa-mmc"; reg = <0x41100000 0x1000>; interrupts = <23>; status = "disabled";
Signature · 1 line
1.8.4.2
PATCH v4 3/21 ARM: dts: fix pxa27x-gpio interrupts
In reply to Sergei Ianovich---
v3..v4
v2..v3
v1..v2
* no changes
arch/arm/boot/dts/pxa27x.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)
arch/arm/boot/dts/pxa27x.dtsi +6 -0
@@ -34,5 +34,11 @@ reg = <0x40c00010 0x10>; #pwm-cells = <1>; }; + + gpio: gpio at 40e00000 { + compatible = "intel,pxa27x-gpio"; + interrupts = <8>, <9>, <10>; + interrupt-names = "gpio0", "gpio1", "gpio_mux"; + }; }; };
Signature · 1 line
1.8.4.2
PATCH v4 4/21 ARM: dts: pxa3xx: move declaration to header
In reply to Sergei IanovichThis way it will be more difficult to change the declaration in one place, but not the other.
In addition, the change allows to use the binding for pxa-gpio on other PXA CPUs.
---
v3..v4
v2..v3
* no changes
v1..v2
* drop #ifdef in header file
* number changed from 6 to 4 (dropped patches)
arch/arm/mach-pxa/include/mach/irqs.h | 2 ++ arch/arm/mach-pxa/pxa3xx.c | 2 -- 2 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/mach-pxa/include/mach/irqs.h +2 -0
@@ -113,4 +113,6 @@ void ichp_handle_irq(struct pt_regs *);void pxa_init_irq (int irq_nr,int (*set_wake)(struct irq_data *,unsigned int ));#endif +extern void __init pxa_dt_irq_init (int (*fn)(struct irq_data *,unsigned int )); +#endif /* __ASM_MACH_IRQS_H */
arch/arm/mach-pxa/pxa3xx.c +0 -2
@@ -42,8 +42,6 @@#define PECR_IE (n) ((1 << ((n) * 2)) << 28)#define PECR_IS (n) ((1 << ((n) * 2)) << 29) -extern void __init pxa_dt_irq_init (int (*fn)(struct irq_data *,unsigned int )); - static DEFINE_PXA3_CKEN(pxa3xx_ffuart, FFUART, 14857000, 1); static DEFINE_PXA3_CKEN(pxa3xx_btuart, BTUART, 14857000, 1); static DEFINE_PXA3_CKEN(pxa3xx_stuart, STUART, 14857000, 1);
Signature · 1 line
1.8.4.2
PATCH v4 5/21 ARM: dts: pxa27x: irq init using device tree
In reply to Sergei Ianovich---
v3..v4
v2..v3
* no changes
v1..v2
* use of_have_populated_dt() instead of a static variable
* drop #ifdef in header file
* number changed from 8 to 5 (dropped patches)
arch/arm/mach-pxa/include/mach/pxa27x.h | 1 + arch/arm/mach-pxa/pxa27x.c | 10 ++++++++++ 2 files changed, 11 insertions(+)
arch/arm/mach-pxa/include/mach/pxa27x.h +1 -0
@@ -23,6 +23,7 @@ extern void __init pxa27x_map_io(void);extern void __init pxa27x_init_irq (void );extern int __init pxa27x_set_pwrmode (unsigned int mode);extern void pxa27x_cpu_pm_enter (suspend_state_t state); +extern void __init pxa27x_dt_init_irq (void );#define pxa27x_handle_irq ichp_handle_irq
arch/arm/mach-pxa/pxa27x.c +10 -0
@@ -398,6 +398,13 @@ void __init pxa27x_init_irq(void)pxa_init_irq (34 , pxa27x_set_wake); } +#ifdef CONFIG_OF +void __init pxa27x_dt_init_irq (void ) +{ +pxa_dt_irq_init (pxa27x_set_wake); +} +#endif /* CONFIG_OF */ +static struct map_desc pxa27x_io_desc[]__initdata = { {/* Mem Ctl */ .virtual = (unsigned long )SMEMC_VIRT ,
@@ -471,6 +478,9 @@ static int __init pxa27x_init(void)register_syscore_ops (&pxa2xx_mfp_syscore_ops);register_syscore_ops (&pxa2xx_clock_syscore_ops); +if (of_have_populated_dt ()) +return 0 ; +pxa_register_device (&pxa27x_device_gpio, &pxa27x_gpio_info); ret =platform_add_devices (devices,ARRAY_SIZE (devices)); }
Signature · 1 line
1.8.4.2
PATCH v4 6/21 ARM: dts: provide DMA config to pxamci on PXA27x
In reply to Sergei IanovichNon-dts implementation supply required DMA channel numbers as IORESOURCE_DMA. We can also get them from the device tree, if it is present.
This patch updates device tree with the proper dmaengine-based "marvell,pdma-1.0" DMA.
There is no actual data handling in this patch, because the existing driver cannot get DMA channel number from dmaengine API. The patch in the series will provide temporary workaround by manually parsing node attributes, until Daniel's series is ready to be merged.
---
v3..v4
* no changes
v2..v3
* split into good (this one) and temporary (PATCH 07/21) parts
v1..v2
* add binding for next-gen dma controller
* use correct dma declararion
* number changed from 5 to 3
Documentation/devicetree/bindings/mmc/pxa-mmc.txt | 5 +++++ arch/arm/boot/dts/pxa27x.dtsi | 14 ++++++++++++++ 2 files changed, 19 insertions(+)
Documentation/devicetree/bindings/mmc/pxa-mmc.txt +5 -0
@@ -5,6 +5,8 @@ Driver bindings for the PXA MCI (MMC/SDIO) interfaces Required properties: - compatible: Should be "marvell,pxa-mmc". - vmmc-supply: A regulator for VMMC +- dmas: Should be DMA specifiers for RX and TX +- dma-names: Should be "rx" and "tx" Optional properties: - marvell,detect-delay-ms: sets the detection delay timeout in ms.
@@ -21,5 +23,8 @@ mmc0: mmc at 41100000 { interrupts = <23>; cd-gpios = <&gpio 23 0>; wp-gpios = <&gpio 24 0>; + dmas = <&dma 21 + &dma 22>; + dma-names = "rx", "tx"; };
arch/arm/boot/dts/pxa27x.dtsi +14 -0
@@ -35,10 +35,24 @@ #pwm-cells = <1>; }; + dma: dma-controller at 40000000 { + compatible = "marvell,pdma-1.0"; + reg = <0x40000000 0x10000>; + interrupts = <25>; + #dma-cells = <1>; + dma-channels = <32>; + }; + gpio: gpio at 40e00000 { compatible = "intel,pxa27x-gpio"; interrupts = <8>, <9>, <10>; interrupt-names = "gpio0", "gpio1", "gpio_mux"; }; + + mmc at 41100000 { + dmas = <&dma 21 + &dma 22>; + dma-names = "rx", "tx"; + }; }; };
Signature · 1 line
1.8.4.2
PATCH v4 7/21 ARM: dts: parse DMA config in pxamci
The existing PXA MMC driver cannot get DMA channels in a proper way from the respective device tree binding.
This patch provides temporary workaround which allows using the existing driver in DT machines by pointing to the proper dmaengine-based "marvell,pdma-1.0" DMA.
Even though the new DMA provider is not present we can parse device node attributes manually and use channel numbers to acquire DMA channel from the existing non-dmaengine provider.
When Daniel's DMA series is merged there will be no need to manually parse for "dmas" and this patch can be safely reverted.
---
v3..v4
* no changes
v2..v3
* split into good (PATCH 07/21) and temporary (this one) parts
v1..v2
* add binding for next-gen dma controller
* use correct dma declararion
* number changed from 5 to 3
drivers/mmc/host/pxamci.c | 59 ++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 48 insertions(+), 11 deletions(-)
drivers/mmc/host/pxamci.c +48 -11
@@ -613,11 +613,46 @@ static int pxamci_of_init(struct platform_device *pdev)return 0 ; } + +static int pxamci_of_init_dma (struct platform_device *pdev, +struct pxamci_host *host) +{ +struct device_node *np = pdev->dev.of_node; +u32 tmp; +int i; +int ret; + + i =of_property_match_string (np,"dma-names" ,"rx" ); +if (i <0 ) +return i; + + ret =of_property_read_u32_index (np,"dmas" ,2 * i +1 , &tmp); +if (ret <0 ) +return ret; + host->dma_drcmrrx = tmp; + + i =of_property_match_string (np,"dma-names" ,"tx" ); +if (i <0 ) +return i; + + ret =of_property_read_u32_index (np,"dmas" ,2 * i +1 , &tmp); +if (ret <0 ) +return ret; + host->dma_drcmrtx = tmp; + +return 0 ; +}#else static int pxamci_of_init (struct platform_device *pdev) {return 0 ; } + +static int pxamci_of_init_dma (struct platform_device *pdev, +struct pxamci_host *host) +{ +return -ENODATA ; +}#endif static int pxamci_probe (struct platform_device *pdev)
@@ -741,19 +776,21 @@ static int pxamci_probe(struct platform_device *pdev)platform_set_drvdata (pdev, mmc); - dmarx =platform_get_resource (pdev,IORESOURCE_DMA ,0 ); -if (!dmarx) { - ret = -ENXIO ; - goto out; - } - host->dma_drcmrrx = dmarx->start; +if (pxamci_of_init_dma (pdev, host) <0 ) { + dmarx =platform_get_resource (pdev,IORESOURCE_DMA ,0 ); +if (!dmarx) { + ret = -ENXIO ; + goto out; + } + host->dma_drcmrrx = dmarx->start; - dmatx =platform_get_resource (pdev,IORESOURCE_DMA ,1 ); -if (!dmatx) { - ret = -ENXIO ; - goto out; + dmatx =platform_get_resource (pdev,IORESOURCE_DMA ,1 ); +if (!dmatx) { + ret = -ENXIO ; + goto out; + } + host->dma_drcmrtx = dmatx->start; } - host->dma_drcmrtx = dmatx->start;if (host->pdata) { gpio_cd = host->pdata->gpio_card_detect;
Signature · 1 line
1.8.4.2
PATCH v4 8/21 ARM: pxa27x: device tree support ICP DAS LP-8x4x
ICP DAS calls LP-8x4x 'programmable automation controller'. It is an industrial computer based on PXA270 SoC. They ship it with a 2.6.19 kernel and proprietary kernel module and userspace library to access its industrial IO.
This patch allows to boot the device with a modern kernel with device tree. It adds support for:
* MMC card interface on PXA270
* USB 1.1 port on PXA270
* 2 NOR flash devices
* 2 onboard ethernet Davicom DM9000 devices
* 3 serial UART ports on PXA270
* front panel red LED
* 64bit 1-wire system ID chip
* 16 kiB EEPROM (reading)
Support for these devices will be added in separate patches, since they are not currently supported by the kernel:
* DS1302 RTC
* 512kiB SRAM
* FPGA irq chip
* 3 built-in 16550A serial UART ports
* industrial IO parallel bus
* 10 position rotary switch
* 8 pin DIP switch
* 16 kiB EEPROM (writing)
* serial interface for digital and analog industrial IO modules on parallel bus (all I-87... modules)
* digital and analog industrial IO modules for parallel bus:
** I-8024 4 port analog output
** I-8041 32 port digital output
** I-8042 16 port digital output/16 port digital input
Not supported for now:
* VGA interface on PXA270 for lack of dts binding
* the rest of parallel bus (I-8...) modules for lack of hardware
* GPIO reset for lack of relevance (watchdog reset is working)
Newer devices have twice as much flash and a different partition structure otherwise being the same. When each device is provided with a correct device tree, all of them can be booted using the same kernel.
---
v3..v4
* move all declarations to one commit so the first DTB file can be used to boot any later kernel as suggested by Arnd Bergmann, Heikki Krogerus and Brian Norris
* support new flavor of device (i105 suffix)
v2..v3
* added extbus which maps synchronous, static, and variable-latency I/O (VLIO) interfaces of PXA27x SoC as suggested by Arnd Bergmann
* map is placed into platform include
* configured existing kernel drivers to support:
- front panel LED using gpio-leds
- 64bit 1-wire system ID chip using w1-gpio
- 16 kiB EEPROM using at24 over i2c-gpio
* number change (06/16 -> 08/21)
v1..v2
* drop left-over extern declaration
* use of_have_populated_dt() instead of a static variable
* drop wildcards in compatible
* drop machine-special machine description
* number changed from 9 to 6 (dropped patches)
.../devicetree/bindings/vendor-prefixes.txt | 1 + arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/pxa27x-lp8x4x-i105.dts | 43 ++++ arch/arm/boot/dts/pxa27x-lp8x4x.dts | 228 +++++++++++++++++++++ arch/arm/boot/dts/pxa27x.dtsi | 17 ++ arch/arm/configs/lp8x4x_defconfig | 168 +++++++++++++++ arch/arm/mach-pxa/Kconfig | 15 ++ arch/arm/mach-pxa/Makefile | 1 + arch/arm/mach-pxa/pxa27x-dt.c | 64 ++++++ 9 files changed, 539 insertions(+) create mode 100644 arch/arm/boot/dts/pxa27x-lp8x4x-i105.dts create mode 100644 arch/arm/boot/dts/pxa27x-lp8x4x.dts create mode 100644 arch/arm/configs/lp8x4x_defconfig create mode 100644 arch/arm/mach-pxa/pxa27x-dt.c
Documentation/devicetree/bindings/vendor-prefixes.txt +1 -0
@@ -54,6 +54,7 @@ hisilicon Hisilicon Limited. honeywell Honeywell hp Hewlett Packard ibm International Business Machines (IBM) +icpdas ICP DAS CO., LTD. idt Integrated Device Technologies, Inc. img Imagination Technologies Ltd. intel Intel Corporation
arch/arm/boot/dts/Makefile +2 -0
@@ -408,6 +408,8 @@ dtb-$(CONFIG_MACH_DOVE) += dove-cm-a510.dtb \ dove-d2plug.dtb \ dove-d3plug.dtb \ dove-dove-db.dtb +dtb-$(CONFIG_MACH_PXA27X_DT) += pxa27x-lp8x4x.dtb \ + pxa27x-lp8x4x-i105.dtb targets += dtbs dtbs_install targets += $(dtb-y)
arch/arm/boot/dts/pxa27x-lp8x4x-i105.dts new file +43 -0
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arch/arm/boot/dts/pxa27x-lp8x4x.dts new file +228 -0
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arch/arm/boot/dts/pxa27x.dtsi +17 -0
@@ -55,4 +55,21 @@ dma-names = "rx", "tx"; }; }; + + extbus { + /* + * PXA27x synchrous, static and + * variable-latency IO interfaces + */ + compatible = "simple-bus"; + + #address-cells = <2>; /* first cell is nCS, second is address */ + #size-cells = <1>; + ranges = <0 0 0 0x04000000 + 1 0 0x04000000 0x04000000 + 2 0 0x08000000 0x04000000 + 3 0 0x0c000000 0x04000000 + 4 0 0x10000000 0x04000000 + 5 0 0x14000000 0x04000000>; + }; };
arch/arm/configs/lp8x4x_defconfig new file +168 -0
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arch/arm/mach-pxa/Kconfig +15 -0
@@ -4,6 +4,21 @@ menu "Intel PXA2xx/PXA3xx Implementations" comment "Intel/Marvell Dev Platforms (sorted by hardware release time)" +config MACH_PXA27X_DT + bool "Support PXA27x platforms from device tree" + select PXA27x + select USE_OF + help + Include support for Marvell PXA27x based platforms using + the device tree. + + While MACH_PXA27X_DT when enabled should boot any PXA27x + compatible machine, it still makes sense to select specific + machines. Those options will select required features and + provide per-machine errata workarounds. + + If unsure, say Y. + config MACH_PXA3XX_DT bool "Support PXA3xx platforms from device tree" select CPU_PXA300
arch/arm/mach-pxa/Makefile +1 -0
@@ -20,6 +20,7 @@ obj-$(CONFIG_CPU_PXA930) += pxa930.o # NOTE: keep the order of boards in accordance to their order in Kconfig # Device Tree support +obj-$(CONFIG_MACH_PXA27X_DT) += pxa27x-dt.o obj-$(CONFIG_MACH_PXA3XX_DT) += pxa-dt.o # Intel/Marvell Dev Platforms
arch/arm/mach-pxa/pxa27x-dt.c new file +64 -0
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Signature · 1 line
1.8.4.2
Daniel Mack
maintainerRe: [PATCH v4 08/21] ARM: pxa27x: device tree support ICP DAS LP-8x4x
Quoted 32 lines · Sergei Ianovich
arch/arm/mach-pxa/pxa27x-dt.c new file +26
-0@@ -0,0 +1,64 @@ +/* +* linux/arch/arm/mach-pxa/pxa27x-dt.c +* +* Copyright (C) 2013 Sergei Ianovich +* +* based mostly on linux/arch/arm/mach-pxa/pxa-dt.c by Daniel Mack +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* publishhed by the Free Software Foundation. +*/ + +#include <linux/irq.h> +#include <linux/irqdomain.h> +#include <linux/of_irq.h> +#include <linux/of_platform.h> +#include <asm/io.h> +#include <asm/mach/arch.h> +#include <asm/mach/time.h> +#include <mach/irqs.h> +#include <mach/pxa27x.h> + +#include "generic.h" + +#ifdef CONFIG_PXA27x +static const struct of_dev_auxdata pxa27x_auxdata_lookup[] __initconst = {
arch/arm/mach-pxa/pxa27x-dt.c line 36
Quoted 10 lines
arch/arm/mach-pxa/pxa27x-dt.c new file +10
-0+OF_DEV_AUXDATA ("mrvl,pxa-uart" ,0x40100000 ,"pxa2xx-uart.0" ,NULL ), +OF_DEV_AUXDATA ("mrvl,pxa-uart" ,0x40200000 ,"pxa2xx-uart.1" ,NULL ), +OF_DEV_AUXDATA ("mrvl,pxa-uart" ,0x40700000 ,"pxa2xx-uart.2" ,NULL ), +OF_DEV_AUXDATA ("mrvl,pxa-uart" ,0x41600000 ,"pxa2xx-uart.3" ,NULL ), +OF_DEV_AUXDATA ("marvell,pxa-mmc" ,0x41100000 ,"pxa2xx-mci.0" ,NULL ), +OF_DEV_AUXDATA ("intel,pxa27x-gpio" ,0x40e00000 ,"pxa27x-gpio" ,NULL ), +OF_DEV_AUXDATA ("marvell,pxa-ohci" ,0x4c000000 ,"pxa27x-ohci" ,NULL ), + OF_DEV_AUXDATA("mrvl,pxa-i2c", 0x40301680, "pxa2xx-i2c.0", NULL), + {} +};
This patch should be split into a generic pxa27x part and one for your platform. The former should also include the changes to pxa27x.dtsi.
Thanks,
Daniel
PATCH v4 9/21 rtc: support DS1302 RTC on ICP DAS LP-8x4x
In reply to Sergei Ianovich---
v3..v4
* move DTS bindings to a different patch (8/21)
v2..v3
* use usleep_range instead of custom nsleep
* number change (07/16 -> 09/21)
v0..v2
* use device tree
* use devm helpers where possible
.../devicetree/bindings/rtc/rtc-ds1302.txt | 14 +++ arch/arm/configs/lp8x4x_defconfig | 1 + drivers/rtc/Kconfig | 2 +- drivers/rtc/rtc-ds1302.c | 100 ++++++++++++++++++++- 4 files changed, 114 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/rtc/rtc-ds1302.txt
Documentation/devicetree/bindings/rtc/rtc-ds1302.txt new file +14 -0
@@ -0,0 +1,14 @@ +* Dallas Semiconductor DS-1302 RTC + +Simple device which could be used to store date/time between reboots. + +Required properties: +- compatible : Should be "dallas,rtc-ds1302" +- reg : Should be address and size of IO memory region + +Examples: + +rtc at 40900000 { + compatible = "dallas,rtc-ds1302"; + reg = <0x1700901c 0x1>; +};
arch/arm/configs/lp8x4x_defconfig +1 -0
@@ -141,6 +141,7 @@ CONFIG_LEDS_GPIO=y CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_DS1302=y CONFIG_RTC_DRV_PXA=m # CONFIG_IOMMU_SUPPORT is not set CONFIG_EXT2_FS=m
drivers/rtc/Kconfig +1 -1
@@ -710,7 +710,7 @@ config RTC_DRV_DS1286 config RTC_DRV_DS1302 tristate "Dallas DS1302" - depends on SH_SECUREEDGE5410 + depends on SH_SECUREEDGE5410 || (ARCH_PXA && HIGH_RES_TIMERS) help If you say yes here you get support for the Dallas DS1302 RTC chips.
drivers/rtc/rtc-ds1302.c +98 -2
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Signature · 1 line
1.8.4.2
Re: [v4,09/21] rtc: support DS1302 RTC on ICP DAS LP-8x4x
Hi Sergey,
Are you still interested in seeing that patch going upstream?
Quoted 197 lines · Sergey Yanovich
Signed-off-by Sergei Ianovich <[email protected]>---
v3..v4
* move DTS bindings to a different patch (8/21)v2..v3
* useusleep_rangeinstead of custom nsleep
* number change (07/16 -> 09/21)v0..v2
* use device tree
* use devm helpers where possible.../devicetree/bindings/rtc/rtc-ds1302.txt | 14 +++ arch/arm/configs/lp8x4x_defconfig | 1 + drivers/rtc/Kconfig | 2 +- drivers/rtc/rtc-ds1302.c | 100 ++++++++++++++++++++- 4 files changed, 114 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/rtc/rtc-ds1302.txtDocumentation/devicetree/bindings/rtc/rtc-ds1302.txt new file +14
-0@@ -0,0 +1,14 @@ +* Dallas Semiconductor DS-1302 RTC + +Simple device which could be used to store date/time between reboots. + +Required properties: +- compatible : Should be "dallas,rtc-ds1302" +- reg : Should be address and size of IO memory region + +Examples: + +rtc at 40900000 { + compatible = "dallas,rtc-ds1302"; + reg = <0x1700901c 0x1>; +};arch/arm/configs/lp8x4x_defconfig +1
-0@@ -141,6 +141,7 @@ CONFIG_LEDS_GPIO=y CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_DS1302=y CONFIG_RTC_DRV_PXA=m # CONFIG_IOMMU_SUPPORT is not set CONFIG_EXT2_FS=mdrivers/rtc/Kconfig +1
-1@@ -710,7 +710,7 @@ config RTC_DRV_DS1286 config RTC_DRV_DS1302 tristate "Dallas DS1302" - depends on SH_SECUREEDGE5410 + depends on SH_SECUREEDGE5410 || (ARCH_PXA && HIGH_RES_TIMERS) help If you say yes here you get support for the Dallas DS1302 RTC chips.drivers/rtc/rtc-ds1302.c +98
-2@@ -50,7 +50,7 @@#define ds1302_set_tx ()#define ds1302_set_rx () -static inline int ds1302_hw_init (void ) +static inline int ds1302_hw_init (struct platform_device *pdev) {return 0 ; }@@ -86,6 +86,101 @@ static inline int ds1302_rxbit(void)return !!(get_dp () &RTC_IODATA ); } +#elif defined(CONFIG_ARCH_PXA ) && defined(CONFIG_HIGH_RES_TIMERS ) + +#include <linux/delay.h> +#include <linux/of.h> + +#define RTC_CE 0x01 +#define RTC_CLK 0x02 +#define RTC_nWE 0x04 +#define RTC_IODATA 0x08 + +static unsigned long ds1302_state; + +static void *mem; + +static inline int ds1302_hw_init (struct platform_device *pdev) +{ +struct resource *r; + + r =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); +if (!r) +return -ENODEV ; + + mem =devm_ioremap_resource (&pdev->dev, r); +if (!mem) +return -EFAULT ; + +return 0 ; +} + +static inline void ds1302_reset (void ) +{ + ds1302_state =0 ; +iowrite8 (ds1302_state, mem); +usleep_range (4 ,5 ); +} + +static inline void ds1302_clock (void ) +{ +usleep_range (1 ,2 ); + ds1302_state |=RTC_CLK ; +iowrite8 (ds1302_state, mem); +usleep_range (1 ,2 ); + ds1302_state &= ~RTC_CLK ; +iowrite8 (ds1302_state, mem); +} + +static inline void ds1302_start (void ) +{ + ds1302_state &= ~RTC_CLK ; + ds1302_state |=RTC_CE ; +iowrite8 (ds1302_state, mem); +usleep_range (3 ,4 ); +} + +static inline void ds1302_stop (void ) +{ + ds1302_state &= ~RTC_CE ; +iowrite8 (ds1302_state, mem); +} + +static inline void ds1302_set_tx (void ) +{ + ds1302_state &= ~RTC_nWE; +iowrite8 (ds1302_state, mem); +} + +static inline void ds1302_set_rx (void ) +{ + ds1302_state |= RTC_nWE; +iowrite8 (ds1302_state, mem); +} + +static inline void ds1302_txbit (int bit) +{ +if (bit) + ds1302_state |=RTC_IODATA ; +else + ds1302_state &= ~RTC_IODATA ; +iowrite8 (ds1302_state, mem); +} + +static inline int ds1302_rxbit (void ) +{ +return ioread8 (mem) &0x1 ; +} + +#ifdef CONFIG_OF +static const struct of_device_id ds1302_dt_ids[] = { + { .compatible ="dallas,rtc-ds1302" }, + { } +}; + +MODULE_DEVICE_TABLE (of, ds1302_dt_ids); +#endif +#else #error "Add support for your platform"#endif @@ -216,7 +311,7 @@ static int __init ds1302_rtc_probe(struct platform_device *pdev) {struct rtc_device *rtc; -if (ds1302_hw_init ()) { +if (ds1302_hw_init (pdev)) {dev_err (&pdev->dev,"Failed to init communication channel" );return -EINVAL ; }@@ -245,6 +340,7 @@ static struct platform_driver ds1302_platform_driver = { .driver = { .name = DRV_NAME, .owner = THIS_MODULE, + .of_match_table = of_match_ptr(ds1302_dt_ids), }, };
Signature · 3 lines
Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com
Re: [v4,09/21] rtc: support DS1302 RTC on ICP DAS LP-8x4x
Hi Alexandre,
Quoted 1 line · Alexandre Belloni
Are you still interested in seeing that patch going upstream?
Sure.
PATCH v4 10/21 mtd: support BB SRAM on ICP DAS LP-8x4x
In reply to Sergei IanovichThis provides an MTD device driver for 512kB of battery backed up SRAM on ICPDAS LP-8X4X programmable automation controllers.
SRAM chip is connected via FPGA and is not accessible without a driver, unlike flash memory which is wired to CPU MMU.
This SRAM becomes an excellent persisent storage of volatile process data like counter values and sensor statuses. Storing those data in flash or mmc card is not a viable solution.
---
v3..v4 for Brian Norris 'Reviewed-by'
* add doc file for DT binding
* move DTS binding to a different patch (8/21)
* drop unused include directive
* drop safely unused callback
* drop non-default partion probe types
* drop duplicate error checks
* drop duplicate error reporting
* fixed error message on MTD registeration
* fixed module removal routine
v2..v3
* no changes (except number 08/16 -> 10/21)
v0..v2
* use device tree
* use devm helpers where possible
.../devicetree/bindings/mtd/sram-lp8x4x.txt | 22 +++ arch/arm/configs/lp8x4x_defconfig | 1 + drivers/mtd/devices/Kconfig | 14 ++ drivers/mtd/devices/Makefile | 1 + drivers/mtd/devices/sram_lp8x4x.c | 204 +++++++++++++++++++++ 5 files changed, 242 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt create mode 100644 drivers/mtd/devices/sram_lp8x4x.c
Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt new file +22 -0
@@ -0,0 +1,22 @@ +512kB battery backed up SRAM on LP-8x4x industrial computers + +Required properties: +- compatible : should be "icpdas,sram-lp8x4x" + +- reg: physical base addresses and region lengths of + * IO memory range + * SRAM page selector + +- eeprom-gpios : should point to active-low write enable GPIO + +SRAM chip is connected via FPGA and is not accessible without a driver, +unlike flash memory which is wired to CPU MMU. Driver is essentially +an address translation routine. + +Example: + + sram at a000 { + compatible = "icpdas,sram-lp8x4x"; + reg = <0xa000 0x1000 + 0x901e 0x1>; + };
arch/arm/configs/lp8x4x_defconfig +1 -0
@@ -57,6 +57,7 @@ CONFIG_MTD_CFI_ADV_OPTIONS=y CONFIG_MTD_CFI_GEOMETRY=y CONFIG_MTD_CFI_INTELEXT=y CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_SRAM_LP8X4X=y CONFIG_PROC_DEVICETREE=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=2
drivers/mtd/devices/Kconfig +14 -0
@@ -225,4 +225,18 @@ config BCH_CONST_T default 4 endif +config MTD_SRAM_LP8X4X + tristate "SRAM on ICPDAS LP-8X4X" + depends on OF && ARCH_PXA + ---help--- + This provides an MTD device driver for 512kiB of battery backed up SRAM + on ICPDAS LP-8X4X programmable automation controllers. + + SRAM chip is connected via FPGA and is not accessible without a driver, + unlike flash memory which is wired to CPU MMU. + + Say N, unless you plan to run this kernel on LP-8X4X. + + If you say M, the module will be called sram_lp8x4x. + endmenu
drivers/mtd/devices/Makefile +1 -0
@@ -17,6 +17,7 @@ obj-$(CONFIG_MTD_SPEAR_SMI) += spear_smi.o obj-$(CONFIG_MTD_SST25L) += sst25l.o obj-$(CONFIG_MTD_BCM47XXSFLASH) += bcm47xxsflash.o obj-$(CONFIG_MTD_ST_SPI_FSM) += st_spi_fsm.o +obj-$(CONFIG_MTD_SRAM_LP8X4X) += sram_lp8x4x.o CFLAGS_docg3.o += -I$(src)
drivers/mtd/devices/sram_lp8x4x.c new file +204 -0
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Re: [PATCH v4 10/21] mtd: support BB SRAM on ICP DAS LP-8x4x
Hi Sergei,
A few more small comments.
Quoted 12 lines · Sergei Ianovich
This provides an MTD device driver for 512kB of battery backed up SRAM on ICPDAS LP-8X4X programmable automation controllers.
SRAM chip is connected via FPGA and is not accessible without a driver, unlike flash memory which is wired to CPU MMU.
This SRAM becomes an excellent persisent storage of volatile process data like counter values and sensor statuses. Storing those data in flash or mmc card is not a viable solution.
Signed-off-by Sergei Ianovich <[email protected]>Reviewed-by Brian Norris <[email protected]>
Quoted 11 lines
---
v3..v4 for Brian Norris 'Reviewed-by'
* add doc file for DT binding
* move DTS binding to a different patch (8/21)
* drop unused include directive
* drop safely unused callback
* drop non-default partion probe types
* drop duplicate error checks
* drop duplicate error reporting
* fixed error message on MTD registeration
* fixed module removal routine
Thanks for the updates. This patch looks pretty good to me.
Quoted 22 lines
v2..v3
* no changes (except number 08/16 -> 10/21)v0..v2
* use device tree
* use devm helpers where possible.../devicetree/bindings/mtd/sram-lp8x4x.txt | 22 +++ arch/arm/configs/lp8x4x_defconfig | 1 + drivers/mtd/devices/Kconfig | 14 ++ drivers/mtd/devices/Makefile | 1 + drivers/mtd/devices/sram_lp8x4x.c | 204 +++++++++++++++++++++ 5 files changed, 242 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt create mode 100644 drivers/mtd/devices/sram_lp8x4x.cDocumentation/devicetree/bindings/mtd/sram-lp8x4x.txt new file +0
-0
Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt line 8
Quoted 8 lines
Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt new file +8
-0@@ -0,0 +1,22 @@ +512kB battery backed up SRAM on LP-8x4x industrial computers + +Required properties: +- compatible : should be "icpdas,sram-lp8x4x" + +- reg: physical base addresses and region lengths of + * IO memory range + * SRAM page selector
Are these region types pretty static for this type of hardware? If not, it helps to have a reg-names property in the DT, when there are 2 or more register resources.
Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt line 10
Quoted 1 line
Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt new file +1
-0+- eeprom-gpios : should point to active-low write enable GPIO
I'm curious: your driver doesn't actually utilize this binding. Is this intentional? Is it actually optional? (I note that the example DT below doesn't have this property...)
Quoted 17 lines
Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt new file +12
-0+ +SRAM chip is connected via FPGA and is not accessible without a driver, +unlike flash memory which is wired to CPU MMU. Driver is essentially +an address translation routine. + +Example: + + sram at a000 { + compatible = "icpdas,sram-lp8x4x"; + reg = <0xa000 0x1000 + 0x901e 0x1>; + };arch/arm/configs/lp8x4x_defconfig +0
-0
arch/arm/configs/lp8x4x_defconfig CONFIG_MTD_CFI_ADV_OPTIONS=y · line 63
Quoted 7 lines
arch/arm/configs/lp8x4x_defconfig +1
-0@@ -57,6 +57,7 @@ CONFIG_MTD_CFI_ADV_OPTIONS=y CONFIG_MTD_CFI_GEOMETRY=y CONFIG_MTD_CFI_INTELEXT=y CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_SRAM_LP8X4X=y CONFIG_PROC_DEVICETREE=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=2
I can't take the defconfig update via MTD; it will need to go via the appropriate ARM tree (arm-soc?). So this hunk needs to move to another patch.
Quoted 166 lines
drivers/mtd/devices/Kconfig +14
-0@@ -225,4 +225,18 @@ config BCH_CONST_T default 4 endif +config MTD_SRAM_LP8X4X + tristate "SRAM on ICPDAS LP-8X4X" + depends on OF && ARCH_PXA + ---help--- + This provides an MTD device driver for 512kiB of battery backed up SRAM + on ICPDAS LP-8X4X programmable automation controllers. + + SRAM chip is connected via FPGA and is not accessible without a driver, + unlike flash memory which is wired to CPU MMU. + + Say N, unless you plan to run this kernel on LP-8X4X. + + If you say M, the module will be called sram_lp8x4x. + endmenudrivers/mtd/devices/Makefile +1
-0@@ -17,6 +17,7 @@ obj-$(CONFIG_MTD_SPEAR_SMI) += spear_smi.o obj-$(CONFIG_MTD_SST25L) += sst25l.o obj-$(CONFIG_MTD_BCM47XXSFLASH) += bcm47xxsflash.o obj-$(CONFIG_MTD_ST_SPI_FSM) += st_spi_fsm.o +obj-$(CONFIG_MTD_SRAM_LP8X4X) += sram_lp8x4x.o CFLAGS_docg3.o += -I$(src)drivers/mtd/devices/sram_lp8x4x.c new file +125
-0@@ -0,0 +1,204 @@ +/* +* linux/drivers/mtd/devices/lp8x4x_sram.c +* +* MTD Driver for SRAM on ICPDAS LP-8x4x +* Copyright (C) 2013 Sergei Ianovich <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation or any later version. +*/ + +#include <linux/init.h> +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/mtd/map.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/partitions.h> +#include <linux/platform_device.h> +#include <linux/of_device.h> +#include <linux/slab.h> +#include <linux/string_helpers.h> +#include <linux/types.h> + +struct lp8x4x_sram_info { +void __iomem *bank; +void __iomem *virt; +struct mutex lock; +unsigned active_bank; +struct mtd_info mtd; +}; + +static int +lp8x4x_sram_erase (struct mtd_info *mtd,struct erase_info *instr) +{ +struct lp8x4x_sram_info *info = mtd->priv; +unsigned bank = instr->addr >>11 ; +unsigned offset = (instr->addr &0x7ff ) <<1 ; +loff_t i; + +mutex_lock (&info->lock); +if (unlikely (bank != info->active_bank)) { + info->active_bank = bank; +iowrite8 (bank, info->bank); + } +for (i =0 ; i < instr->len; i++) { +iowrite8 (0xff , info->virt + offset); + offset +=2 ; +if (unlikely (offset ==0 )) { + info->active_bank++; +iowrite8 (info->active_bank, info->bank); + } + } +mutex_unlock (&info->lock); + instr->state =MTD_ERASE_DONE ; +mtd_erase_callback (instr); + +return 0 ; +} + +static int +lp8x4x_sram_write (struct mtd_info *mtd,loff_t to,size_t len, +size_t *retlen,const u_char *b) +{ +struct lp8x4x_sram_info *info = mtd->priv; +unsigned bank = to >>11 ; +unsigned offset = (to &0x7ff ) <<1 ; +loff_t i; + +mutex_lock (&info->lock); +if (unlikely (bank != info->active_bank)) { + info->active_bank = bank; +iowrite8 (bank, info->bank); + } +for (i =0 ; i < len; i++) { +iowrite8 (b[i], info->virt + offset); + offset +=2 ; +if (unlikely (offset ==0 )) { + info->active_bank++; +iowrite8 (info->active_bank, info->bank); + } + } +mutex_unlock (&info->lock); + *retlen = len; +return 0 ; +} + +static int +lp8x4x_sram_read (struct mtd_info *mtd,loff_t from,size_t len, +size_t *retlen,u_char *b) +{ +struct lp8x4x_sram_info *info = mtd->priv; +unsigned bank = from >>11 ; +unsigned offset = (from &0x7ff ) <<1 ; +loff_t i; + +mutex_lock (&info->lock); +if (unlikely (bank != info->active_bank)) { + info->active_bank = bank; +iowrite8 (bank, info->bank); + } +for (i =0 ; i < len; i++) { + b[i] =ioread8 (info->virt + offset); + offset +=2 ; +if (unlikely (offset ==0 )) { + info->active_bank++; +iowrite8 (info->active_bank, info->bank); + } + } +mutex_unlock (&info->lock); + *retlen = len; +return 0 ; +} + +static struct of_device_id of_flash_match[] = { + { + .compatible ="icpdas,sram-lp8x4x" , + }, + { }, +}; +MODULE_DEVICE_TABLE (of, of_flash_match); + +static int +lp8x4x_sram_probe (struct platform_device *pdev) +{
drivers/mtd/devices/sram_lp8x4x.c line 135
Quoted 10 lines
drivers/mtd/devices/sram_lp8x4x.c new file +10
-0+const struct of_device_id *match; +struct lp8x4x_sram_info *info; +struct resource *res_virt, *res_bank; +char sz_str[16 ]; +struct mtd_part_parser_data ppdata; +int err =0 ; + + match =of_match_device (of_flash_match, &pdev->dev); +if (!match) +return -EINVAL ;
Does this of_match_device() serve any particular purpose? Your driver already matches against these IDs, and you're not actually retrieving any of-data from the match, so this looks redundant.
Quoted 7 lines
drivers/mtd/devices/sram_lp8x4x.c new file +7
-0+ + info =devm_kzalloc (&pdev->dev,sizeof (*info),GFP_KERNEL ); +if (!info) +return -ENOMEM ; + + res_virt =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); + info->virt =devm_ioremap_resource (&pdev->dev, res_virt);
drivers/mtd/devices/sram_lp8x4x.c line 152
Quoted 10 lines
drivers/mtd/devices/sram_lp8x4x.c new file +10
-0+if (IS_ERR (info->virt)) +return PTR_ERR (info->virt); + + res_bank =platform_get_resource (pdev,IORESOURCE_MEM ,1 ); + info->bank =devm_ioremap_resource (&pdev->dev, res_bank); +if (IS_ERR (info->bank)) +return PTR_ERR (info->bank); + + info->mtd.priv = info; + info->mtd.name ="SRAM" ;
Are you absolutely sure there is only ever a single SRAM device on a given system? Because otherwise, you will get redundantly-named MTD's. If the answer is no, you might consider a unique naming scheme.
Quoted 42 lines
drivers/mtd/devices/sram_lp8x4x.c new file +42
-0+ info->mtd.type =MTD_RAM ; + info->mtd.flags =MTD_CAP_RAM ; + info->mtd.size =resource_size (res_virt) <<7 ; + info->mtd.erasesize =512 ; + info->mtd.writesize =4 ; + info->mtd._erase = lp8x4x_sram_erase; + info->mtd._write = lp8x4x_sram_write; + info->mtd._read = lp8x4x_sram_read; + info->mtd.owner =THIS_MODULE ; + +mutex_init (&info->lock); +iowrite8 (info->active_bank, info->bank); +platform_set_drvdata (pdev, info); + + ppdata.of_node = pdev->dev.of_node; + err =mtd_device_parse_register (&info->mtd,NULL , &ppdata, +NULL ,0 ); + +if (err <0 ) { +dev_err (&pdev->dev,"failed to register MTD\n" ); +return err; + } + +string_get_size (info->mtd.size,STRING_UNITS_2 , sz_str, +sizeof (sz_str)); +dev_info (&pdev->dev,"using %s SRAM on LP-8X4X as %s\n" , sz_str, +dev_name (&info->mtd.dev)); +return 0 ; +} + +static int +lp8x4x_sram_remove (struct platform_device *dev) +{ +struct lp8x4x_sram_info *info =platform_get_drvdata (dev); +return mtd_device_unregister (&info->mtd); +} + +static struct platform_driver lp8x4x_sram_driver = { + .driver = { + .name ="sram-lp8x4x" , + .owner =THIS_MODULE , + .of_match_table = of_flash_match,
drivers/mtd/devices/sram_lp8x4x.c line 204
Quoted 10 lines
drivers/mtd/devices/sram_lp8x4x.c new file +10
-0+ }, + .probe = lp8x4x_sram_probe, + .remove = lp8x4x_sram_remove, +}; + +module_platform_driver (lp8x4x_sram_driver); + +MODULE_LICENSE ("GPL" ); +MODULE_AUTHOR ("Sergei Ianovich <[email protected]>" ); +MODULE_DESCRIPTION ("MTD driver for SRAM on ICPDAS LP-8x4x" );
Thanks,
Brian
Re: [PATCH v4 10/21] mtd: support BB SRAM on ICP DAS LP-8x4x
Hi Brian,
Quoted 17 lines · Brian Norris
A few more small comments.
Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt line 8
Quoted 10 lines · Sergei Ianovich
+++
b/Documentation/devicetree/bindings/mtd/sram-lp8x4x.txtDocumentation/devicetree/bindings/mtd/sram-lp8x4x.txt new file +8
-0@@ -0,0 +1,22 @@ +512kB battery backed up SRAM on LP-8x4x industrial computers + +Required properties: +- compatible : should be "icpdas,sram-lp8x4x" + +- reg: physical base addresses and region lengths of + * IO memory range + * SRAM page selectorAre these region types pretty static for this type of hardware? If not, it helps to have a reg-names property in the DT, when there are 2 or more register resources.
The regions are fixed. The addresses are hard-wired.
Quoted 5 lines
Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt line 10
Quoted 1 line
Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt new file +1
-0+- eeprom-gpios : should point to active-low write enable GPIOI'm curious: your driver doesn't actually utilize this binding. Is this intentional? Is it actually optional? (I note that the example DT below doesn't have this property...)
Thanks for noticing. It's an artifact of copy-paste. I'll drop this.
Quoted 5 lines
Quoted 5 lines
arch/arm/configs/lp8x4x_defconfig +1
-0+++ b/arch/arm/configs/lp8x4x_defconfig@@ -57,6 +57,7 @@ CONFIG_MTD_CFI_ADV_OPTIONS=y CONFIG_MTD_CFI_GEOMETRY=y CONFIG_MTD_CFI_INTELEXT=y CONFIG_MTD_PHYSMAP_OF=y
Quoted 8 lines
arch/arm/configs/lp8x4x_defconfig CONFIG_MTD_CFI_ADV_OPTIONS=y · line 63
Quoted 4 lines
arch/arm/configs/lp8x4x_defconfig +1
-0+CONFIG_MTD_SRAM_LP8X4X=y CONFIG_PROC_DEVICETREE=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=2I can't take the defconfig update via MTD; it will need to go via the appropriate ARM tree (arm-soc?). So this hunk needs to move to another patch.
Sure. I'll remove this chunk and put it into main device patch.
Quoted 7 lines
drivers/mtd/devices/sram_lp8x4x.c line 135
Quoted 3 lines
drivers/mtd/devices/sram_lp8x4x.c new file +3
-0+ match =of_match_device (of_flash_match, &pdev->dev); +if (!match) +return -EINVAL ;Does this
of_match_device()serve any particular purpose? Your driver already matches against these IDs, and you're not actually retrieving any of-data from the match, so this looks redundant.
Point taken, I'll drop this.
Quoted 13 lines
Quoted 13 lines
drivers/mtd/devices/sram_lp8x4x.c new file +13
-0+ + info =devm_kzalloc (&pdev->dev,sizeof (*info),GFP_KERNEL ); +if (!info) +return -ENOMEM ; + + res_virt =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); + info->virt =devm_ioremap_resource (&pdev->dev, res_virt); +if (IS_ERR (info->virt)) +return PTR_ERR (info->virt); + + res_bank =platform_get_resource (pdev,IORESOURCE_MEM ,1 ); + info->bank =devm_ioremap_resource (&pdev->dev, res_bank); +if (IS_ERR (info->bank))
Quoted 8 lines
drivers/mtd/devices/sram_lp8x4x.c line 152
Quoted 4 lines
drivers/mtd/devices/sram_lp8x4x.c new file +4
-0+return PTR_ERR (info->bank); + + info->mtd.priv = info; + info->mtd.name ="SRAM" ;Are you absolutely sure there is only ever a single SRAM device on a given system? Because otherwise, you will get redundantly-named MTD's. If the answer is no, you might consider a unique naming scheme.
Like .999999 sure. This one is hard-wired. There is no extension slots to plug in any memory device.
I'll post a new version with the rest of the series. Thanks for reviewing.
PATCH v5 1/1 mtd: support BB SRAM on ICP DAS LP-8x4x
In reply to Sergei IanovichThis provides an MTD device driver for 512kB of battery backed up SRAM on ICPDAS LP-8X4X programmable automation controllers.
SRAM chip is connected via FPGA and is not accessible without a driver, unlike flash memory which is wired to CPU MMU.
This SRAM becomes an excellent persisent storage of volatile process data like counter values and sensor statuses. Storing those data in flash or mmc card is not a viable solution.
---
v4..v5
* remove .owner from struct platform_driver
* constify struct of_device_id
for further Brian Norris comments:
* drop unused property from doc file
* move defconfig update to a different file
* drop extra match w/ of_match_device()
v3..v4 for Brian Norris 'Reviewed-by'
* add doc file for DT binding
* move DTS binding to a different patch (8/21)
* drop unused include directive
* drop safely unused callback
* drop non-default partion probe types
* drop duplicate error checks
* drop duplicate error reporting
* fixed error message on MTD registeration
* fixed module removal routine
v2..v3
* no changes (except number 08/16 -> 10/21)
v0..v2
* use device tree
* use devm helpers where possible
.../devicetree/bindings/mtd/sram-lp8x4x.txt | 20 +++ drivers/mtd/devices/Kconfig | 14 ++ drivers/mtd/devices/Makefile | 1 + drivers/mtd/devices/sram_lp8x4x.c | 199 +++++++++++++++++++++ 4 files changed, 234 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt create mode 100644 drivers/mtd/devices/sram_lp8x4x.c
Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt new file +20 -0
@@ -0,0 +1,20 @@ +512kB battery backed up SRAM on LP-8x4x industrial computers + +Required properties: +- compatible : should be "icpdas,sram-lp8x4x" + +- reg: physical base addresses and region lengths of + * IO memory range + * SRAM page selector + +SRAM chip is connected via FPGA and is not accessible without a driver, +unlike flash memory which is wired to CPU MMU. Driver is essentially +an address translation routine. + +Example: + + sram@a000 { + compatible = "icpdas,sram-lp8x4x"; + reg = <0xa000 0x1000 + 0x901e 0x1>; + };
drivers/mtd/devices/Kconfig +14 -0
@@ -233,4 +233,18 @@ config BCH_CONST_T default 4 endif +config MTD_SRAM_LP8X4X + tristate "SRAM on ICPDAS LP-8X4X" + depends on OF && ARCH_PXA + ---help--- + This provides an MTD device driver for 512kiB of battery backed up SRAM + on ICPDAS LP-8X4X programmable automation controllers. + + SRAM chip is connected via FPGA and is not accessible without a driver, + unlike flash memory which is wired to CPU MMU. + + Say N, unless you plan to run this kernel on LP-8X4X. + + If you say M, the module will be called sram_lp8x4x. + endmenu
drivers/mtd/devices/Makefile +1 -0
@@ -17,6 +17,7 @@ obj-$(CONFIG_MTD_SST25L) += sst25l.o obj-$(CONFIG_MTD_BCM47XXSFLASH) += bcm47xxsflash.o obj-$(CONFIG_MTD_ST_SPI_FSM) += st_spi_fsm.o obj-$(CONFIG_MTD_POWERNV_FLASH) += powernv_flash.o +obj-$(CONFIG_MTD_SRAM_LP8X4X) += sram_lp8x4x.o CFLAGS_docg3.o += -I$(src)
drivers/mtd/devices/sram_lp8x4x.c new file +199 -0
199 lines not on this page · raw message
Signature · 6 lines
2.6.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
Rob Herring
maintainerRe: [PATCH v5] mtd: support BB SRAM on ICP DAS LP-8x4x
Quoted 53 lines · Sergei Ianovich
This provides an MTD device driver for 512kB of battery backed up SRAM on ICPDAS LP-8X4X programmable automation controllers.
SRAM chip is connected via FPGA and is not accessible without a driver, unlike flash memory which is wired to CPU MMU.
This SRAM becomes an excellent persisent storage of volatile process data like counter values and sensor statuses. Storing those data in flash or mmc card is not a viable solution.
Signed-off-by Sergei Ianovich <[email protected]>Reviewed-by Brian Norris <[email protected]>---
v4..v5
* remove .owner from structplatform_driver
* constify structof_device_id
for further Brian Norris comments:
* drop unused property from doc file
* move defconfig update to a different file
* drop extra match w/of_match_device()v3..v4 for Brian Norris 'Reviewed-by'
* add doc file for DT binding
* move DTS binding to a different patch (8/21)
* drop unused include directive
* drop safely unused callback
* drop non-default partion probe types
* drop duplicate error checks
* drop duplicate error reporting
* fixed error message on MTD registeration
* fixed module removal routinev2..v3
* no changes (except number 08/16 -> 10/21)v0..v2
* use device tree
* use devm helpers where possible.../devicetree/bindings/mtd/sram-lp8x4x.txt | 20 +++ drivers/mtd/devices/Kconfig | 14 ++ drivers/mtd/devices/Makefile | 1 + drivers/mtd/devices/sram_lp8x4x.c | 199 +++++++++++++++++++++ 4 files changed, 234 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt create mode 100644 drivers/mtd/devices/sram_lp8x4x.cDocumentation/devicetree/bindings/mtd/sram-lp8x4x.txt new file +0
-0
Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt line 4
Quoted 4 lines
Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt new file +4
-0@@ -0,0 +1,20 @@ +512kB battery backed up SRAM on LP-8x4x industrial computers + +Required properties: +- compatible : should be "icpdas,sram-lp8x4x"
No wildcards please. Otherwise looks fine.
Quoted 16 lines
Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt new file +16
-0+ +- reg: physical base addresses and region lengths of + * IO memory range + * SRAM page selector + +SRAM chip is connected via FPGA and is not accessible without a driver, +unlike flash memory which is wired to CPU MMU. Driver is essentially +an address translation routine. + +Example: + + sram@a000 { + compatible = "icpdas,sram-lp8x4x"; + reg = <0xa000 0x1000 + 0x901e 0x1>; + };
Re: [PATCH v5] mtd: support BB SRAM on ICP DAS LP-8x4x
Quoted 52 lines · Rob Herring
Quoted 51 lines · Sergei Ianovich
This provides an MTD device driver for 512kB of battery backed up SRAM
on ICPDAS LP-8X4X programmable automation controllers.SRAM chip is connected via FPGA and is not accessible without a driver,
unlike flash memory which is wired to CPU MMU.This SRAM becomes an excellent persisent storage of volatile process data like counter values and sensor statuses. Storing those data in flash or mmc card is not a viable solution.
Signed-off-by Sergei Ianovich <[email protected]>Reviewed-by Brian Norris <[email protected]>---
v4..v5
* remove .owner from structplatform_driver
* constify structof_device_id
for further Brian Norris comments:
* drop unused property from doc file
* move defconfig update to a different file
* drop extra match w/of_match_device()v3..v4 for Brian Norris 'Reviewed-by'
* add doc file for DT binding
* move DTS binding to a different patch (8/21)
* drop unused include directive
* drop safely unused callback
* drop non-default partion probe types
* drop duplicate error checks
* drop duplicate error reporting
* fixed error message on MTD registeration
* fixed module removal routinev2..v3
* no changes (except number 08/16 -> 10/21)v0..v2
* use device tree
* use devm helpers where possible.../devicetree/bindings/mtd/sram-lp8x4x.txt | 20 +++ drivers/mtd/devices/Kconfig | 14 ++ drivers/mtd/devices/Makefile | 1 + drivers/mtd/devices/sram_lp8x4x.c | 199
+++++++++++++++++++++4 files changed, 234 insertions(+)create mode 100644
Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt
create mode 100644drivers/mtd/devices/sram_lp8x4x.c
Quoted 13 lines
Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt line 4
Quoted 11 lines
Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt new file +4
-0@@ -0,0 +1,20 @@ +512kB battery backed up SRAM on LP-8x4x industrial computers + +Required properties: +- compatible : should be "icpdas,sram-lp8x4x"No wildcards please. Otherwise looks fine.
There is a similar review comment from Arnd Bergmann in the discussion of [PATCH v5] serial: support for 16550A serial ports on LP-8x4x.
I'll quote my latest clarification:
Quoted 6 lines
... This driver will support ports on LP-8081,
LP-8141, LP-8441, LP-8841. Last time I checked the vendor was announcing a series with 3 as the last digit. They use lp8x4x name, eg. in documentation likeLP-8x4x_ChangeLog.txt. They ship their proprietary SDK inlp8x4x_sdk_for_linux.tar. All of this implies that it is a single board.
I think the solution should be the same for all LP-8x4x drivers (IRQ, SRAM, SERIAL, IIO).
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Re: [PATCH v5] mtd: support BB SRAM on ICP DAS LP-8x4x
Quoted 5 lines · Sergei Ianovich
Quoted 4 lines · Rob Herring
Quoted 2 lines · Sergei Ianovich
+Required properties:
+- compatible : should be "icpdas,sram-lp8x4x"
Quoted 7 lines
Quoted 1 line
No wildcards please. Otherwise looks fine.
There is a similar review comment from Arnd Bergmann in the discussion of
[PATCH v5] serial: support for 16550A serial ports on LP-8x4x.I'll quote my latest clarification:
Quoted 1 line
... This driver will support ports on LP-8081,
^^ So 8081 doesn't even match the wildcard scheme you give in the compatible string, proving the point of the Conventional Wisdom suggestion Rob gave...
Quoted 8 lines
Quoted 5 lines
LP-8141, LP-8441, LP-8841. Last time I checked the vendor was announcing a series with 3 as the last digit. They use lp8x4x name, eg. in documentation like
LP-8x4x_ChangeLog.txt. They ship their proprietary SDK inlp8x4x_sdk_for_linux.tar. All of this implies that it is a single board.I think the solution should be the same for all LP-8x4x drivers (IRQ, SRAM, SERIAL, IIO).
The rationale is described here:
http://devicetree.org/Device_Tree_Usage#Understanding_the_compatible_Property
Quote:
Quoted 5 lines
Warning: Don't use wildcard compatible values, like "fsl,mpc83xx-uart" or similar. Silicon vendors will invariably make a change that breaks your wildcard assumptions the moment it is too late to change it. Instead, choose a specific silicon implementations and make all subsequent silicon compatible with it.
I don't think your circumstance is anything unique.
Regards,
Brian
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PATCH v6 1/1 mtd: support BB SRAM on ICP DAS LP-8x4x
In reply to Sergei IanovichThis provides an MTD device driver for 512kB of battery backed up SRAM on ICPDAS LP-8X4X programmable automation controllers.
SRAM chip is connected via FPGA and is not accessible without a driver, unlike flash memory which is wired to CPU MMU.
This SRAM becomes an excellent persisent storage of volatile process data like counter values and sensor statuses. Storing those data in flash or mmc card is not a viable solution.
v5..v6
* replace wildcards in compatible and module name
* drop obsolete mtd_part_parser_data.of_node
v4..v5
* remove .owner from struct platform_driver
* constify struct of_device_id
for further Brian Norris comments:
* drop unused property from doc file
* move defconfig update to a different file
* drop extra match w/ of_match_device()
v3..v4 for Brian Norris 'Reviewed-by'
* add doc file for DT binding
* move DTS binding to a different patch (8/21)
* drop unused include directive
* drop safely unused callback
* drop non-default partion probe types
* drop duplicate error checks
* drop duplicate error reporting
* fixed error message on MTD registeration
* fixed module removal routine
v2..v3
* no changes (except number 08/16 -> 10/21)
v0..v2
* use device tree
* use devm helpers where possible
--- .../devicetree/bindings/mtd/icpdas-lp8841-sram.txt | 23 +++ drivers/mtd/devices/Kconfig | 14 ++ drivers/mtd/devices/Makefile | 1 + drivers/mtd/devices/sram_lp8841.c | 198 +++++++++++++++++++++ 4 files changed, 236 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/icpdas-lp8841-sram.txt create mode 100644 drivers/mtd/devices/sram_lp8841.c
Documentation/devicetree/bindings/mtd/icpdas-lp8841-sram.txt new file +23 -0
@@ -0,0 +1,23 @@ +512kB battery backed up SRAM on ICP DAS LP-8841 industrial computers + +LP-8441, LP-8141, and LP-8041 differ from LP-8841 only in expansion +slot count. + +Required properties: +- compatible : should be "icpdas,lp8841-sram" + +- reg: physical base addresses and region lengths of + * IO memory range + * SRAM page selector + +SRAM chip is connected via FPGA and is not accessible without a driver, +unlike flash memory which is wired to CPU MMU. Driver is essentially +an address translation routine. + +Example: + + sram@a000 { + compatible = "icpdas,lp8841-sram"; + reg = <0xa000 0x1000 + 0x901e 0x1>; + };
drivers/mtd/devices/Kconfig +14 -0
@@ -233,4 +233,18 @@ config BCH_CONST_T default 4 endif +config MTD_SRAM_LP8841 + tristate "SRAM on ICP DAS LP-8841" + depends on OF && ARCH_PXA + ---help--- + This provides an MTD device driver for 512kiB of battery backed up SRAM + on ICPDAS LP-8X41 programmable automation controllers. + + SRAM chip is connected via FPGA and is not accessible without a driver, + unlike flash memory which is wired to CPU MMU. + + Say N, unless you plan to run this kernel on LP-8X41. + + If you say M, the module will be called sram_lp8841. + endmenu
drivers/mtd/devices/Makefile +1 -0
@@ -17,6 +17,7 @@ obj-$(CONFIG_MTD_SST25L) += sst25l.o obj-$(CONFIG_MTD_BCM47XXSFLASH) += bcm47xxsflash.o obj-$(CONFIG_MTD_ST_SPI_FSM) += st_spi_fsm.o obj-$(CONFIG_MTD_POWERNV_FLASH) += powernv_flash.o +obj-$(CONFIG_MTD_SRAM_LP8841) += sram_lp8841.o CFLAGS_docg3.o += -I$(src)
drivers/mtd/devices/sram_lp8841.c new file +198 -0
198 lines not on this page · raw message
Signature · 6 lines
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Re: [PATCH v6] mtd: support BB SRAM on ICP DAS LP-8x4x
Quoted 37 lines · Sergei Ianovich
This provides an MTD device driver for 512kB of battery backed up SRAM on ICPDAS LP-8X4X programmable automation controllers.
SRAM chip is connected via FPGA and is not accessible without a driver, unlike flash memory which is wired to CPU MMU.
This SRAM becomes an excellent persisent storage of volatile process data like counter values and sensor statuses. Storing those data in flash or mmc card is not a viable solution.
Signed-off-by Sergei Ianovich <[email protected]>Reviewed-by Brian Norris <[email protected]>CC Rob Herring <[email protected]>v5..v6
* replace wildcards in compatible and module name
* drop obsolete mtd_part_parser_data.of_nodev4..v5
* remove .owner from structplatform_driver
* constify structof_device_id
for further Brian Norris comments:
* drop unused property from doc file
* move defconfig update to a different file
* drop extra match w/of_match_device()v3..v4 for Brian Norris 'Reviewed-by'
* add doc file for DT binding
* move DTS binding to a different patch (8/21)
* drop unused include directive
* drop safely unused callback
* drop non-default partion probe types
* drop duplicate error checks
* drop duplicate error reporting
* fixed error message on MTD registeration
* fixed module removal routine
Quoted 8 lines
v2..v3
* no changes (except number 08/16 -> 10/21)v0..v2
* use device tree
* use devm helpers where possible--- .../devicetree/bindings/mtd/icpdas-lp8841-sram.txt | 23 +++
Quoted 6 lines
drivers/mtd/devices/Kconfig | 14 ++ drivers/mtd/devices/Makefile | 1 + drivers/mtd/devices/sram_lp8841.c | 198 +++++++++++++++++++++ 4 files changed, 236 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/icpdas-lp8841-sram.txt create mode 100644 drivers/mtd/devices/sram_lp8841.c
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Re: [PATCH v6] mtd: support BB SRAM on ICP DAS LP-8x4x
In reply to Sergei IanovichHi Sergei,
A few more issues...
Quoted 241 lines · Sergei Ianovich
This provides an MTD device driver for 512kB of battery backed up SRAM on ICPDAS LP-8X4X programmable automation controllers.
SRAM chip is connected via FPGA and is not accessible without a driver, unlike flash memory which is wired to CPU MMU.
This SRAM becomes an excellent persisent storage of volatile process data like counter values and sensor statuses. Storing those data in flash or mmc card is not a viable solution.
Signed-off-by Sergei Ianovich <[email protected]>Reviewed-by Brian Norris <[email protected]>CC Rob Herring <[email protected]>v5..v6
* replace wildcards in compatible and module name
* drop obsolete mtd_part_parser_data.of_nodev4..v5
* remove .owner from structplatform_driver
* constify structof_device_id
for further Brian Norris comments:
* drop unused property from doc file
* move defconfig update to a different file
* drop extra match w/of_match_device()v3..v4 for Brian Norris 'Reviewed-by'
* add doc file for DT binding
* move DTS binding to a different patch (8/21)
* drop unused include directive
* drop safely unused callback
* drop non-default partion probe types
* drop duplicate error checks
* drop duplicate error reporting
* fixed error message on MTD registeration
* fixed module removal routinev2..v3
* no changes (except number 08/16 -> 10/21)v0..v2
* use device tree
* use devm helpers where possible--- .../devicetree/bindings/mtd/icpdas-lp8841-sram.txt | 23 +++ drivers/mtd/devices/Kconfig | 14 ++ drivers/mtd/devices/Makefile | 1 + drivers/mtd/devices/sram_lp8841.c | 198 +++++++++++++++++++++ 4 files changed, 236 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/icpdas-lp8841-sram.txt create mode 100644 drivers/mtd/devices/sram_lp8841.cDocumentation/devicetree/bindings/mtd/icpdas-lp8841-sram.txt new file +23
-0@@ -0,0 +1,23 @@ +512kB battery backed up SRAM on ICP DAS LP-8841 industrial computers + +LP-8441, LP-8141, and LP-8041 differ from LP-8841 only in expansion +slot count. + +Required properties: +- compatible : should be "icpdas,lp8841-sram" + +- reg: physical base addresses and region lengths of + * IO memory range + * SRAM page selector + +SRAM chip is connected via FPGA and is not accessible without a driver, +unlike flash memory which is wired to CPU MMU. Driver is essentially +an address translation routine. + +Example: + + sram@a000 { + compatible = "icpdas,lp8841-sram"; + reg = <0xa000 0x1000 + 0x901e 0x1>; + };drivers/mtd/devices/Kconfig +14
-0@@ -233,4 +233,18 @@ config BCH_CONST_T default 4 endif +config MTD_SRAM_LP8841 + tristate "SRAM on ICP DAS LP-8841" + depends on OF && ARCH_PXA + ---help--- + This provides an MTD device driver for 512kiB of battery backed up SRAM + on ICPDAS LP-8X41 programmable automation controllers. + + SRAM chip is connected via FPGA and is not accessible without a driver, + unlike flash memory which is wired to CPU MMU. + + Say N, unless you plan to run this kernel on LP-8X41. + + If you say M, the module will be called sram_lp8841. + endmenudrivers/mtd/devices/Makefile +1
-0@@ -17,6 +17,7 @@ obj-$(CONFIG_MTD_SST25L) += sst25l.o obj-$(CONFIG_MTD_BCM47XXSFLASH) += bcm47xxsflash.o obj-$(CONFIG_MTD_ST_SPI_FSM) += st_spi_fsm.o obj-$(CONFIG_MTD_POWERNV_FLASH) += powernv_flash.o +obj-$(CONFIG_MTD_SRAM_LP8841) += sram_lp8841.o CFLAGS_docg3.o += -I$(src)drivers/mtd/devices/sram_lp8841.c new file +119
-0@@ -0,0 +1,198 @@ +/* +* linux/drivers/mtd/devices/sram_lp8841.c +* +* MTD Driver for SRAM on ICP DAS LP-8841 +* Copyright (C) 2013 Sergei Ianovich <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation or any later version. +*/ + +#include <linux/init.h> +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/mtd/map.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/partitions.h> +#include <linux/platform_device.h> +#include <linux/of_device.h> +#include <linux/slab.h> +#include <linux/string_helpers.h> +#include <linux/types.h> + +struct lp8841_sram_info { +void __iomem *bank; +void __iomem *virt; +struct mutex lock; +unsigned active_bank; +struct mtd_info mtd; +}; + +static int +lp8841_sram_erase (struct mtd_info *mtd,struct erase_info *instr) +{ +struct lp8841_sram_info *info = mtd->priv; +unsigned bank = instr->addr >>11 ; +unsigned offset = (instr->addr &0x7ff ) <<1 ; +loff_t i; + +mutex_lock (&info->lock); +if (unlikely (bank != info->active_bank)) { + info->active_bank = bank; +iowrite8 (bank, info->bank); + } +for (i =0 ; i < instr->len; i++) { +iowrite8 (0xff , info->virt + offset); + offset +=2 ; +if (unlikely (offset ==0 )) { + info->active_bank++; +iowrite8 (info->active_bank, info->bank); + } + } +mutex_unlock (&info->lock); + instr->state =MTD_ERASE_DONE ; +mtd_erase_callback (instr); + +return 0 ; +} + +static int +lp8841_sram_write (struct mtd_info *mtd,loff_t to,size_t len, +size_t *retlen,const u_char *b) +{ +struct lp8841_sram_info *info = mtd->priv; +unsigned bank = to >>11 ; +unsigned offset = (to &0x7ff ) <<1 ; +loff_t i; + +mutex_lock (&info->lock); +if (unlikely (bank != info->active_bank)) { + info->active_bank = bank; +iowrite8 (bank, info->bank); + } +for (i =0 ; i < len; i++) { +iowrite8 (b[i], info->virt + offset); + offset +=2 ; +if (unlikely (offset ==0 )) { + info->active_bank++; +iowrite8 (info->active_bank, info->bank); + } + } +mutex_unlock (&info->lock); + *retlen = len; +return 0 ; +} + +static int +lp8841_sram_read (struct mtd_info *mtd,loff_t from,size_t len, +size_t *retlen,u_char *b) +{ +struct lp8841_sram_info *info = mtd->priv; +unsigned bank = from >>11 ; +unsigned offset = (from &0x7ff ) <<1 ; +loff_t i; + +mutex_lock (&info->lock); +if (unlikely (bank != info->active_bank)) { + info->active_bank = bank; +iowrite8 (bank, info->bank); + } +for (i =0 ; i < len; i++) { + b[i] =ioread8 (info->virt + offset); + offset +=2 ; +if (unlikely (offset ==0 )) { + info->active_bank++; +iowrite8 (info->active_bank, info->bank); + } + } +mutex_unlock (&info->lock); + *retlen = len; +return 0 ; +} + +static const struct of_device_id of_flash_match[] = { + { + .compatible ="icpdas,lp8841-sram" , + }, + { },
drivers/mtd/devices/sram_lp8841.c line 129
Quoted 10 lines
drivers/mtd/devices/sram_lp8841.c new file +10
-0+}; +MODULE_DEVICE_TABLE (of, of_flash_match); + +static int +lp8841_sram_probe (struct platform_device *pdev) +{ +struct lp8841_sram_info *info; +struct resource *res_virt, *res_bank; +char sz_str[16 ]; +struct mtd_part_parser_data ppdata;
You don't need this struct any more.
Quoted 13 lines
drivers/mtd/devices/sram_lp8841.c new file +13
-0+int err =0 ; + + info =devm_kzalloc (&pdev->dev,sizeof (*info),GFP_KERNEL ); +if (!info) +return -ENOMEM ; + + res_virt =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); + info->virt =devm_ioremap_resource (&pdev->dev, res_virt); +if (IS_ERR (info->virt)) +return PTR_ERR (info->virt); + + res_bank =platform_get_resource (pdev,IORESOURCE_MEM ,1 ); + info->bank =devm_ioremap_resource (&pdev->dev, res_bank);
drivers/mtd/devices/sram_lp8841.c line 152
Quoted 10 lines
drivers/mtd/devices/sram_lp8841.c new file +10
-0+if (IS_ERR (info->bank)) +return PTR_ERR (info->bank); + + info->mtd.priv = info; + info->mtd.name ="SRAM" ; + info->mtd.type =MTD_RAM ; + info->mtd.flags =MTD_CAP_RAM ; + info->mtd.size =resource_size (res_virt) <<7 ; + info->mtd.erasesize =512 ; + info->mtd.writesize =4 ;
Can you please set mtd.writebufsize to an appropriate value too? Maybe it's just the same as writesize.
drivers/mtd/devices/sram_lp8841.c line 156
Quoted 4 lines
drivers/mtd/devices/sram_lp8841.c new file +4
-0+ info->mtd._erase = lp8841_sram_erase; + info->mtd._write = lp8841_sram_write; + info->mtd._read = lp8841_sram_read; + info->mtd.owner =THIS_MODULE ;
If you set info->mtd.dev.parent (please do), you don't need the above line.
drivers/mtd/devices/sram_lp8841.c line 163
Quoted 7 lines
drivers/mtd/devices/sram_lp8841.c new file +7
-0+ +mutex_init (&info->lock); +iowrite8 (info->active_bank, info->bank); +platform_set_drvdata (pdev, info); + + err =mtd_device_parse_register (&info->mtd,NULL , &ppdata, +NULL ,0 );
This can just be:
err = mtd_device_register(&info->mtd, NULL, 0);
Quoted 25 lines
drivers/mtd/devices/sram_lp8841.c new file +25
-0+ +if (err <0 ) { +dev_err (&pdev->dev,"failed to register MTD\n" ); +return err; + } + +string_get_size (info->mtd.size,1 ,STRING_UNITS_2 , sz_str, +sizeof (sz_str)); +dev_info (&pdev->dev,"using %s SRAM on LP-8X4X as %s\n" , sz_str, +dev_name (&info->mtd.dev)); +return 0 ; +} + +static int +lp8841_sram_remove (struct platform_device *dev) +{ +struct lp8841_sram_info *info =platform_get_drvdata (dev); + +return mtd_device_unregister (&info->mtd); +} + +static struct platform_driver lp8841_sram_driver = { + .driver = { + .name ="sram-lp8841" , + .of_match_table = of_flash_match,
drivers/mtd/devices/sram_lp8841.c line 198
Quoted 10 lines
drivers/mtd/devices/sram_lp8841.c new file +10
-0+ }, + .probe = lp8841_sram_probe, + .remove = lp8841_sram_remove, +}; + +module_platform_driver (lp8841_sram_driver); + +MODULE_LICENSE ("GPL" ); +MODULE_AUTHOR ("Sergei Ianovich" ); +MODULE_DESCRIPTION ("MTD driver for SRAM on ICPDAS LP-8841" );
Brian
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PATCH v4 11/21 ARM: pxa: support ICP DAS LP-8x4x FPGA irq
In reply to Sergei IanovichICP DAS LP-8x4x contains FPGA chip. The chip functions as an interrupt source providing 16 additional interrupts among other things. The interrupt lines are muxed to a GPIO pin of a 2nd level PXA-GPIO interrupt controller. GPIO pins of the 2nd level controller are in turn muxed to a CPU interrupt line.
Until pxa is completely converted to device tree, it is impossible to use IRQCHIP_DECLARE() and the irqdomain needs to added manually. Drivers for the on-CPU IRQs and GPIO-IRQs are loaded using postcore_initcall(). We need to have all irq domain drivers loaded prior to DT parsing in order to allow normal initialization of IRQ resources with DT.
---
v3.2..v4
* move DTS binding to a different patch (8/21)
v3.1..v3.2
fixes to apply Linus Walleij's "Reviewed-by":
* add kerneldoc comment for state container struct
* rename irq -> hwirq for clarity
* drop overzealous error checks from the hotpaths
v3..v3.1
fixes according to Linus Walleij review comments:
* update commit message
* use state container instead of global variables
* get hardware irq nums from irq_data, don't calculate them
* use BIT() macro
* add defines for system irq register masks
* replace cycle control variable with break
* use better names for resource variables
* add a linear domain instead of a legacy one
* use irq_create_mapping() instead of irq_alloc_desc()
v2..v3
* no changes (except number 09/16 -> 11/21)
v0..v2
* extract irqchip and move to drivers/irqchip/
* use device tree
* use devm helpers where possible
.../bindings/interrupt-controller/irq-lp8x4x.txt | 49 +++++ drivers/irqchip/Kconfig | 5 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-lp8x4x.c | 227 +++++++++++++++++++++ 4 files changed, 282 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt create mode 100644 drivers/irqchip/irq-lp8x4x.c
Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt new file +49 -0
@@ -0,0 +1,49 @@ +ICP DAS LP-8x4x FPGA Interrupt Controller + +ICP DAS LP-8x4x contains FPGA chip. The chip functions as a interrupt +source providing 16 additional interrupts among other things. + +Required properties: +- compatible : should be "icpdas,irq-lp8x4x" + +- reg: physical base address of the controller and length of memory mapped + region. + +- interrupt-controller : identifies the node as an interrupt controller + +- #interrupt-cells : should be 1 + +- interrupts : should provide interrupt + +- interrupt-parent : should provide a link to interrupt controller either + explicitly and implicitly from a parent node + +Example: + + fpga: fpga at 17000006 { + compatible = "icpdas,irq-lp8x4x"; + reg = <0x17000006 0x16>; + interrupt-parent = <&gpio>; + interrupts = <3 IRQ_TYPE_EDGE_RISING>; + #interrupt-cells = <1>; + interrupt-controller; + status = "okay"; + }; + + uart at 17009050 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x17009050 0x10 + 0x17009030 0x02>; + interrupt-parent = <&fpga>; + interrupts = <13>; + status = "okay"; + }; + + uart at 17009060 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x17009060 0x10 + 0x17009032 0x02>; + interrupt-parent = <&fpga>; + interrupts = <14>; + status = "okay"; + };
drivers/irqchip/Kconfig +5 -0
@@ -47,6 +47,11 @@ config CLPS711X_IRQCHIP select SPARSE_IRQ default y +config LP8X4X_IRQ + bool + depends on OF && ARCH_PXA + select IRQ_DOMAIN + config ORION_IRQCHIP bool select IRQ_DOMAIN
drivers/irqchip/Makefile +1 -0
@@ -29,3 +29,4 @@ obj-$(CONFIG_TB10X_IRQC) += irq-tb10x.o obj-$(CONFIG_XTENSA) += irq-xtensa-pic.o obj-$(CONFIG_XTENSA_MX) += irq-xtensa-mx.o obj-$(CONFIG_IRQ_CROSSBAR) += irq-crossbar.o +obj-$(CONFIG_LP8X4X_IRQ) += irq-lp8x4x.o
drivers/irqchip/irq-lp8x4x.c new file +227 -0
227 lines not on this page · raw message
Signature · 1 line
1.8.4.2
PATCH v5 1/1 arm: pxa: support ICP DAS LP-8x4x FPGA irq
ICP DAS LP-8x4x contains FPGA chip. The chip functions as an interrupt source providing 16 additional interrupts among other things. The interrupt lines are muxed to a GPIO pin of a 2nd level PXA-GPIO interrupt controller. GPIO pins of the 2nd level controller are in turn muxed to a CPU interrupt line.
Until pxa is completely converted to device tree, it is impossible to use IRQCHIP_DECLARE() and the irqdomain needs to added manually. Drivers for the on-CPU IRQs and GPIO-IRQs are loaded using postcore_initcall(). We need to have all irq domain drivers loaded prior to DT parsing in order to allow normal initialization of IRQ resources with DT.
---
v4..v5
* constify struct of_device_id
* drop irq number from handler signature
v3.2..v4
* move DTS binding to a different patch (8/21)
v3.1..v3.2
fixes to apply Linus Walleij's "Reviewed-by":
* add kerneldoc comment for state container struct
* rename irq -> hwirq for clarity
* drop overzealous error checks from the hotpaths
v3..v3.1
fixes according to Linus Walleij review comments:
* update commit message
* use state container instead of global variables
* get hardware irq nums from irq_data, don't calculate them
* use BIT() macro
* add defines for system irq register masks
* replace cycle control variable with break
* use better names for resource variables
* add a linear domain instead of a legacy one
* use irq_create_mapping() instead of irq_alloc_desc()
v2..v3
* no changes (except number 09/16 -> 11/21)
v0..v2
* extract irqchip and move to drivers/irqchip/
* use device tree
* use devm helpers where possible
.../bindings/interrupt-controller/irq-lp8x4x.txt | 49 +++++ drivers/irqchip/Kconfig | 5 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-lp8x4x.c | 227 +++++++++++++++++++++ 4 files changed, 282 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt create mode 100644 drivers/irqchip/irq-lp8x4x.c
Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt new file +49 -0
@@ -0,0 +1,49 @@ +ICP DAS LP-8x4x FPGA Interrupt Controller + +ICP DAS LP-8x4x contains FPGA chip. The chip functions as a interrupt +source providing 16 additional interrupts among other things. + +Required properties: +- compatible : should be "icpdas,irq-lp8x4x" + +- reg: physical base address of the controller and length of memory mapped + region. + +- interrupt-controller : identifies the node as an interrupt controller + +- #interrupt-cells : should be 1 + +- interrupts : should provide interrupt + +- interrupt-parent : should provide a link to interrupt controller either + explicitly and implicitly from a parent node + +Example: + + fpga: fpga@17000006 { + compatible = "icpdas,irq-lp8x4x"; + reg = <0x17000006 0x16>; + interrupt-parent = <&gpio>; + interrupts = <3 IRQ_TYPE_EDGE_RISING>; + #interrupt-cells = <1>; + interrupt-controller; + status = "okay"; + }; + + uart@17009050 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x17009050 0x10 + 0x17009030 0x02>; + interrupt-parent = <&fpga>; + interrupts = <13>; + status = "okay"; + }; + + uart@17009060 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x17009060 0x10 + 0x17009032 0x02>; + interrupt-parent = <&fpga>; + interrupts = <14>; + status = "okay"; + };
drivers/irqchip/Kconfig +5 -0
@@ -193,3 +193,8 @@ config IRQ_MXS def_bool y if MACH_ASM9260 || ARCH_MXS select IRQ_DOMAIN select STMP_DEVICE + +config LP8X4X_IRQ + bool + depends on OF && ARCH_PXA + select IRQ_DOMAIN
drivers/irqchip/Makefile +1 -0
@@ -55,3 +55,4 @@ obj-$(CONFIG_RENESAS_H8S_INTC) += irq-renesas-h8s.o obj-$(CONFIG_ARCH_SA1100) += irq-sa11x0.o obj-$(CONFIG_INGENIC_IRQ) += irq-ingenic.o obj-$(CONFIG_IMX_GPCV2) += irq-imx-gpcv2.o +obj-$(CONFIG_LP8X4X_IRQ) += irq-lp8x4x.o
drivers/irqchip/irq-lp8x4x.c new file +227 -0
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Re: [PATCH v5] arm: pxa: support ICP DAS LP-8x4x FPGA irq
Quoted 205 lines · Sergei Ianovich
ICP DAS LP-8x4x contains FPGA chip. The chip functions as an interrupt source providing 16 additional interrupts among other things. The interrupt lines are muxed to a GPIO pin of a 2nd level PXA-GPIO interrupt controller. GPIO pins of the 2nd level controller are in turn muxed to a CPU interrupt line.
Until pxa is completely converted to device tree, it is impossible to use
IRQCHIP_DECLARE()and the irqdomain needs to added manually. Drivers for the on-CPU IRQs and GPIO-IRQs are loaded usingpostcore_initcall(). We need to have all irq domain drivers loaded prior to DT parsing in order to allow normal initialization of IRQ resources with DT.Signed-off-by Sergei Ianovich <[email protected]>Reviewed-by Linus Walleij <[email protected]>CC Arnd Bergmann <[email protected]>---
v4..v5
* constify structof_device_id
* drop irq number from handler signaturev3.2..v4
* move DTS binding to a different patch (8/21)v3.1..v3.2
fixes to apply Linus Walleij's "Reviewed-by":
* add kerneldoc comment for state container struct
* rename irq -> hwirq for clarity
* drop overzealous error checks from the hotpathsv3..v3.1
fixes according to Linus Walleij review comments:
* update commit message
* use state container instead of global variables
* get hardware irq nums fromirq_data, don't calculate them
* useBIT()macro
* add defines for system irq register masks
* replace cycle control variable with break
* use better names for resource variables
* add a linear domain instead of a legacy one
* useirq_create_mapping()instead ofirq_alloc_desc()v2..v3
* no changes (except number 09/16 -> 11/21)v0..v2
* extract irqchip and move todrivers/irqchip/
* use device tree
* use devm helpers where possible.../bindings/interrupt-controller/irq-lp8x4x.txt | 49 +++++ drivers/irqchip/Kconfig | 5 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-lp8x4x.c | 227 +++++++++++++++++++++ 4 files changed, 282 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt create mode 100644 drivers/irqchip/irq-lp8x4x.cDocumentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt new file +49
-0@@ -0,0 +1,49 @@ +ICP DAS LP-8x4x FPGA Interrupt Controller + +ICP DAS LP-8x4x contains FPGA chip. The chip functions as a interrupt +source providing 16 additional interrupts among other things. + +Required properties: +- compatible : should be "icpdas,irq-lp8x4x" + +- reg: physical base address of the controller and length of memory mapped + region. + +- interrupt-controller : identifies the node as an interrupt controller + +- #interrupt-cells : should be 1 + +- interrupts : should provide interrupt + +- interrupt-parent : should provide a link to interrupt controller either + explicitly and implicitly from a parent node + +Example: + + fpga: fpga@17000006 { + compatible = "icpdas,irq-lp8x4x"; + reg = <0x17000006 0x16>; + interrupt-parent = <&gpio>; + interrupts = <3 IRQ_TYPE_EDGE_RISING>; + #interrupt-cells = <1>; + interrupt-controller; + status = "okay"; + }; + + uart@17009050 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x17009050 0x10 + 0x17009030 0x02>; + interrupt-parent = <&fpga>; + interrupts = <13>; + status = "okay"; + }; + + uart@17009060 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x17009060 0x10 + 0x17009032 0x02>; + interrupt-parent = <&fpga>; + interrupts = <14>; + status = "okay"; + };drivers/irqchip/Kconfig +5
-0@@ -193,3 +193,8 @@ config IRQ_MXS def_bool y if MACH_ASM9260 || ARCH_MXS select IRQ_DOMAIN select STMP_DEVICE + +config LP8X4X_IRQ + bool + depends on OF && ARCH_PXA + select IRQ_DOMAINdrivers/irqchip/Makefile +1
-0@@ -55,3 +55,4 @@ obj-$(CONFIG_RENESAS_H8S_INTC) += irq-renesas-h8s.o obj-$(CONFIG_ARCH_SA1100) += irq-sa11x0.o obj-$(CONFIG_INGENIC_IRQ) += irq-ingenic.o obj-$(CONFIG_IMX_GPCV2) += irq-imx-gpcv2.o +obj-$(CONFIG_LP8X4X_IRQ) += irq-lp8x4x.odrivers/irqchip/irq-lp8x4x.c new file +64
-0@@ -0,0 +1,227 @@ +/* +* linux/drivers/irqchip/irq-lp8x4x.c +* +* Support for ICP DAS LP-8x4x FPGA irq +* Copyright (C) 2013 Sergei Ianovich <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation or any later version. +*/ +#include <linux/interrupt.h> +#include <linux/io.h> +#include <linux/irq.h> +#include <linux/irqdomain.h> +#include <linux/irqchip/chained_irq.h> +#include <linux/of.h> +#include <linux/platform_device.h> + +#define EOI 0x00000000 +#define INSINT 0x00000002 +#define ENSYSINT 0x00000004 +#define PRIMINT 0x00000006 +#define PRIMINT_MASK 0xe0 +#define SECOINT 0x00000008 +#define SECOINT_MASK 0x1f +#define ENRISEINT 0x0000000A +#define CLRRISEINT 0x0000000C +#define ENHILVINT 0x0000000E +#define CLRHILVINT 0x00000010 +#define ENFALLINT 0x00000012 +#define CLRFALLINT 0x00000014 +#define IRQ_MEM_SIZE 0x00000016 +#define LP8X4X_NUM_IRQ_DEFAULT 16 + +/** +* struct lp8x4x_irq_data - LP8X4X custom irq controller state container +* @base: base IO memory address +* @irq_domain: Interrupt translation domain; responsible for mapping +* between hwirq number and linux irq number +* @irq_sys_enabled: mask keeping track of interrupts enabled in the +* register which vendor calls 'system' +* @irq_high_enabled: mask keeping track of interrupts enabled in the +* register which vendor calls 'high' +* +* The structure implements State Container from +* Documentation/driver-model/design-patterns.txt +*/ + +struct lp8x4x_irq_data { +void *base; +struct irq_domain *domain; +unsigned char irq_sys_enabled; +unsigned char irq_high_enabled; +}; + +static void lp8x4x_mask_irq (struct irq_data *d) +{ +unsigned mask; +unsigned long hwirq = d->hwirq; +struct lp8x4x_irq_data *host =irq_data_get_irq_chip_data (d); + +if (hwirq <8 ) { + host->irq_high_enabled &= ~BIT (hwirq); +
drivers/irqchip/irq-lp8x4x.c line 74
Quoted 10 lines
drivers/irqchip/irq-lp8x4x.c new file +10
-0+ mask =ioread8 (host->base +ENHILVINT ); + mask &= ~BIT (hwirq); +iowrite8 (mask, host->base +ENHILVINT ); + }else { + hwirq -=8 ; + host->irq_sys_enabled &= ~BIT (hwirq); + + mask =ioread8 (host->base +ENSYSINT ); + mask &= ~BIT (hwirq); +iowrite8 (mask, host->base +ENSYSINT );
Any reason why this is using iowrite8/ioread8 instead of writeb/readb, which are much more common on ARM?
Quoted 43 lines
drivers/irqchip/irq-lp8x4x.c new file +43
-0+ } +} + +static void lp8x4x_unmask_irq (struct irq_data *d) +{ +unsigned mask; +unsigned long hwirq = d->hwirq; +struct lp8x4x_irq_data *host =irq_data_get_irq_chip_data (d); + +if (hwirq <8 ) { + host->irq_high_enabled |=BIT (hwirq); + mask =ioread8 (host->base +CLRHILVINT ); + mask |=BIT (hwirq); +iowrite8 (mask, host->base +CLRHILVINT ); + + mask =ioread8 (host->base +ENHILVINT ); + mask |=BIT (hwirq); +iowrite8 (mask, host->base +ENHILVINT ); + }else { + hwirq -=8 ; + host->irq_sys_enabled |=BIT (hwirq); + + mask =ioread8 (host->base +SECOINT ); + mask |=BIT (hwirq); +iowrite8 (mask, host->base +SECOINT ); + + mask =ioread8 (host->base +ENSYSINT ); + mask |=BIT (hwirq); +iowrite8 (mask, host->base +ENSYSINT ); + } +} + +static struct irq_chip lp8x4x_irq_chip = { + .name ="FPGA" , + .irq_ack = lp8x4x_mask_irq, + .irq_mask = lp8x4x_mask_irq, + .irq_mask_ack = lp8x4x_mask_irq, + .irq_unmask = lp8x4x_unmask_irq, +}; + +static void lp8x4x_irq_handler (struct irq_desc *desc) +{ +int n;
drivers/irqchip/irq-lp8x4x.c line 127
Quoted 10 lines
drivers/irqchip/irq-lp8x4x.c new file +10
-0+unsigned long mask; +struct irq_chip *chip =irq_desc_get_chip (desc); +struct lp8x4x_irq_data *host =irq_desc_get_handler_data (desc); + +chained_irq_enter (chip, desc); + +for (;;) { + mask =ioread8 (host->base +CLRHILVINT ) &0xff ; + mask |= (ioread8 (host->base +SECOINT ) &SECOINT_MASK ) <<8 ; + mask |= (ioread8 (host->base +PRIMINT ) &PRIMINT_MASK ) <<8 ;
Huh. Fancy. It would be nice if one of PRIMINT_MASK and SECOINT_MASK was defined in terms of the other. Something like
#define SECOINT_MASK (~(u8)PRIMINT_MASK)
and a short comment so that I don't jump at seeing two "<< 8" in a row.
drivers/irqchip/irq-lp8x4x.c line 128
Quoted 1 line
drivers/irqchip/irq-lp8x4x.c new file +1
-0+ mask &= host->irq_high_enabled | (host->irq_sys_enabled <<8 );
Is there any case where this actually filters pending interrupts? mask and unmask seem to program a similar state in the HW...
Quoted 59 lines
drivers/irqchip/irq-lp8x4x.c new file +59
-0+if (mask ==0 ) +break ; +for_each_set_bit (n, &mask,BITS_PER_LONG ) +generic_handle_irq (irq_find_mapping (host->domain, n)); + } + +iowrite8 (0 , host->base +EOI ); +chained_irq_exit (chip, desc); +} + +static int lp8x4x_irq_domain_map (struct irq_domain *d,unsigned int irq, +irq_hw_number_t hw) +{ +struct lp8x4x_irq_data *host = d->host_data; +int err; + + err =irq_set_chip_data (irq, host); +if (err <0 ) +return err; + +irq_set_chip_and_handler (irq, &lp8x4x_irq_chip, handle_level_irq); +irq_set_probe (irq); +return 0 ; +} + +const struct irq_domain_ops lp8x4x_irq_domain_ops = { + .map = lp8x4x_irq_domain_map, + .xlate = irq_domain_xlate_onecell, +}; + +static const struct of_device_id lp8x4x_irq_dt_ids[] = { + { .compatible ="icpdas,irq-lp8x4x" , }, + {} +}; + +static int lp8x4x_irq_probe (struct platform_device *pdev) +{ +struct resource *res_mem, *res_irq; +struct device_node *np = pdev->dev.of_node; +struct lp8x4x_irq_data *host; +int i, err; + + res_mem =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); + res_irq =platform_get_resource (pdev,IORESOURCE_IRQ ,0 ); +if (!res_mem || !res_irq ||resource_size (res_mem) <IRQ_MEM_SIZE ) +return -ENODEV ; + + host =devm_kzalloc (&pdev->dev,sizeof (*host),GFP_KERNEL ); +if (!host) +return -ENODEV ; + + host->base =devm_ioremap_resource (&pdev->dev, res_mem); +if (!host->base) { +dev_err (&pdev->dev,"Failed to ioremap %p\n" , host->base); +return -EFAULT ; + } + + host->domain =irq_domain_add_linear (np,LP8X4X_NUM_IRQ_DEFAULT , + &lp8x4x_irq_domain_ops, host);
drivers/irqchip/irq-lp8x4x.c line 197
Quoted 10 lines
drivers/irqchip/irq-lp8x4x.c new file +10
-0+if (!host->domain) { +dev_err (&pdev->dev,"Failed to add IRQ domain\n" ); +return -ENOMEM ; + } + +for (i =0 ; i <LP8X4X_NUM_IRQ_DEFAULT ; i++) { + err =irq_create_mapping (host->domain, i); +if (err <0 ) +dev_err (&pdev->dev,"Failed to map IRQ %i\n" , i); + }
I'd expect a comment here, stating that this will need to be removed once PXA is converted to DT.
Quoted 21 lines
drivers/irqchip/irq-lp8x4x.c new file +20
-0+ +/* Initialize chip registers */ +iowrite8 (0 , host->base +CLRRISEINT ); +iowrite8 (0 , host->base +ENRISEINT ); +iowrite8 (0 , host->base +CLRFALLINT ); +iowrite8 (0 , host->base +ENFALLINT ); +iowrite8 (0 , host->base +CLRHILVINT ); +iowrite8 (0 , host->base +ENHILVINT ); +iowrite8 (0 , host->base +ENSYSINT ); +iowrite8 (0 , host->base +SECOINT ); + +irq_set_handler_data (res_irq->start, host); +irq_set_chained_handler (res_irq->start, lp8x4x_irq_handler); + +return 0 ; +} + +static struct platform_driver lp8x4x_irq_driver = { + .probe = lp8x4x_irq_probe, + .driver = {
drivers/irqchip/irq-lp8x4x.c line 227
Quoted 10 lines
drivers/irqchip/irq-lp8x4x.c new file +10
-0+ .name = "irq-lp8x4x", + .of_match_table = lp8x4x_irq_dt_ids, + }, +}; + +static int __init lp8x4x_irq_init (void ) +{ +return platform_driver_register (&lp8x4x_irq_driver); +} +postcore_initcall (lp8x4x_irq_init);
Thanks,
M.
Signature · 1 line
Jazz is not dead. It just smells funny...
Rob Herring
maintainerRe: [PATCH v5] arm: pxa: support ICP DAS LP-8x4x FPGA irq
In reply to Sergei IanovichQuoted 77 lines · Sergei Ianovich
ICP DAS LP-8x4x contains FPGA chip. The chip functions as an interrupt source providing 16 additional interrupts among other things. The interrupt lines are muxed to a GPIO pin of a 2nd level PXA-GPIO interrupt controller. GPIO pins of the 2nd level controller are in turn muxed to a CPU interrupt line.
Until pxa is completely converted to device tree, it is impossible to use
IRQCHIP_DECLARE()and the irqdomain needs to added manually. Drivers for the on-CPU IRQs and GPIO-IRQs are loaded usingpostcore_initcall(). We need to have all irq domain drivers loaded prior to DT parsing in order to allow normal initialization of IRQ resources with DT.Signed-off-by Sergei Ianovich <[email protected]>Reviewed-by Linus Walleij <[email protected]>CC Arnd Bergmann <[email protected]>---
v4..v5
* constify structof_device_id
* drop irq number from handler signaturev3.2..v4
* move DTS binding to a different patch (8/21)v3.1..v3.2
fixes to apply Linus Walleij's "Reviewed-by":
* add kerneldoc comment for state container struct
* rename irq -> hwirq for clarity
* drop overzealous error checks from the hotpathsv3..v3.1
fixes according to Linus Walleij review comments:
* update commit message
* use state container instead of global variables
* get hardware irq nums fromirq_data, don't calculate them
* useBIT()macro
* add defines for system irq register masks
* replace cycle control variable with break
* use better names for resource variables
* add a linear domain instead of a legacy one
* useirq_create_mapping()instead ofirq_alloc_desc()v2..v3
* no changes (except number 09/16 -> 11/21)v0..v2
* extract irqchip and move todrivers/irqchip/
* use device tree
* use devm helpers where possible.../bindings/interrupt-controller/irq-lp8x4x.txt | 49 +++++ drivers/irqchip/Kconfig | 5 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-lp8x4x.c | 227 +++++++++++++++++++++ 4 files changed, 282 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt create mode 100644 drivers/irqchip/irq-lp8x4x.cDocumentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt new file +13
-0@@ -0,0 +1,49 @@ +ICP DAS LP-8x4x FPGA Interrupt Controller + +ICP DAS LP-8x4x contains FPGA chip. The chip functions as a interrupt +source providing 16 additional interrupts among other things. + +Required properties: +- compatible : should be "icpdas,irq-lp8x4x" + +- reg: physical base address of the controller and length of memory mapped + region. + +- interrupt-controller : identifies the node as an interrupt controller +
Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt line 23
Quoted 10 lines
Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt new file +10
-0+- #interrupt-cells : should be 1 + +- interrupts : should provide interrupt + +- interrupt-parent : should provide a link to interrupt controller either + explicitly and implicitly from a parent node + +Example: + + fpga: fpga@17000006 {
Nothing else in the fpga? In any case, this node should be named interrupt-controller@17000006.
Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt line 24
Quoted 1 line
Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt new file +1
-0+ compatible = "icpdas,irq-lp8x4x";
As pointed out in the uart binding, don't use wildcards here.
Quoted 16 lines
Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt new file +16
-0+ reg = <0x17000006 0x16>; + interrupt-parent = <&gpio>; + interrupts = <3 IRQ_TYPE_EDGE_RISING>; + #interrupt-cells = <1>; + interrupt-controller; + status = "okay"; + }; + + uart@17009050 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x17009050 0x10 + 0x17009030 0x02>; + interrupt-parent = <&fpga>; + interrupts = <13>; + status = "okay"; + };
A message that is not in the archive (sent off-list or not yet received): 20151219035802.GA28424@rob-hp-laptop
Re: [PATCH v5] arm: pxa: support ICP DAS LP-8x4x FPGA irq
Quoted 12 lines · Rob Herring
Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt line 23
Quoted 3 lines · Sergei Ianovich
Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt new file +3
-0+Example: + + fpga: fpga@17000006 {Nothing else in the fpga? In any case, this node should be named interrupt-controller@17000006.
Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt line 24
Quoted 1 line
Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt new file +1
-0+ compatible = "icpdas,irq-lp8x4x";As pointed out in the uart binding, don't use wildcards here.
Quoted 16 lines
Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt new file +6
-0+ reg = <0x17000006 0x16>; + interrupt-parent = <&gpio>; + interrupts = <3 IRQ_TYPE_EDGE_RISING>; + #interrupt-cells = <1>; + interrupt-controller; + status = "okay";Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt line 40
Quoted 10 lines
Documentation/devicetree/bindings/interrupt-controller/irq-lp8x4x.txt new file +10
-0+ }; + + uart@17009050 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x17009050 0x10 + 0x17009030 0x02>; + interrupt-parent = <&fpga>; + interrupts = <13>; + status = "okay"; + };
That was just an example. The actual binding in LP-8x4x is bigger:
fpga@5 {
compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>;
ranges = <0 5 0x3000000 0x10000>; interrupt-parent = <&fpgairq>;
rtc@901c {
compatible = "dallas,rtc-ds1302"; reg = <0x901c 0x1>; status = "okay";
};
sram@a000 {
compatible = "icpdas,sram-lp8x4x"; reg = <0xa000 0x1000 0x901e 0x1>;
partitions { #address-cells = <1>; #size-cells = <1>; };
};
fpgairq: irq@9006 {
compatible = "icpdas,irq-lp8x4x"; reg = <0x9006 0x16>; interrupt-parent = <&gpio>; interrupts = <3 IRQ_TYPE_EDGE_FALLING>; #interrupt-cells = <1>; interrupt-controller;
status = "okay";
};
uart@9050 {
compatible = "icpdas,uart-lp8x4x"; reg = <0x9050 0x10 0x9030 0x02>; interrupts = <13>; status = "okay";
};
uart@9060 {
compatible = "icpdas,uart-lp8x4x"; reg = <0x9060 0x10 0x9032 0x02>; interrupts = <14>; status = "okay";
};
uart@9070 {
compatible = "icpdas,uart-lp8x4x"; reg = <0x9070 0x10 0x9034 0x02>; interrupts = <15>; status = "okay";
};
backplane {
compatible = "icpdas,backplane-lp8x4x"; reg = <0x0 0x2
0x1000 0x10
0x2000 0x10
0x3000 0x10
0x4000 0x10
0x5000 0x10
0x6000 0x10
0x7000 0x10
0x8000 0x10
0x9002 0x2
0x9004 0x2
0x9046 0x2>; eeprom-gpios = <&gpio 4 0>;
};
};
--
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PATCH v6 1/1 arm: pxa: support ICP DAS LP-8x4x FPGA irq
In reply to Sergei IanovichICP DAS LP-8x4x contains FPGA chip. The chip functions as an interrupt source providing 16 additional interrupts among other things. The interrupt lines are muxed to a GPIO pin of a 2nd level PXA-GPIO interrupt controller. GPIO pins of the 2nd level controller are in turn muxed to a CPU interrupt line.
Until pxa is completely converted to device tree, it is impossible to use IRQCHIP_DECLARE() and the irqdomain needs to added manually. Drivers for the on-CPU IRQs and GPIO-IRQs are loaded using postcore_initcall(). We need to have all irq domain drivers loaded prior to DT parsing in order to allow normal initialization of IRQ resources with DT.
v5..v6
fixes according to Rob Herring review comments:
* drop wildcards in binding and file names
* rename alias 'fpga'->'fpga_irq'
fixes according to Marc Zyngier review comments:
* use writeb/readb not iowrite8/ioread8
* redefine 2nd mask using inversion on 1st
* add comments
v4..v5
* constify struct of_device_id
* drop irq number from handler signature
v3.2..v4
* move DTS binding to a different patch (8/21)
v3.1..v3.2
fixes to apply Linus Walleij's "Reviewed-by":
* add kerneldoc comment for state container struct
* rename irq -> hwirq for clarity
* drop overzealous error checks from the hotpaths
v3..v3.1
fixes according to Linus Walleij review comments:
* update commit message
* use state container instead of global variables
* get hardware irq nums from irq_data, don't calculate them
* use BIT() macro
* add defines for system irq register masks
* replace cycle control variable with break
* use better names for resource variables
* add a linear domain instead of a legacy one
* use irq_create_mapping() instead of irq_alloc_desc()
v2..v3
* no changes (except number 09/16 -> 11/21)
v0..v2
* extract irqchip and move to drivers/irqchip/
* use device tree
* use devm helpers where possible
--- .../interrupt-controller/icpdas-lp8x4x-irq.txt | 49 ++++ drivers/irqchip/Kconfig | 5 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-lp8841.c | 246 +++++++++++++++++++++ 4 files changed, 301 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/icpdas-lp8x4x-irq.txt create mode 100644 drivers/irqchip/irq-lp8841.c
Documentation/devicetree/bindings/interrupt-controller/icpdas-lp8x4x-irq.txt new file +49 -0
@@ -0,0 +1,49 @@ +ICP DAS LP-8841 FPGA Interrupt Controller + +ICP DAS LP-8841 contains FPGA chip. The chip functions as a interrupt +source providing 16 additional interrupts among other things. + +Required properties: +- compatible : should be "icpdas,lp8x4x-irq" + +- reg: physical base address of the controller and length of memory mapped + region. + +- interrupt-controller : identifies the node as an interrupt controller + +- #interrupt-cells : should be 1 + +- interrupts : should provide interrupt + +Optional properties: + +- interrupt-parent : should provide a link to interrupt controller either + explicitly and implicitly from a parent node + +Example: + +fpgairq: irq@9006 { + compatible = "icpdas,lp8841-irq"; + reg = <0x9006 0x16>; + interrupt-parent = <&gpio>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + #interrupt-cells = <1>; + interrupt-controller; + status = "okay"; +}; + +serial@9050 { + compatible = "icpdas,lp8841-uart"; + reg = <0x9050 0x10 + 0x9030 0x02>; + interrupts = <13>; + status = "okay"; +}; + +serial@9060 { + compatible = "icpdas,lp8841-uart"; + reg = <0x9060 0x10 + 0x9032 0x02>; + interrupts = <14>; + status = "okay"; +};
drivers/irqchip/Kconfig +5 -0
@@ -218,3 +218,8 @@ config IRQ_MXS def_bool y if MACH_ASM9260 || ARCH_MXS select IRQ_DOMAIN select STMP_DEVICE + +config LP8841_IRQ + bool + def_bool y if MACH_PXA27X_DT + select IRQ_DOMAIN
drivers/irqchip/Makefile +1 -0
@@ -59,3 +59,4 @@ obj-$(CONFIG_ARCH_SA1100) += irq-sa11x0.o obj-$(CONFIG_INGENIC_IRQ) += irq-ingenic.o obj-$(CONFIG_IMX_GPCV2) += irq-imx-gpcv2.o obj-$(CONFIG_PIC32_EVIC) += irq-pic32-evic.o +obj-$(CONFIG_LP8841_IRQ) += irq-lp8841.o
drivers/irqchip/irq-lp8841.c new file +246 -0
246 lines not on this page · raw message
Signature · 1 line
2.7.0
Re: [PATCH v6] arm: pxa: support ICP DAS LP-8x4x FPGA irq
Hi Sergei,
Marc, Rob, please see below.
Quoted 1 line · Sergei Ianovich
nit: Subject line of the patch should match 'irqchip/lp8841: [A-Z].*'
Quoted 13 lines
ICP DAS LP-8x4x contains FPGA chip. The chip functions as an interrupt source providing 16 additional interrupts among other things. The interrupt lines are muxed to a GPIO pin of a 2nd level PXA-GPIO interrupt controller. GPIO pins of the 2nd level controller are in turn muxed to a CPU interrupt line.
Until pxa is completely converted to device tree, it is impossible to use
IRQCHIP_DECLARE()and the irqdomain needs to added manually. Drivers for the on-CPU IRQs and GPIO-IRQs are loaded usingpostcore_initcall(). We need to have all irq domain drivers loaded prior to DT parsing in order to allow normal initialization of IRQ resources with DT.
Quoted 2 lines
Signed-off-by Sergei Ianovich <[email protected]>Reviewed-by Linus Walleij <[email protected]>
nit: From here, down should be below the '---' so that it isn't a part of the commit log. We add a link to the commit log that points to the patch submission in the mailinglist archives. So curious folks have quick access to this info.
Quoted 42 lines
CC Arnd Bergmann <[email protected]>CC Rob Herring <[email protected]>CC Marc Zyngier <[email protected]>v5..v6
fixes according to Rob Herring review comments:
* drop wildcards in binding and file names
* rename alias 'fpga'->'fpga_irq'fixes according to Marc Zyngier review comments:
* use writeb/readb not iowrite8/ioread8
* redefine 2nd mask using inversion on 1st
* add commentsv4..v5
* constify structof_device_id
* drop irq number from handler signaturev3.2..v4
* move DTS binding to a different patch (8/21)v3.1..v3.2
fixes to apply Linus Walleij's "Reviewed-by":
* add kerneldoc comment for state container struct
* rename irq -> hwirq for clarity
* drop overzealous error checks from the hotpathsv3..v3.1
fixes according to Linus Walleij review comments:
* update commit message
* use state container instead of global variables
* get hardware irq nums fromirq_data, don't calculate them
* useBIT()macro
* add defines for system irq register masks
* replace cycle control variable with break
* use better names for resource variables
* add a linear domain instead of a legacy one
* useirq_create_mapping()instead ofirq_alloc_desc()v2..v3
* no changes (except number 09/16 -> 11/21)
Quoted 7 lines
v0..v2
* extract irqchip and move todrivers/irqchip/
* use device tree
* use devm helpers where possible---
iow, it should be moved here.
Quoted 7 lines
.../interrupt-controller/icpdas-lp8x4x-irq.txt | 49 ++++ drivers/irqchip/Kconfig | 5 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-lp8841.c | 246 +++++++++++++++++++++ 4 files changed, 301 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/icpdas-lp8x4x-irq.txt create mode 100644 drivers/irqchip/irq-lp8841.c
I don't seem to have the previous versions, and their threads, in my email archive. From the changelog, it looks like Marc and Rob have been reviewing this most recently.
If you guys could give me an Acked-by/Reviewed-by, I'll go ahead and queue this up for v4.6.
I'll fix up the Subject line and the commit log when I bring it in. I'll be adding the tags anyway. No need to resubmit.
thx,
Jason.
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Marc Zyngier
Acked-byRe: [PATCH v6] arm: pxa: support ICP DAS LP-8x4x FPGA irq
Quoted 94 lines · Jason Cooper
Hi Sergei,
Marc, Rob, please see below.
Quoted 1 line · Sergei Ianovich
nit: Subject line of the patch should match 'irqchip/lp8841: [A-Z].*'
Quoted 13 lines
ICP DAS LP-8x4x contains FPGA chip. The chip functions as an interrupt source providing 16 additional interrupts among other things. The interrupt lines are muxed to a GPIO pin of a 2nd level PXA-GPIO interrupt controller. GPIO pins of the 2nd level controller are in turn muxed to a CPU interrupt line.
Until pxa is completely converted to device tree, it is impossible to use
IRQCHIP_DECLARE()and the irqdomain needs to added manually. Drivers for the on-CPU IRQs and GPIO-IRQs are loaded usingpostcore_initcall(). We need to have all irq domain drivers loaded prior to DT parsing in order to allow normal initialization of IRQ resources with DT.Quoted 2 lines
Signed-off-by Sergei Ianovich <[email protected]>Reviewed-by Linus Walleij <[email protected]>nit: From here, down should be below the '---' so that it isn't a part of the commit log. We add a link to the commit log that points to the patch submission in the mailinglist archives. So curious folks have quick access to this info.
Quoted 42 lines
CC Arnd Bergmann <[email protected]>CC Rob Herring <[email protected]>CC Marc Zyngier <[email protected]>v5..v6
fixes according to Rob Herring review comments:
* drop wildcards in binding and file names
* rename alias 'fpga'->'fpga_irq'fixes according to Marc Zyngier review comments:
* use writeb/readb not iowrite8/ioread8
* redefine 2nd mask using inversion on 1st
* add commentsv4..v5
* constify structof_device_id
* drop irq number from handler signaturev3.2..v4
* move DTS binding to a different patch (8/21)v3.1..v3.2
fixes to apply Linus Walleij's "Reviewed-by":
* add kerneldoc comment for state container struct
* rename irq -> hwirq for clarity
* drop overzealous error checks from the hotpathsv3..v3.1
fixes according to Linus Walleij review comments:
* update commit message
* use state container instead of global variables
* get hardware irq nums fromirq_data, don't calculate them
* useBIT()macro
* add defines for system irq register masks
* replace cycle control variable with break
* use better names for resource variables
* add a linear domain instead of a legacy one
* useirq_create_mapping()instead ofirq_alloc_desc()v2..v3
* no changes (except number 09/16 -> 11/21)Quoted 7 lines
v0..v2
* extract irqchip and move todrivers/irqchip/
* use device tree
* use devm helpers where possible---
iow, it should be moved here.
Quoted 7 lines
.../interrupt-controller/icpdas-lp8x4x-irq.txt | 49 ++++ drivers/irqchip/Kconfig | 5 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-lp8841.c | 246 +++++++++++++++++++++ 4 files changed, 301 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/icpdas-lp8x4x-irq.txt create mode 100644 drivers/irqchip/irq-lp8841.cI don't seem to have the previous versions, and their threads, in my email archive. From the changelog, it looks like Marc and Rob have been reviewing this most recently.
Quoted 5 lines
If you guys could give me an Acked-by/Reviewed-by, I'll go ahead and queue this up for v4.6.
I'll fix up the Subject line and the commit log when I bring it in. I'll be adding the tags anyway. No need to resubmit.
Looks OK to me:
M.
Signature · 5 lines
Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
Rob Herring
maintainerRe: [PATCH v6] arm: pxa: support ICP DAS LP-8x4x FPGA irq
In reply to Sergei IanovichQuoted 76 lines · Sergei Ianovich
ICP DAS LP-8x4x contains FPGA chip. The chip functions as an interrupt source providing 16 additional interrupts among other things. The interrupt lines are muxed to a GPIO pin of a 2nd level PXA-GPIO interrupt controller. GPIO pins of the 2nd level controller are in turn muxed to a CPU interrupt line.
Until pxa is completely converted to device tree, it is impossible to use
IRQCHIP_DECLARE()and the irqdomain needs to added manually. Drivers for the on-CPU IRQs and GPIO-IRQs are loaded usingpostcore_initcall(). We need to have all irq domain drivers loaded prior to DT parsing in order to allow normal initialization of IRQ resources with DT.Signed-off-by Sergei Ianovich <[email protected]>Reviewed-by Linus Walleij <[email protected]>CC Arnd Bergmann <[email protected]>CC Rob Herring <[email protected]>CC Marc Zyngier <[email protected]>v5..v6
fixes according to Rob Herring review comments:
* drop wildcards in binding and file names
* rename alias 'fpga'->'fpga_irq'fixes according to Marc Zyngier review comments:
* use writeb/readb not iowrite8/ioread8
* redefine 2nd mask using inversion on 1st
* add commentsv4..v5
* constify structof_device_id
* drop irq number from handler signaturev3.2..v4
* move DTS binding to a different patch (8/21)v3.1..v3.2
fixes to apply Linus Walleij's "Reviewed-by":
* add kerneldoc comment for state container struct
* rename irq -> hwirq for clarity
* drop overzealous error checks from the hotpathsv3..v3.1
fixes according to Linus Walleij review comments:
* update commit message
* use state container instead of global variables
* get hardware irq nums fromirq_data, don't calculate them
* useBIT()macro
* add defines for system irq register masks
* replace cycle control variable with break
* use better names for resource variables
* add a linear domain instead of a legacy one
* useirq_create_mapping()instead ofirq_alloc_desc()v2..v3
* no changes (except number 09/16 -> 11/21)v0..v2
* extract irqchip and move todrivers/irqchip/
* use device tree
* use devm helpers where possible--- .../interrupt-controller/icpdas-lp8x4x-irq.txt | 49 ++++ drivers/irqchip/Kconfig | 5 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-lp8841.c | 246 +++++++++++++++++++++ 4 files changed, 301 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/icpdas-lp8x4x-irq.txt create mode 100644 drivers/irqchip/irq-lp8841.cDocumentation/devicetree/bindings/interrupt-controller/icpdas-lp8x4x-irq.txt new file +0
-0
Documentation/devicetree/bindings/interrupt-controller/icpdas-lp8x4x-irq.txt line 7
Quoted 7 lines
Documentation/devicetree/bindings/interrupt-controller/icpdas-lp8x4x-irq.txt new file +7
-0@@ -0,0 +1,49 @@ +ICP DAS LP-8841 FPGA Interrupt Controller + +ICP DAS LP-8841 contains FPGA chip. The chip functions as a interrupt +source providing 16 additional interrupts among other things. + +Required properties: +- compatible : should be "icpdas,lp8x4x-irq"
You've still got wildcards here. Seems to be an oversight as the example and code have "icpdas,lp8841-irq".
Quoted 8 lines
Documentation/devicetree/bindings/interrupt-controller/icpdas-lp8x4x-irq.txt new file +8
-0+ +- reg: physical base address of the controller and length of memory mapped + region. + +- interrupt-controller : identifies the node as an interrupt controller + +- #interrupt-cells : should be 1 +
Documentation/devicetree/bindings/interrupt-controller/icpdas-lp8x4x-irq.txt line 25
Quoted 10 lines
Documentation/devicetree/bindings/interrupt-controller/icpdas-lp8x4x-irq.txt new file +10
-0+- interrupts : should provide interrupt + +Optional properties: + +- interrupt-parent : should provide a link to interrupt controller either + explicitly and implicitly from a parent node + +Example: + +fpgairq: irq@9006 {
Still not right... interrupt-controller@9006
Quoted 14 lines
Documentation/devicetree/bindings/interrupt-controller/icpdas-lp8x4x-irq.txt new file +14
-0+ compatible = "icpdas,lp8841-irq"; + reg = <0x9006 0x16>; + interrupt-parent = <&gpio>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + #interrupt-cells = <1>; + interrupt-controller; + status = "okay"; +}; + +serial@9050 { + compatible = "icpdas,lp8841-uart"; + reg = <0x9050 0x10 + 0x9030 0x02>; + interrupts = <13>;
Documentation/devicetree/bindings/interrupt-controller/icpdas-lp8x4x-irq.txt line 49
Quoted 10 lines
Documentation/devicetree/bindings/interrupt-controller/icpdas-lp8x4x-irq.txt new file +10
-0+ status = "okay"; +}; + +serial@9060 { + compatible = "icpdas,lp8841-uart"; + reg = <0x9060 0x10 + 0x9032 0x02>; + interrupts = <14>; + status = "okay"; +};
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PATCH v4 12/21 serial: support for 16550A serial ports on LP-8x4x
In reply to Sergei IanovichThe patch adds support for 3 additional LP-8x4x built-in serial ports.
The device can also host up to 8 extension cards with 4 serial ports on each card for a total of 35 ports. However, I don't have the hardware to test extension cards, so they are not supported, yet.
---
v3..v4
* move DTS bindings to a different patch (8/21) as suggested by Heikki Krogerus
v2..v3
* no changes (except number 10/16 -> 12/21)
v0..v2
* register platform driver instead of platform device
* use device tree
* use devm helpers where possible
.../devicetree/bindings/serial/lp8x4x-serial.txt | 35 +++++ arch/arm/configs/lp8x4x_defconfig | 1 + drivers/tty/serial/8250/8250_lp8x4x.c | 169 +++++++++++++++++++++ drivers/tty/serial/8250/Kconfig | 12 ++ drivers/tty/serial/8250/Makefile | 1 + 5 files changed, 218 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/lp8x4x-serial.txt create mode 100644 drivers/tty/serial/8250/8250_lp8x4x.c
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt new file +35 -0
@@ -0,0 +1,35 @@ +UART ports on ICP DAS LP-8x4x + +ICP DAS LP-8x4x contains three additional serial ports interfaced via +Analog Devices ADM213EA chips in addition to 3 serial ports on PXA CPU. + +Required properties: +- compatible : should be "icpdas,uart-lp8x4x" + +- reg : should provide 16 byte man IO memory region and 1 byte region for + termios + +- interrupts : should provide interrupt + +- interrupt-parent : should provide a link to interrupt controller either + explicitly or implicitly from a parent node + +Examples (from pxa27x-lp8x4x.dts): + + uart at 9050 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x9050 0x10 + 0x9030 0x02>; + interrupt-parent = <&fpgairg>; + interrupts = <13>; + status = "okay"; + }; + + uart at 9060 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x9060 0x10 + 0x9032 0x02>; + interrupt-parent = <&fpgairg>; + interrupts = <14>; + status = "okay"; + };
arch/arm/configs/lp8x4x_defconfig +1 -0
@@ -112,6 +112,7 @@ CONFIG_SERIAL_8250_EXTENDED=y CONFIG_SERIAL_8250_MANY_PORTS=y CONFIG_SERIAL_8250_SHARE_IRQ=y CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_8250_LP8X4X=m CONFIG_HW_RANDOM=y CONFIG_I2C=m # CONFIG_I2C_COMPAT is not set
drivers/tty/serial/8250/8250_lp8x4x.c new file +169 -0
169 lines not on this page · raw message
drivers/tty/serial/8250/Kconfig +12 -0
@@ -311,3 +311,15 @@ config SERIAL_PXA can enable its onboard serial ports by enabling this option. If you choose M here, the module name will be 8250_pxa. + +config SERIAL_8250_LP8X4X + tristate "Support 16550A ports on ICP DAS LP-8x4x" + depends on OF && SERIAL_8250 && SERIAL_8250_MANY_PORTS && ARCH_PXA + select LP8X4X_IRQ + help + In addition to serial ports on PXA270 SoC, LP-8x4x has 1 dual + RS232/RS485 port, 1 RS485 port and 1 RS232 port. + + Say N here, unless you plan to run this kernel on a LP-8x4x system. + + If you choose M here, the module name will be 8250_lp8x4x.
drivers/tty/serial/8250/Makefile +1 -0
@@ -17,6 +17,7 @@ obj-$(CONFIG_SERIAL_8250_ACCENT) += 8250_accent.o obj-$(CONFIG_SERIAL_8250_BOCA) += 8250_boca.o obj-$(CONFIG_SERIAL_8250_EXAR_ST16C554) += 8250_exar_st16c554.o obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o +obj-$(CONFIG_SERIAL_8250_LP8X4X) += 8250_lp8x4x.o obj-$(CONFIG_SERIAL_8250_FSL) += 8250_fsl.o obj-$(CONFIG_SERIAL_8250_DW) += 8250_dw.o obj-$(CONFIG_SERIAL_8250_EM) += 8250_em.o
Signature · 1 line
1.8.4.2
Re: [PATCH v4 12/21] serial: support for 16550A serial ports on LP-8x4x
Quoted 17 lines
drivers/tty/serial/8250/8250_lp8x4x.c new file +17
-0+ baud =uart_get_baud_rate (port, termios, old, + port->uartclk /16 /0xffff , + port->uartclk /16 ); +switch (baud) { +case 2400 : + len |=1 ; +break ; +case 4800 : + len |=2 ; +break ; +case 19200 : + len |=4 ; +break ; +case 38400 : + len |=5 ; +break ; +case 57600 :
drivers/tty/serial/8250/8250_lp8x4x.c line 90
Quoted 10 lines
drivers/tty/serial/8250/8250_lp8x4x.c new file +10
-0+ len |=6 ; +break ; +case 115200 : + len |=7 ; +break ; +case 9600 : +default : + len |=3 ; +break ; + };
Some explanation of this would be useful - eg why is it set to 7 for 115200 baud and 3 for 115201 baud ?
Re: [PATCH v4 12/21] serial: support for 16550A serial ports on LP-8x4x
Quoted 22 lines · One Thousand Gnomes
Quoted 22 lines
drivers/tty/serial/8250/8250_lp8x4x.c new file +22
-0+ baud =uart_get_baud_rate (port, termios, old, + port->uartclk /16 /0xffff , + port->uartclk /16 ); +switch (baud) { +case 2400 : + len |=1 ; +break ; +case 4800 : + len |=2 ; +break ; +case 19200 : + len |=4 ; +break ; +case 38400 : + len |=5 ; +break ; +case 57600 : + len |=6 ; +break ; +case 115200 : + len |=7 ; +break ;
Quoted 8 lines
drivers/tty/serial/8250/8250_lp8x4x.c line 90
Quoted 5 lines
drivers/tty/serial/8250/8250_lp8x4x.c new file +5
-0+case 9600 : +default : + len |=3 ; +break ; + };Some explanation of this would be useful - eg why is it set to 7 for 115200 baud and 3 for 115201 baud ?
I am not related to the device vendor in any way, so please take my answers for what they are worth.
It seems that there is not enough pins to properly connect the chips to the memory bus and just you the standard 8250 UART driver. Instead, clock divisor is set using this register.
So, if you know you're asking for (115200) you get it. If you don't or guess (115201), you get the default 9600.
This is a policy, it may not be the right way to write a driver, but it is cheap and it works.
Re: [PATCH v4 12/21] serial: support for 16550A serial ports on LP-8x4x
Quoted 32 lines · On Wed, 16 Apr 2014 23:01:47 +0400 Sergei Ianovich <[email protected]> wrote:
Quoted 22 lines · One Thousand Gnomes
Quoted 22 lines
drivers/tty/serial/8250/8250_lp8x4x.c new file +22
-0+ baud =uart_get_baud_rate (port, termios, old, + port->uartclk /16 /0xffff , + port->uartclk /16 ); +switch (baud) { +case 2400 : + len |=1 ; +break ; +case 4800 : + len |=2 ; +break ; +case 19200 : + len |=4 ; +break ; +case 38400 : + len |=5 ; +break ; +case 57600 : + len |=6 ; +break ; +case 115200 : + len |=7 ; +break ;Quoted 8 lines
drivers/tty/serial/8250/8250_lp8x4x.c line 90
Quoted 5 lines
drivers/tty/serial/8250/8250_lp8x4x.c new file +5
-0+case 9600 : +default : + len |=3 ; +break ; + };Some explanation of this would be useful - eg why is it set to 7 for 115200 baud and 3 for 115201 baud ?
Quoted 5 lines
I am not related to the device vendor in any way, so please take my answers for what they are worth.
It seems that there is not enough pins to properly connect the chips to the memory bus and just you the standard 8250 UART driver. Instead, clock divisor is set using this register.
So, if you know you're asking for (115200) you get it. If you don't or guess (115201), you get the default 9600.
Thats not quite what the code actually implements though.
Quoted 1 line
This is a policy, it may not be the right way to write a driver, but it is cheap and it works.
If thats how the hardware works and only supports a few fixed rates then fine, but for default: you need to actually update he baudrate in the passed termios struct so that the userspace knows its request was not matched.
Take a look how the standard 8250 termios does it.
Also looking at this and some of the other serial bits I see no dependencies on the problematic DMA driver, so does that mean you've got a set of pieces that can be submitted anyway while the DMA driver discussion continues ?
Alan
Re: [PATCH v4 12/21] serial: support for 16550A serial ports on LP-8x4x
Quoted 50 lines · One Thousand Gnomes
Quoted 32 lines · On Wed, 16 Apr 2014 23:01:47 +0400 Sergei Ianovich <[email protected]> wrote:
Quoted 22 lines · One Thousand Gnomes
Quoted 22 lines
drivers/tty/serial/8250/8250_lp8x4x.c new file +22
-0+ baud =uart_get_baud_rate (port, termios, old, + port->uartclk /16 /0xffff , + port->uartclk /16 ); +switch (baud) { +case 2400 : + len |=1 ; +break ; +case 4800 : + len |=2 ; +break ; +case 19200 : + len |=4 ; +break ; +case 38400 : + len |=5 ; +break ; +case 57600 : + len |=6 ; +break ; +case 115200 : + len |=7 ; +break ;Quoted 8 lines
drivers/tty/serial/8250/8250_lp8x4x.c line 90
Quoted 5 lines
drivers/tty/serial/8250/8250_lp8x4x.c new file +5
-0+case 9600 : +default : + len |=3 ; +break ; + };Some explanation of this would be useful - eg why is it set to 7 for 115200 baud and 3 for 115201 baud ?
Quoted 1 line
I am not related to the device vendor in any way, so please take my
answers for what they are worth.
Quoted 2 lines
It seems that there is not enough pins to properly connect the chips
to the memory bus and just you the standard 8250 UART driver. Instead, clock divisor is set using this register.
Quoted 2 lines
So, if you know you're asking for (115200) you get it. If you don't
or guess (115201), you get the default 9600.
Thats not quite what the code actually implements though.
Quoted 1 line
This is a policy, it may not be the right way to write a driver, but
it is cheap and it works.
Quoted 7 lines
If thats how the hardware works and only supports a few fixed rates then
fine, but for default: you need to actually update he baudrate in the passed termios struct so that the userspace knows its request was not matched.Take a look how the standard 8250 termios does it.
I will. I've tested the driver by setting termios from userspace. There was no chance to ask for arbitrary rate, so I didn't think much about this case.
Quoted 5 lines
Also looking at this and some of the other serial bits I see no dependencies on the problematic DMA driver, so does that mean you've got
a set of pieces that can be submitted anyway while the DMA driver discussion continues ?
Yes, getting each peace in will reduce the support burden.
The degree of interdependence varies from feature to feature. rtc, mtd, irq and serial could be taken independently.
The main patch is #8. It requires #1-7. The is problem with DMA is one of policy, not technical one. It is explained in #6-7 in details.
Everything in the misc depends on bus. But the bus is very simple. There is even no interrupts.
PATCH v4 13/21 misc: support for LP-8x4x custom parallel bus
In reply to Sergei IanovichThis patch implements probing for the bus and reporting the number of available expansion slots.
---
v3..v4
* move DTS binding to a different patch (8/21)
v2..v3
* fixed goto after bus_register
* number change (11/16 -> 13/21)
v0..v2
* use device tree
* use devm helpers where possible
.../devicetree/bindings/misc/lp8x4x-bus.txt | 16 ++ Documentation/misc-devices/lp8x4x_bus.txt | 30 ++++ arch/arm/configs/lp8x4x_defconfig | 1 + drivers/misc/Kconfig | 13 ++ drivers/misc/Makefile | 1 + drivers/misc/lp8x4x_bus.c | 167 +++++++++++++++++++++ 6 files changed, 228 insertions(+) create mode 100644 Documentation/devicetree/bindings/misc/lp8x4x-bus.txt create mode 100644 Documentation/misc-devices/lp8x4x_bus.txt create mode 100644 drivers/misc/lp8x4x_bus.c
Documentation/devicetree/bindings/misc/lp8x4x-bus.txt new file +16 -0
@@ -0,0 +1,16 @@ +Custom parallel bus on ICP DAS LP-8x4x industrial computers + +See Documentation/misc-devices/lp8x4x_bus.txt for details. + +Required properties: +- compatible : should be "icpdas,backplane-lp8x4x" + +- reg: physical base address of the slot count register and the length + of the memory mapped region. + +Example: + + backplane { + compatible = "icpdas,backplane-lp8x4x"; + reg = <0x17009046 0x2>; + };
Documentation/misc-devices/lp8x4x_bus.txt new file +30 -0
@@ -0,0 +1,30 @@ +Kernel driver lpx8x4x_bus +====================== + +Supported hardare: +Custom parallel bus on ICP DAS LP-8x4x industrial computers + +Data sheet: +Not freely available + +Author: +Sergei Ianovich <[email protected]> + +Description +----------- + +http://www.icpdas.com/root/product/solutions/pac/linpac/lp-8x4x_hardware.html + +LP-8x4x is an ARM-based industrial computer with a custom parallel bus to +connect expansion modules with digital input/output, analog input/output, +serial, CAN and other types of ports. + +The bus is implemented by a FPGA. + +SYSFS +----- + +/sys/bus/icpdas/devices/backplane: + +slot_count + RO - shows total number of expansion slots on the device
arch/arm/configs/lp8x4x_defconfig +1 -0
@@ -62,6 +62,7 @@ CONFIG_PROC_DEVICETREE=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=2 CONFIG_EEPROM_AT24=m +CONFIG_LP8X4X_BUS=m CONFIG_SCSI=y # CONFIG_SCSI_PROC_FS is not set CONFIG_BLK_DEV_SD=y
drivers/misc/Kconfig +13 -0
@@ -515,6 +515,19 @@ config SRAM the genalloc API. It is supposed to be used for small on-chip SRAM areas found on many SoCs. +config LP8X4X_BUS + tristate "ICP DAS LP-8x4x industrial IO bus" + depends on OF && ARCH_PXA + select SYSFS + ---help--- + This is a driver for ICP DAS LP-8x4x programmable automation + controller. It exposes a custom parallel bus. The bus services + data acquisition and control modules. + + Say N, unless you plan to run this kernel on a LP-8x4x system. + + If you say M here, the module will be called lp8x4x_bus. + source "drivers/misc/c2port/Kconfig" source "drivers/misc/eeprom/Kconfig" source "drivers/misc/cb710/Kconfig"
drivers/misc/Makefile +1 -0
@@ -55,3 +55,4 @@ obj-$(CONFIG_SRAM) += sram.o obj-y += mic/ obj-$(CONFIG_GENWQE) += genwqe/ obj-$(CONFIG_ECHO) += echo/ +obj-$(CONFIG_LP8X4X_BUS) += lp8x4x_bus.o
drivers/misc/lp8x4x_bus.c new file +167 -0
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1.8.4.2
Re: [PATCH v4 13/21] misc: support for LP-8x4x custom parallel bus
Quoted 2 lines · On Wed, 16 Apr 2014 21:17:18 +0400 Sergei Ianovich <[email protected]> wrote:
This patch implements probing for the bus and reporting the number of available expansion slots.
This appears to be a bus not a misc device. I don't think it belongs in misc. As you've got devices on this bus (or nailed into the 'bus' driver) perhaps this belongs as drivers/platform/lp8x4x or similar with any specific drivers split out - or even drivers/lp8x4x if there will be more of them and more than one platform using it ?
Alan
Arnd Bergmann
maintainerRe: [PATCH v4 13/21] misc: support for LP-8x4x custom parallel bus
Quoted 11 lines · On Wednesday 16 April 2014 19:41:09 One Thousand Gnomes wrote:
Quoted 2 lines · On Wed, 16 Apr 2014 21:17:18 +0400 Sergei Ianovich <[email protected]> wrote:
This patch implements probing for the bus and reporting the number of available expansion slots.
This appears to be a bus not a misc device. I don't think it belongs in misc. As you've got devices on this bus (or nailed into the 'bus' driver) perhaps this belongs as
drivers/platform/lp8x4xor similar with any specific drivers split out - or evendrivers/lp8x4xif there will be more of them and more than one platform using it ?
We have drivers/bus now, I think it could fit well in there.
Arnd
Re: [PATCH v4 13/21] misc: support for LP-8x4x custom parallel bus
Quoted 7 lines · On Wed, 16 Apr 2014 20:42:39 +0200 Arnd Bergmann <[email protected]> wrote:
Quoted 6 lines · On Wednesday 16 April 2014 19:41:09 One Thousand Gnomes wrote:
Quoted 2 lines · On Wed, 16 Apr 2014 21:17:18 +0400 Sergei Ianovich <[email protected]> wrote:
This patch implements probing for the bus and reporting the number of available expansion slots.
Quoted 7 lines
Quoted 5 lines
This appears to be a bus not a misc device. I don't think it belongs in misc. As you've got devices on this bus (or nailed into the 'bus' driver) perhaps this belongs as
drivers/platform/lp8x4xor similar with any specific drivers split out - or evendrivers/lp8x4xif there will be more of them and more than one platform using it ?We have
drivers/busnow, I think it could fit well in there.
Agreed
Re: [PATCH v4 13/21] misc: support for LP-8x4x custom parallel bus
In reply to One Thousand GnomesQuoted 6 lines · One Thousand Gnomes
Quoted 2 lines · On Wed, 16 Apr 2014 21:17:18 +0400 Sergei Ianovich <[email protected]> wrote:
This patch implements probing for the bus and reporting the number of available expansion slots.
Quoted 7 lines
This appears to be a bus not a misc device. I don't think it belongs in misc. As you've got devices on this bus (or nailed into the 'bus' driver)
perhaps this belongs asdrivers/platform/lp8x4xor similar with any specific drivers split out - or evendrivers/lp8x4xif there will be more
of them and more than one platform using it ?
Thanks again for responding. I don't have a clear idea about proper code organization concering this bus.
The total number of possible bus devices is quite large, around 30. Half of them would take less than 10 extra lines to get support. The rest is more complicated.
LP-8x4x has several features that would require a misc device anyway. It has a rotary switch which isn't an input device, because it produces no interrupts. The device also has a similar DIP switch. In addition, it acts as a kind of RS-485-port-to-multi-RS-232-ports logical bridge. It has a multiplexer which allows to talk to several serial modules which support a custom protocol designed for RS-485 using a RS-232 port.
PATCH v4 14/21 misc: support for LP-8x4x rotary switch
In reply to Sergei Ianovich---
v3..v4
* move DTS binding to a different patch (8/21)
v2..v3
* new patch
.../devicetree/bindings/misc/lp8x4x-bus.txt | 8 ++-- Documentation/misc-devices/lp8x4x_bus.txt | 3 ++ drivers/misc/lp8x4x_bus.c | 43 ++++++++++++++++++---- 3 files changed, 43 insertions(+), 11 deletions(-)
Documentation/devicetree/bindings/misc/lp8x4x-bus.txt +5 -3
@@ -5,12 +5,14 @@ See Documentation/misc-devices/lp8x4x_bus.txt for details. Required properties: - compatible : should be "icpdas,backplane-lp8x4x" -- reg: physical base address of the slot count register and the length - of the memory mapped region. +- reg: physical base addresses and region lengths of + * the rotary switch + * the slot count register Example: backplane { compatible = "icpdas,backplane-lp8x4x"; - reg = <0x17009046 0x2>; + reg = <0x0 0x2 + 0x9046 0x2>; };
Documentation/misc-devices/lp8x4x_bus.txt +3 -0
@@ -26,5 +26,8 @@ SYSFS /sys/bus/icpdas/devices/backplane: +rotary + RO - shows position of LP-8x4x rotary switch (0-9) + slot_count RO - shows total number of expansion slots on the device
drivers/misc/lp8x4x_bus.c +35 -8
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1.8.4.2
PATCH v4 15/21 misc: support for LP-8x4x DIP switch
In reply to Sergei Ianovich---
v3..v4
* move DTS binding to a different patch (8/21)
v2..v3
* new patch
.../devicetree/bindings/misc/lp8x4x-bus.txt | 2 ++ Documentation/misc-devices/lp8x4x_bus.txt | 3 +++ drivers/misc/lp8x4x_bus.c | 26 ++++++++++++++++++++++ 3 files changed, 31 insertions(+)
Documentation/devicetree/bindings/misc/lp8x4x-bus.txt +2 -0
@@ -7,6 +7,7 @@ Required properties: - reg: physical base addresses and region lengths of * the rotary switch + * the 8bit DIP switch * the slot count register Example:
@@ -14,5 +15,6 @@ Example: backplane { compatible = "icpdas,backplane-lp8x4x"; reg = <0x0 0x2 + 0x9002 0x2 0x9046 0x2>; };
Documentation/misc-devices/lp8x4x_bus.txt +3 -0
@@ -26,6 +26,9 @@ SYSFS /sys/bus/icpdas/devices/backplane: +dip + RO - shows status of LP-8x4x 8bit DIP switch + rotary RO - shows position of LP-8x4x rotary switch (0-9)
drivers/misc/lp8x4x_bus.c +26 -0
@@ -26,6 +26,7 @@ struct lp8x4x_master {unsigned int slot_count;void *count_addr;void *rotary_addr; +void *dip_addr;struct device dev; };
@@ -67,9 +68,20 @@ static ssize_t rotary_show(struct device *dev,static DEVICE_ATTR_RO (rotary); +static ssize_t dip_show (struct device *dev, +struct device_attribute *attr,char *buf) +{ + struct lp8x4x_master *m = container_of(dev, struct lp8x4x_master, dev); + +return sprintf (buf,"0x%02x\n" ,ioread8 (m->dip_addr) ^0xff ); +} + +static DEVICE_ATTR_RO (dip); +static struct attribute *master_dev_attrs[] = { &dev_attr_slot_count.attr, &dev_attr_rotary.attr, + &dev_attr_dip.attr,NULL , };ATTRIBUTE_GROUPS (master_dev);
@@ -118,6 +130,20 @@ static int __init lp8x4x_bus_probe(struct platform_device *pdev) res =platform_get_resource (pdev,IORESOURCE_MEM , r++);if (!res) { +dev_err (&pdev->dev,"Failed to get DIP switch address\n" ); + err = -ENODEV ; + goto err_free; + } + + m->dip_addr =devm_ioremap_resource (&pdev->dev, res); +if (IS_ERR (m->dip_addr)) { +dev_err (&pdev->dev,"Failed to ioremap DIP switch address\n" ); + err =PTR_ERR (m->dip_addr); + goto err_free; + } + + res =platform_get_resource (pdev,IORESOURCE_MEM , r++); +if (!res) {dev_err (&pdev->dev,"could not get slot count address\n" ); err = -ENODEV ; goto err_free;
Signature · 1 line
1.8.4.2
PATCH v4 16/21 misc: support for writing to LP-8x4x EEPROM
In reply to Sergei Ianovichat24c128 write protection is implemented by a separate GPIO line. EEPROM driver doesn't provide this option, so we implement it in the board-specific device.
---
v3..v4
* move DTS binding to a different patch (8/21)
v2..v3
* new patch
.../devicetree/bindings/misc/lp8x4x-bus.txt | 3 ++ Documentation/misc-devices/lp8x4x_bus.txt | 3 ++ drivers/misc/lp8x4x_bus.c | 50 ++++++++++++++++++++++ 3 files changed, 56 insertions(+)
Documentation/devicetree/bindings/misc/lp8x4x-bus.txt +3 -0
@@ -10,6 +10,8 @@ Required properties: * the 8bit DIP switch * the slot count register +- eeprom-gpios : should point to active-low write enable GPIO + Example: backplane {
@@ -17,4 +19,5 @@ Example: reg = <0x0 0x2 0x9002 0x2 0x9046 0x2>; + eeprom-gpios = <&gpio 4 0>; };
Documentation/misc-devices/lp8x4x_bus.txt +3 -0
@@ -29,6 +29,9 @@ SYSFS dip RO - shows status of LP-8x4x 8bit DIP switch +eeprom_write_enable + RW - controls write access to board's EEPROM (1 - enable) + rotary RO - shows position of LP-8x4x rotary switch (0-9)
drivers/misc/lp8x4x_bus.c +50 -0
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1.8.4.2
PATCH v4 17/21 misc: support for serial slots in LP-8x4x
In reply to Sergei IanovichSerial modules (I-870xxW series) implement DCON protocol which allows one-master-many-slaves configuration over RS-485. When these modules are installed into the device, they could be accessed using the 2nd PXA built-in UART port (/dev/ttyS1). However, it seems that addresses are not processed by the modules. So the parallel bus needs to select which slot is connected.
---
v3..v4
* move DTS binding to a different patch (8/21)
v2..v3
* no changes (except number 12/16 -> 17/21)
v0..v2
* use device tree
* use devm helpers where possible
.../devicetree/bindings/misc/lp8x4x-bus.txt | 2 + Documentation/misc-devices/lp8x4x_bus.txt | 15 +++++- drivers/misc/lp8x4x_bus.c | 63 ++++++++++++++++++++++ 3 files changed, 79 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/misc/lp8x4x-bus.txt +2 -0
@@ -8,6 +8,7 @@ Required properties: - reg: physical base addresses and region lengths of * the rotary switch * the 8bit DIP switch + * the serial slot select register * the slot count register - eeprom-gpios : should point to active-low write enable GPIO
@@ -18,6 +19,7 @@ Example: compatible = "icpdas,backplane-lp8x4x"; reg = <0x0 0x2 0x9002 0x2 + 0x9004 0x2 0x9046 0x2>; eeprom-gpios = <&gpio 4 0>; };
Documentation/misc-devices/lp8x4x_bus.txt +14 -1
@@ -19,13 +19,26 @@ LP-8x4x is an ARM-based industrial computer with a custom parallel bus to connect expansion modules with digital input/output, analog input/output, serial, CAN and other types of ports. -The bus is implemented by a FPGA. +The bus is implemented by a FPGA. There are two major groups of expansion +modules: serial and parallel. + +Serial modules (I-870xxW series) implement DCON protocol which allows one- +master-many-slaves configuration over RS-485. When these modules are installed +into the device, they could be accessed using the 2nd PXA built-in UART port +(/dev/ttyS1). However, it seems that addresses are not processed by +the modules. So the parallel bus needs to select which slot is connected. SYSFS ----- /sys/bus/icpdas/devices/backplane: +active_slot + RW - connects the select slot for serial communications. If there + is a parallel module in the selected slot, it simply ignores + incoming packets. So it is safe to activate any available + slot. + dip RO - shows status of LP-8x4x 8bit DIP switch
drivers/misc/lp8x4x_bus.c +63 -0
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1.8.4.2
PATCH v4 18/21 misc: support for parallel slots in LP-8x4x
In reply to Sergei IanovichThis patch enumerates parallel modules in expansion slots and exposes model numbers via sysfs.
---
v3..v4
* move DTS binding to a different patch (8/21)
v2..v3
* no changes (except number 13/16 -> 18/21)
v0..v2
* use device tree
* use devm helpers where possible
.../devicetree/bindings/misc/lp8x4x-bus.txt | 9 ++ Documentation/misc-devices/lp8x4x_bus.txt | 8 ++ drivers/misc/lp8x4x_bus.c | 119 +++++++++++++++++++++ 3 files changed, 136 insertions(+)
Documentation/devicetree/bindings/misc/lp8x4x-bus.txt +9 -0
@@ -7,6 +7,7 @@ Required properties: - reg: physical base addresses and region lengths of * the rotary switch + * 8 plugable industrial IO slots * the 8bit DIP switch * the serial slot select register * the slot count register
@@ -18,6 +19,14 @@ Example: backplane { compatible = "icpdas,backplane-lp8x4x"; reg = <0x0 0x2 + 0x1000 0x10 + 0x2000 0x10 + 0x3000 0x10 + 0x4000 0x10 + 0x5000 0x10 + 0x6000 0x10 + 0x7000 0x10 + 0x8000 0x10 0x9002 0x2 0x9004 0x2 0x9046 0x2>;
Documentation/misc-devices/lp8x4x_bus.txt +8 -0
@@ -28,6 +28,9 @@ into the device, they could be accessed using the 2nd PXA built-in UART port (/dev/ttyS1). However, it seems that addresses are not processed by the modules. So the parallel bus needs to select which slot is connected. +Parallel modules allow much faster communication. There are accessed using +IO memory through the FPGA. Their ports are exposed via sysfs. + SYSFS -----
@@ -50,3 +53,8 @@ rotary slot_count RO - shows total number of expansion slots on the device + +/sys/bus/icpdas/devices/slot%02i: + +model + RO - shows expansion module model number
drivers/misc/lp8x4x_bus.c +119 -0
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1.8.4.2
PATCH v4 19/21 misc: support for I-8041 in LP-8x4x
In reply to Sergei IanovichStatus of I-8041 32 digital output channels can be managed via sysfs now.
http://www.icpdas.com/products/Remote_IO/i-8ke/i-8041w.htm
---
v3..v4
v2..v3
v0..v2
* no changes (except number 14/16 -> 19/21)
Documentation/misc-devices/lp8x4x_bus.txt | 4 ++ drivers/misc/lp8x4x_bus.c | 67 ++++++++++++++++++++++++++++++- 2 files changed, 69 insertions(+), 2 deletions(-)
Documentation/misc-devices/lp8x4x_bus.txt +4 -0
@@ -58,3 +58,7 @@ slot_count model RO - shows expansion module model number + +output_status + RW - set status of digital output channels on the module in + the expansion slot. Value can be read back.
drivers/misc/lp8x4x_bus.c +65 -2
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1.8.4.2
PATCH v4 20/21 misc: support for I-8042 in LP-8x4x
In reply to Sergei IanovichStatus of I-8042 16 digital output channels can be managed via sysfs.
Status of I-8042 16 digital input channels can be read via sysfs.
http://www.icpdas.com/products/Remote_IO/i-8ke/i-8042w.htm
---
v3..v4
v2..v3
v0..v2
* no changes (except number 15/16 -> 20/21)
Documentation/misc-devices/lp8x4x_bus.txt | 4 ++ drivers/misc/lp8x4x_bus.c | 76 ++++++++++++++++++++++++++++++- 2 files changed, 78 insertions(+), 2 deletions(-)
Documentation/misc-devices/lp8x4x_bus.txt +4 -0
@@ -59,6 +59,10 @@ slot_count model RO - shows expansion module model number +input_status + RO - get status of digital input channels on the module in + the expansion slot. + output_status RW - set status of digital output channels on the module in the expansion slot. Value can be read back.
drivers/misc/lp8x4x_bus.c +74 -2
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1.8.4.2
PATCH v4 21/21 misc: support for I-8024 in LP-8x4x
In reply to Sergei IanovichStatus of I-8042 4 analog output channels can be managed via sysfs.
http://www.icpdas.com/root/product/solutions/remote_io/rs-485/i-8k_i-87k/i-8024w.html
---
v3..v4
* no changes
v2..v3
* use usleep_range instead of custom nsleep
* number change (16/16 -> 21/21)
v0..v2
* no changes
Documentation/misc-devices/lp8x4x_bus.txt | 15 ++++++ drivers/misc/lp8x4x_bus.c | 78 +++++++++++++++++++++++++++++++ 2 files changed, 93 insertions(+)
Documentation/misc-devices/lp8x4x_bus.txt +15 -0
@@ -66,3 +66,18 @@ input_status output_status RW - set status of digital output channels on the module in the expansion slot. Value can be read back. + +analog_output + RW - set status of analog output channels on the module in + the expansion slot. Tested with voltage output. Bits 0-13: + 0x00c0 is -10.0V + 0x2000 is 0.0V + 0x3f40 is +10.0V + + So 1 unit of output is 1.25 mV. + + Bits 15 and 14 determine which channel to apply the value: + 0x0000 is channel 1 + 0x4000 is channel 2 + 0x8000 is channel 3 + 0xc000 is channel 4
drivers/misc/lp8x4x_bus.c +78 -0
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1.8.4.2
Re: [PATCH v4 21/21] misc: support for I-8024 in LP-8x4x
Quoted 2 lines · On Wed, 16 Apr 2014 21:17:26 +0400 Sergei Ianovich <[email protected]> wrote:
Status of I-8042 4 analog output channels can be managed via sysfs.
Surely this is an iio interface and should follow the same API as everyone else ?
Alan
Re: [PATCH v4 21/21] misc: support for I-8024 in LP-8x4x
Quoted 8 lines · One Thousand Gnomes
Quoted 2 lines · On Wed, 16 Apr 2014 21:17:26 +0400 Sergei Ianovich <[email protected]> wrote:
Status of I-8042 4 analog output channels can be managed via sysfs.
Surely this is an iio interface and should follow the same API as everyone else ?
Thanks for the feedback. It's the first response to this particular driver ever.
I've looked around the tree and found tons of industrial io device drivers in different places: drivers/iio, drivers/misc, drivers/staging/comedi to name a few.
I've closely examined a dozen or two of drivers, but of them was close enough for I-8024 in terms of speed. Its channel takes 0.1 us to set up from kernel. Real user space programs can setup all for channels in 1 us with interface provided by this patch. That's said I don't have data on time that it takes for output to stabilize at the desired levels.
I've chosen drivers/misc as a location that looked to provide the shortest path for my driver to land. The driver needs support for the bus, and here it can be in one driver.
It would be great to have some more detailed input on this issue.
Re: [PATCH v4 21/21] misc: support for I-8024 in LP-8x4x
Quoted 5 lines
I've closely examined a dozen or two of drivers, but of them was close enough for I-8024 in terms of speed. Its channel takes 0.1 us to set up from kernel. Real user space programs can setup all for channels in 1 us with interface provided by this patch. That's said I don't have data on time that it takes for output to stabilize at the desired levels.
I've chosen
drivers/miscas a location that looked to provide the shortest path for my driver to land. The driver needs support for the bus, and here it can be in one driver.It would be great to have some more detailed input on this issue.
IIO is where we are trying to standardise all the industrial control devices. There is stuff in places like misc for historical reasons.
Re: [PATCH v4 21/21] misc: support for I-8024 in LP-8x4x
Quoted 7 lines · One Thousand Gnomes
Quoted 1 line
I've closely examined a dozen or two of drivers, but of them was
close enough for I-8024 in terms of speed. Its channel takes 0.1 us to set up from kernel. Real user space programs can setup all for channels in 1 us with interface provided by this patch. That's said I don't have data on time that it takes for output to stabilize at the desired levels.
Quoted 1 line
Quoted 8 lines
Quoted 1 line
I've chosen
drivers/miscas a location that looked to provide theshortest path for my driver to land. The driver needs support for the bus, and here it can be in one driver.
Quoted 2 lines
It would be great to have some more detailed input on this issue.
IIO is where we are trying to standardise all the industrial control devices. There is stuff in places like misc for historical reasons.
Great. I'll rewrite the driver using IIO, but the bus issue needs to be settled first.
PATCH v5 1/1 serial: support for 16550A serial ports on LP-8x4x
In reply to Sergei IanovichThe patch adds support for 3 additional LP-8x4x built-in serial ports.
The device can also host up to 8 extension cards with 4 serial ports on each card for a total of 35 ports. However, I don't have the hardware to test extension cards, so they are not supported, yet.
---
v4..v5
* constify struct of_device_id
* drop .owner from struct platform_driver
* rewrite set_termios() baud rate hadnling as suggested by Alan Cox
v3..v4
* move DTS bindings to a different patch (8/21) as suggested by Heikki Krogerus
v2..v3
* no changes (except number 10/16 -> 12/21)
v0..v2
* register platform driver instead of platform device
* use device tree
* use devm helpers where possible
.../devicetree/bindings/serial/lp8x4x-serial.txt | 35 +++++ drivers/tty/serial/8250/8250_lp8x4x.c | 168 +++++++++++++++++++++ drivers/tty/serial/8250/Kconfig | 12 ++ drivers/tty/serial/8250/Makefile | 1 + 4 files changed, 216 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/lp8x4x-serial.txt create mode 100644 drivers/tty/serial/8250/8250_lp8x4x.c
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt new file +35 -0
@@ -0,0 +1,35 @@ +UART ports on ICP DAS LP-8x4x + +ICP DAS LP-8x4x contains three additional serial ports interfaced via +Analog Devices ADM213EA chips in addition to 3 serial ports on PXA CPU. + +Required properties: +- compatible : should be "icpdas,uart-lp8x4x" + +- reg : should provide 16 byte man IO memory region and 1 byte region for + termios + +- interrupts : should provide interrupt + +- interrupt-parent : should provide a link to interrupt controller either + explicitly or implicitly from a parent node + +Examples (from pxa27x-lp8x4x.dts): + + uart@9050 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x9050 0x10 + 0x9030 0x02>; + interrupt-parent = <&fpgairg>; + interrupts = <13>; + status = "okay"; + }; + + uart@9060 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x9060 0x10 + 0x9032 0x02>; + interrupt-parent = <&fpgairg>; + interrupts = <14>; + status = "okay"; + };
drivers/tty/serial/8250/8250_lp8x4x.c new file +168 -0
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drivers/tty/serial/8250/Kconfig +12 -0
@@ -387,3 +387,15 @@ config SERIAL_8250_PXA can enable its onboard serial ports by enabling this option. If you choose M here, the module name will be 8250_pxa. + +config SERIAL_8250_LP8X4X + tristate "Support 16550A ports on ICP DAS LP-8x4x" + depends on OF && SERIAL_8250 && SERIAL_8250_MANY_PORTS && ARCH_PXA + select LP8X4X_IRQ + help + In addition to serial ports on PXA270 SoC, LP-8x4x has 1 dual + RS232/RS485 port, 1 RS485 port and 1 RS232 port. + + Say N here, unless you plan to run this kernel on a LP-8x4x system. + + If you choose M here, the module name will be 8250_lp8x4x.
drivers/tty/serial/8250/Makefile +1 -0
@@ -18,6 +18,7 @@ obj-$(CONFIG_SERIAL_8250_ACCENT) += 8250_accent.o obj-$(CONFIG_SERIAL_8250_BOCA) += 8250_boca.o obj-$(CONFIG_SERIAL_8250_EXAR_ST16C554) += 8250_exar_st16c554.o obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o +obj-$(CONFIG_SERIAL_8250_LP8X4X) += 8250_lp8x4x.o obj-$(CONFIG_SERIAL_8250_FSL) += 8250_fsl.o obj-$(CONFIG_SERIAL_8250_DW) += 8250_dw.o obj-$(CONFIG_SERIAL_8250_EM) += 8250_em.o
Signature · 6 lines
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Arnd Bergmann
maintainerRe: [PATCH v5] serial: support for 16550A serial ports on LP-8x4x
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt line 7
Quoted 11 lines · On Wednesday 16 December 2015 00:04:45 Sergei Ianovich wrote:
index 0000000..5f9a4c1
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt new file +7
-0@@ -0,0 +1,35 @@ +UART ports on ICP DAS LP-8x4x + +ICP DAS LP-8x4x contains three additional serial ports interfaced via +Analog Devices ADM213EA chips in addition to 3 serial ports on PXA CPU. + +Required properties: +- compatible : should be "icpdas,uart-lp8x4x"
Compatible strings should not include a 'x' wildcard like this, better use the specific chip name.
Also, it sounds like you named them after the board vendor, which sounds wrong as the vendor part of the compatible string should be the whoever made that part (analog?)
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt line 15
Quoted 7 lines
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt new file +7
-0+- reg : should provide 16 byte man IO memory region and 1 byte region for + termios + +- interrupts : should provide interrupt + +- interrupt-parent : should provide a link to interrupt controller either + explicitly or implicitly from a parent node
interrupt-parent should be an optional property, or you can leave it out, as this is a standard property that can always be there when there is interrupts.
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt line 19
Quoted 3 lines
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt new file +3
-0+Examples (from pxa27x-lp8x4x.dts): + + uart@9050 {
By convention, the name should be 'serial', not 'uart'.
Arnd.
Re: [PATCH v5] serial: support for 16550A serial ports on LP-8x4x
Quoted 19 lines · Arnd Bergmann
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt line 7
Quoted 13 lines · On Wednesday 16 December 2015 00:04:45 Sergei Ianovich wrote:
index 0000000..5f9a4c1
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt new file +3
-0@@ -0,0 +1,35 @@ +UART ports on ICP DAS LP-8x4x + +ICP DAS LP-8x4x contains three additional serial ports interfacedvia
+Analog Devices ADM213EA chips in addition to 3 serial ports on PXA CPU.Documentation/devicetree/bindings/serial/lp8x4x-serial.txt new file +3
-0+ +Required properties: +- compatible : should be "icpdas,uart-lp8x4x"Compatible strings should not include a 'x' wildcard like this, better use
the specific chip name.
Quoted 5 lines
Also, it sounds like you named them after the board vendor, which sounds
wrong as the vendor part of the compatible string should be the whoever
made that part (analog?)
The chips themselves are standard, they would work with 8250_core if properly connected. However, they are not connected normally. Al least some of their config pins are wired to a different address region. So the driver is board-specific.
'x' wildcards in the name of the board seem important. There are devices made by the same vendor without 8 or 4 in their name. Those devices either are not shipped with linux or are base on a x86 platform.
Does this justify the choice of the compatible string?
Quoted 6 lines
Quoted 6 lines
+- reg : should provide 16 byte man IO memory region and 1 byte region for
+ termiosDocumentation/devicetree/bindings/serial/lp8x4x-serial.txt new file +3
-0+ +- interrupts : should provide interrupt +
Quoted 8 lines
Quoted 3 lines
+- interrupt-parent : should provide a link to interrupt controller either
+ explicitly or implicitly from a parent nodeinterrupt-parent should be an optional property, or you can leave it out,
as this is a standard property that can always be there when there is interrupts.
ok
Quoted 5 lines
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt line 19
Quoted 3 lines
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt new file +3
-0+Examples (from pxa27x-lp8x4x.dts): + + uart@9050 {By convention, the name should be 'serial', not 'uart'.
ok
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Arnd Bergmann
maintainerRe: [PATCH v5] serial: support for 16550A serial ports on LP-8x4x
Quoted 26 lines · On Wednesday 16 December 2015 11:04:57 Sergei Ianovich wrote:
Quoted 19 lines · Arnd Bergmann
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt line 7
Quoted 13 lines · On Wednesday 16 December 2015 00:04:45 Sergei Ianovich wrote:
index 0000000..5f9a4c1
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt new file +3
-0@@ -0,0 +1,35 @@ +UART ports on ICP DAS LP-8x4x + +ICP DAS LP-8x4x contains three additional serial ports interfacedvia
+Analog Devices ADM213EA chips in addition to 3 serial ports on PXA CPU.Documentation/devicetree/bindings/serial/lp8x4x-serial.txt new file +3
-0+ +Required properties: +- compatible : should be "icpdas,uart-lp8x4x"Compatible strings should not include a 'x' wildcard like this, better use
the specific chip name.Quoted 5 lines
Also, it sounds like you named them after the board vendor, which sounds
wrong as the vendor part of the compatible string should be the whoever
made that part (analog?)
Quoted 4 lines
The chips themselves are standard, they would work with 8250_core if properly connected. However, they are not connected normally. Al least some of their config pins are wired to a different address region. So the driver is board-specific.
Ok, I see.
Quoted 5 lines
'x' wildcards in the name of the board seem important. There are devices made by the same vendor without 8 or 4 in their name. Those devices either are not shipped with linux or are base on a x86 platform.
Does this justify the choice of the compatible string?
What I meant was that you should use the specific numbers of one machine, precisely for the reason you list above.
If there is e.g. a LP-8040 and a LP-8141 today, and you use lp8x4x in the compatible string to cover both, this will no longer work when the vendor comes out with a LP8047 that is completely different.
Instead, what you should do is to use the compatible string to identify one particular board (e.g. the first one that used this setup), and then list the other ones as compatible with this. You can also add the other board names in addition, e.g.
compatible = "icpdas,uart-lp8041", "icpdas,uart-lp8040";
for a lp8041 that is compatible with the lp8040. If it turns out later that they are not entirely compatible, we can work around this in the driver by checking for the lp8041 string that will be matched first, while the lp8040 can be used by the driver to match the entire family of compatible machines (no need to list every one in the driver).
Arnd
Re: [PATCH v5] serial: support for 16550A serial ports on LP-8x4x
Quoted 23 lines · Arnd Bergmann
Quoted 7 lines · On Wednesday 16 December 2015 11:04:57 Sergei Ianovich wrote:
Quoted 1 line · Arnd Bergmann
'x' wildcards in the name of the board seem important. There are
devices
made by the same vendor without 8 or 4 in their name. Those devices either are not shipped with linux or are base on a x86 platform.Does this justify the choice of the compatible string?
What I meant was that you should use the specific numbers of one machine,
precisely for the reason you list above.If there is e.g. a LP-8040 and a LP-8141 today, and you use lp8x4x in the compatible string to cover both, this will no longer work when the vendor comes out with a LP8047 that is completely different.
Instead, what you should do is to use the compatible string to identify
one particular board (e.g. the first one that used this setup), and then list the other ones as compatible with this. You can also add the other board names in addition, e.g.
Quoted 8 lines
compatible = "icpdas,uart-lp8041", "icpdas,uart-lp8040";
for a lp8041 that is compatible with the lp8040. If it turns out later that they are not entirely compatible, we can work around this in the driver by checking for the lp8041 string that will be matched first, while
the lp8040 can be used by the driver to match the entire family of compatible machines (no need to list every one in the driver).
I'll try to be more specific. This driver will support ports on LP-8081, LP-8141, LP-8441, LP-8841. Last time I checked the vendor was announcing a series with 3 as the last digit. They use lp8x4x name, eg. in documentation like LP-8x4x_ChangeLog.txt. They ship their proprietary SDK in lp8x4x_sdk_for_linux.tar. All of this implies that it is a single board.
Re: [PATCH v5] serial: support for 16550A serial ports on LP-8x4x
In reply to Arnd BergmannQuoted 7 lines · Arnd Bergmann
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt line 19
Quoted 3 lines · On Wednesday 16 December 2015 00:04:45 Sergei Ianovich wrote:
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt new file +3
-0+Examples (from pxa27x-lp8x4x.dts): + + uart@9050 {By convention, the name should be 'serial', not 'uart'.
arch/arm/boot/dts/pxa2xx.dtsi uses 'uart'. Should I change the names in the patch with dts file for LP-8xx?
Re: [PATCH v5] serial: support for 16550A serial ports on LP-8x4x
In reply to Sergei IanovichQuoted 7 lines · Sergei Ianovich
The patch adds support for 3 additional LP-8x4x built-in serial ports.
The device can also host up to 8 extension cards with 4 serial ports on each card for a total of 35 ports. However, I don't have the hardware to test extension cards, so they are not supported, yet.
Few nitpicks, though everything looks okay.
Quoted 123 lines
Signed-off-by Sergei Ianovich <[email protected]>Reviewed-by Heikki Krogerus <[email protected]>CC Alan Cox <[email protected]>---
v4..v5
* constify structof_device_id
* drop .owner from structplatform_driver
* rewriteset_termios()baud rate hadnling as suggested by Alan Coxv3..v4
* move DTS bindings to a different patch (8/21) as suggested by Heikki Krogerusv2..v3
* no changes (except number 10/16 -> 12/21)v0..v2
* register platform driver instead of platform device
* use device tree
* use devm helpers where possible.../devicetree/bindings/serial/lp8x4x-serial.txt | 35 +++++ drivers/tty/serial/8250/8250_lp8x4x.c | 168
+++++++++++++++++++++
drivers/tty/serial/8250/Kconfig | 12 ++ drivers/tty/serial/8250/Makefile | 1 +4 files changed, 216 insertions(+)create mode 100644
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt
create mode 100644drivers/tty/serial/8250/8250_lp8x4x.c(quoted diff) +0
-0serial.txt b/Documentation/devicetree/bindings/serial/lp8x4x- serial.txt
new file mode 100644
index 0000000..5f9a4c1Documentation/devicetree/bindings/serial/lp8x4x-serial.txt new file +3
-0@@ -0,0 +1,35 @@ +UART ports on ICP DAS LP-8x4x + +ICP DAS LP-8x4x contains three additional serial ports interfacedvia
+Analog Devices ADM213EA chips in addition to 3 serial ports on PXA CPU.Documentation/devicetree/bindings/serial/lp8x4x-serial.txt new file +5
-0+ +Required properties: +- compatible : should be "icpdas,uart-lp8x4x" + +- reg : should provide 16 byte man IO memory region and 1 byteregion for
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt new file +5
-0+ termios + +- interrupts : should provide interrupt + +- interrupt-parent : should provide a link to interrupt controllereither
Documentation/devicetree/bindings/serial/lp8x4x-serial.txt new file +21
-0+ explicitly or implicitly from a parent node + +Examples (from pxa27x-lp8x4x.dts): + + uart@9050 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x9050 0x10 + 0x9030 0x02>; + interrupt-parent = <&fpgairg>; + interrupts = <13>; + status = "okay"; + }; + + uart@9060 { + compatible = "icpdas,uart-lp8x4x"; + reg = <0x9060 0x10 + 0x9032 0x02>; + interrupt-parent = <&fpgairg>; + interrupts = <14>; + status = "okay"; + };drivers/tty/serial/8250/8250_lp8x4x.c new file +7
-0@@ -0,0 +1,168 @@ +/* linux/drivers/tty/serial/8250/8250_lp8x4x.c +* +* Support for 16550A serial ports on ICP DAS LP-8x4x +* +* Copyright (C) 2013 Sergei Ianovich <[email protected]> +* +* This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */drivers/tty/serial/8250/8250_lp8x4x.c new file +25
-0+#include <linux/init.h> +#include <linux/io.h> +#include <linux/irq.h> +#include <linux/module.h> +#include <linux/serial_8250.h> +#include <linux/of.h> +#include <linux/platform_device.h> + +struct lp8x4x_serial_data { +int line; +void *ios_mem; +}; + +static void lp8x4x_serial_set_termios (struct uart_port *port, +struct ktermios *termios,struct ktermios *old) +{ +unsigned int len; +unsigned int baud; +struct lp8x4x_serial_data *data = port->private_data; + +serial8250_do_set_termios (port, termios, old); + +switch (termios->c_cflag &CSIZE ) { +case CS5 : + len =7 ;
drivers/tty/serial/8250/8250_lp8x4x.c line 44
Quoted 10 lines
drivers/tty/serial/8250/8250_lp8x4x.c new file +9
-0+break ; +case CS6 : + len =8 ; +break ; +case CS7 : + len =9 ; +break ; +default : +case CS8 :
I would suggest to exchange those lines.
Quoted 12 lines
drivers/tty/serial/8250/8250_lp8x4x.c new file +12
-0+ len =10 ; +break ; + } + +if (termios->c_cflag &CSTOPB ) + len++; +if (termios->c_cflag &PARENB ) + len++; +if (!(termios->c_cflag &PARODD )) + len++; +#ifdef CMSPAR +if (termios->c_cflag &CMSPAR )
drivers/tty/serial/8250/8250_lp8x4x.c line 65
Quoted 10 lines
drivers/tty/serial/8250/8250_lp8x4x.c new file +9
-0+ len++; +#endif + + len -=9 ; + len &=3 ; + len <<=3 ; +/* +* Ask the core to calculate the divisor for us. +*/
Can it be one line?
Quoted 17 lines
drivers/tty/serial/8250/8250_lp8x4x.c new file +17
-0+ baud =tty_termios_baud_rate (termios); + +switch (baud) { +case 115200 : + len |=7 ; +break ; +case 57600 : + len |=6 ; +break ; +case 38400 : + len |=5 ; +break ; +case 19200 : + len |=4 ; +break ; +case 9600 : + len |=3 ;
drivers/tty/serial/8250/8250_lp8x4x.c line 92
Quoted 10 lines
drivers/tty/serial/8250/8250_lp8x4x.c new file +10
-0+break ; +case 4800 : + len |=2 ; +break ; +case 2400 : +default : + len |=1 ; +break ; + }; +iowrite8 (len, data->ios_mem);
writeb() ?
Quoted 117 lines
drivers/tty/serial/8250/8250_lp8x4x.c new file +55
-0+ +} + +static const struct of_device_id lp8x4x_serial_dt_ids[] = { + { .compatible ="icpdas,uart-lp8x4x" , }, + {} +}; +MODULE_DEVICE_TABLE (of, lp8x4x_serial_dt_ids); + +static int lp8x4x_serial_probe (struct platform_device *pdev) +{ +struct uart_8250_port uart = {}; +struct lp8x4x_serial_data *data; +struct resource *mmres, *mires, *irqres; +int ret; + + mmres =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); + mires =platform_get_resource (pdev,IORESOURCE_MEM ,1 ); + irqres =platform_get_resource (pdev,IORESOURCE_IRQ ,0 ); +if (!mmres || !mires || !irqres) +return -ENODEV ; + + data =devm_kzalloc (&pdev->dev,sizeof (*data),GFP_KERNEL ); +if (!data) +return -ENOMEM ; + + data->ios_mem =devm_ioremap_resource (&pdev->dev, mires); +if (!data->ios_mem) +return -EFAULT ; + + uart.port.iotype =UPIO_MEM ; + uart.port.mapbase = mmres->start; + uart.port.iobase = mmres->start; + uart.port.regshift =1 ; + uart.port.irq = irqres->start; + uart.port.flags =UPF_IOREMAP ; + uart.port.dev = &pdev->dev; + uart.port.uartclk =14745600 ; + uart.port.set_termios = lp8x4x_serial_set_termios; + uart.port.private_data = data; + + ret =serial8250_register_8250_port (&uart); +if (ret <0 ) +return ret; + + data->line = ret; + +platform_set_drvdata (pdev, data); + +return 0 ; +} + +static int lp8x4x_serial_remove (struct platform_device *pdev) +{ + struct lp8x4x_serial_data *data =
platform_get_drvdata(pdev);drivers/tty/serial/8250/8250_lp8x4x.c new file +21
-0+ +serial8250_unregister_port (data->line); + +return 0 ; +} + +static struct platform_driver lp8x4x_serial_driver = { + .probe = lp8x4x_serial_probe, + .remove = lp8x4x_serial_remove, + + .driver = { + .name ="uart-lp8x4x" , + .of_match_table = lp8x4x_serial_dt_ids, + }, +}; + +module_platform_driver (lp8x4x_serial_driver); + +MODULE_AUTHOR ("Sergei Ianovich" ); +MODULE_DESCRIPTION ("8250 serial port module for LP-8x4x" ); +MODULE_LICENSE ("GPL" );drivers/tty/serial/8250/Kconfig +0
-0@@ -387,3 +387,15 @@ config SERIAL_8250_PXAcan enable its onboard serial ports by enabling this option.
If you choose M here, the module name will be 8250_pxa.drivers/tty/serial/8250/Kconfig +4
-0+ +config SERIAL_8250_LP8X4X + tristate "Support 16550A ports on ICP DAS LP-8x4x" + depends on OF && SERIAL_8250 && SERIAL_8250_MANY_PORTS &&
ARCH_PXAdrivers/tty/serial/8250/Kconfig +3
-0+ select LP8X4X_IRQ + help + In addition to serial ports on PXA270 SoC, LP-8x4x has 1dual
drivers/tty/serial/8250/Kconfig +3
-0+ RS232/RS485 port, 1 RS485 port and 1 RS232 port. + + Say N here, unless you plan to run this kernel on a LP-8x4x system.
drivers/tty/serial/8250/Kconfig +2
-0+ + If you choose M here, the module name will be 8250_lp8x4x.drivers/tty/serial/8250/Makefile +0
-0@@ -18,6 +18,7 @@ obj-$(CONFIG_SERIAL_8250_ACCENT) +=8250_accent.o
obj-$(CONFIG_SERIAL_8250_BOCA) += 8250_boca.o
obj-$(CONFIG_SERIAL_8250_EXAR_ST16C554) +=
8250_exar_st16c554.o
obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o
+obj-$(CONFIG_SERIAL_8250_LP8X4X) += 8250_lp8x4x.o
obj-$(CONFIG_SERIAL_8250_FSL) += 8250_fsl.o
obj-$(CONFIG_SERIAL_8250_DW) += 8250_dw.o
obj-$(CONFIG_SERIAL_8250_EM) += 8250_em.o
Signature · 2 lines
Andy Shevchenko <[email protected]> Intel Finland Oy
PATCH v6 1/1 serial: support for 16550A serial ports on LP-8x4x
In reply to Sergei IanovichThe patch adds support for 3 additional LP-8x4x built-in serial ports.
The device can also host up to 8 extension cards with 4 serial ports on each card for a total of 35 ports. However, I don't have the hardware to test extension cards, so they are not supported, yet.
---
v5..v6
fix review comments by Arnd Bergmann
* remove wildcards from compatible
* update doc file
* drop interrupt parent from doc file
* replace uart w/ serial in device names in doc file
fix review comments by Andy Shevchenko
* exchange labels in switch block
* replace iowrite8() with writeb()
* compact comment to one line
v4..v5
* constify struct of_device_id
* drop .owner from struct platform_driver
* rewrite set_termios() baud rate hadnling as suggested by Alan Cox
v3..v4
* move DTS bindings to a different patch (8/21) as suggested by Heikki Krogerus
v2..v3
* no changes (except number 10/16 -> 12/21)
v0..v2
* register platform driver instead of platform device
* use device tree
* use devm helpers where possible
.../bindings/serial/icpdas-lp8841-uart.txt | 41 +++++ drivers/tty/serial/8250/8250_lp8841.c | 166 +++++++++++++++++++++ drivers/tty/serial/8250/Kconfig | 14 ++ drivers/tty/serial/8250/Makefile | 2 + 4 files changed, 223 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt create mode 100644 drivers/tty/serial/8250/8250_lp8841.c
Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt new file +41 -0
@@ -0,0 +1,41 @@ +* UART ports on ICP DAS LP-8841 + +LP-8441, LP-8141 and LP-8041 are fully compatible. + +ICP DAS LP-8841 contains three additional serial ports interfaced via +Analog Devices ADM213EA chips in addition to 3 serial ports on PXA CPU. + +The chips themselves are standard, they would work with 8250_core if +properly connected. However, they are not connected normally. Al least +some of their config pins are wired to a different address region. So +the driver is board-specific. + +Required properties: +- compatible : should be "icpdas,uart-lp8841" + +- reg : should provide 16 byte man IO memory region and 1 byte region for + termios + +- interrupts : should provide interrupt + +Optional property: +- interrupt-parent : should provide a link to interrupt controller either + explicitly or implicitly from a parent node + +Examples (from pxa27x-lp8x4x.dts): + + serial@9050 { + compatible = "icpdas,uart-lp8841"; + reg = <0x9050 0x10 + 0x9030 0x02>; + interrupts = <13>; + status = "okay"; + }; + + serial@9060 { + compatible = "icpdas,uart-lp8841"; + reg = <0x9060 0x10 + 0x9032 0x02>; + interrupts = <14>; + status = "okay"; + };
drivers/tty/serial/8250/8250_lp8841.c new file +166 -0
166 lines not on this page · raw message
drivers/tty/serial/8250/Kconfig +14 -0
@@ -394,3 +394,17 @@ config SERIAL_8250_PXA help If you have a machine based on an Intel XScale PXA2xx CPU you can enable its onboard serial ports by enabling this option. + + If you choose M here, the module name will be 8250_pxa. + +config SERIAL_8250_LP8841 + tristate "Support 16550A ports on ICP DAS LP-8841" + depends on SERIAL_8250 && MACH_PXA27X_DT + select LP8841_IRQ + help + In addition to serial ports on PXA270 SoC, LP-8841 has 1 dual + RS232/RS485 port, 1 RS485 port and 1 RS232 port. + + Say N here, unless you plan to run this kernel on a LP-8841 system. + + If you choose M here, the module name will be 8250_lp8841.
drivers/tty/serial/8250/Makefile +2 -0
@@ -18,6 +18,7 @@ obj-$(CONFIG_SERIAL_8250_ACCENT) += 8250_accent.o obj-$(CONFIG_SERIAL_8250_BOCA) += 8250_boca.o obj-$(CONFIG_SERIAL_8250_EXAR_ST16C554) += 8250_exar_st16c554.o obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o +obj-$(CONFIG_SERIAL_8250_LP8X4X) += 8250_lp8x4x.o obj-$(CONFIG_SERIAL_8250_FSL) += 8250_fsl.o obj-$(CONFIG_SERIAL_8250_DW) += 8250_dw.o obj-$(CONFIG_SERIAL_8250_EM) += 8250_em.o
@@ -30,5 +31,6 @@ obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o obj-$(CONFIG_SERIAL_OF_PLATFORM) += 8250_of.o obj-$(CONFIG_SERIAL_8250_PXA) += 8250_pxa.o +obj-$(CONFIG_SERIAL_8250_LP8841) += 8250_lp8841.o CFLAGS_8250_ingenic.o += -I$(srctree)/scripts/dtc/libfdt
Signature · 6 lines
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Re: [PATCH v6] serial: support for 16550A serial ports on LP-8x4x
Quoted 6 lines · Sergei Ianovich
The patch adds support for 3 additional LP-8x4x built-in serial ports.
The device can also host up to 8 extension cards with 4 serial ports on each card for a total of 35 ports. However, I don't have the hardware to test extension cards, so they are not supported, yet.
My comments below.
After addressing them:
Quoted 15 lines
+++
b/drivers/tty/serial/8250/8250_lp8841.cdrivers/tty/serial/8250/8250_lp8841.c new file +7
-0@@ -0,0 +1,166 @@ +/* linux/drivers/tty/serial/8250/8250_lp8841.c +* +* Support for 16550A serial ports on ICP DAS LP-8841 +* +* Copyright (C) 2013 Sergei Ianovich <[email protected]> +* +* This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */drivers/tty/serial/8250/8250_lp8841.c new file +1
-0+#include <linux/init.h>
drivers/tty/serial/8250/8250_lp8841.c line 21
Quoted 10 lines
drivers/tty/serial/8250/8250_lp8841.c new file +10
-0+#include <linux/io.h> +#include <linux/irq.h> +#include <linux/module.h> +#include <linux/serial_8250.h> +#include <linux/of.h> +#include <linux/platform_device.h> + +struct lp8841_serial_data { +int line; +void *ios_mem;
__iomem
Quoted 4 lines
drivers/tty/serial/8250/8250_lp8841.c new file +3
-0+}; +if (termios->c_cflag &CSTOPB ) + len++;
drivers/tty/serial/8250/8250_lp8841.c line 60
Quoted 10 lines
drivers/tty/serial/8250/8250_lp8841.c new file +10
-0+if (termios->c_cflag &PARENB ) + len++; +if (!(termios->c_cflag &PARODD )) + len++; +#ifdef CMSPAR +if (termios->c_cflag &CMSPAR ) + len++; +#endif + + len -=9 ;
If you have 5 bit mode, no parity, 1/1.5 stop bits, you may end up with negative value here. Am I right? If so, is it expected?
Quoted 9 lines
drivers/tty/serial/8250/8250_lp8841.c new file +6
-0+ len &=3 ; + len <<=3 ; +writeb (len, data->ios_mem); + +} +static int lp8841_serial_probe (struct platform_device *pdev)
drivers/tty/serial/8250/8250_lp8841.c line 111
Quoted 10 lines
drivers/tty/serial/8250/8250_lp8841.c new file +10
-0+{ +struct uart_8250_port uart = {}; +struct lp8841_serial_data *data; +struct resource *mmres, *mires; +int ret; + + mmres =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); + mires =platform_get_resource (pdev,IORESOURCE_MEM ,1 ); +if (!mmres || !mires) +return -ENODEV ;
No need to check mires here, devm_ioremap_resource() will take care about.
drivers/tty/serial/8250/8250_lp8841.c line 119
Quoted 8 lines
drivers/tty/serial/8250/8250_lp8841.c new file +8
-0+ + data =devm_kzalloc (&pdev->dev,sizeof (*data),GFP_KERNEL ); +if (!data) +return -ENOMEM ; + + data->ios_mem =devm_ioremap_resource (&pdev->dev, mires); +if (!data->ios_mem) +return -EFAULT ;
You have to propagate the actual error code fromdevm_ioremap_resource().
drivers/tty/serial/8250/8250_lp8841.c line 123
Quoted 6 lines
drivers/tty/serial/8250/8250_lp8841.c new file +4
-0+ + uart.port.iotype =UPIO_MEM ; + uart.port.mapbase = mmres->start; + uart.port.iobase = mmres->start;
I'm not sure about this. If you ask for UPIO_MEM why do you need to fill iobase?
And I suppose iobase can't hold (at the end inb/outb calls) big port numbers anyway (16 bit on x86, for example).
Quoted 38 lines
drivers/tty/serial/8250/8250_lp8841.c new file +22
-0+ uart.port.regshift =1 ; + uart.port.irq =platform_get_irq (pdev,0 ); + uart.port.flags =UPF_IOREMAP ; + uart.port.dev = &pdev->dev; + uart.port.uartclk =14745600 ; + uart.port.set_termios = lp8841_serial_set_termios; + uart.port.private_data = data; + + ret =serial8250_register_8250_port (&uart); +if (ret <0 ) +return ret; + + data->line = ret; + +platform_set_drvdata (pdev, data); + +return 0 ; +} + +static int lp8841_serial_remove (struct platform_device *pdev) +{ + struct lp8841_serial_data *data =
platform_get_drvdata(pdev);drivers/tty/serial/8250/8250_lp8841.c new file +15
-0+ +serial8250_unregister_port (data->line); + +return 0 ; +} + +static struct platform_driver lp8841_serial_driver = { + .probe = lp8841_serial_probe, + .remove = lp8841_serial_remove, + + .driver = { + .name ="uart-lp8841" , + .of_match_table = lp8841_serial_dt_ids, + }, +};
Signature · 2 lines
Andy Shevchenko <[email protected]> Intel Finland Oy
Re: [PATCH v6] serial: support for 16550A serial ports on LP-8x4x
Quoted 6 lines · Andy Shevchenko
drivers/tty/serial/8250/8250_lp8841.c line 21
Quoted 3 lines · Sergei Ianovich
drivers/tty/serial/8250/8250_lp8841.c new file +3
-0+struct lp8841_serial_data { +int line; +void *ios_mem;
__iomem
OK
Quoted 19 lines
Quoted 4 lines
drivers/tty/serial/8250/8250_lp8841.c new file +3
-0+}; +if (termios->c_cflag &CSTOPB ) + len++;drivers/tty/serial/8250/8250_lp8841.c line 60
Quoted 10 lines
drivers/tty/serial/8250/8250_lp8841.c new file +10
-0+if (termios->c_cflag &PARENB ) + len++; +if (!(termios->c_cflag &PARODD )) + len++; +#ifdef CMSPAR +if (termios->c_cflag &CMSPAR ) + len++; +#endif + + len -=9 ;If you have 5 bit mode, no parity, 1/1.5 stop bits, you may end up with
negative value here. Am I right? If so, is it expected?
Quoted 2 lines
drivers/tty/serial/8250/8250_lp8841.c line 62
Quoted 2 lines
drivers/tty/serial/8250/8250_lp8841.c new file +2
-0+ len &=3 ; + len <<=3 ;
I haven't tested this mode. I am pretty sure it will fail. There is also no support for speeds higher than 115200.
CS7 and CS8 at speeds up to 115200 work well.
However, there is no way to report errors from set_termios(). Should anything be done about those limitations?
Quoted 7 lines
drivers/tty/serial/8250/8250_lp8841.c new file +1
-0+ mmres =platform_get_resource (pdev,IORESOURCE_MEM ,0 );drivers/tty/serial/8250/8250_lp8841.c line 111
Quoted 3 lines
drivers/tty/serial/8250/8250_lp8841.c new file +3
-0+ mires =platform_get_resource (pdev,IORESOURCE_MEM ,1 ); +if (!mmres || !mires) +return -ENODEV ;No need to check mires here,
devm_ioremap_resource()will take care about.
OK
Quoted 7 lines
drivers/tty/serial/8250/8250_lp8841.c line 119
Quoted 4 lines
(quoted diff) +1
-0+ data->ios_mem = devm_ioremap_resource(&pdev->dev,Quoted 1 line
Quoted 1 line
mires);
drivers/tty/serial/8250/8250_lp8841.c new file +2
-0+if (!data->ios_mem) +return -EFAULT ;You have to propagate the actual error code from
devm_ioremap_resource().
OK
Quoted 11 lines
drivers/tty/serial/8250/8250_lp8841.c line 123
Quoted 6 lines
drivers/tty/serial/8250/8250_lp8841.c new file +4
-0+ + uart.port.iotype =UPIO_MEM ; + uart.port.mapbase = mmres->start; + uart.port.iobase = mmres->start;I'm not sure about this. If you ask for
UPIO_MEMwhy do you need to fill iobase?
And I suppose iobase can't hold (at the end inb/outb calls) big port numbers anyway (16 bit on x86, for example).
There is no need for iobase. I'll remove that line.
Re: [PATCH v6] serial: support for 16550A serial ports on LP-8x4x
Quoted 7 lines
I haven't tested this mode. I am pretty sure it will fail. There is also no support for speeds higher than 115200.
CS7 and CS8 at speeds up to 115200 work well.
However, there is no way to report errors from set_termios(). Should anything be done about those limitations?
You report back by setting the termios fields to the values actually selected. Eg if you can't do CS5/CS6 you'd pick CS7 or CS8 and write that back into tty->termios so the caller knows what they actually got. Ditto for speed (see the 16550A core driver for the speed write backs).
Alan
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PATCH v7 1/1 serial: support for 16550A serial ports on LP-8x4x
In reply to Sergei IanovichThe patch adds support for 3 additional LP-8x4x built-in serial ports.
The device can also host up to 8 extension cards with 4 serial ports on each card for a total of 35 ports. However, I don't have the hardware to test extension cards, so they are not supported, yet.
---
CC: Alan Cox <[email protected]>
CC: Andy Shevchenko <[email protected]>
CC: Arnd Bergmann <[email protected]>
v6..v7
fix review comments by Andy Shevchenko
not applying Acked-by as the 1st change is big
* handle unsupported tty modes correctly as suggested by Alan Cox
* remove extra check of platform_get_resource() result
* propagate error code from devm_ioremap_resource()
* drop uart.port.iobase for UPIO_MEM device
v5..v6
fix review comments by Arnd Bergmann
* remove wildcards from compatible
* update doc file
* drop interrupt parent from doc file
* replace uart w/ serial in device names in doc file
fix review comments by Andy Shevchenko
* exchange labels in switch block
* replace iowrite8() with writeb()
* compact comment to one line
v4..v5
* constify struct of_device_id
* drop .owner from struct platform_driver
* rewrite set_termios() baud rate hadnling as suggested by Alan Cox
v3..v4
* move DTS bindings to a different patch (8/21) as suggested by Heikki Krogerus
v2..v3
* no changes (except number 10/16 -> 12/21)
v0..v2
* register platform driver instead of platform device
* use device tree
* use devm helpers where possible
.../bindings/serial/icpdas-lp8841-uart.txt | 41 +++++ drivers/tty/serial/8250/8250_lp8841.c | 193 +++++++++++++++++++++ drivers/tty/serial/8250/Kconfig | 14 ++ drivers/tty/serial/8250/Makefile | 2 + 4 files changed, 250 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt create mode 100644 drivers/tty/serial/8250/8250_lp8841.c
Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt new file +41 -0
@@ -0,0 +1,41 @@ +* UART ports on ICP DAS LP-8841 + +LP-8441, LP-8141 and LP-8041 are fully compatible. + +ICP DAS LP-8841 contains three additional serial ports interfaced via +Analog Devices ADM213EA chips in addition to 3 serial ports on PXA CPU. + +The chips themselves are standard, they would work with 8250_core if +properly connected. However, they are not connected normally. Al least +some of their config pins are wired to a different address region. So +the driver is board-specific. + +Required properties: +- compatible : should be "icpdas,uart-lp8841" + +- reg : should provide 16 byte man IO memory region and 1 byte region for + termios + +- interrupts : should provide interrupt + +Optional property: +- interrupt-parent : should provide a link to interrupt controller either + explicitly or implicitly from a parent node + +Examples (from pxa27x-lp8x4x.dts): + + serial@9050 { + compatible = "icpdas,uart-lp8841"; + reg = <0x9050 0x10 + 0x9030 0x02>; + interrupts = <13>; + status = "okay"; + }; + + serial@9060 { + compatible = "icpdas,uart-lp8841"; + reg = <0x9060 0x10 + 0x9032 0x02>; + interrupts = <14>; + status = "okay"; + };
drivers/tty/serial/8250/8250_lp8841.c new file +193 -0
193 lines not on this page · raw message
drivers/tty/serial/8250/Kconfig +14 -0
@@ -394,3 +394,17 @@ config SERIAL_8250_PXA help If you have a machine based on an Intel XScale PXA2xx CPU you can enable its onboard serial ports by enabling this option. + + If you choose M here, the module name will be 8250_pxa. + +config SERIAL_8250_LP8841 + tristate "Support 16550A ports on ICP DAS LP-8841" + depends on SERIAL_8250 && MACH_PXA27X_DT + select LP8841_IRQ + help + In addition to serial ports on PXA270 SoC, LP-8841 has 1 dual + RS232/RS485 port, 1 RS485 port and 1 RS232 port. + + Say N here, unless you plan to run this kernel on a LP-8841 system. + + If you choose M here, the module name will be 8250_lp8841.
drivers/tty/serial/8250/Makefile +2 -0
@@ -18,6 +18,7 @@ obj-$(CONFIG_SERIAL_8250_ACCENT) += 8250_accent.o obj-$(CONFIG_SERIAL_8250_BOCA) += 8250_boca.o obj-$(CONFIG_SERIAL_8250_EXAR_ST16C554) += 8250_exar_st16c554.o obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o +obj-$(CONFIG_SERIAL_8250_LP8X4X) += 8250_lp8x4x.o obj-$(CONFIG_SERIAL_8250_FSL) += 8250_fsl.o obj-$(CONFIG_SERIAL_8250_DW) += 8250_dw.o obj-$(CONFIG_SERIAL_8250_EM) += 8250_em.o
@@ -30,5 +31,6 @@ obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o obj-$(CONFIG_SERIAL_OF_PLATFORM) += 8250_of.o obj-$(CONFIG_SERIAL_8250_PXA) += 8250_pxa.o +obj-$(CONFIG_SERIAL_8250_LP8841) += 8250_lp8841.o CFLAGS_8250_ingenic.o += -I$(srctree)/scripts/dtc/libfdt
Signature · 1 line
2.7.0
Re: [PATCH v7] serial: support for 16550A serial ports on LP-8x4x
Quoted 9 lines · Sergei Ianovich
The patch adds support for 3 additional LP-8x4x built-in serial ports.
The device can also host up to 8 extension cards with 4 serial ports on each card for a total of 35 ports. However, I don't have the hardware to test extension cards, so they are not supported, yet.
Signed-off-by Sergei Ianovich <[email protected]>Reviewed-by Heikki Krogerus <[email protected]>
Few more comments, mostly about style.
drivers/tty/serial/8250/8250_lp8841.c line 31
Quoted 8 lines
drivers/tty/serial/8250/8250_lp8841.c new file +8
-0+static void lp8841_serial_set_termios (struct uart_port *port, +struct ktermios *termios,struct ktermios *old) +{ +#ifdef BOTHER +unsigned int cbaud; +#endif +unsigned int baud; +unsigned int len;
Since you are writing this to the register at the end maybe
- unsigned int -> u8 (write*b* — exactly one byte)
- len -> value (it's not only about data length)
Quoted 19 lines
drivers/tty/serial/8250/8250_lp8841.c new file +19
-0+unsigned int old_csize = old ? old->c_cflag &CSIZE :CS8 ; +struct lp8841_serial_data *data = port->private_data; + +/* We only support CS7 and CS8 */ +while ((termios->c_cflag &CSIZE ) !=CS7 && + (termios->c_cflag & CSIZE) != CS8) { + termios->c_cflag &= ~CSIZE ; + termios->c_cflag |= old_csize; + old_csize =CS8 ; + } + +serial8250_do_set_termios (port, termios, old); + +if ((termios->c_cflag &CSIZE ) ==CS7 ) + len =9 ; +else + len =10 ; + +if (termios->c_cflag &CSTOPB )
drivers/tty/serial/8250/8250_lp8841.c line 59
Quoted 10 lines
drivers/tty/serial/8250/8250_lp8841.c new file +9
-0+ len++; +if (termios->c_cflag &PARENB ) + len++; +if (!(termios->c_cflag &PARODD )) + len++; +#ifdef CMSPAR +if (termios->c_cflag &CMSPAR ) + len++; +#endif
I don't know if someone likes it or not (up to you), but for me looks better to have ternary operators here:
value += (termios->c_cflag & CSTOPB) ? 1 : 0;
value += (termios->c_cflag & PARENB) ? 1 : 0;
value += (termios->c_cflag & PARODD) ? 0 : 1;
#ifdef CMSPAR
value += (termios->c_cflag & CMSPAR) ? 1 : 0;
#endif
drivers/tty/serial/8250/8250_lp8841.c line 61
Quoted 1 line
drivers/tty/serial/8250/8250_lp8841.c new file +1
-0+ len -=9 ;
This one could be part of previous evaluation:
value = (termios->c_cflag & CSIZE) == CS7 ? 0 : 1;
drivers/tty/serial/8250/8250_lp8841.c line 63
Quoted 2 lines
drivers/tty/serial/8250/8250_lp8841.c new file +2
-0+ len &=3 ; + len <<=3 ;
Perhaps to define magic number (e.g. LP8841_DATA_LEN_SHIFT).
Quoted 22 lines
drivers/tty/serial/8250/8250_lp8841.c new file +13
-0+ + baud =tty_termios_baud_rate (termios); + +#ifdef BOTHER +/* We only support fixed rates */ + cbaud = termios->c_cflag &CBAUD ; + +if (cbaud ==BOTHER ) { + termios->c_cflag &= ~BOTHER ; + +/* Don't rewrite B0 */ +if (baud) { + tty_termios_encode_baud_rate(termios, baud,baud);
drivers/tty/serial/8250/8250_lp8841.c new file +6
-0+ baud =tty_termios_baud_rate (termios); + +/* Set sane default speed if we get 0 */ +if (!baud) { + baud =9600 ; + tty_termios_encode_baud_rate(termios,
drivers/tty/serial/8250/8250_lp8841.c line 83
Quoted 1 line
drivers/tty/serial/8250/8250_lp8841.c new file +1
-0+ baud, baud);
I think you can call this unconditionally together with case > 115200.
drivers/tty/serial/8250/8250_lp8841.c line 93
Quoted 10 lines
drivers/tty/serial/8250/8250_lp8841.c new file +10
-0+ } + } + } +#endif + +/* We only support up to 115200 */ +if (baud >115200 ) { + baud =115200 ; +tty_termios_encode_baud_rate (termios, baud, baud); + }
Btw, can we use uart_get_baud_rate() here?
drivers/tty/serial/8250/8250_lp8841.c line 131
Quoted 8 lines
drivers/tty/serial/8250/8250_lp8841.c new file +6
-0+writeb (len, data->ios_mem); + +} +static int lp8841_serial_probe (struct platform_device *pdev) +{ +struct uart_8250_port uart = {};
{0}
drivers/tty/serial/8250/8250_lp8841.c line 137
Quoted 7 lines
drivers/tty/serial/8250/8250_lp8841.c new file +6
-0+struct lp8841_serial_data *data; +struct resource *mmres, *mires; +int ret; + + mmres =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); + mires =platform_get_resource (pdev,IORESOURCE_MEM ,1 );
Perhaps move it down to be closer to devm_ioremap_resource() call.
drivers/tty/serial/8250/8250_lp8841.c line 144
Quoted 7 lines
drivers/tty/serial/8250/8250_lp8841.c new file +7
-0+if (!mmres) +return -ENODEV ; + + data =devm_kzalloc (&pdev->dev,sizeof (*data),GFP_KERNEL ); +if (!data) +return -ENOMEM ; +
+ mires = platform_get_resource(pdev, IORESOURCE_MEM, 1);
Quoted 3 lines
drivers/tty/serial/8250/8250_lp8841.c new file +3
-0+ data->ios_mem =devm_ioremap_resource (&pdev->dev, mires); +if (IS_ERR (data->ios_mem)) +return PTR_ERR (data->ios_mem);
Signature · 2 lines
Andy Shevchenko <[email protected]> Intel Finland Oy
Re: [PATCH v7] serial: support for 16550A serial ports on LP-8x4x
Quoted 65 lines · Andy Shevchenko
Quoted 11 lines · Sergei Ianovich
The patch adds support for 3 additional LP-8x4x built-in serial ports.
The device can also host up to 8 extension cards with 4 serial ports
on each card for a total of 35 ports. However, I don't have the hardware to test extension cards, so they are not supported, yet.Few more comments, mostly about style.
drivers/tty/serial/8250/8250_lp8841.c line 31
Quoted 8 lines
drivers/tty/serial/8250/8250_lp8841.c new file +8
-0+static void lp8841_serial_set_termios (struct uart_port *port, +struct ktermios *termios,struct ktermios *old) +{ +#ifdef BOTHER +unsigned int cbaud; +#endif +unsigned int baud; +unsigned int len;Since you are writing this to the register at the end maybe
- unsigned int -> u8 (write*b* — exactly one byte)
- len -> value (it's not only about data length)Quoted 19 lines
drivers/tty/serial/8250/8250_lp8841.c new file +19
-0+unsigned int old_csize = old ? old->c_cflag &CSIZE :CS8 ; +struct lp8841_serial_data *data = port->private_data; + +/* We only support CS7 and CS8 */ +while ((termios->c_cflag &CSIZE ) !=CS7 && + (termios->c_cflag & CSIZE) != CS8) { + termios->c_cflag &= ~CSIZE ; + termios->c_cflag |= old_csize; + old_csize =CS8 ; + } + +serial8250_do_set_termios (port, termios, old); + +if ((termios->c_cflag &CSIZE ) ==CS7 ) + len =9 ; +else + len =10 ; + +if (termios->c_cflag &CSTOPB )drivers/tty/serial/8250/8250_lp8841.c line 59
Quoted 10 lines
drivers/tty/serial/8250/8250_lp8841.c new file +9
-0+ len++; +if (termios->c_cflag &PARENB ) + len++; +if (!(termios->c_cflag &PARODD )) + len++; +#ifdef CMSPAR +if (termios->c_cflag &CMSPAR ) + len++; +#endif I don't know if someone likes it or not (up to you), but for me looks better to have ternary operators here:
value += (
termios->c_cflag& CSTOPB) ? 1 : 0;
value += (termios->c_cflag& PARENB) ? 1 : 0;
value += (termios->c_cflag& PARODD) ? 0 : 1;
Quoted 8 lines
#ifdef CMSPAR
value += (termios->c_cflag& CMSPAR) ? 1 : 0;
#endifdrivers/tty/serial/8250/8250_lp8841.c line 61
Quoted 1 line
drivers/tty/serial/8250/8250_lp8841.c new file +1
-0+ len -=9 ;This one could be part of previous evaluation:
value = (termios->c_cflag& CSIZE) == CS7 ? 0 : 1;
Great point.
Quoted 4 lines
drivers/tty/serial/8250/8250_lp8841.c line 63
Quoted 2 lines
drivers/tty/serial/8250/8250_lp8841.c new file +2
-0+ len &=3 ; + len <<=3 ;Perhaps to define magic number (e.g.
LP8841_DATA_LEN_SHIFT).
OK
Quoted 21 lines
Quoted 20 lines
drivers/tty/serial/8250/8250_lp8841.c new file +13
-0+ + baud =tty_termios_baud_rate (termios); + +#ifdef BOTHER +/* We only support fixed rates */ + cbaud = termios->c_cflag &CBAUD ; + +if (cbaud ==BOTHER ) { + termios->c_cflag &= ~BOTHER ; + +/* Don't rewrite B0 */ +if (baud) { + tty_termios_encode_baud_rate(termios,baud,
baud);drivers/tty/serial/8250/8250_lp8841.c new file +5
-0+ baud =tty_termios_baud_rate (termios); + +/* Set sane default speed if we get 0 */ +if (!baud) { + baud =9600 ;
Quoted 7 lines
drivers/tty/serial/8250/8250_lp8841.c line 83
Quoted 4 lines
(quoted diff) +1
-0+ tty_termios_encode_baud_rate(termios
,drivers/tty/serial/8250/8250_lp8841.c new file +1
-0+ baud, baud);I think you can call this unconditionally together with case > 115200.
The calls are orthogonal. This one deals with the case when BOTHER is defined and set, and we have non-zero rate with BOTHER, but we have zero rate after BOTHER is cleared. So we set 9600 as a sane default speed.
Quoted 10 lines
drivers/tty/serial/8250/8250_lp8841.c line 93
Quoted 10 lines
drivers/tty/serial/8250/8250_lp8841.c new file +10
-0+ } + } + } +#endif + +/* We only support up to 115200 */ +if (baud >115200 ) { + baud =115200 ; +tty_termios_encode_baud_rate (termios, baud, baud); + }
This one deals with the case when the rate is over 115200. If the previous case has been triggered, this one won't be.
Quoted 1 line
Btw, can we use
uart_get_baud_rate()here?
uart_get_baud_rate() has already been called
in serial8250_do_set_termios(). uart_get_baud_rate()
calls tty_termios_encode_baud_rate(). uart_get_baud_rate() won't help us if BOTHER is set. Once BOTHER is cleared, we don't need any special processing of uart_get_baud_rate().
Quoted 5 lines
drivers/tty/serial/8250/8250_lp8841.c line 131
Quoted 3 lines
drivers/tty/serial/8250/8250_lp8841.c new file +3
-0+static int lp8841_serial_probe (struct platform_device *pdev) +{ + struct uart_8250_port uart = {};{0}
---drivers/tty/serial/8250/8250_lp8841.c: In function 'lp8841_serial_probe':drivers/tty/serial/8250/8250_lp8841.c:124:32: warning: excess elements in struct initializer
struct uart_8250_port uart = {0};
^drivers/tty/serial/8250/8250_lp8841.c:124:32: note: (near initialization for 'uart.port.lock.<anonymous>.rlock.raw_lock')
---
Zero triggers a warning. I'll use memset().
Quoted 9 lines
Quoted 7 lines
+ struct
lp8841_serial_data*data;
+ struct resource *mmres, *mires;
+ int ret;
+
+ mmres =platform_get_resource(pdev, IORESOURCE_MEM, 0);+ mires =
platform_get_resource(pdev, IORESOURCE_MEM, 1);Perhaps move it down to be closer to
devm_ioremap_resource()call.
OK
Thanks for lightning fast reviews. I'll resubmit v8 if there is no objections to the points above.
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Re: [PATCH v7] serial: support for 16550A serial ports on LP-8x4x
Quoted 4 lines · Sergei Ianovich
Quoted 3 lines · Andy Shevchenko
drivers/tty/serial/8250/8250_lp8841.c line 62
Quoted 1 line · Sergei Ianovich
drivers/tty/serial/8250/8250_lp8841.c new file +1
-0+ len &=3 ;
Mask as well to be defined.
Quoted 11 lines
Quoted 3 lines
drivers/tty/serial/8250/8250_lp8841.c line 63
Quoted 1 line
drivers/tty/serial/8250/8250_lp8841.c new file +1
-0+ len <<=3 ;Perhaps to define magic number (e.g.
LP8841_DATA_LEN_SHIFT).OK
(quoted diff) +1
-0+ baud = tty_termios_baud_rate(termios);Quoted 3 lines
drivers/tty/serial/8250/8250_lp8841.c line 68
Quoted 3 lines
drivers/tty/serial/8250/8250_lp8841.c new file +3
-0+ +#ifdef BOTHER +/* We only support fixed rates */
So, but if you support only fixed rates, why do you care about BOTHER at all?
Quoted 10 lines
Quoted 3 lines
Quoted 1 line
I think you can call this unconditionally together with case > 115200.
The calls are orthogonal. This one deals with the case when BOTHER is defined and set, and we have non-zero rate with BOTHER, but we have zero rate after BOTHER is cleared. So we set 9600 as a sane default speed.
+
Quoted 9 lines
Quoted 6 lines
Review
Quoted 6 lines
drivers/tty/serial/8250/8250_lp8841.c new file +4
-0+/* We only support up to 115200 */ +if (baud >115200 ) { + baud =115200 ; + tty_termios_encode_baud_rate(termios, baud,baud);
(quoted diff) +1
-0+ }This one deals with the case when the rate is over 115200. If the previous case has been triggered, this one won't be.
Yeah, but I meant to unconditionally call it just once here every time. tty_termios_encode_baud_rate(termios, baud, baud);
Quoted 6 lines
+static int
lp8841_serial_probe(struct platform_device *pdev)Quoted 4 lines
Quoted 2 lines
+{
+ structuart_8250_portuart = {};{0}
Quoted 9 lines
---
drivers/tty/serial/8250/8250_lp8841.c: In function 'lp8841_serial_probe':drivers/tty/serial/8250/8250_lp8841.c:124:32: warning: excess elements in struct initializer
structuart_8250_portuart = {0};
^drivers/tty/serial/8250/8250_lp8841.c:124:32: note: (near initialization for 'uart.port.lock.<anonymous>.rlock.raw_lock')
Do you have any warning verbosity enabled? I see a lot of stuff like this in the code
$ git grep -n 'struct .* = {0};' | wc -l
338$ git grep -n 'struct .* = { \?0 \?};' | wc -l
550( '… = { 0 };' included)
Quoted 3 lines
---
Zero triggers a warning. I'll use
memset().
Either will work.
Quoted 2 lines
Thanks for lightning fast reviews. I'll resubmit v8 if there is no objections to the points above.
See above.
Signature · 2 lines
Andy Shevchenko <[email protected]> Intel Finland Oy
Re: [PATCH v7] serial: support for 16550A serial ports on LP-8x4x
Quoted 7 lines · Andy Shevchenko
Quoted 4 lines · Sergei Ianovich
Quoted 3 lines · Andy Shevchenko
drivers/tty/serial/8250/8250_lp8841.c line 62
Quoted 1 line · Sergei Ianovich
drivers/tty/serial/8250/8250_lp8841.c new file +1
-0+ len &=3 ;Mask as well to be defined.
Sure.
Quoted 2 lines
So, but if you support only fixed rates, why do you care about BOTHER at all?
If BOTHER is defined, tty_termios_baud_rate()
and tty_termios_encode_baud_rate() allow non-standard baud rates. I should clear it from c_cflag to indicate I don't support it.
Quoted 11 lines
Quoted 11 lines
Quoted 3 lines
Quoted 1 line
I think you can call this unconditionally together with case > 115200.
The calls are orthogonal. This one deals with the case when BOTHER is
defined and set, and we have non-zero rate with BOTHER, but we have zero rate after BOTHER is cleared. So we set 9600 as a sane default speed.
Quoted 5 lines
Quoted 2 lines
This one deals with the case when the rate is over 115200. If the previous case has been triggered, this one won't be.
Yeah, but I meant to unconditionally call it just once here every time.
I see. It saves a few lines.
Quoted 10 lines
Quoted 9 lines
---
drivers/tty/serial/8250/8250_lp8841.c: In function 'lp8841_serial_probe':drivers/tty/serial/8250/8250_lp8841.c:124:32: warning: excess elements in struct initializer
structuart_8250_portuart = {0};
^drivers/tty/serial/8250/8250_lp8841.c:124:32: note: (near initialization for 'uart.port.lock.<anonymous>.rlock.raw_lock')
Quoted 2 lines
Do you have any warning verbosity enabled? I see a lot of stuff like this in the code
Plain make.
The warning seems to be the result of initializing a spinlock with zero. Spinlocks are intentionally obfuscated, but I didn't investigate further.
Quoted 7 lines
$ git grep -n 'struct .* = {0};' | wc -l 338$ git grep -n 'struct .* = { \?0 \?};' | wc -l 550( '… = { 0 };' included)
The first structure member is most likely not a spinlock in those cases.
Quoted 5 lines
Quoted 3 lines
---
Zero triggers a warning. I'll use
memset().Either will work.
OK
The only remaining open point is BOTHER handling.
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Re: [PATCH v7] serial: support for 16550A serial ports on LP-8x4x
Quoted 5 lines · Sergei Ianovich
Quoted 3 lines · Andy Shevchenko
Quoted 2 lines · Sergei Ianovich
Quoted 1 line · Andy Shevchenko
On Tue, 2016-03-01 at 00:26 +0300, Sergei Ianovich wrote:
Quoted 20 lines
Quoted 3 lines
So, but if you support only fixed rates, why do you care about BOTHER
at all?If BOTHER is defined, tty_termios_baud_rate()
and tty_termios_encode_baud_rate() allow non-standard baud rates. I should clear it from c_cflag to indicate I don't support it.Quoted 12 lines
Quoted 12 lines
Quoted 3 lines
Quoted 1 line
I think you can call this unconditionally together with case > 115200.
The calls are orthogonal. This one deals with the case when BOTHER
is
defined and set, and we have non-zero rate with BOTHER, but we have
zero rate after BOTHER is cleared. So we set 9600 as a sane default
speed.
Maybe you just set a baud rate nearest to the one from the table in case of BOTHER?
In that case perhaps you have to supply +-1 to the range. That's why I asked about uart_get_baud_rate().
Maybe this flow will work for you
if (BOTHER)
clear BOTHER
call uart_get_baud_rate()
?
Quoted 8 lines
The warning seems to be the result of initializing a spinlock with zero. Spinlocks are intentionally obfuscated, but I didn't investigate
further.Quoted 3 lines
$ git grep -n 'struct .* = {0};' | wc -l 338
Quoted 7 lines
Quoted 4 lines
$ git grep -n 'struct .* = { \?0 \?};' | wc -l 550( '… = { 0 };' included)
The first structure member is most likely not a spinlock in those cases.
Hmm... Interesting. On one hand the poison is reasonable, on the other we often do a memset() or {0} on structures, i.o.w. assign 0 as initial value until spinlock_init().
Arnd, what do you think about this (and similar) case(s)?
Signature · 2 lines
Andy Shevchenko <[email protected]> Intel Finland Oy
Re: [PATCH v7] serial: support for 16550A serial ports on LP-8x4x
Quoted 2 lines
Maybe you just set a baud rate nearest to the one from the table in case of BOTHER?
This is broken. BOTHER can be set with a perfectly valid baud rate that could equally be represented by B9600 say.
If you are stuck with limited ranges then
switch(baud) {
case 9600:
case 4800:etc
and don't worry about BOTHER, it's entirely transparent to you. The core kernel code will provide you with a baud rate number, the re-encoder will always do the right thing.
A driver should never care about BOTHER or any of the baud bits in the termios structure directly.
Alan
Re: [PATCH v7] serial: support for 16550A serial ports on LP-8x4x
In reply to Andy ShevchenkoQuoted 35 lines · Andy Shevchenko
Quoted 5 lines · Sergei Ianovich
Quoted 3 lines · Andy Shevchenko
Quoted 2 lines · Sergei Ianovich
Quoted 1 line · Andy Shevchenko
On Tue, 2016-03-01 at 00:26 +0300, Sergei Ianovich wrote:
Quoted 21 lines
Quoted 3 lines
So, but if you support only fixed rates, why do you care about BOTHER
at all?If BOTHER is defined, tty_termios_baud_rate()
and tty_termios_encode_baud_rate() allow non-standard baud rates. I should clear it from c_cflag to indicate I don't support it.Quoted 13 lines
Quoted 13 lines
Quoted 4 lines
Quoted 1 line
I think you can call this unconditionally together with case
Quoted 1 line
115200.
The calls are orthogonal. This one deals with the case when BOTHER
is
defined and set, and we have non-zero rate with BOTHER, but we have
zero rate after BOTHER is cleared. So we set 9600 as a sane default
speed.Maybe you just set a baud rate nearest to the one from the table in case of BOTHER?
In that case perhaps you have to supply +-1 to the range. That's why I
asked about uart_get_baud_rate().
Quoted 7 lines
Maybe this flow will work for you
if (BOTHER)
clear BOTHER
call uart_get_baud_rate()?
It works well for standard rates, let it be so. If there ever is a problem, we can fix it.
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Re: [PATCH v7] serial: support for 16550A serial ports on LP-8x4x
Quoted 10 lines
Quoted 7 lines
Maybe this flow will work for you
if (BOTHER)
clear BOTHER
call uart_get_baud_rate()?
It works well for standard rates, let it be so. If there ever is a problem, we can fix it.
I'm NAKking the v7 PATCH because we spent ages getting all the drivers to use tty_termios_get_baud_rate() cleanly.
Get rid of everything in the ifdef BOTHER
Remove the if baud > 115200 stuff
For the default: entry in the case add
tty_termios_encode_baud_rate(termios, 2400, 2400);
and all will be good. Anything not a standard rate will get 2400 baud and reported back to the user properly as that rate.
You could do matches for "within 10%" but really I don't think it matters and other drivers don't bother either when they have such fixed clocks.
Alan
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PATCH v8 1/1 serial: support for 16550A serial ports on LP-8x4x
In reply to Sergei IanovichThe patch adds support for 3 additional LP-8x4x built-in serial ports.
The device can also host up to 8 extension cards with 4 serial ports on each card for a total of 35 ports. However, I don't have the hardware to test extension cards, so they are not supported, yet.
---
CC: Alan Cox <[email protected]>
CC: Andy Shevchenko <[email protected]>
CC: Arnd Bergmann <[email protected]>
v7..v8
* call serial8250_do_set_termios() after speed check, not before. This way clock divisor is properly inited for the new baud rate, if any
fix review comments by Andy Shevchenko
* change board variable name and type
* use ternary operators
* use #defines instead of magic numbers
* simplify speed check and use uart_get_baud_rate()
* zero-init uart structure
* re-organized probing calls
v6..v7
fix review comments by Andy Shevchenko
not applying Acked-by as the 1st change is big
* handle unsupported tty modes correctly
* remove extra check of platform_get_resource() result
* propagate error code from devm_ioremap_resource()
* drop uart.port.iobase for UPIO_MEM device
v5..v6
fix review comments by Arnd Bergmann
* remove wildcards from compatible
* update doc file
* drop interrupt parent from doc file
* replace uart w/ serial in device names in doc file
fix review comments by Andy Shevchenko
* exchange labels in switch block
* replace iowrite8() with writeb()
* compact comment to one line
v4..v5
* constify struct of_device_id
* drop .owner from struct platform_driver
* rewrite set_termios() baud rate hadnling as suggested by Alan Cox
v3..v4
* move DTS bindings to a different patch (8/21) as suggested by Heikki Krogerus
v2..v3
* no changes (except number 10/16 -> 12/21)
v0..v2
* register platform driver instead of platform device
* use device tree
* use devm helpers where possible
.../bindings/serial/icpdas-lp8841-uart.txt | 41 +++++ drivers/tty/serial/8250/8250_lp8841.c | 173 +++++++++++++++++++++ drivers/tty/serial/8250/Kconfig | 14 ++ drivers/tty/serial/8250/Makefile | 2 + 4 files changed, 230 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt create mode 100644 drivers/tty/serial/8250/8250_lp8841.c
Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt new file +41 -0
@@ -0,0 +1,41 @@ +* UART ports on ICP DAS LP-8841 + +LP-8441, LP-8141 and LP-8041 are fully compatible. + +ICP DAS LP-8841 contains three additional serial ports interfaced via +Analog Devices ADM213EA chips in addition to 3 serial ports on PXA CPU. + +The chips themselves are standard, they would work with 8250_core if +properly connected. However, they are not connected normally. Al least +some of their config pins are wired to a different address region. So +the driver is board-specific. + +Required properties: +- compatible : should be "icpdas,uart-lp8841" + +- reg : should provide 16 byte man IO memory region and 1 byte region for + termios + +- interrupts : should provide interrupt + +Optional property: +- interrupt-parent : should provide a link to interrupt controller either + explicitly or implicitly from a parent node + +Examples (from pxa27x-lp8x4x.dts): + + serial@9050 { + compatible = "icpdas,uart-lp8841"; + reg = <0x9050 0x10 + 0x9030 0x02>; + interrupts = <13>; + status = "okay"; + }; + + serial@9060 { + compatible = "icpdas,uart-lp8841"; + reg = <0x9060 0x10 + 0x9032 0x02>; + interrupts = <14>; + status = "okay"; + };
drivers/tty/serial/8250/8250_lp8841.c new file +173 -0
173 lines not on this page · raw message
drivers/tty/serial/8250/Kconfig +14 -0
@@ -394,3 +394,17 @@ config SERIAL_8250_PXA help If you have a machine based on an Intel XScale PXA2xx CPU you can enable its onboard serial ports by enabling this option. + + If you choose M here, the module name will be 8250_pxa. + +config SERIAL_8250_LP8841 + tristate "Support 16550A ports on ICP DAS LP-8841" + depends on SERIAL_8250 && MACH_PXA27X_DT + select LP8841_IRQ + help + In addition to serial ports on PXA270 SoC, LP-8841 has 1 dual + RS232/RS485 port, 1 RS485 port and 1 RS232 port. + + Say N here, unless you plan to run this kernel on a LP-8841 system. + + If you choose M here, the module name will be 8250_lp8841.
drivers/tty/serial/8250/Makefile +2 -0
@@ -18,6 +18,7 @@ obj-$(CONFIG_SERIAL_8250_ACCENT) += 8250_accent.o obj-$(CONFIG_SERIAL_8250_BOCA) += 8250_boca.o obj-$(CONFIG_SERIAL_8250_EXAR_ST16C554) += 8250_exar_st16c554.o obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o +obj-$(CONFIG_SERIAL_8250_LP8X4X) += 8250_lp8x4x.o obj-$(CONFIG_SERIAL_8250_FSL) += 8250_fsl.o obj-$(CONFIG_SERIAL_8250_DW) += 8250_dw.o obj-$(CONFIG_SERIAL_8250_EM) += 8250_em.o
@@ -30,5 +31,6 @@ obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o obj-$(CONFIG_SERIAL_OF_PLATFORM) += 8250_of.o obj-$(CONFIG_SERIAL_8250_PXA) += 8250_pxa.o +obj-$(CONFIG_SERIAL_8250_LP8841) += 8250_lp8841.o CFLAGS_8250_ingenic.o += -I$(srctree)/scripts/dtc/libfdt
Signature · 1 line
2.7.0
PATCH v9 1/1 serial: support for 16550A serial ports on LP-8x4x
The patch adds support for 3 additional LP-8x4x built-in serial ports.
The device can also host up to 8 extension cards with 4 serial ports on each card for a total of 35 ports. However, I don't have the hardware to test extension cards, so they are not supported, yet.
---
CC: Alan Cox <gnomes-qBU/[email protected]>
CC: Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/[email protected]>
CC: Arnd Bergmann <[email protected]>
v8..v9
fix review comments by Alan Cox
* further simplify speed check
v7..v8
* call serial8250_do_set_termios() after speed check, not before. This way clock divisor is properly inited for the new baud rate, if any
fix review comments by Andy Shevchenko
* change board variable name and type
* use ternary operators
* use #defines instead of magic numbers
* simplify speed check and use uart_get_baud_rate()
* zero-init uart structure
* re-organized probing calls
v6..v7
fix review comments by Andy Shevchenko
not applying Acked-by as the 1st change is big
* handle unsupported tty modes correctly
* remove extra check of platform_get_resource() result
* propagate error code from devm_ioremap_resource()
* drop uart.port.iobase for UPIO_MEM device
v5..v6
fix review comments by Arnd Bergmann
* remove wildcards from compatible
* update doc file
* drop interrupt parent from doc file
* replace uart w/ serial in device names in doc file
fix review comments by Andy Shevchenko
* exchange labels in switch block
* replace iowrite8() with writeb()
* compact comment to one line
v4..v5
* constify struct of_device_id
* drop .owner from struct platform_driver
* rewrite set_termios() baud rate hadnling as suggested by Alan Cox
v3..v4
* move DTS bindings to a different patch (8/21) as suggested by Heikki Krogerus
v2..v3
* no changes (except number 10/16 -> 12/21)
v0..v2
* register platform driver instead of platform device
* use device tree
* use devm helpers where possible
.../bindings/serial/icpdas-lp8841-uart.txt | 41 ++++++ drivers/tty/serial/8250/8250_lp8841.c | 159 +++++++++++++++++++++ drivers/tty/serial/8250/Kconfig | 14 ++ drivers/tty/serial/8250/Makefile | 2 + 4 files changed, 216 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt create mode 100644 drivers/tty/serial/8250/8250_lp8841.c
Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt new file +41 -0
@@ -0,0 +1,41 @@ +* UART ports on ICP DAS LP-8841 + +LP-8441, LP-8141 and LP-8041 are fully compatible. + +ICP DAS LP-8841 contains three additional serial ports interfaced via +Analog Devices ADM213EA chips in addition to 3 serial ports on PXA CPU. + +The chips themselves are standard, they would work with 8250_core if +properly connected. However, they are not connected normally. Al least +some of their config pins are wired to a different address region. So +the driver is board-specific. + +Required properties: +- compatible : should be "icpdas,uart-lp8841" + +- reg : should provide 16 byte man IO memory region and 1 byte region for + termios + +- interrupts : should provide interrupt + +Optional property: +- interrupt-parent : should provide a link to interrupt controller either + explicitly or implicitly from a parent node + +Examples (from pxa27x-lp8x4x.dts): + + serial@9050 { + compatible = "icpdas,uart-lp8841"; + reg = <0x9050 0x10 + 0x9030 0x02>; + interrupts = <13>; + status = "okay"; + }; + + serial@9060 { + compatible = "icpdas,uart-lp8841"; + reg = <0x9060 0x10 + 0x9032 0x02>; + interrupts = <14>; + status = "okay"; + };
drivers/tty/serial/8250/8250_lp8841.c new file +159 -0
159 lines not on this page · raw message
drivers/tty/serial/8250/Kconfig +14 -0
@@ -394,3 +394,17 @@ config SERIAL_8250_PXA help If you have a machine based on an Intel XScale PXA2xx CPU you can enable its onboard serial ports by enabling this option. + + If you choose M here, the module name will be 8250_pxa. + +config SERIAL_8250_LP8841 + tristate "Support 16550A ports on ICP DAS LP-8841" + depends on SERIAL_8250 && MACH_PXA27X_DT + select LP8841_IRQ + help + In addition to serial ports on PXA270 SoC, LP-8841 has 1 dual + RS232/RS485 port, 1 RS485 port and 1 RS232 port. + + Say N here, unless you plan to run this kernel on a LP-8841 system. + + If you choose M here, the module name will be 8250_lp8841.
drivers/tty/serial/8250/Makefile +2 -0
@@ -18,6 +18,7 @@ obj-$(CONFIG_SERIAL_8250_ACCENT) += 8250_accent.o obj-$(CONFIG_SERIAL_8250_BOCA) += 8250_boca.o obj-$(CONFIG_SERIAL_8250_EXAR_ST16C554) += 8250_exar_st16c554.o obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o +obj-$(CONFIG_SERIAL_8250_LP8X4X) += 8250_lp8x4x.o obj-$(CONFIG_SERIAL_8250_FSL) += 8250_fsl.o obj-$(CONFIG_SERIAL_8250_DW) += 8250_dw.o obj-$(CONFIG_SERIAL_8250_EM) += 8250_em.o
@@ -30,5 +31,6 @@ obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o obj-$(CONFIG_SERIAL_OF_PLATFORM) += 8250_of.o obj-$(CONFIG_SERIAL_8250_PXA) += 8250_pxa.o +obj-$(CONFIG_SERIAL_8250_LP8841) += 8250_lp8841.o CFLAGS_8250_ingenic.o += -I$(srctree)/scripts/dtc/libfdt
Signature · 6 lines
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Re: [PATCH v9] serial: support for 16550A serial ports on LP-8x4x
Quoted 9 lines · Sergei Ianovich
The patch adds support for 3 additional LP-8x4x built-in serial ports.
The device can also host up to 8 extension cards with 4 serial ports on each card for a total of 35 ports. However, I don't have the hardware to test extension cards, so they are not supported, yet.
Sorry, but still few nitpicks and then
drivers/tty/serial/8250/8250_lp8841.c line 25
Quoted 2 lines
drivers/tty/serial/8250/8250_lp8841.c new file +2
-0+#define LP8841_DATA_LEN_MASK 0x3 +#define LP8841_DATA_LEN_SHIFT_OFFSET 3
No need to have _OFFSET suffix.
drivers/tty/serial/8250/8250_lp8841.c line 33
Quoted 9 lines
drivers/tty/serial/8250/8250_lp8841.c new file +8
-0+ +static void lp8841_serial_set_termios (struct uart_port *port, +struct ktermios *termios,struct ktermios *old) +{ +unsigned int baud; +u8 value; +unsigned int old_csize = old ? old->c_cflag &CSIZE :CS8 ; +struct lp8841_serial_data *data = port->private_data;
I would rearrange to have assignments first in the definition block.
Code duplication (no idea if it worth to fix):
+ case 2400:
+ value |= 1;
+ break;
+ default:
+ value |= 1; + tty_termios_encode_baud_rate(termios, 2400, 2400); + break;
drivers/tty/serial/8250/8250_lp8841.c line 96
Quoted 3 lines
drivers/tty/serial/8250/8250_lp8841.c new file +3
-0+static int lp8841_serial_probe (struct platform_device *pdev) +{ +struct uart_8250_port uart = {};
No need {} since memset().
drivers/tty/serial/8250/8250_lp8841.c line 101
Quoted 5 lines
drivers/tty/serial/8250/8250_lp8841.c new file +5
-0+struct lp8841_serial_data *data; +struct resource *mmres, *mires; +int ret; + +memset (&uart,0 ,sizeof (uart));
Move this closer to the first assignment of a field.
Quoted 4 lines
drivers/tty/serial/8250/8250_lp8841.c new file +4
-0+ + mmres =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); +if (!mmres) +return -ENODEV ;
drivers/tty/serial/8250/8250_lp8841.c line 115
Quoted 10 lines
drivers/tty/serial/8250/8250_lp8841.c new file +10
-0+ + data =devm_kzalloc (&pdev->dev,sizeof (*data),GFP_KERNEL ); +if (!data) +return -ENOMEM ; + + mires =platform_get_resource (pdev,IORESOURCE_MEM ,1 ); + data->ios_mem =devm_ioremap_resource (&pdev->dev, mires); +if (IS_ERR (data->ios_mem)) +return PTR_ERR (data->ios_mem); +
+ memset(&uart, 0, sizeof(uart));
Quoted 9 lines
drivers/tty/serial/8250/8250_lp8841.c new file +9
-0+ uart.port.iotype =UPIO_MEM ; + uart.port.mapbase = mmres->start; + uart.port.regshift =1 ; + uart.port.irq =platform_get_irq (pdev,0 ); + uart.port.flags =UPF_IOREMAP ; + uart.port.dev = &pdev->dev; + uart.port.uartclk =14745600 ; + uart.port.set_termios = lp8841_serial_set_termios; + uart.port.private_data = data;
Signature · 6 lines
With Best Regards, Andy Shevchenko -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
PATCH v10 1/1 serial: support for 16550A serial ports on LP-8x4x
In reply to Sergei IanovichThe patch adds support for 3 additional LP-8x4x built-in serial ports.
The device can also host up to 8 extension cards with 4 serial ports on each card for a total of 35 ports. However, I don't have the hardware to test extension cards, so they are not supported, yet.
---
CC: Alan Cox <[email protected]>
CC: Arnd Bergmann <[email protected]>
v9..v10
fix review comments by Andy Shevchenko
* fix code styling
v8..v9
fix review comments by Alan Cox
* further simplify speed check
v7..v8
* call serial8250_do_set_termios() after speed check, not before. This way clock divisor is properly inited for the new baud rate, if any
fix review comments by Andy Shevchenko
* change board variable name and type
* use ternary operators
* use #defines instead of magic numbers
* simplify speed check and use uart_get_baud_rate()
* zero-init uart structure
* re-organized probing calls
v6..v7
fix review comments by Andy Shevchenko
not applying Acked-by as the 1st change is big
* handle unsupported tty modes correctly
* remove extra check of platform_get_resource() result
* propagate error code from devm_ioremap_resource()
* drop uart.port.iobase for UPIO_MEM device
v5..v6
fix review comments by Arnd Bergmann
* remove wildcards from compatible
* update doc file
* drop interrupt parent from doc file
* replace uart w/ serial in device names in doc file
fix review comments by Andy Shevchenko
* exchange labels in switch block
* replace iowrite8() with writeb()
* compact comment to one line
v4..v5
* constify struct of_device_id
* drop .owner from struct platform_driver
* rewrite set_termios() baud rate hadnling as suggested by Alan Cox
v3..v4
* move DTS bindings to a different patch (8/21) as suggested by Heikki Krogerus
v2..v3
* no changes (except number 10/16 -> 12/21)
v0..v2
* register platform driver instead of platform device
* use device tree
* use devm helpers where possible
.../bindings/serial/icpdas-lp8841-uart.txt | 41 ++++++ drivers/tty/serial/8250/8250_lp8841.c | 156 +++++++++++++++++++++ drivers/tty/serial/8250/Kconfig | 14 ++ drivers/tty/serial/8250/Makefile | 2 + 4 files changed, 213 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt create mode 100644 drivers/tty/serial/8250/8250_lp8841.c
Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt new file +41 -0
@@ -0,0 +1,41 @@ +* UART ports on ICP DAS LP-8841 + +LP-8441, LP-8141 and LP-8041 are fully compatible. + +ICP DAS LP-8841 contains three additional serial ports interfaced via +Analog Devices ADM213EA chips in addition to 3 serial ports on PXA CPU. + +The chips themselves are standard, they would work with 8250_core if +properly connected. However, they are not connected normally. Al least +some of their config pins are wired to a different address region. So +the driver is board-specific. + +Required properties: +- compatible : should be "icpdas,uart-lp8841" + +- reg : should provide 16 byte man IO memory region and 1 byte region for + termios + +- interrupts : should provide interrupt + +Optional property: +- interrupt-parent : should provide a link to interrupt controller either + explicitly or implicitly from a parent node + +Examples (from pxa27x-lp8x4x.dts): + + serial@9050 { + compatible = "icpdas,uart-lp8841"; + reg = <0x9050 0x10 + 0x9030 0x02>; + interrupts = <13>; + status = "okay"; + }; + + serial@9060 { + compatible = "icpdas,uart-lp8841"; + reg = <0x9060 0x10 + 0x9032 0x02>; + interrupts = <14>; + status = "okay"; + };
drivers/tty/serial/8250/8250_lp8841.c new file +156 -0
156 lines not on this page · raw message
drivers/tty/serial/8250/Kconfig +14 -0
@@ -394,3 +394,17 @@ config SERIAL_8250_PXA help If you have a machine based on an Intel XScale PXA2xx CPU you can enable its onboard serial ports by enabling this option. + + If you choose M here, the module name will be 8250_pxa. + +config SERIAL_8250_LP8841 + tristate "Support 16550A ports on ICP DAS LP-8841" + depends on SERIAL_8250 && MACH_PXA27X_DT + select LP8841_IRQ + help + In addition to serial ports on PXA270 SoC, LP-8841 has 1 dual + RS232/RS485 port, 1 RS485 port and 1 RS232 port. + + Say N here, unless you plan to run this kernel on a LP-8841 system. + + If you choose M here, the module name will be 8250_lp8841.
drivers/tty/serial/8250/Makefile +2 -0
@@ -18,6 +18,7 @@ obj-$(CONFIG_SERIAL_8250_ACCENT) += 8250_accent.o obj-$(CONFIG_SERIAL_8250_BOCA) += 8250_boca.o obj-$(CONFIG_SERIAL_8250_EXAR_ST16C554) += 8250_exar_st16c554.o obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o +obj-$(CONFIG_SERIAL_8250_LP8X4X) += 8250_lp8x4x.o obj-$(CONFIG_SERIAL_8250_FSL) += 8250_fsl.o obj-$(CONFIG_SERIAL_8250_DW) += 8250_dw.o obj-$(CONFIG_SERIAL_8250_EM) += 8250_em.o
@@ -30,5 +31,6 @@ obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o obj-$(CONFIG_SERIAL_OF_PLATFORM) += 8250_of.o obj-$(CONFIG_SERIAL_8250_PXA) += 8250_pxa.o +obj-$(CONFIG_SERIAL_8250_LP8841) += 8250_lp8841.o CFLAGS_8250_ingenic.o += -I$(srctree)/scripts/dtc/libfdt
Signature · 1 line
2.7.0
Rob Herring
maintainerRe: [PATCH v10] serial: support for 16550A serial ports on LP-8x4x
Quoted 6 lines · Sergei Ianovich
The patch adds support for 3 additional LP-8x4x built-in serial ports.
The device can also host up to 8 extension cards with 4 serial ports on each card for a total of 35 ports. However, I don't have the hardware to test extension cards, so they are not supported, yet.
That's a lot of serial ports...
[...]
Quoted 6 lines
Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt new file +0
-0
Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt line 8
Quoted 8 lines
Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt new file +8
-0@@ -0,0 +1,41 @@ +* UART ports on ICP DAS LP-8841 + +LP-8441, LP-8141 and LP-8041 are fully compatible. + +ICP DAS LP-8841 contains three additional serial ports interfaced via +Analog Devices ADM213EA chips in addition to 3 serial ports on PXA CPU. + +The chips themselves are standard, they would work with 8250_core if
Describe in h/w terms how they are different, not what Linux driver won't work.
Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt line 9
Quoted 1 line
Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt new file +1
-0+properly connected. However, they are not connected normally. Al least
s/Al/At/
Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt line 16
Quoted 7 lines
Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt new file +7
-0+some of their config pins are wired to a different address region. So +the driver is board-specific. + +Required properties: +- compatible : should be "icpdas,uart-lp8841" + +- reg : should provide 16 byte man IO memory region and 1 byte region for
What is "man IO"?
Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt line 17
Quoted 1 line
Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt new file +1
-0+ termios
termios is a Linux term.
Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt line 19
Quoted 2 lines
Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt new file +2
-0+ +- interrupts : should provide interrupt
Perhaps you should include other properties standard for 8250 such as access size or shift. Possibly if the non-standard bits are already configured, the UART could be used for earlycon?
Quoted 22 lines
Documentation/devicetree/bindings/serial/icpdas-lp8841-uart.txt new file +22
-0+ +Optional property: +- interrupt-parent : should provide a link to interrupt controller either + explicitly or implicitly from a parent node + +Examples (from pxa27x-lp8x4x.dts): + + serial@9050 { + compatible = "icpdas,uart-lp8841"; + reg = <0x9050 0x10 + 0x9030 0x02>; + interrupts = <13>; + status = "okay"; + }; + + serial@9060 { + compatible = "icpdas,uart-lp8841"; + reg = <0x9060 0x10 + 0x9032 0x02>; + interrupts = <14>; + status = "okay"; + };
[...]
Quoted 5 lines
drivers/tty/serial/8250/Kconfig +0
-0
drivers/tty/serial/8250/Kconfig config SERIAL_8250_PXA · line 403
Quoted 10 lines
drivers/tty/serial/8250/Kconfig +7
-0@@ -394,3 +394,17 @@ config SERIAL_8250_PXA help If you have a machine based on an Intel XScale PXA2xx CPU you can enable its onboard serial ports by enabling this option. + + If you choose M here, the module name will be 8250_pxa. + +config SERIAL_8250_LP8841 + tristate "Support 16550A ports on ICP DAS LP-8841" + depends on SERIAL_8250 && MACH_PXA27X_DT + select LP8841_IRQ
Generally, drivers don't select their interrupt controller.
Quoted 13 lines
drivers/tty/serial/8250/Kconfig +7
-0+ help + In addition to serial ports on PXA270 SoC, LP-8841 has 1 dual + RS232/RS485 port, 1 RS485 port and 1 RS232 port. + + Say N here, unless you plan to run this kernel on a LP-8841 system. + + If you choose M here, the module name will be 8250_lp8841.drivers/tty/serial/8250/Makefile +0
-0
drivers/tty/serial/8250/Makefile obj-$(CONFIG_SERIAL_8250_ACCENT) += 8250_accent.o · line 22
Quoted 5 lines
drivers/tty/serial/8250/Makefile +1
-0@@ -18,6 +18,7 @@ obj-$(CONFIG_SERIAL_8250_ACCENT) += 8250_accent.o obj-$(CONFIG_SERIAL_8250_BOCA) += 8250_boca.o obj-$(CONFIG_SERIAL_8250_EXAR_ST16C554) += 8250_exar_st16c554.o obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o +obj-$(CONFIG_SERIAL_8250_LP8X4X) += 8250_lp8x4x.o
This should be dropped.
drivers/tty/serial/8250/Makefile obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o · line 34
Quoted 8 lines
drivers/tty/serial/8250/Makefile +0
-0obj-$(CONFIG_SERIAL_8250_FSL) += 8250_fsl.o obj-$(CONFIG_SERIAL_8250_DW) += 8250_dw.oobj-$(CONFIG_SERIAL_8250_EM) += 8250_em.o
drivers/tty/serial/8250/Makefile +1
-0@@ -30,5 +31,6 @@ obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o obj-$(CONFIG_SERIAL_OF_PLATFORM) += 8250_of.o obj-$(CONFIG_SERIAL_8250_PXA) += 8250_pxa.o +obj-$(CONFIG_SERIAL_8250_LP8841) += 8250_lp8841.o
This should be in alphabetical order. OF_PLATFORM is not for legacy reasons I think.
Quoted 5 lines
drivers/tty/serial/8250/Makefile +0
-0CFLAGS_8250_ingenic.o += -I$(srctree)/scripts/dtc/libfdtSignature · 1 line
2.7.0
Re: [PATCH v4 00/21] ARM: support for ICP DAS LP-8x4x (with dts)
In reply to Sergei IanovichHi,
Quoted 4 lines · Sergei Ianovich
We had an intensive discussion of the series in the beginning of December 2013 [1]. The discussion resulted in 3 versions of the series in less than 3 weeks. Then there was a decision to block this series until Daniel Mack's DMA-engine-for-PXA series is ready.
For whatever reason, I only received patches 1-8 out of 21 in this series.
Quoted 3 lines
Unfortunately Daniel neigther agrees to review my trivial temporary solution to the DMA-in-device-tree (patch 7 of 21), nor he is active in DMA series development. There is no progress for 3 months.
Well, IIRC, I asked you to look into the MMC performance regressions that you reported and see what we can do about them. I currently don't have hardware to reproduce this, so I can't do it myself.
My impression is that the transisiton will only be painless if the mmp_pdma driver provides comparable performance to the existing implementation. I also still think that adding hacks to the drivers to manually parse the dma properties (as in #8) brings us further away from a proper solution, not closer.
Quoted 2 lines
As with any big out of tree series, its support is painful. It requires extensive merging when doing bisects, on each step.
I know that, and I'm not violently against getting your patches in. I was just hoping for some help around here in order to sort out things and implement it properly. The reason why I haven't been working on these drivers lately is simply the sheer lack of time :(
Thanks,
Daniel
Re: [PATCH v4 00/21] ARM: support for ICP DAS LP-8x4x (with dts)
Quoted 11 lines · Daniel Mack
Hi,
Quoted 2 lines · Sergei Ianovich
We had an intensive discussion of the series in the beginning of December 2013 [1]. The discussion resulted in 3 versions of the
series
Quoted 2 lines
in less than 3 weeks. Then there was a decision to block this series until Daniel Mack's DMA-engine-for-PXA series is ready.
For whatever reason, I only received patches 1-8 out of 21 in this series.
The rest is related to exotic parts of the tree and 'scripts/get_maintainer.pl' decided not to spam you. The whole series is sent to both lkml and arm lists. I can add you to cc by hand if you are interested.
Quoted 7 lines
Quoted 3 lines
Unfortunately Daniel neigther agrees to review my trivial temporary solution to the DMA-in-device-tree (patch 7 of 21), nor he is active in DMA series development. There is no progress for 3 months.
Well, IIRC, I asked you to look into the MMC performance regressions that you reported and see what we can do about them. I currently don't have hardware to reproduce this, so I can't do it myself.
I hate to point fingers, but you promissed to refresh the code on several occasions. It is from 3.8 tree at the moment. The regression may be introduced by an error in my merging of your patches. I published the one I tested in one piece with the results.
Quoted 6 lines
My impression is that the transisiton will only be painless if the
mmp_pdmadriver provides comparable performance to the existing implementation. I also still think that adding hacks to the drivers to manually parse the dma properties (as in #8) brings us further away from
a proper solution, not closer
No doubt about that. But the regression is not the only problem. Driver for video capture requires an extensive rewrite as well. The result is that a working pxa DT device is kept out of the tree and there is no supported DT devices in tree. So no proper examples for new devices and no drive-by improvements. All of this prevents rather than facilitates eventual DT migration of tha PXA platform.
Daniel Mack
maintainerRe: [PATCH v4 00/21] ARM: support for ICP DAS LP-8x4x (with dts)
Quoted 9 lines · Sergei Ianovich
Quoted 4 lines
Well, IIRC, I asked you to look into the MMC performance regressions that you reported and see what we can do about them. I currently don't have hardware to reproduce this, so I can't do it myself.
I hate to point fingers, but you promissed to refresh the code on several occasions. It is from 3.8 tree at the moment. The regression may be introduced by an error in my merging of your patches. I published the one I tested in one piece with the results.
Ok, well. I didn't see this as a potential reason, sorry. Point taken.
I spent some hours on this topic again now, and rebased and tested my tree to 3.15-rc1. Pushed it here:
https://github.com/zonque/linux/tree/pxa-dma-3.15
There's some overlap to the patches you sent, which I'll comment on directly soon.
I'm booting my board with pxa[23]xx.dtsi taken from my tree.
Please, if you find some time, test this tree and see if you still see the performance regression.
Quoted 8 lines
Quoted 5 lines
My impression is that the transisiton will only be painless if the
mmp_pdmadriver provides comparable performance to the existing implementation. I also still think that adding hacks to the drivers to manually parse the dma properties (as in #8) brings us further away from a proper solution, not closerNo doubt about that. But the regression is not the only problem. Driver for video capture requires an extensive rewrite as well.
Jup, I totally see your point. I was hoping for more support from someone with access to hardware to work on this, and possibly add the missing bits to the DMA framework to make the hot-linking possible. This didn't happen, which is unfortunate, so we in fact might need to recondider on how to move forward here.
Quoted 5 lines
The
result is that a working pxa DT device is kept out of the tree and there is no supported DT devices in tree. So no proper examples for new devices and no drive-by improvements. All of this prevents rather than facilitates eventual DT migration of tha PXA platform.
Ok, so how about this:
1. We keep the old API around, along with compat wrappers for existing drivers until someone finally finds time to at least test the patches that I can only compile-test myself.
2. For platforms that don't need those exotic drivers for devices that nobody seems to be interested in, use DT and the pxa-mmp-dma driver, and make sure it performs as well as the old implementation.
3. Do not add hacks for DT-compatability of existing drivers to make them work with the old DMA implementation (like your patch #7).
4. For new drivers, don't add any compat code for the old DMA implementation but soley rely on the new DMA framework.
Does this sound suitable for you?
Thanks,
Daniel
Re: [PATCH v4 00/21] ARM: support for ICP DAS LP-8x4x (with dts)
Quoted 4 lines · Daniel Mack
I spent some hours on this topic again now, and rebased and tested my tree to 3.15-rc1. Pushed it here:
Great.
Quoted 7 lines
There's some overlap to the patches you sent, which I'll comment on directly soon.
I'm booting my board with pxa[23]xx.dtsi taken from my tree.
Please, if you find some time, test this tree and see if you still see the performance regression.
Sure.
Quoted 13 lines
Ok, so how about this:
1. We keep the old API around, along with compat wrappers for existing drivers until someone finally finds time to at least test the patches that I can only compile-test myself.
2. For platforms that don't need those exotic drivers for devices that nobody seems to be interested in, use DT and the pxa-mmp-dma driver, and make sure it performs as well as the old implementation.
3. Do not add hacks for DT-compatability of existing drivers to make them work with the old DMA implementation (like your patch #7).
Quoted 6 lines
4. For new drivers, don't add any compat code for the old DMA implementation but soley rely on the new DMA framework.
Does this sound suitable for you?
No. I see no value in #3. There are obvious reasons to use DT whenever possible. #3 effectively blocks DT usage for new devices. I have all the reasons to believe, that LP-8x4x support would already have be merged, if I didn't try to use DT.
My plan:
A. We need to know whether the new DMA implementation performs on par with the old one. (I'm starting to check).
if so
B. We need to thinks whether it's acceptable to kill support for video capture.
In short:
if (A && B)
we drop old DMA
else
we take my patch #7
Daniel Mack
maintainerRe: [PATCH v4 00/21] ARM: support for ICP DAS LP-8x4x (with dts)
Quoted 13 lines · Sergei Ianovich
Quoted 11 lines · Daniel Mack
1. We keep the old API around, along with compat wrappers for existing drivers until someone finally finds time to at least test the patches that I can only compile-test myself.
2. For platforms that don't need those exotic drivers for devices that nobody seems to be interested in, use DT and the pxa-mmp-dma driver, and make sure it performs as well as the old implementation.
3. Do not add hacks for DT-compatability of existing drivers to make them work with the old DMA implementation (like your patch #7).
Quoted 7 lines
Quoted 4 lines
4. For new drivers, don't add any compat code for the old DMA implementation but soley rely on the new DMA framework.
Does this sound suitable for you?
No. I see no value in #3. There are obvious reasons to use DT whenever possible.
Of course. But if you do, you should really use the mmp-pdma driver, and make sure it works. That way, that driver gets more test coverage. Please, let's *not* introduce new hacks that lead to more users of the old DMA API instead.
Quoted 1 line
#3 effectively blocks DT usage for new devices.
No, it doesn't. It just makes sure those new boards use the new dma implementation, and obtain their DMA runtime information from the common APIs. After all, the problem here is the lack of users who are willing to dig into the DMA bits of the drivers they're using. By making it a requirement to use the new pdma driver, we can possibly change that.
Quoted 3 lines
I have all the
reasons to believe, that LP-8x4x support would already have be merged, if I didn't try to use DT.
That might be, but that's not the point. We want progress here, and that means we occasionally have to get rid of legacy.
Quoted 3 lines
My plan:
A. We need to know whether the new DMA implementation performs on par with the old one. (I'm starting to check).
Good, thanks!
Quoted 3 lines
if so
B. We need to thinks whether it's acceptable to kill support for video capture.
We can't. As I said, for this particular driver, we can keep the old API around. We can even make it depend on !CONFIG_DMA_ENGINE, so if anyone actually wants to use it with DT-enabled boards, we finally have a user and things can be fixed up. Similar for other drivers we can't test ourselves.
Quoted 6 lines
In short:
if (A && B)
we drop old DMA
else
we take my patch #7
If A works, there's no need to for patch #7, right? If A doesn't work, we have to check why and fix it.
Arnd, any oppinion on this?
Thanks,
Daniel
Arnd Bergmann
maintainerRe: [PATCH v4 00/21] ARM: support for ICP DAS LP-8x4x (with dts)
Quoted 8 lines · Daniel Mack
Quoted 4 lines · Sergei Ianovich
On Thu, 2014-04-17 at 12:38 +0200, Daniel Mack wrote
I have all the
reasons to believe, that LP-8x4x support would already have be merged, if I didn't try to use DT.That might be, but that's not the point. We want progress here, and that means we occasionally have to get rid of legacy.
In most cases, I would strongly support that statement. However, for PXA in particular, my opinion is that progress is not the highest priority as I see no realistic hope of converting all the existing machines over to use DT and change the platform to "multiplatform" support. Anything more modern than PXA I hope we can eventually get at least done for multiplatform, same for a few of the older and simpler platforms.
Then again, I'm certainly not stopping you from trying to use add modern platforms to PXA.
One of the ideas I had earlier was to extend mach-mmp enough to run any fully DT-enabled PXA machines and leave mach-pxa for the old ATAGS support and stuff like the legacy DMA support. However, I don't think we should try that as long as mach-mmp is lacking some essential DT support, e.g. for the clocks that were only partially converted to use the common clock framework.
Quoted 9 lines
Quoted 3 lines
if so
B. We need to thinks whether it's acceptable to kill support for video capture.We can't. As I said, for this particular driver, we can keep the old API around. We can even make it depend on !CONFIG_DMA_ENGINE, so if anyone actually wants to use it with DT-enabled boards, we finally have a user and things can be fixed up. Similar for other drivers we can't test ourselves.
Sounds good to me.
Quoted 11 lines
Quoted 6 lines
In short:
if (A && B)
we drop old DMA
else
we take my patch #7If A works, there's no need to for patch #7, right? If A doesn't work, we have to check why and fix it.
Arnd, any oppinion on this?
No strong opinion, I wouldn't object patch #7 if there is a strong reason to not use the dmaengine driver for PXA like I would object doing it for MMP. Then again, I see that you and recently also Laurent are driving a lot of good work on PXA, and if neither the arm-soc maintainers nor the three maintainers listed for mach-pxa have a strong opinion, I'd rather leave it up to your judgement.
Arnd
v4 cover series to support for ICP DAS LP-8x4x (ARM PXA270)
In reply to Sergei IanovichPXA device tree support has almost grown to the level when it becomes possible to add device support without code changes. Thanks to everyone involved.
The only obstacle with this device is character device major index conflict between pxa serial and 8250 serial drivers. The first patch fixes the conflict rewriting pxa serial using 8250 serial driver.
Device support is now close to 95%, pluggable module support is at around 20%. It should be possible to handle most unsupported modules by already working get_DI/DO/AO set_DO/AO functions. I am not including support, since I didn't actually test the hardware. The same is true about RS232/485 pluggable port.
ICP DAS calls LP-8x4x 'programmable automation controller'. It is an industrial computer based on PXA270 SoC. They ship it with a 2.6.19 kernel and proprietary kernel module and userspace library to access its industrial IO.
This patch allows to boot the device with a modern kernel with device tree. It adds support for:
* MMC card interface on PXA270
* USB 1.1 port on PXA270
* 2 NOR flash devices
* 2 onboard ethernet Davicom DM9000 devices
* 3 serial UART ports on PXA270
* front panel red LED
* 64bit 1-wire system ID chip
* 16 kiB EEPROM (reading)
Support for the following devices will be added in separate patches, since they are not currently supported by the kernel:
* DS1302 RTC
* 512kiB SRAM
* FPGA irq chip
* 3 built-in 16550A serial UART ports
* industrial IO parallel bus
* 10 position rotary switch
* 8 pin DIP switch
* 16 kiB EEPROM (writing)
* serial interface for digital and analog industrial IO modules on parallel bus (all I-87xxx modules)
* digital and analog industrial IO modules for parallel bus:
** I-8024 4 port analog output
** I-8041 32 port digital output
** I-8042 16 port digital output/16 port digital input
Not supported for now:
* VGA interface on PXA270 for lack of dts binding
* the rest of parallel bus (I-8xxx) modules for lack of hardware
* GPIO reset for lack of relevance (watchdog reset is working)
Sergei Ianovich (2):
serial: rewrite pxa2xx-uart to use 8250_core
arm: pxa27x: support for ICP DAS LP-8x4x w/ DT
.../devicetree/bindings/vendor-prefixes.txt | 1 + arch/arm/boot/dts/Makefile | 3 + arch/arm/boot/dts/pxa27x-lp8x4x-i105.dts | 50 ++ arch/arm/boot/dts/pxa27x-lp8x4x.dts | 260 ++++++ arch/arm/configs/am200epdkit_defconfig | 5 +- arch/arm/configs/cm_x2xx_defconfig | 5 +- arch/arm/configs/cm_x300_defconfig | 5 +- arch/arm/configs/colibri_pxa270_defconfig | 5 +- arch/arm/configs/colibri_pxa300_defconfig | 5 +- arch/arm/configs/corgi_defconfig | 6 +- arch/arm/configs/em_x270_defconfig | 5 +- arch/arm/configs/ezx_defconfig | 5 +- arch/arm/configs/h5000_defconfig | 5 +- arch/arm/configs/imote2_defconfig | 5 +- arch/arm/configs/lp8x4x_defconfig | 176 ++++ arch/arm/configs/lpd270_defconfig | 5 +- arch/arm/configs/lubbock_defconfig | 5 +- arch/arm/configs/mainstone_defconfig | 5 +- arch/arm/configs/mmp2_defconfig | 5 +- arch/arm/configs/pcm027_defconfig | 5 +- arch/arm/configs/pxa168_defconfig | 5 +- arch/arm/configs/pxa255-idp_defconfig | 5 +- arch/arm/configs/pxa3xx_defconfig | 5 +- arch/arm/configs/pxa910_defconfig | 5 +- arch/arm/configs/raumfeld_defconfig | 5 +- arch/arm/configs/spitz_defconfig | 6 +- arch/arm/configs/trizeps4_defconfig | 5 +- arch/arm/configs/viper_defconfig | 6 +- arch/arm/configs/xcep_defconfig | 5 +- drivers/tty/serial/8250/8250_pxa.c | 177 ++++ drivers/tty/serial/8250/Kconfig | 9 + drivers/tty/serial/8250/Makefile | 1 + drivers/tty/serial/Kconfig | 23 - drivers/tty/serial/Makefile | 1 - drivers/tty/serial/pxa.c | 968 --------------------- 35 files changed, 749 insertions(+), 1043 deletions(-) create mode 100644 arch/arm/boot/dts/pxa27x-lp8x4x-i105.dts create mode 100644 arch/arm/boot/dts/pxa27x-lp8x4x.dts create mode 100644 arch/arm/configs/lp8x4x_defconfig create mode 100644 drivers/tty/serial/8250/8250_pxa.c delete mode 100644 drivers/tty/serial/pxa.c
Signature · 1 line
2.6.2
PATCH v4 1/2 serial: rewrite pxa2xx-uart to use 8250_core
pxa2xx-uart was a separate uart platform driver. It was declaring the same device names and numbers as 8250 driver. As a result, it was impossible to use 8250 driver on PXA SoCs.
Upon closer examination pxa2xx-uart turned out to be a clone of 8250_core driver.
Workaround for Erratum #19 according to Marvel(R) PXA270M Processor Specification Update (April 19, 2010) is dropped. 8250_core reads from FIFO immediately after checking DR bit in LSR.
---
The patch was reviewed/acked at version 3. Changes in version 4 are simple unbitrotting, so the flags are carried over.
changes v3..v4
* remove owner field from platform_driver structure
* make of_device_id structure constant
* use CONFIG_SERIAL_8250_PXA instead of CONFIG_SERIAL_PXA
changes v2..v3
* remove devm_free/put as suggested by Heikki Krogerus
* use SET_SYSTEM_SLEEP_PM_OPS macro to set pm ops as suggested by Heikki Krogerus
changes v1..v2
* actually implement workaround for E74 in dl_write as spooted by James Cameron
* added comment about E19 in commit message
arch/arm/configs/am200epdkit_defconfig | 5 +- arch/arm/configs/cm_x2xx_defconfig | 5 +- arch/arm/configs/cm_x300_defconfig | 5 +- arch/arm/configs/colibri_pxa270_defconfig | 5 +- arch/arm/configs/colibri_pxa300_defconfig | 5 +- arch/arm/configs/corgi_defconfig | 6 +- arch/arm/configs/em_x270_defconfig | 5 +- arch/arm/configs/ezx_defconfig | 5 +- arch/arm/configs/h5000_defconfig | 5 +- arch/arm/configs/imote2_defconfig | 5 +- arch/arm/configs/lpd270_defconfig | 5 +- arch/arm/configs/lubbock_defconfig | 5 +- arch/arm/configs/mainstone_defconfig | 5 +- arch/arm/configs/mmp2_defconfig | 5 +- arch/arm/configs/pcm027_defconfig | 5 +- arch/arm/configs/pxa168_defconfig | 5 +- arch/arm/configs/pxa255-idp_defconfig | 5 +- arch/arm/configs/pxa3xx_defconfig | 5 +- arch/arm/configs/pxa910_defconfig | 5 +- arch/arm/configs/raumfeld_defconfig | 5 +- arch/arm/configs/spitz_defconfig | 6 +- arch/arm/configs/trizeps4_defconfig | 5 +- arch/arm/configs/viper_defconfig | 6 +- arch/arm/configs/xcep_defconfig | 5 +- drivers/tty/serial/8250/8250_pxa.c | 177 ++++++ drivers/tty/serial/8250/Kconfig | 9 + drivers/tty/serial/8250/Makefile | 1 + drivers/tty/serial/Kconfig | 23 - drivers/tty/serial/Makefile | 1 - drivers/tty/serial/pxa.c | 968 ------------------------------ 30 files changed, 259 insertions(+), 1043 deletions(-) create mode 100644 drivers/tty/serial/8250/8250_pxa.c delete mode 100644 drivers/tty/serial/pxa.c
arch/arm/configs/am200epdkit_defconfig +3 -2
@@ -60,8 +60,9 @@ CONFIG_BLK_DEV_IDECS=m CONFIG_NETDEVICES=y CONFIG_NET_ETHERNET=y CONFIG_SMC91X=m -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y # CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set # CONFIG_HWMON is not set
arch/arm/configs/cm_x2xx_defconfig +3 -2
@@ -96,8 +96,9 @@ CONFIG_KEYBOARD_PXA27x=m CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_UCB1400=m # CONFIG_SERIO_SERPORT is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y CONFIG_LEGACY_PTY_COUNT=16 # CONFIG_HW_RANDOM is not set CONFIG_I2C=y
arch/arm/configs/cm_x300_defconfig +3 -2
@@ -80,8 +80,9 @@ CONFIG_TOUCHSCREEN_WM97XX=m # CONFIG_TOUCHSCREEN_WM9713 is not set # CONFIG_SERIO is not set # CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y # CONFIG_HW_RANDOM is not set CONFIG_I2C=y CONFIG_I2C_PXA=y
arch/arm/configs/colibri_pxa270_defconfig +3 -2
@@ -103,8 +103,9 @@ CONFIG_INPUT_TOUCHSCREEN=y CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=m CONFIG_SERIO_LIBPS2=y -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y CONFIG_HW_RANDOM=y CONFIG_I2C=y CONFIG_I2C_CHARDEV=y
arch/arm/configs/colibri_pxa300_defconfig +3 -2
@@ -31,8 +31,9 @@ CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_MISC=y CONFIG_INPUT_GPIO_ROTARY_ENCODER=y -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y CONFIG_HW_RANDOM=y CONFIG_DEBUG_GPIO=y # CONFIG_HWMON is not set
arch/arm/configs/corgi_defconfig +3 -3
@@ -131,10 +131,10 @@ CONFIG_TOUCHSCREEN_ADS7846=y CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=m # CONFIG_SERIO is not set -CONFIG_SERIAL_8250=m +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_CS=m -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y # CONFIG_LEGACY_PTYS is not set CONFIG_I2C=y CONFIG_I2C_PXA=y
arch/arm/configs/em_x270_defconfig +3 -2
@@ -90,8 +90,9 @@ CONFIG_TOUCHSCREEN_WM97XX=m # CONFIG_TOUCHSCREEN_WM9705 is not set # CONFIG_TOUCHSCREEN_WM9713 is not set # CONFIG_SERIO_SERPORT is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y CONFIG_LEGACY_PTY_COUNT=16 # CONFIG_HW_RANDOM is not set CONFIG_I2C=y
arch/arm/configs/ezx_defconfig +3 -2
@@ -214,8 +214,9 @@ CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=y CONFIG_INPUT_PCAP=y # CONFIG_SERIO is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y CONFIG_LEGACY_PTY_COUNT=8 # CONFIG_HW_RANDOM is not set CONFIG_I2C=y
arch/arm/configs/h5000_defconfig +3 -2
@@ -47,8 +47,9 @@ CONFIG_MTD_PHYSMAP=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y CONFIG_LEGACY_PTY_COUNT=32 # CONFIG_HW_RANDOM is not set # CONFIG_HWMON is not set
arch/arm/configs/imote2_defconfig +3 -2
@@ -192,8 +192,9 @@ CONFIG_INPUT_TOUCHSCREEN=y CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=y # CONFIG_SERIO is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y CONFIG_LEGACY_PTY_COUNT=8 # CONFIG_HW_RANDOM is not set CONFIG_I2C=y
arch/arm/configs/lpd270_defconfig +3 -2
@@ -38,8 +38,9 @@ CONFIG_SMC91X=y CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO_SERPORT is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y # CONFIG_HW_RANDOM is not set CONFIG_FB=y CONFIG_FB_PXA=y
arch/arm/configs/lubbock_defconfig +3 -2
@@ -37,8 +37,9 @@ CONFIG_PCMCIA_PCNET=y CONFIG_INPUT_EVDEV=y # CONFIG_SERIO_SERPORT is not set CONFIG_SERIO_SA1111=y -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y # CONFIG_VGA_CONSOLE is not set CONFIG_USB_GADGET=y CONFIG_USB_G_SERIAL=m
arch/arm/configs/mainstone_defconfig +3 -2
@@ -34,8 +34,9 @@ CONFIG_SMC91X=y CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO_SERPORT is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y CONFIG_FB=y CONFIG_FB_PXA=y # CONFIG_VGA_CONSOLE is not set
arch/arm/configs/mmp2_defconfig +3 -2
@@ -44,8 +44,9 @@ CONFIG_SMC91X=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y # CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_I2C=y
arch/arm/configs/pcm027_defconfig +3 -2
@@ -60,8 +60,9 @@ CONFIG_SMC91X=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y # CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_I2C=y
arch/arm/configs/pxa168_defconfig +3 -2
@@ -40,8 +40,9 @@ CONFIG_SMC91X=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y # CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set # CONFIG_HWMON is not set
arch/arm/configs/pxa255-idp_defconfig +3 -2
@@ -35,8 +35,9 @@ CONFIG_SMC91X=y CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO_SERPORT is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y CONFIG_FB=y CONFIG_FB_PXA=y # CONFIG_VGA_CONSOLE is not set
arch/arm/configs/pxa3xx_defconfig +3 -2
@@ -56,8 +56,9 @@ CONFIG_KEYBOARD_PXA27x=y CONFIG_KEYBOARD_PXA930_ROTARY=y CONFIG_MOUSE_PXA930_TRKBALL=y CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y # CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_I2C=y
arch/arm/configs/pxa910_defconfig +3 -2
@@ -40,8 +40,9 @@ CONFIG_SMC91X=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y CONFIG_SPI=y CONFIG_FB=y CONFIG_MMP_DISP=y
arch/arm/configs/raumfeld_defconfig +3 -2
@@ -67,8 +67,9 @@ CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_EETI=m CONFIG_INPUT_MISC=y CONFIG_INPUT_GPIO_ROTARY_ENCODER=y -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y CONFIG_HW_RANDOM=y CONFIG_I2C=y CONFIG_I2C_CHARDEV=y
arch/arm/configs/spitz_defconfig +3 -3
@@ -128,10 +128,10 @@ CONFIG_TOUCHSCREEN_ADS7846=y CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=m # CONFIG_SERIO is not set -CONFIG_SERIAL_8250=m +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_CS=m -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y # CONFIG_LEGACY_PTYS is not set CONFIG_SPI=y CONFIG_SPI_PXA2XX=y
arch/arm/configs/trizeps4_defconfig +3 -2
@@ -132,8 +132,9 @@ CONFIG_INPUT_TOUCHSCREEN=y CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=m CONFIG_SERIO_LIBPS2=y -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y CONFIG_HW_RANDOM=y CONFIG_I2C=y CONFIG_I2C_CHARDEV=y
arch/arm/configs/viper_defconfig +3 -3
@@ -101,11 +101,11 @@ CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=m # CONFIG_CONSOLE_TRANSLATIONS is not set # CONFIG_VT_CONSOLE is not set -CONFIG_SERIAL_8250=m +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_NR_UARTS=5 CONFIG_SERIAL_8250_RUNTIME_UARTS=5 -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y # CONFIG_LEGACY_PTYS is not set CONFIG_I2C=y CONFIG_I2C_CHARDEV=y
arch/arm/configs/xcep_defconfig +3 -2
@@ -60,8 +60,9 @@ CONFIG_NET_ETHERNET=y # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set # CONFIG_DEVKMEM is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PXA=y # CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_I2C=m
drivers/tty/serial/8250/8250_pxa.c new file +177 -0
177 lines not on this page · raw message
drivers/tty/serial/8250/Kconfig +9 -0
@@ -378,3 +378,12 @@ config SERIAL_8250_MID Selecting this option will enable handling of the extra features present on the UART found on Intel Medfield SOC and various other Intel platforms. + +config SERIAL_8250_PXA + tristate "PXA serial port support" + depends on SERIAL_8250 && (ARCH_PXA || ARCH_MMP) + help + If you have a machine based on an Intel XScale PXA2xx CPU you + can enable its onboard serial ports by enabling this option. + + If you choose M here, the module name will be 8250_pxa.
drivers/tty/serial/8250/Makefile +1 -0
@@ -28,5 +28,6 @@ obj-$(CONFIG_SERIAL_8250_MT6577) += 8250_mtk.o obj-$(CONFIG_SERIAL_8250_UNIPHIER) += 8250_uniphier.o obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o +obj-$(CONFIG_SERIAL_8250_PXA) += 8250_pxa.o CFLAGS_8250_ingenic.o += -I$(srctree)/scripts/dtc/libfdt
drivers/tty/serial/Kconfig +0 -23
@@ -435,29 +435,6 @@ config SERIAL_MPSC_CONSOLE help Say Y here if you want to support a serial console on a Marvell MPSC. -config SERIAL_PXA - bool "PXA serial port support" - depends on ARCH_PXA || ARCH_MMP - select SERIAL_CORE - help - If you have a machine based on an Intel XScale PXA2xx CPU you - can enable its onboard serial ports by enabling this option. - -config SERIAL_PXA_CONSOLE - bool "Console on PXA serial port" - depends on SERIAL_PXA - select SERIAL_CORE_CONSOLE - help - If you have enabled the serial port on the Intel XScale PXA - CPU you can make it the console by answering Y to this option. - - Even if you say Y here, the currently visible virtual console - (/dev/tty0) will still be used as the system console by default, but - you can alter that using a kernel command line option such as - "console=ttySA0". (Try "man bootparam" or see the documentation of - your boot loader (lilo or loadlin) about how to pass options to the - kernel at boot time.) - config SERIAL_SA1100 bool "SA1100 serial port support" depends on ARCH_SA1100
drivers/tty/serial/Makefile +0 -1
@@ -23,7 +23,6 @@ obj-$(CONFIG_SERIAL_8250) += 8250/ obj-$(CONFIG_SERIAL_AMBA_PL010) += amba-pl010.o obj-$(CONFIG_SERIAL_AMBA_PL011) += amba-pl011.o obj-$(CONFIG_SERIAL_CLPS711X) += clps711x.o -obj-$(CONFIG_SERIAL_PXA) += pxa.o obj-$(CONFIG_SERIAL_PNX8XXX) += pnx8xxx_uart.o obj-$(CONFIG_SERIAL_SA1100) += sa1100.o obj-$(CONFIG_SERIAL_BCM63XX) += bcm63xx_uart.o
drivers/tty/serial/pxa.c deleted +0 -968
968 lines not on this page · raw message
Signature · 1 line
2.6.2
Re: [PATCH v4 1/2] serial: rewrite pxa2xx-uart to use 8250_core
Quoted 7 lines · Sergei Ianovich
pxa2xx-uart was a separate uart platform driver. It was declaring the same device names and numbers as 8250 driver. As a result, it was impossible to use 8250 driver on PXA SoCs.
Upon closer examination pxa2xx-uart turned out to be a clone of 8250_core driver.
Quoted 8 lines
Workaround for Erratum #19 according to Marvel(R) PXA270M Processor Specification Update (April 19, 2010) is dropped. 8250_core reads from FIFO immediately after checking DR bit in LSR.
Signed-off-by Sergei Ianovich <[email protected]>Reviewed-by Heikki Krogerus <[email protected]>Reviewed-by James Cameron <[email protected]>
I was wondering if this should go through pxa tree, or through serial tree ?
Cheers.
--
Robert
Robert Jarzmik
maintainerRe: [PATCH v4 1/2] serial: rewrite pxa2xx-uart to use 8250_core
Quoted 13 lines · Robert Jarzmik
Quoted 11 lines · Sergei Ianovich
pxa2xx-uart was a separate uart platform driver. It was declaring the same device names and numbers as 8250 driver. As a result, it was impossible to use 8250 driver on PXA SoCs.
Upon closer examination pxa2xx-uart turned out to be a clone of 8250_core driver.
Workaround for Erratum #19 according to Marvel(R) PXA270M Processor Specification Update (April 19, 2010) is dropped. 8250_core reads from FIFO immediately after checking DR bit in LSR.
Quoted 5 lines
Quoted 4 lines
Signed-off-by Sergei Ianovich <[email protected]>Reviewed-by Heikki Krogerus <[email protected]>Reviewed-by James Cameron <[email protected]>Tested-by Robert Jarzmik <[email protected]>
Shrunk the list, the following is rather mach-pxa specific.
Actually there is a small glitch ...
Have a look at arch/arm/mach-pxa/viper.c, line 490:
#ifndef CONFIG_SERIAL_PXA ...
But that can be handled in an subsequent patch to keep your acks and reviews.
Cheers.
Signature · 1 line
Robert
Re: [PATCH v4 1/2] serial: rewrite pxa2xx-uart to use 8250_core
Quoted 20 lines · Robert Jarzmik
Quoted 18 lines · Robert Jarzmik
Quoted 16 lines · Sergei Ianovich
pxa2xx-uart was a separate uart platform driver. It was declaring the same device names and numbers as 8250 driver. As a result, it was impossible to use 8250 driver on PXA SoCs.
Upon closer examination pxa2xx-uart turned out to be a clone of 8250_core driver.
Workaround for Erratum #19 according to Marvel(R) PXA270M Processor
Specification Update (April 19, 2010) is dropped. 8250_core reads from FIFO immediately after checking DR bit in LSR.Signed-off-by Sergei Ianovich <[email protected]>Reviewed-by Heikki Krogerus <[email protected]>Reviewed-by James Cameron <[email protected]>
Quoted 8 lines
Quoted 1 line
Tested-by Robert Jarzmik <[email protected]>Shrunk the list, the following is rather mach-pxa specific.
Actually there is a small glitch ...
Have a look atarch/arm/mach-pxa/viper.c, line 490:#ifndef CONFIG_SERIAL_PXA ...
Thanks for spotting this. This is caused by a change in the latest version of the patch (SERIAL_8250_PXA instead of SERIAL_PXA). This change could be reverted.
Quoted 3 lines
But that can be handled in an subsequent patch to keep your acks and reviews.
I will respin the patch. Please comment on the acks and reviews. They were made at an earlier version of the patch. That version no longer applies. Can the updated version carry on the flags?
Robert Jarzmik
maintainerRe: [PATCH v4 1/2] serial: rewrite pxa2xx-uart to use 8250_core
Quoted 25 lines · Sergei Ianovich
Quoted 24 lines · Robert Jarzmik
Quoted 14 lines · Robert Jarzmik
Quoted 12 lines · Sergei Ianovich
pxa2xx-uart was a separate uart platform driver. It was declaring the same device names and numbers as 8250 driver. As a result, it was impossible to use 8250 driver on PXA SoCs.
Upon closer examination pxa2xx-uart turned out to be a clone of 8250_core driver.
Workaround for Erratum #19 according to Marvel(R) PXA270M Processor
Specification Update (April 19, 2010) is dropped. 8250_core reads from FIFO immediately after checking DR bit in LSR.Quoted 5 lines
Quoted 4 lines
Signed-off-by Sergei Ianovich <[email protected]>Reviewed-by Heikki Krogerus <[email protected]>Reviewed-by James Cameron <[email protected]>Tested-by Robert Jarzmik <[email protected]>Shrunk the list, the following is rather mach-pxa specific.
Quoted 8 lines
Quoted 4 lines
Actually there is a small glitch ...
Have a look atarch/arm/mach-pxa/viper.c, line 490:#ifndef CONFIG_SERIAL_PXA ...Thanks for spotting this. This is caused by a change in the latest version of the patch (
SERIAL_8250_PXAinstead ofSERIAL_PXA). This change could be reverted.
Actually I'm against the revert.
The name change looks very good to me, please keep it.
Quoted 5 lines
Quoted 2 lines
But that can be handled in an subsequent patch to keep your acks and reviews.
I will respin the patch. Please comment on the acks and reviews. They were made at an earlier version of the patch. That version no longer applies. Can the updated version carry on the flags?
I don't get you. If you mean keeping CONFIG_SERIAL_8250_PXA, then yes, please keep it.
Cheers.
Signature · 1 line
Robert
Re: [PATCH v4 1/2] serial: rewrite pxa2xx-uart to use 8250_core
Quoted 6 lines · Robert Jarzmik
Sergei Ianovich <[email protected]> writes:
Thanks for spotting this. This is caused by a change in the latestQuoted 2 lines
version of the patch (
SERIAL_8250_PXAinstead ofSERIAL_PXA). This change could be reverted.Actually I'm against the revert.
The name change looks very good to me, please keep it.
Is it worth adding an error if CONFIG_SERIAL_PXA is defined? Or is there any other way of preventing this patch launching Linus' "flag days" as Russel King named it?
I understand that people are afraid of taking this patch. If it starts causing troubles at runtime, it will be difficult to diagnose. There will be no console for most people. So it is probably good idea to fail at boot time.
Quoted 10 lines
Quoted 7 lines
Quoted 3 lines
But that can be handled in an subsequent patch to keep your acks and
reviews.I will respin the patch. Please comment on the acks and reviews. They
were made at an earlier version of the patch. That version no longer applies. Can the updated version carry on the flags?I don't get you. If you mean keeping
CONFIG_SERIAL_8250_PXA, then yes, please
keep it.
I mean should the patch be re-revied and re-acked?
Robert Jarzmik
maintainerRe: [PATCH v4 1/2] serial: rewrite pxa2xx-uart to use 8250_core
Quoted 9 lines · Sergei Ianovich
Quoted 6 lines · Robert Jarzmik
Sergei Ianovich <[email protected]> writes:
Thanks for spotting this. This is caused by a change in the latestQuoted 2 lines
version of the patch (
SERIAL_8250_PXAinstead ofSERIAL_PXA). This change could be reverted.Actually I'm against the revert.
The name change looks very good to me, please keep it.Is it worth adding an error if
CONFIG_SERIAL_PXAis defined?
I don't think so.
Quoted 2 lines
Or is there any other way of preventing this patch launching Linus' "flag days" as Russel King named it?
I must think about it, and test a bit more.
Ah and a small hint : if you include back Russell in the conversation, don't forget the double "ll" if you wish him to answer.
Quoted 4 lines
I understand that people are afraid of taking this patch. If it starts causing troubles at runtime, it will be difficult to diagnose. There will be no console for most people. So it is probably good idea to fail at boot time.
Who are "the people" ? If it's about something already written in a mailing list, please point me to it so that it can help me think about it.
Quoted 7 lines
Quoted 7 lines
Quoted 7 lines
Quoted 3 lines
But that can be handled in an subsequent patch to keep your acks and
reviews.I will respin the patch. Please comment on the acks and reviews. They
were made at an earlier version of the patch. That version no longer applies. Can the updated version carry on the flags?
Quoted 5 lines
Quoted 3 lines
I don't get you. If you mean keeping
CONFIG_SERIAL_8250_PXA, then yes, please
keep it.I mean should the patch be re-revied and re-acked?
Well it depends on what was since then. If it's a trivial commit message fix or a typo, I don't think it's necessary. If it's the algorithm, the code logic, or even I think you should ask again.
For a name change in CONFIG_SERIAL_PXA into CONFIG_SERIAL_8250_PXA (change from v3 to v4), I must admit I don't know. Maybe Kevin or Arnd might give a clue.
Cheers.
Signature · 1 line
Robert
Re: [PATCH v4 1/2] serial: rewrite pxa2xx-uart to use 8250_core
Quoted 13 lines · Robert Jarzmik
Quoted 10 lines · Sergei Ianovich
Quoted 7 lines · Robert Jarzmik
Sergei Ianovich <[email protected]> writes:
Thanks for spotting this. This is caused by a change in the latestQuoted 3 lines
version of the patch (
SERIAL_8250_PXAinstead ofSERIAL_PXA). This
change could be reverted.Actually I'm against the revert.
The name change looks very good to me, please keep it.Is it worth adding an error if
CONFIG_SERIAL_PXAis defined?I don't think so.
...
Quoted 8 lines
Quoted 7 lines
I understand that people are afraid of taking this patch. If it starts
causing troubles at runtime, it will be difficult to diagnose. There will be no console for most people. So it is probably good idea to fail
at boot time.Who are "the people" ?
I think "the people" are at least Greg Kroah-Hartman and?Russell King.
Quoted 2 lines
If it's about something already written in a mailing list, please point me to it so that it can help me think about it.
http://lists.infradead.org/pipermail/linux-arm-kernel/2013-December/2167
73.html
I can explain why I think so. Greg acked the patch, but hasn't merged it since then. He has good reasons for this most probably. Russell's comment pointed by the link seems to be the reason.
I think the problem raised by Russell could be addressed. My best guess is compile time error, despite your comment above.
I have one more plan. For transition period, we can introduce a temporary Kconfig option SERIAL_8250_PXA_OFF, and fail at build time if neither SERIAL_8250_PXA nor SERIAL_8250_PXA_OFF is set. This way all interested parties will be notified of this driver update.
Robert Jarzmik
maintainerRe: [PATCH v4 1/2] serial: rewrite pxa2xx-uart to use 8250_core
Quoted 16 lines · Sergei Ianovich
Quoted 11 lines · Robert Jarzmik
Quoted 7 lines · Sergei Ianovich
On Sat, 2015-12-19 at 20:31 +0100, Robert Jarzmik wrote:
I understand that people are afraid of taking this patch. If it starts
causing troubles at runtime, it will be difficult to diagnose. There will be no console for most people. So it is probably good idea to fail
at boot time.If it's about something already written in a mailing list, please point me to it so that it can help me think about it.
http://lists.infradead.org/pipermail/linux-arm-kernel/2013-December/2167
73.html
Quoted 6 lines
I can explain why I think so. Greg acked the patch, but hasn't merged it since then. He has good reasons for this most probably. Russell's comment pointed by the link seems to be the reason.
I think the problem raised by Russell could be addressed. My best guess is compile time error, despite your comment above.
I re-read carefully Russell's answer in [1].
What Russell asked is that for a period of time, the old pxa serial code and the new will be in the kernel, so that maintainers have the option to switch over to the old drivers/tty/serial/pxa.c if the new 8250 based version breaks their userspace getty.
Then, once the transition is done, and that for a period (let's say 1 year) no maintainer had complained while its defconfig was switched over to the new 8520 version, then and only then you will remove drivers/tty/serial/pxa.c.
Quoted 4 lines
I have one more plan. For transition period, we can introduce a temporary
KconfigoptionSERIAL_8250_PXA_OFF, and fail at build time if neitherSERIAL_8250_PXAnorSERIAL_8250_PXA_OFFis set. This way all interested parties will be notified of this driver update.
No, I'd like to stick with Russell's original plan :
- phase 1: both SERIAL_8250_PXA and SERIAL_PXA exist in KConfig both are selectable
This lasts one year or something like that
- phase 2: remove SERIAL_PXA from KConfig and drivers/tty/serial/pxa.c
This means a different patch from the one acked by Greg, and a new serie of acks. The diffstat will be way worse (as you won't have the -970 for pxa.c), but in the end it will end up on that -970.
That sounds like a good transition plan to me.
Cheers.
Signature · 4 lines
Robert [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2013-December/216773.html
PATCH v5 1/1 serial: rewrite pxa2xx-uart to use 8250_core
In reply to Sergei Ianovichpxa2xx-uart was a separate uart platform driver. It was declaring the same device names and numbers as 8250 driver. As a result, it was impossible to use 8250 driver on PXA SoCs.
Upon closer examination pxa2xx-uart turned out to be a clone of 8250_core driver.
Workaround for Erratum #19 according to Marvel(R) PXA270M Processor Specification Update (April 19, 2010) is dropped. 8250_core reads from FIFO immediately after checking DR bit in LSR.
The patch leaves the original SERIAL_PXA driver around. The original driver is just marked DEPRECATED in Kconfig and C source. When the original driver is considered safe to remove, no changes to SERIAL_8250 will be necessary.
Compiling SERIAL_8250_CONSOLE and SERIAL_PXA_CONSOLE even without SERIAL_8250_PXA breaks console for SERIAL_PXA. For this reasons, the new and the original drivers are made mutually exclusive.
The patch was reviewed/acked at version 3. Changes in version 4 are simple unbitrotting. Changes in version 5 require re-review according to Robert Jarzmik comment.
changes v4..v5 as suggested by Robert Jarzmik
* keep pxa.c until it is considered safe to remove
* keep SERIAL_PXA and SERIAL_PXA_CONSOLE Kconfig options, but deprecate them
* allow selection of either the new or the original driver by Kconfig
* ensure SERIAL_PXA_CONSOLE is respected with either driver
changes v3..v4
* remove owner field from platform_driver structure
* make of_device_id structure constant
* use CONFIG_SERIAL_8250_PXA instead of CONFIG_SERIAL_PXA
changes v2..v3
* remove devm_free/put as suggested by Heikki Krogerus
* use SET_SYSTEM_SLEEP_PM_OPS macro to set pm ops as suggested by Heikki Krogerus
changes v1..v2
* actually implement workaround for E74 in dl_write as spooted by James Cameron
* added comment about E19 in commit message
--- drivers/tty/serial/8250/8250_pxa.c | 177 +++++++++++++++++++++++++++++++++++++ drivers/tty/serial/8250/Kconfig | 8 ++ drivers/tty/serial/8250/Makefile | 1 + drivers/tty/serial/Kconfig | 17 +++- drivers/tty/serial/Makefile | 2 +- drivers/tty/serial/pxa.c | 4 +- 6 files changed, 205 insertions(+), 4 deletions(-) create mode 100644 drivers/tty/serial/8250/8250_pxa.c
drivers/tty/serial/8250/8250_pxa.c new file +177 -0
@@ -0,0 +1,177 @@ +/* +* drivers/tty/serial/8250/8250_pxa.c -- driver for PXA on-board UARTS +* Copyright: (C) 2013 Sergei Ianovich <[email protected]> +* +* replaces drivers/serial/pxa.c by Nicolas Pitre +* Created: Feb 20, 2003 +* Copyright: (C) 2003 Monta Vista Software, Inc. +* +* Based on drivers/serial/8250.c by Russell King. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +*/ + +#include <linux/device.h> +#include <linux/init.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/serial_8250.h> +#include <linux/serial_core.h> +#include <linux/serial_reg.h> +#include <linux/of.h> +#include <linux/of_irq.h> +#include <linux/of_platform.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/clk.h> +#include <linux/pm_runtime.h> + +#include "8250.h" + +struct pxa8250_data { +int line; +struct clk *clk; +}; + +#ifdef CONFIG_PM +static int serial_pxa_suspend (struct device *dev) +{ +struct pxa8250_data *data =dev_get_drvdata (dev); + +serial8250_suspend_port (data->line); + +return 0 ; +} + +static int serial_pxa_resume (struct device *dev) +{ +struct pxa8250_data *data =dev_get_drvdata (dev); + +serial8250_resume_port (data->line); + +return 0 ; +} +#endif + +static const struct dev_pm_ops serial_pxa_pm_ops = { +SET_SYSTEM_SLEEP_PM_OPS (serial_pxa_suspend, serial_pxa_resume) +}; + +static const struct of_device_id serial_pxa_dt_ids[] = { + { .compatible ="mrvl,pxa-uart" , }, + { .compatible ="mrvl,mmp-uart" , }, + {} +}; +MODULE_DEVICE_TABLE (of, serial_pxa_dt_ids); + +/* Uart divisor latch write */ +static void serial_pxa_dl_write (struct uart_8250_port *up,int value) +{ +unsigned int dll; + +serial_out (up,UART_DLL , value &0xff ); +/* +* work around Erratum #74 according to Marvel(R) PXA270M Processor +* Specification Update (April 19, 2010) +*/ + dll =serial_in (up,UART_DLL ); +WARN_ON (dll != (value &0xff )); + +serial_out (up,UART_DLM , value >>8 &0xff ); +} + + +static void serial_pxa_pm (struct uart_port *port,unsigned int state, +unsigned int oldstate) +{ +struct pxa8250_data *data = port->private_data; + +if (!state) +clk_prepare_enable (data->clk); +else +clk_disable_unprepare (data->clk); +} + +static int serial_pxa_probe (struct platform_device *pdev) +{ +struct uart_8250_port uart = {}; +struct pxa8250_data *data; +struct resource *mmres, *irqres; +int ret; + + mmres =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); + irqres =platform_get_resource (pdev,IORESOURCE_IRQ ,0 ); +if (!mmres || !irqres) +return -ENODEV ; + + data =devm_kzalloc (&pdev->dev,sizeof (*data),GFP_KERNEL ); +if (!data) +return -ENOMEM ; + + data->clk =devm_clk_get (&pdev->dev,NULL ); +if (IS_ERR (data->clk)) +return PTR_ERR (data->clk); + + ret =clk_prepare (data->clk); +if (ret) +return ret; + + uart.port.type =PORT_XSCALE ; + uart.port.iotype =UPIO_MEM32 ; + uart.port.mapbase = mmres->start; + uart.port.regshift =2 ; + uart.port.irq = irqres->start; + uart.port.fifosize =64 ; + uart.port.flags =UPF_IOREMAP |UPF_SKIP_TEST ; + uart.port.dev = &pdev->dev; + uart.port.uartclk =clk_get_rate (data->clk); + uart.port.pm = serial_pxa_pm; + uart.port.private_data = data; + uart.dl_write = serial_pxa_dl_write; + + ret =serial8250_register_8250_port (&uart); +if (ret <0 ) + goto err_clk; + + data->line = ret; + +platform_set_drvdata (pdev, data); + +return 0 ; + + err_clk: +clk_unprepare (data->clk); +return ret; +} + +static int serial_pxa_remove (struct platform_device *pdev) +{ +struct pxa8250_data *data =platform_get_drvdata (pdev); + +serial8250_unregister_port (data->line); + +clk_unprepare (data->clk); + +return 0 ; +} + +static struct platform_driver serial_pxa_driver = { + .probe = serial_pxa_probe, + .remove = serial_pxa_remove, + + .driver = { + .name ="pxa2xx-uart" , + .pm = &serial_pxa_pm_ops, + .of_match_table = serial_pxa_dt_ids, + }, +}; + +module_platform_driver (serial_pxa_driver); + +MODULE_AUTHOR ("Sergei Ianovich" ); +MODULE_LICENSE ("GPL" ); +MODULE_ALIAS ("platform:pxa2xx-uart" );
drivers/tty/serial/8250/Kconfig +8 -0
@@ -378,3 +378,11 @@ config SERIAL_8250_MID Selecting this option will enable handling of the extra features present on the UART found on Intel Medfield SOC and various other Intel platforms. + +config SERIAL_8250_PXA + tristate "PXA serial port support" + depends on SERIAL_8250 + depends on ARCH_PXA || ARCH_MMP + help + If you have a machine based on an Intel XScale PXA2xx CPU you + can enable its onboard serial ports by enabling this option.
drivers/tty/serial/8250/Makefile +1 -0
@@ -28,5 +28,6 @@ obj-$(CONFIG_SERIAL_8250_MT6577) += 8250_mtk.o obj-$(CONFIG_SERIAL_8250_UNIPHIER) += 8250_uniphier.o obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o +obj-$(CONFIG_SERIAL_8250_PXA) += 8250_pxa.o CFLAGS_8250_ingenic.o += -I$(srctree)/scripts/dtc/libfdt
drivers/tty/serial/Kconfig +15 -2
@@ -436,17 +436,27 @@ config SERIAL_MPSC_CONSOLE Say Y here if you want to support a serial console on a Marvell MPSC. config SERIAL_PXA - bool "PXA serial port support" + bool "PXA serial port support (DEPRECATED)" depends on ARCH_PXA || ARCH_MMP select SERIAL_CORE + select SERIAL_8250_PXA if SERIAL_8250 + select SERIAL_PXA_NON8250 if !SERIAL_8250 help If you have a machine based on an Intel XScale PXA2xx CPU you can enable its onboard serial ports by enabling this option. + Unless you have a specific need, you should use SERIAL_8250_PXA + instead of this. + +config SERIAL_PXA_NON8250 + bool + depends on !SERIAL_8250 + config SERIAL_PXA_CONSOLE - bool "Console on PXA serial port" + bool "Console on PXA serial port (DEPRECATED)" depends on SERIAL_PXA select SERIAL_CORE_CONSOLE + select SERIAL_8250_CONSOLE if SERIAL_8250 help If you have enabled the serial port on the Intel XScale PXA CPU you can make it the console by answering Y to this option.
@@ -458,6 +468,9 @@ config SERIAL_PXA_CONSOLE your boot loader (lilo or loadlin) about how to pass options to the kernel at boot time.) + Unless you have a specific need, you should use SERIAL_8250_PXA + and SERIAL_8250_CONSOLE instead of this. + config SERIAL_SA1100 bool "SA1100 serial port support" depends on ARCH_SA1100
drivers/tty/serial/Makefile +1 -1
@@ -23,7 +23,7 @@ obj-$(CONFIG_SERIAL_8250) += 8250/ obj-$(CONFIG_SERIAL_AMBA_PL010) += amba-pl010.o obj-$(CONFIG_SERIAL_AMBA_PL011) += amba-pl011.o obj-$(CONFIG_SERIAL_CLPS711X) += clps711x.o -obj-$(CONFIG_SERIAL_PXA) += pxa.o +obj-$(CONFIG_SERIAL_PXA_NON8250) += pxa.o obj-$(CONFIG_SERIAL_PNX8XXX) += pnx8xxx_uart.o obj-$(CONFIG_SERIAL_SA1100) += sa1100.o obj-$(CONFIG_SERIAL_BCM63XX) += bcm63xx_uart.o
drivers/tty/serial/pxa.c +3 -1
@@ -940,7 +940,9 @@ static struct platform_driver serial_pxa_driver = { }, }; -static int __init serial_pxa_init (void ) + +/* 8250 driver for PXA serial ports should be used */ +static int __deprecated __init serial_pxa_init (void ) {int ret;
Signature · 1 line
2.6.3
kbuild test robot
build botRe: [PATCH v5] serial: rewrite pxa2xx-uart to use 8250_core
reproduce: wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree…
Hi Sergei,
[auto build test ERROR on v4.4-rc6] [cannot apply to tty/tty-testing next-20151223]
url: https://github.com/0day-ci/linux/commits/Sergei-Ianovich/serial-rewrite-pxa2xx-uart-to-use-8250_core/20151224-030409 config: arm-spitz_defconfig (attached as .config)
reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm
All error/warnings (new ones prefixed by >>):
warning: (SERIAL_PXA_CONSOLE) selects SERIAL_8250_CONSOLE which has unmet direct dependencies (TTY && HAS_IOMEM && SERIAL_8250=y)
In file included from drivers/tty/serial//8250/8250_core.c:21:0:
>> include/linux/module.h:128:27: error: redefinition of '__inittest'
static inline initcall_t __inittest(void) \
^
>> drivers/tty/serial//8250/8250_core.c:1167:1: note: in expansion of macro 'module_init'
module_init(serial8250_init);
^
include/linux/module.h:128:27: note: previous definition of '__inittest' was here
static inline initcall_t __inittest(void) \
^
>> include/linux/module.h:123:31: note: in expansion of macro 'module_init'
#define console_initcall(fn) module_init(fn)
^
>> drivers/tty/serial//8250/8250_core.c:687:1: note: in expansion of macro 'console_initcall'
console_initcall(univ8250_console_init);
^
>> include/linux/module.h:130:6: error: redefinition of 'init_module'
int init_module(void) __attribute__((alias(#initfn)));
^
>> drivers/tty/serial//8250/8250_core.c:1167:1: note: in expansion of macro 'module_init'
module_init(serial8250_init);
^
include/linux/module.h:130:6: note: previous definition of 'init_module' was here
int init_module(void) __attribute__((alias(#initfn)));
^
>> include/linux/module.h:123:31: note: in expansion of macro 'module_init'
#define console_initcall(fn) module_init(fn)
^
>> drivers/tty/serial//8250/8250_core.c:687:1: note: in expansion of macro 'console_initcall'
console_initcall(univ8250_console_init);
^
--
>> drivers/tty/serial/pxa.c:966:1: warning: 'serial_pxa_init' is deprecated (declared at drivers/tty/serial/pxa.c:945) [-Wdeprecated-declarations]
module_init(serial_pxa_init);
^
--
In file included from drivers/tty/serial/8250/8250_core.c:21:0:
>> include/linux/module.h:128:27: error: redefinition of '__inittest'
static inline initcall_t __inittest(void) \
^
drivers/tty/serial/8250/8250_core.c:1167:1: note: in expansion of macro 'module_init'
module_init(serial8250_init);
^
include/linux/module.h:128:27: note: previous definition of '__inittest' was here
static inline initcall_t __inittest(void) \
^
>> include/linux/module.h:123:31: note: in expansion of macro 'module_init'
#define console_initcall(fn) module_init(fn)
^
drivers/tty/serial/8250/8250_core.c:687:1: note: in expansion of macro 'console_initcall'
console_initcall(univ8250_console_init);
^
>> include/linux/module.h:130:6: error: redefinition of 'init_module'
int init_module(void) __attribute__((alias(#initfn)));
^
drivers/tty/serial/8250/8250_core.c:1167:1: note: in expansion of macro 'module_init'
module_init(serial8250_init);
^
include/linux/module.h:130:6: note: previous definition of 'init_module' was here
int init_module(void) __attribute__((alias(#initfn)));
^
>> include/linux/module.h:123:31: note: in expansion of macro 'module_init'
#define console_initcall(fn) module_init(fn)
^
drivers/tty/serial/8250/8250_core.c:687:1: note: in expansion of macro 'console_initcall'
console_initcall(univ8250_console_init);
^vim +/__inittest +128 include/linux/module.h
0fd972a7 Paul Gortmaker 2015-05-01 117 #define rootfs_initcall(fn) module_init(fn)
0fd972a7 Paul Gortmaker 2015-05-01 118 #define device_initcall(fn) module_init(fn)
0fd972a7 Paul Gortmaker 2015-05-01 119 #define device_initcall_sync(fn) module_init(fn)
0fd972a7 Paul Gortmaker 2015-05-01 120 #define late_initcall(fn) module_init(fn)
0fd972a7 Paul Gortmaker 2015-05-01 121 #define late_initcall_sync(fn) module_init(fn)
0fd972a7 Paul Gortmaker 2015-05-01 122
0fd972a7 Paul Gortmaker 2015-05-01 @123 #define console_initcall(fn) module_init(fn)
0fd972a7 Paul Gortmaker 2015-05-01 124 #define security_initcall(fn) module_init(fn)
0fd972a7 Paul Gortmaker 2015-05-01 125
0fd972a7 Paul Gortmaker 2015-05-01 126 /* Each module must use one module_init(). */
0fd972a7 Paul Gortmaker 2015-05-01 127 #define module_init(initfn) \
0fd972a7 Paul Gortmaker 2015-05-01 @128 static inline initcall_t __inittest(void) \
0fd972a7 Paul Gortmaker 2015-05-01 129 { return initfn; } \
0fd972a7 Paul Gortmaker 2015-05-01 @130 int init_module(void) __attribute__((alias(#initfn)));
0fd972a7 Paul Gortmaker 2015-05-01 131
0fd972a7 Paul Gortmaker 2015-05-01 132 /* This is only required if you want to be unloadable. */
0fd972a7 Paul Gortmaker 2015-05-01 133 #define module_exit(exitfn) \:::::: The code at line 128 was first introduced by commit
:::::: 0fd972a7d91d6e15393c449492a04d94c0b89351 module: relocate module_init from init.h to module.h
:::::: TO: Paul Gortmaker <[email protected]> :::::: CC: Paul Gortmaker <[email protected]>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
PATCH v6 1/1 serial: rewrite pxa2xx-uart to use 8250_core
In reply to Sergei Ianovichpxa2xx-uart was a separate uart platform driver. It was declaring the same device names and numbers as 8250 driver. As a result, it was impossible to use 8250 driver on PXA SoCs.
Upon closer examination pxa2xx-uart turned out to be a clone of 8250_core driver.
Workaround for Erratum #19 according to Marvel(R) PXA270M Processor Specification Update (April 19, 2010) is dropped. 8250_core reads from FIFO immediately after checking DR bit in LSR.
The patch leaves the original SERIAL_PXA driver around. The original driver is just marked DEPRECATED in Kconfig and C source. When the original driver is considered safe to remove, no changes to SERIAL_8250 will be necessary.
Compiling SERIAL_8250_CONSOLE and SERIAL_PXA_CONSOLE even without SERIAL_8250_PXA breaks console for SERIAL_PXA. For this reasons, the new and the original drivers are made mutually exclusive.
---
The patch was reviewed/acked at version 3. Changes in version 4 are simple unbitrotting. Changes in version 5 require re-review according to Robert Jarzmik comment.
changes v5..v6 suggest by kbuild test robot
* narrow SERIAL_8250 to SERIAL_8250=y in Kconfig dependencies
changes v4..v5 as suggested by Robert Jarzmik
* keep pxa.c until it is considered safe to remove
* keep SERIAL_PXA and SERIAL_PXA_CONSOLE Kconfig options, but deprecate them
* allow selection of either the new or the original driver by Kconfig
* ensure SERIAL_PXA_CONSOLE is respected with either driver
changes v3..v4
* remove owner field from platform_driver structure
* make of_device_id structure constant
* use CONFIG_SERIAL_8250_PXA instead of CONFIG_SERIAL_PXA
changes v2..v3
* remove devm_free/put as suggested by Heikki Krogerus
* use SET_SYSTEM_SLEEP_PM_OPS macro to set pm ops as suggested by Heikki Krogerus
changes v1..v2
* actually implement workaround for E74 in dl_write as spooted by James Cameron
* added comment about E19 in commit message
drivers/tty/serial/8250/8250_pxa.c | 177 +++++++++++++++++++++++++++++++++++++ drivers/tty/serial/8250/Kconfig | 8 ++ drivers/tty/serial/8250/Makefile | 1 + drivers/tty/serial/Kconfig | 17 +++- drivers/tty/serial/Makefile | 2 +- drivers/tty/serial/pxa.c | 4 +- 6 files changed, 205 insertions(+), 4 deletions(-) create mode 100644 drivers/tty/serial/8250/8250_pxa.c
drivers/tty/serial/8250/8250_pxa.c new file +177 -0
@@ -0,0 +1,177 @@ +/* +* drivers/tty/serial/8250/8250_pxa.c -- driver for PXA on-board UARTS +* Copyright: (C) 2013 Sergei Ianovich <[email protected]> +* +* replaces drivers/serial/pxa.c by Nicolas Pitre +* Created: Feb 20, 2003 +* Copyright: (C) 2003 Monta Vista Software, Inc. +* +* Based on drivers/serial/8250.c by Russell King. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +*/ + +#include <linux/device.h> +#include <linux/init.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/serial_8250.h> +#include <linux/serial_core.h> +#include <linux/serial_reg.h> +#include <linux/of.h> +#include <linux/of_irq.h> +#include <linux/of_platform.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/clk.h> +#include <linux/pm_runtime.h> + +#include "8250.h" + +struct pxa8250_data { +int line; +struct clk *clk; +}; + +#ifdef CONFIG_PM +static int serial_pxa_suspend (struct device *dev) +{ +struct pxa8250_data *data =dev_get_drvdata (dev); + +serial8250_suspend_port (data->line); + +return 0 ; +} + +static int serial_pxa_resume (struct device *dev) +{ +struct pxa8250_data *data =dev_get_drvdata (dev); + +serial8250_resume_port (data->line); + +return 0 ; +} +#endif + +static const struct dev_pm_ops serial_pxa_pm_ops = { +SET_SYSTEM_SLEEP_PM_OPS (serial_pxa_suspend, serial_pxa_resume) +}; + +static const struct of_device_id serial_pxa_dt_ids[] = { + { .compatible ="mrvl,pxa-uart" , }, + { .compatible ="mrvl,mmp-uart" , }, + {} +}; +MODULE_DEVICE_TABLE (of, serial_pxa_dt_ids); + +/* Uart divisor latch write */ +static void serial_pxa_dl_write (struct uart_8250_port *up,int value) +{ +unsigned int dll; + +serial_out (up,UART_DLL , value &0xff ); +/* +* work around Erratum #74 according to Marvel(R) PXA270M Processor +* Specification Update (April 19, 2010) +*/ + dll =serial_in (up,UART_DLL ); +WARN_ON (dll != (value &0xff )); + +serial_out (up,UART_DLM , value >>8 &0xff ); +} + + +static void serial_pxa_pm (struct uart_port *port,unsigned int state, +unsigned int oldstate) +{ +struct pxa8250_data *data = port->private_data; + +if (!state) +clk_prepare_enable (data->clk); +else +clk_disable_unprepare (data->clk); +} + +static int serial_pxa_probe (struct platform_device *pdev) +{ +struct uart_8250_port uart = {}; +struct pxa8250_data *data; +struct resource *mmres, *irqres; +int ret; + + mmres =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); + irqres =platform_get_resource (pdev,IORESOURCE_IRQ ,0 ); +if (!mmres || !irqres) +return -ENODEV ; + + data =devm_kzalloc (&pdev->dev,sizeof (*data),GFP_KERNEL ); +if (!data) +return -ENOMEM ; + + data->clk =devm_clk_get (&pdev->dev,NULL ); +if (IS_ERR (data->clk)) +return PTR_ERR (data->clk); + + ret =clk_prepare (data->clk); +if (ret) +return ret; + + uart.port.type =PORT_XSCALE ; + uart.port.iotype =UPIO_MEM32 ; + uart.port.mapbase = mmres->start; + uart.port.regshift =2 ; + uart.port.irq = irqres->start; + uart.port.fifosize =64 ; + uart.port.flags =UPF_IOREMAP |UPF_SKIP_TEST ; + uart.port.dev = &pdev->dev; + uart.port.uartclk =clk_get_rate (data->clk); + uart.port.pm = serial_pxa_pm; + uart.port.private_data = data; + uart.dl_write = serial_pxa_dl_write; + + ret =serial8250_register_8250_port (&uart); +if (ret <0 ) + goto err_clk; + + data->line = ret; + +platform_set_drvdata (pdev, data); + +return 0 ; + + err_clk: +clk_unprepare (data->clk); +return ret; +} + +static int serial_pxa_remove (struct platform_device *pdev) +{ +struct pxa8250_data *data =platform_get_drvdata (pdev); + +serial8250_unregister_port (data->line); + +clk_unprepare (data->clk); + +return 0 ; +} + +static struct platform_driver serial_pxa_driver = { + .probe = serial_pxa_probe, + .remove = serial_pxa_remove, + + .driver = { + .name ="pxa2xx-uart" , + .pm = &serial_pxa_pm_ops, + .of_match_table = serial_pxa_dt_ids, + }, +}; + +module_platform_driver (serial_pxa_driver); + +MODULE_AUTHOR ("Sergei Ianovich" ); +MODULE_LICENSE ("GPL" ); +MODULE_ALIAS ("platform:pxa2xx-uart" );
drivers/tty/serial/8250/Kconfig +8 -0
@@ -378,3 +378,11 @@ config SERIAL_8250_MID Selecting this option will enable handling of the extra features present on the UART found on Intel Medfield SOC and various other Intel platforms. + +config SERIAL_8250_PXA + tristate "PXA serial port support" + depends on SERIAL_8250 + depends on ARCH_PXA || ARCH_MMP + help + If you have a machine based on an Intel XScale PXA2xx CPU you + can enable its onboard serial ports by enabling this option.
drivers/tty/serial/8250/Makefile +1 -0
@@ -28,5 +28,6 @@ obj-$(CONFIG_SERIAL_8250_MT6577) += 8250_mtk.o obj-$(CONFIG_SERIAL_8250_UNIPHIER) += 8250_uniphier.o obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o +obj-$(CONFIG_SERIAL_8250_PXA) += 8250_pxa.o CFLAGS_8250_ingenic.o += -I$(srctree)/scripts/dtc/libfdt
drivers/tty/serial/Kconfig +15 -2
@@ -436,17 +436,27 @@ config SERIAL_MPSC_CONSOLE Say Y here if you want to support a serial console on a Marvell MPSC. config SERIAL_PXA - bool "PXA serial port support" + bool "PXA serial port support (DEPRECATED)" depends on ARCH_PXA || ARCH_MMP select SERIAL_CORE + select SERIAL_8250_PXA if SERIAL_8250=y + select SERIAL_PXA_NON8250 if !SERIAL_8250=y help If you have a machine based on an Intel XScale PXA2xx CPU you can enable its onboard serial ports by enabling this option. + Unless you have a specific need, you should use SERIAL_8250_PXA + instead of this. + +config SERIAL_PXA_NON8250 + bool + depends on !SERIAL_8250 + config SERIAL_PXA_CONSOLE - bool "Console on PXA serial port" + bool "Console on PXA serial port (DEPRECATED)" depends on SERIAL_PXA select SERIAL_CORE_CONSOLE + select SERIAL_8250_CONSOLE if SERIAL_8250=y help If you have enabled the serial port on the Intel XScale PXA CPU you can make it the console by answering Y to this option.
@@ -458,6 +468,9 @@ config SERIAL_PXA_CONSOLE your boot loader (lilo or loadlin) about how to pass options to the kernel at boot time.) + Unless you have a specific need, you should use SERIAL_8250_PXA + and SERIAL_8250_CONSOLE instead of this. + config SERIAL_SA1100 bool "SA1100 serial port support" depends on ARCH_SA1100
drivers/tty/serial/Makefile +1 -1
@@ -23,7 +23,7 @@ obj-$(CONFIG_SERIAL_8250) += 8250/ obj-$(CONFIG_SERIAL_AMBA_PL010) += amba-pl010.o obj-$(CONFIG_SERIAL_AMBA_PL011) += amba-pl011.o obj-$(CONFIG_SERIAL_CLPS711X) += clps711x.o -obj-$(CONFIG_SERIAL_PXA) += pxa.o +obj-$(CONFIG_SERIAL_PXA_NON8250) += pxa.o obj-$(CONFIG_SERIAL_PNX8XXX) += pnx8xxx_uart.o obj-$(CONFIG_SERIAL_SA1100) += sa1100.o obj-$(CONFIG_SERIAL_BCM63XX) += bcm63xx_uart.o
drivers/tty/serial/pxa.c +3 -1
@@ -940,7 +940,9 @@ static struct platform_driver serial_pxa_driver = { }, }; -static int __init serial_pxa_init (void ) + +/* 8250 driver for PXA serial ports should be used */ +static int __deprecated __init serial_pxa_init (void ) {int ret;
Signature · 1 line
2.6.3
Re: [PATCH v6] serial: rewrite pxa2xx-uart to use 8250_core
Quoted 16 lines · Sergei Ianovich
pxa2xx-uart was a separate uart platform driver. It was declaring the same device names and numbers as 8250 driver. As a result, it was impossible to use 8250 driver on PXA SoCs.
Upon closer examination pxa2xx-uart turned out to be a clone of 8250_core driver.
Workaround for Erratum #19 according to Marvel(R) PXA270M Processor Specification Update (April 19, 2010) is dropped. 8250_core reads from FIFO immediately after checking DR bit in LSR.
The patch leaves the original
SERIAL_PXAdriver around. The original driver is just marked DEPRECATED inKconfigand C source. When the original driver is considered safe to remove, no changes toSERIAL_8250will be necessary.
Quoted 6 lines
Compiling
SERIAL_8250_CONSOLEandSERIAL_PXA_CONSOLEeven withoutSERIAL_8250_PXAbreaks console forSERIAL_PXA. For this reasons, the new and the original drivers are made mutually exclusive.Signed-off-by Sergei Ianovich <[email protected]>CC Heikki Krogerus <[email protected]>
Thanks,
Signature · 1 line
heikki
Re: [PATCH v6] serial: rewrite pxa2xx-uart to use 8250_core
Quoted 17 lines · Heikki Krogerus
Quoted 16 lines · Sergei Ianovich
pxa2xx-uart was a separate uart platform driver. It was declaring the same device names and numbers as 8250 driver. As a result, it was impossible to use 8250 driver on PXA SoCs.
Upon closer examination pxa2xx-uart turned out to be a clone of 8250_core driver.
Workaround for Erratum #19 according to Marvel(R) PXA270M Processor Specification Update (April 19, 2010) is dropped. 8250_core reads from FIFO immediately after checking DR bit in LSR.
The patch leaves the original
SERIAL_PXAdriver around. The original driver is just marked DEPRECATED inKconfigand C source. When the original driver is considered safe to remove, no changes toSERIAL_8250will be necessary.
Quoted 8 lines
Quoted 6 lines
Compiling
SERIAL_8250_CONSOLEandSERIAL_PXA_CONSOLEeven withoutSERIAL_8250_PXAbreaks console forSERIAL_PXA. For this reasons, the new and the original drivers are made mutually exclusive.Signed-off-by Sergei Ianovich <[email protected]>CC Heikki Krogerus <[email protected]>Reviewed-by Heikki Krogerus <[email protected]>
The tests were done on lubbock(pxa25x), mainstone(pxa27x) and zylonite(pxa3xx) boards.
I don't expect any breakage in PXA architecture. There might be issues with :
- arch/arm/mach-pxa/capc7117.c
- arch/arm/mach-pxa/viper.c
-arch/arm/mach-pxa/zeus.c (very small probability for this one)
The mitigation plan if any concern arises is to fallback on the CONFIG_SERIAL_PXA configuration.
I find a bit misleading this chunk, but I'm not very good at KConfig :
config SERIAL_PXA
- bool "PXA serial port support"
+ bool "PXA serial port support (DEPRECATED)"
depends on ARCH_PXA || ARCH_MMP
select SERIAL_CORE+ select SERIAL_8250_PXA if SERIAL_8250=y
+ select SERIAL_PXA_NON8250 if !SERIAL_8250=y
What bothers me a bit is that selecting this option has a different effect whether SERIAL_8250 is set or not. Somebody selecting the deprecated option obviously wants the old driver, but will be provided the new one if his config has SERIAL_8250 set. Maybe someone else can comment on this ...
This apart, from pxa perspective, it's good to go.
Cheers.
Signature · 1 line
Robert
Greg Kroah-Hartman
maintainerRe: [PATCH v6] serial: rewrite pxa2xx-uart to use 8250_core
In reply to Sergei IanovichQuoted 7 lines · Sergei Ianovich
pxa2xx-uart was a separate uart platform driver. It was declaring the same device names and numbers as 8250 driver. As a result, it was impossible to use 8250 driver on PXA SoCs.
Upon closer examination pxa2xx-uart turned out to be a clone of 8250_core driver.
Quoted 8 lines
Workaround for Erratum #19 according to Marvel(R) PXA270M Processor Specification Update (April 19, 2010) is dropped. 8250_core reads from FIFO immediately after checking DR bit in LSR.
The patch leaves the original
SERIAL_PXAdriver around. The original driver is just marked DEPRECATED inKconfigand C source. When the original driver is considered safe to remove, no changes toSERIAL_8250will be necessary.
But, you just broke existing configurations, right? The serial port is a different name now, are you willing to handle the angry users?
If so, great, get the platform maintainer to sign off on this please and then resend it.
thanks,
greg k-h
Re: [PATCH v6] serial: rewrite pxa2xx-uart to use 8250_core
Quoted 12 lines · Greg Kroah-Hartman
Quoted 11 lines · Sergei Ianovich
pxa2xx-uart was a separate uart platform driver. It was declaring the same device names and numbers as 8250 driver. As a result, it was impossible to use 8250 driver on PXA SoCs.
Upon closer examination pxa2xx-uart turned out to be a clone of 8250_core driver.
Workaround for Erratum #19 according to Marvel(R) PXA270M Processor Specification Update (April 19, 2010) is dropped. 8250_core reads from FIFO immediately after checking DR bit in LSR.
Quoted 8 lines
Quoted 5 lines
The patch leaves the original
SERIAL_PXAdriver around. The original
driver is just marked DEPRECATED inKconfigand C source. When the original driver is considered safe to remove, no changes toSERIAL_8250will be necessary.But, you just broke existing configurations, right? The serial port is a different name now, are you willing to handle the angry users?
No, the port name remains /dev/ttyS0. In fact, this conflict (both drivers use the same name and char major) is the reason for the patch. Noone should notice the change at runtime. There will be a warning at compile time which should make the transition to the new driver faster.
Quoted 2 lines
If so, great, get the platform maintainer to sign off on this please and then resend it.
The previous version of the patch has been around for 2 years with half a dozen of Acks and Reviews, but it hasn't landed. Could you suggest a better approach?
Signature · 1 line
Sergei Ianovich <[email protected]>
Re: [PATCH v6] serial: rewrite pxa2xx-uart to use 8250_core
Quoted 19 lines · Sergei Ianovich
Quoted 18 lines · Greg Kroah-Hartman
Quoted 16 lines · Sergei Ianovich
pxa2xx-uart was a separate uart platform driver. It was declaring the same device names and numbers as 8250 driver. As a result, it was impossible to use 8250 driver on PXA SoCs.
Upon closer examination pxa2xx-uart turned out to be a clone of 8250_core driver.
Workaround for Erratum #19 according to Marvel(R) PXA270M Processor Specification Update (April 19, 2010) is dropped. 8250_core reads from FIFO immediately after checking DR bit in LSR.
The patch leaves the original
SERIAL_PXAdriver around. The original
driver is just marked DEPRECATED inKconfigand C source. When the original driver is considered safe to remove, no changes toSERIAL_8250will be necessary.
Quoted 10 lines
Quoted 2 lines
But, you just broke existing configurations, right? The serial port is a different name now, are you willing to handle the angry users?
No, the port name remains
/dev/ttyS0. In fact, this conflict (both drivers use the same name and char major) is the reason for the patch. Noone should notice the change at runtime. There will be a warning at compile time which should make the transition to the new driver faster.Quoted 2 lines
If so, great, get the platform maintainer to sign off on this please and then resend it.
If you're talking about the PXA maintainer, then :
I'm happy with the patch, all pxa board maintainers have been warned, and there exists a fallback solution.
So let's go forward, and if people complain, let them complain and forward them to me.
Cheers.
Signature · 1 line
Robert
Re: [PATCH v6] serial: rewrite pxa2xx-uart to use 8250_core
Quoted 11 lines · Robert Jarzmik
Quoted 2 lines
Quoted 2 lines
If so, great, get the platform maintainer to sign off on this please and then resend it.
If you're talking about the PXA maintainer, then :
Acked-by Robert Jarzmik <[email protected]>I'm happy with the patch, all pxa board maintainers have been warned, and there exists a fallback solution.
So let's go forward, and if people complain, let them complain and forward them to me.
Hi Greg,
I rebased and retested the patch (both devicetree and legacy boards, multiple pxa variants, early console and standard console), and it does work. The fallback on the old driver works as well.
I also signed it as the pxa maintainer, and I'm pushing it now, in [2].
If you want context, it's archived in [1].
If you're overburdened and feel there won't be a merge conflict in your serial tree, I can take it through pxa tree provided you ack it, or you can take it, just let me know.
Cheers.
Signature · 7 lines
Robert
[1] Original discussion
https://patchwork.kernel.org/patch/7918421/
[2] The patch
---8>---Quoted 1 line
From
6d9bd0c05c9c7bf42ee1655f3a50dcff959bc87dMon Sep 17 00:00:00 2001
From: Sergey Yanovich <[email protected]>
Date: Thu, 24 Dec 2015 18:15:14 +0300
Subject: [PATCH] serial: rewrite pxa2xx-uart to use 8250_core
pxa2xx-uart was a separate uart platform driver. It was declaring the same device names and numbers as 8250 driver. As a result, it was impossible to use 8250 driver on PXA SoCs.
Upon closer examination pxa2xx-uart turned out to be a clone of 8250_core driver.
Workaround for Erratum #19 according to Marvel(R) PXA270M Processor Specification Update (April 19, 2010) is dropped. 8250_core reads from FIFO immediately after checking DR bit in LSR.
The patch leaves the original SERIAL_PXA driver around. The original driver is just marked DEPRECATED in Kconfig and C source. When the original driver is considered safe to remove, no changes to SERIAL_8250 will be necessary.
Compiling SERIAL_8250_CONSOLE and SERIAL_PXA_CONSOLE even without SERIAL_8250_PXA breaks console for SERIAL_PXA. For this reasons, the new and the original drivers are made mutually exclusive.
--- drivers/tty/serial/8250/8250_pxa.c | 177 +++++++++++++++++++++++++++++++++++++ drivers/tty/serial/8250/Kconfig | 10 +++ drivers/tty/serial/8250/Makefile | 1 + drivers/tty/serial/Kconfig | 17 +++- drivers/tty/serial/Makefile | 2 +- drivers/tty/serial/pxa.c | 4 +- 6 files changed, 207 insertions(+), 4 deletions(-) create mode 100644 drivers/tty/serial/8250/8250_pxa.c
drivers/tty/serial/8250/8250_pxa.c new file +177 -0
@@ -0,0 +1,177 @@ +/* +* drivers/tty/serial/8250/8250_pxa.c -- driver for PXA on-board UARTS +* Copyright: (C) 2013 Sergei Ianovich <[email protected]> +* +* replaces drivers/serial/pxa.c by Nicolas Pitre +* Created: Feb 20, 2003 +* Copyright: (C) 2003 Monta Vista Software, Inc. +* +* Based on drivers/serial/8250.c by Russell King. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +*/ + +#include <linux/device.h> +#include <linux/init.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/serial_8250.h> +#include <linux/serial_core.h> +#include <linux/serial_reg.h> +#include <linux/of.h> +#include <linux/of_irq.h> +#include <linux/of_platform.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/clk.h> +#include <linux/pm_runtime.h> + +#include "8250.h" + +struct pxa8250_data { +int line; +struct clk *clk; +}; + +#ifdef CONFIG_PM +static int serial_pxa_suspend (struct device *dev) +{ +struct pxa8250_data *data =dev_get_drvdata (dev); + +serial8250_suspend_port (data->line); + +return 0 ; +} + +static int serial_pxa_resume (struct device *dev) +{ +struct pxa8250_data *data =dev_get_drvdata (dev); + +serial8250_resume_port (data->line); + +return 0 ; +} +#endif + +static const struct dev_pm_ops serial_pxa_pm_ops = { +SET_SYSTEM_SLEEP_PM_OPS (serial_pxa_suspend, serial_pxa_resume) +}; + +static const struct of_device_id serial_pxa_dt_ids[] = { + { .compatible ="mrvl,pxa-uart" , }, + { .compatible ="mrvl,mmp-uart" , }, + {} +}; +MODULE_DEVICE_TABLE (of, serial_pxa_dt_ids); + +/* Uart divisor latch write */ +static void serial_pxa_dl_write (struct uart_8250_port *up,int value) +{ +unsigned int dll; + +serial_out (up,UART_DLL , value &0xff ); +/* +* work around Erratum #74 according to Marvel(R) PXA270M Processor +* Specification Update (April 19, 2010) +*/ + dll =serial_in (up,UART_DLL ); +WARN_ON (dll != (value &0xff )); + +serial_out (up,UART_DLM , value >>8 &0xff ); +} + + +static void serial_pxa_pm (struct uart_port *port,unsigned int state, +unsigned int oldstate) +{ +struct pxa8250_data *data = port->private_data; + +if (!state) +clk_prepare_enable (data->clk); +else +clk_disable_unprepare (data->clk); +} + +static int serial_pxa_probe (struct platform_device *pdev) +{ +struct uart_8250_port uart = {}; +struct pxa8250_data *data; +struct resource *mmres, *irqres; +int ret; + + mmres =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); + irqres =platform_get_resource (pdev,IORESOURCE_IRQ ,0 ); +if (!mmres || !irqres) +return -ENODEV ; + + data =devm_kzalloc (&pdev->dev,sizeof (*data),GFP_KERNEL ); +if (!data) +return -ENOMEM ; + + data->clk =devm_clk_get (&pdev->dev,NULL ); +if (IS_ERR (data->clk)) +return PTR_ERR (data->clk); + + ret =clk_prepare (data->clk); +if (ret) +return ret; + + uart.port.type =PORT_XSCALE ; + uart.port.iotype =UPIO_MEM32 ; + uart.port.mapbase = mmres->start; + uart.port.regshift =2 ; + uart.port.irq = irqres->start; + uart.port.fifosize =64 ; + uart.port.flags =UPF_IOREMAP |UPF_SKIP_TEST ; + uart.port.dev = &pdev->dev; + uart.port.uartclk =clk_get_rate (data->clk); + uart.port.pm = serial_pxa_pm; + uart.port.private_data = data; + uart.dl_write = serial_pxa_dl_write; + + ret =serial8250_register_8250_port (&uart); +if (ret <0 ) + goto err_clk; + + data->line = ret; + +platform_set_drvdata (pdev, data); + +return 0 ; + + err_clk: +clk_unprepare (data->clk); +return ret; +} + +static int serial_pxa_remove (struct platform_device *pdev) +{ +struct pxa8250_data *data =platform_get_drvdata (pdev); + +serial8250_unregister_port (data->line); + +clk_unprepare (data->clk); + +return 0 ; +} + +static struct platform_driver serial_pxa_driver = { + .probe = serial_pxa_probe, + .remove = serial_pxa_remove, + + .driver = { + .name ="pxa2xx-uart" , + .pm = &serial_pxa_pm_ops, + .of_match_table = serial_pxa_dt_ids, + }, +}; + +module_platform_driver (serial_pxa_driver); + +MODULE_AUTHOR ("Sergei Ianovich" ); +MODULE_LICENSE ("GPL" ); +MODULE_ALIAS ("platform:pxa2xx-uart" );
drivers/tty/serial/8250/Kconfig +10 -0
@@ -426,6 +426,16 @@ config SERIAL_8250_MOXA This driver can also be built as a module. The module will be called 8250_moxa. If you want to do that, say M here. +config SERIAL_8250_PXA + tristate "PXA serial port support" + depends on SERIAL_8250 + depends on ARCH_PXA || ARCH_MMP + help + If you have a machine based on an Intel XScale PXA2xx CPU you can + enable its onboard serial ports by enabling this option. The option is + applicable to both devicetree and legacy boards, and early console is + part of its support. + config SERIAL_OF_PLATFORM tristate "Devicetree based probing for 8250 ports" depends on SERIAL_8250 && OF
drivers/tty/serial/8250/Makefile +1 -0
@@ -30,6 +30,7 @@ obj-$(CONFIG_SERIAL_8250_UNIPHIER) += 8250_uniphier.o obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o obj-$(CONFIG_SERIAL_8250_MOXA) += 8250_moxa.o +obj-$(CONFIG_SERIAL_8250_PXA) += 8250_pxa.o obj-$(CONFIG_SERIAL_OF_PLATFORM) += 8250_of.o CFLAGS_8250_ingenic.o += -I$(srctree)/scripts/dtc/libfdt
drivers/tty/serial/Kconfig +15 -2
@@ -438,17 +438,27 @@ config SERIAL_MPSC_CONSOLE Say Y here if you want to support a serial console on a Marvell MPSC. config SERIAL_PXA - bool "PXA serial port support" + bool "PXA serial port support (DEPRECATED)" depends on ARCH_PXA || ARCH_MMP select SERIAL_CORE + select SERIAL_8250_PXA if SERIAL_8250=y + select SERIAL_PXA_NON8250 if !SERIAL_8250=y help If you have a machine based on an Intel XScale PXA2xx CPU you can enable its onboard serial ports by enabling this option. + Unless you have a specific need, you should use SERIAL_8250_PXA + instead of this. + +config SERIAL_PXA_NON8250 + bool + depends on !SERIAL_8250 + config SERIAL_PXA_CONSOLE - bool "Console on PXA serial port" + bool "Console on PXA serial port (DEPRECATED)" depends on SERIAL_PXA select SERIAL_CORE_CONSOLE + select SERIAL_8250_CONSOLE if SERIAL_8250=y help If you have enabled the serial port on the Intel XScale PXA CPU you can make it the console by answering Y to this option.
@@ -460,6 +470,9 @@ config SERIAL_PXA_CONSOLE your boot loader (lilo or loadlin) about how to pass options to the kernel at boot time.) + Unless you have a specific need, you should use SERIAL_8250_PXA + and SERIAL_8250_CONSOLE instead of this. + config SERIAL_SA1100 bool "SA1100 serial port support" depends on ARCH_SA1100
drivers/tty/serial/Makefile +1 -1
@@ -23,7 +23,7 @@ obj-$(CONFIG_SERIAL_8250) += 8250/ obj-$(CONFIG_SERIAL_AMBA_PL010) += amba-pl010.o obj-$(CONFIG_SERIAL_AMBA_PL011) += amba-pl011.o obj-$(CONFIG_SERIAL_CLPS711X) += clps711x.o -obj-$(CONFIG_SERIAL_PXA) += pxa.o +obj-$(CONFIG_SERIAL_PXA_NON8250) += pxa.o obj-$(CONFIG_SERIAL_PNX8XXX) += pnx8xxx_uart.o obj-$(CONFIG_SERIAL_SA1100) += sa1100.o obj-$(CONFIG_SERIAL_BCM63XX) += bcm63xx_uart.o
drivers/tty/serial/pxa.c +3 -1
@@ -925,7 +925,9 @@ static struct platform_driver serial_pxa_driver = { }, }; -static int __init serial_pxa_init (void ) + +/* 8250 driver for PXA serial ports should be used */ +static int __deprecated __init serial_pxa_init (void ) {int ret;
Signature · 1 line
2.1.4
Greg Kroah-Hartman
maintainerRe: [PATCH v6] serial: rewrite pxa2xx-uart to use 8250_core
Quoted 20 lines · Robert Jarzmik
Quoted 11 lines · Robert Jarzmik
Quoted 2 lines
Quoted 2 lines
If so, great, get the platform maintainer to sign off on this please and then resend it.
If you're talking about the PXA maintainer, then :
Acked-by Robert Jarzmik <[email protected]>I'm happy with the patch, all pxa board maintainers have been warned, and there exists a fallback solution.
So let's go forward, and if people complain, let them complain and forward them to me.
Hi Greg,
I rebased and retested the patch (both devicetree and legacy boards, multiple pxa variants, early console and standard console), and it does work. The fallback on the old driver works as well.
Quoted 7 lines
I also signed it as the pxa maintainer, and I'm pushing it now, in [2].
If you want context, it's archived in [1].
If you're overburdened and feel there won't be a merge conflict in your serial tree, I can take it through pxa tree provided you ack it, or you can take it, just let me know.
I'll be glad to take it, can you send it in a proper format?
thanks,
greg k-h
Robert Jarzmik
maintainerRe: [PATCH v6] serial: rewrite pxa2xx-uart to use 8250_core
Quoted 6 lines · Greg Kroah-Hartman
Quoted 3 lines · Robert Jarzmik
If you're overburdened and feel there won't be a merge conflict in your serial tree, I can take it through pxa tree provided you ack it, or you can take it, just let me know.
I'll be glad to take it, can you send it in a proper format?
Most certainly.
Done with the title "[PATCH v6 RESEND] serial: rewrite pxa2xx-uart to use 8250_core".
Thanks.
Signature · 1 line
Robert
PATCH v4 2/2 arm: pxa27x: support for ICP DAS LP-8x4x w/ DT
In reply to Sergei IanovichICP DAS calls LP-8x4x 'programmable automation controller'. It is an industrial computer based on PXA270 SoC. They ship it with a 2.6.19 kernel and proprietary kernel module and userspace library to access its industrial IO.
This patch allows to boot a modern kernel with device tree on the device. It adds support for:
* MMC card interface on PXA270
* USB 1.1 port on PXA270
* 2 NOR flash devices
* 2 onboard ethernet Davicom DM9000 devices
* 3 serial UART ports on PXA270
* front panel red LED
* 64bit 1-wire system ID chip
* 16 kiB EEPROM (reading)
Support for these devices will be added in separate patches, since they are not currently supported by the kernel:
* DS1302 RTC
* 512kiB SRAM
* FPGA irq chip
* 3 built-in 16550A serial UART ports
* industrial IO parallel bus
* 10 position rotary switch
* 8 pin DIP switch
* 16 kiB EEPROM (writing)
* serial interface for digital and analog industrial IO modules on parallel bus (all I-87xxx modules)
* digital and analog industrial IO modules for parallel bus:
** I-8024 4 port analog output
** I-8041 32 port digital output
** I-8042 16 port digital output/16 port digital input
Not supported for now:
* VGA interface on PXA270 for lack of dts binding
* the rest of parallel bus (I-8xxx) modules for lack of hardware
* GPIO reset for lack of relevance (watchdog reset is working)
Newer LP-8x4x devices have twice as much flash and a different partition structure otherwise being the same. When each device is provided with a correct device tree, all of them can be booted using the same kernel.
---
v3..v4
* support for newer flavor w/ 96Mb flash memory
* use 'partitions' subnodes
* move device-specific tweaking to device .dts file and drop patches to pxa27x.dtsi
v2..v3
* added extbus which maps synchronous, static, and variable-latency I/O (VLIO) interfaces of PXA27x SoC as suggested by Arnd Bergmann
* map is placed into platform include
* configured existing kernel drivers to support:
- front panel LED using gpio-leds
- 64bit 1-wire system ID chip using w1-gpio
- 16 kiB EEPROM using at24 over i2c-gpio
* number change (06/16 -> 08/21)
v1..v2
* drop left-over extern declaration
* use of_have_populated_dt() instead of a static variable
* drop wildcards in compatible
* drop machine-special machine description
* number changed from 9 to 6 (dropped patches)
.../devicetree/bindings/vendor-prefixes.txt | 1 + arch/arm/boot/dts/Makefile | 3 + arch/arm/boot/dts/pxa27x-lp8x4x-i105.dts | 50 ++++ arch/arm/boot/dts/pxa27x-lp8x4x.dts | 260 +++++++++++++++++++++ arch/arm/configs/lp8x4x_defconfig | 176 ++++++++++++++ 5 files changed, 490 insertions(+) create mode 100644 arch/arm/boot/dts/pxa27x-lp8x4x-i105.dts create mode 100644 arch/arm/boot/dts/pxa27x-lp8x4x.dts create mode 100644 arch/arm/configs/lp8x4x_defconfig
Documentation/devicetree/bindings/vendor-prefixes.txt +1 -0
@@ -109,6 +109,7 @@ honeywell Honeywell hp Hewlett Packard i2se I2SE GmbH ibm International Business Machines (IBM) +icpdas ICP DAS CO., LTD. idt Integrated Device Technologies, Inc. iom Iomega Corporation img Imagination Technologies Ltd.
arch/arm/boot/dts/Makefile +3 -0
@@ -499,6 +499,9 @@ dtb-$(CONFIG_ARCH_ORION5X) += \ orion5x-rd88f5182-nas.dtb dtb-$(CONFIG_ARCH_PRIMA2) += \ prima2-evb.dtb +dtb-$(CONFIG_MACH_PXA27X_DT) += \ + pxa27x-lp8x4x.dtb \ + pxa27x-lp8x4x-i105.dtb dtb-$(CONFIG_ARCH_QCOM) += \ qcom-apq8064-cm-qs600.dtb \ qcom-apq8064-ifc6410.dtb \
arch/arm/boot/dts/pxa27x-lp8x4x-i105.dts new file +50 -0
50 lines not on this page · raw message
arch/arm/boot/dts/pxa27x-lp8x4x.dts new file +260 -0
260 lines not on this page · raw message
arch/arm/configs/lp8x4x_defconfig new file +176 -0
176 lines not on this page · raw message
Signature · 1 line
2.6.2
Re: [PATCH v4 2/2] arm: pxa27x: support for ICP DAS LP-8x4x w/ DT
Quoted 4 lines · Sergei Ianovich
ICP DAS calls LP-8x4x 'programmable automation controller'. It is an industrial computer based on PXA270 SoC. They ship it with a 2.6.19 kernel and proprietary kernel module and userspace library to access its industrial IO.
2 comments, otherwise:
arch/arm/boot/dts/pxa27x-lp8x4x.dts line 4
Quoted 10 lines
arch/arm/boot/dts/pxa27x-lp8x4x.dts new file +4
-0@@ -0,0 +1,260 @@ +/* Device tree for ICP DAS LP-8x4x */ +/dts-v1/; + +#include <dt-bindings/interrupt-controller/arm-gic.h>
Pretty sure this does not have a GIC.
arch/arm/boot/dts/pxa27x-lp8x4x.dts line 9
Quoted 5 lines
arch/arm/boot/dts/pxa27x-lp8x4x.dts new file +5
-0+#include "pxa27x.dtsi" + +/ { + model = "ICP DAS LP-8x4x programmable automation controller"; + compatible = "marvell,pxa270";
You should have a compatible string for this board.
Rob