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dts/ls2080a: Update PCIe compatible

PATCH New Mingkai Hu 3 participants 3 messages Feb 17, 2016 – Feb 25, 2016

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Mingkai Hu

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#0 lore raw

PATCH v3 1/1 dts/ls2080a: Update PCIe compatible

From: Minghuan Lian <[email protected]>

The patch adds LS2085a to PCIe compatible to fix the compatibility issue when using firmware with LS2085a compatible property.

---
v3:
- Make the compatible consistent between layerscape-pci.txt and dts file.

v2:
- Rebased to latest kernel base

 Documentation/devicetree/bindings/pci/layerscape-pci.txt |  2 +-
 arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi           | 12 ++++++++----
 2 files changed, 9 insertions(+), 5 deletions(-)
Documentation/devicetree/bindings/pci/layerscape-pci.txt +1 -1
index e376785..ef683b2 100644
@@ -14,7 +14,7 @@ information.
 Required properties:
 - compatible: should contain the platform identifier such as:
         "fsl,ls1021a-pcie", "snps,dw-pcie"
-        "fsl,ls2080a-pcie", "snps,dw-pcie"
+        "fsl,ls2080a-pcie", "fsl,ls2085a-pcie", "snps,dw-pcie"
 - reg: base addresses and lengths of the PCIe controller
 - interrupts: A list of interrupt outputs of the controller. Must contain an
   entry for each entry in the interrupt-names property.
arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi +8 -4
index 2b23d03..1b18d7a 100644
@@ -456,7 +456,8 @@
 		};
 
 		pcie at 3400000 {
-			compatible = "fsl,ls2080a-pcie", "snps,dw-pcie";
+			compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
+				     "snps,dw-pcie";
 			reg = <0x00 0x03400000 0x0 0x00100000   /* controller registers */
 			       0x10 0x00000000 0x0 0x00002000>; /* configuration space */
 			reg-names = "regs", "config";
@@ -479,7 +480,8 @@
 		};
 
 		pcie at 3500000 {
-			compatible = "fsl,ls2080a-pcie", "snps,dw-pcie";
+			compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
+				     "snps,dw-pcie";
 			reg = <0x00 0x03500000 0x0 0x00100000   /* controller registers */
 			       0x12 0x00000000 0x0 0x00002000>; /* configuration space */
 			reg-names = "regs", "config";
@@ -502,7 +504,8 @@
 		};
 
 		pcie at 3600000 {
-			compatible = "fsl,ls2080a-pcie", "snps,dw-pcie";
+			compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
+				     "snps,dw-pcie";
 			reg = <0x00 0x03600000 0x0 0x00100000   /* controller registers */
 			       0x14 0x00000000 0x0 0x00002000>; /* configuration space */
 			reg-names = "regs", "config";
@@ -525,7 +528,8 @@
 		};
 
 		pcie at 3700000 {
-			compatible = "fsl,ls2080a-pcie", "snps,dw-pcie";
+			compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
+				     "snps,dw-pcie";
 			reg = <0x00 0x03700000 0x0 0x00100000   /* controller registers */
 			       0x16 0x00000000 0x0 0x00002000>; /* configuration space */
 			reg-names = "regs", "config";
Signature · 1 line
2.1.0.27.g96db324
maintainer
#1 lore raw

PATCH v3 1/1 dts/ls2080a: Update PCIe compatible

Quoted 12 lines · Mingkai Hu

From: Minghuan Lian <[email protected]>

The patch adds LS2085a to PCIe compatible to fix the compatibility issue when using firmware with LS2085a compatible property.

---
v3:
- Make the compatible consistent between layerscape-pci.txt and dts file.

Quoted 7 lines

v2:
- Rebased to latest kernel base

 Documentation/devicetree/bindings/pci/layerscape-pci.txt |  2 +-
 arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi           | 12 ++++++++----
 2 files changed, 9 insertions(+), 5 deletions(-)
#2 lore raw

PATCH v3 1/1 dts/ls2080a: Update PCIe compatible

Quoted 16 lines · Rob Herring
Quoted 15 lines · Mingkai Hu

From: Minghuan Lian <[email protected]>

The patch adds LS2085a to PCIe compatible to fix the compatibility issue when using firmware with LS2085a compatible property.

---
v3:
- Make the compatible consistent between layerscape-pci.txt and dts file.

v2:
- Rebased to latest kernel base

Quoted 6 lines
Quoted 4 lines
 Documentation/devicetree/bindings/pci/layerscape-pci.txt |  2 +-
 arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi           | 12 ++++++++----
 2 files changed, 9 insertions(+), 5 deletions(-)

Applied, thanks.

-Olof