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Terasic DE0-Nano-SoC: add support

PATCH Applied Tim Sander 4 participants 10 messages Feb 12, 2016 – Mar 1, 2016

Subsystems (4)
Arm (32-bit) Arm sub-architectures Arm/actions semi architecture Arm/socfpga architecture
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Tim Sander

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PATCH v5 1/1 Terasic DE0-Nano-SoC: add support

v5: remove led functions,
rename socfpga_console_init -> socfpga_init
use more specific device tree identifier, needs a kernel dts addition though:
add "terasic,de0-nano-soc" to compatible string in dts file of the board.

A Patch for supporting the Terasic DE0 NANO-SoC with barebox. The pretty similar Socrates Board was taken as a starting point with pulling in the memory timings/pinmux from
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign

---

Signed-off-by Tim Sander <[email protected]>
 arch/arm/boards/Makefile                           |   1 +
 arch/arm/boards/terasic-de0-nano-soc/Makefile      |   2 +
 arch/arm/boards/terasic-de0-nano-soc/board.c       |  35 ++
 arch/arm/boards/terasic-de0-nano-soc/config.h      |   1 +
 .../terasic-de0-nano-soc/iocsr_config_cyclone5.c   | 675 +++++++++++++++++++++
 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c    |  76 +++
 .../boards/terasic-de0-nano-soc/pinmux_config.c    | 240 ++++++++
 arch/arm/boards/terasic-de0-nano-soc/pll_config.h  | 107 ++++
 .../arm/boards/terasic-de0-nano-soc/sdram_config.h | 108 ++++
 .../boards/terasic-de0-nano-soc/sequencer_auto.h   | 228 +++++++
 .../terasic-de0-nano-soc/sequencer_auto_ac_init.c  |  69 +++
 .../sequencer_auto_inst_init.c                     | 161 +++++
 .../terasic-de0-nano-soc/sequencer_defines.h       | 160 +++++
 arch/arm/configs/socfpga-xload_defconfig           |   1 +
 arch/arm/configs/socfpga_defconfig                 |   1 +
 arch/arm/dts/Makefile                              |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts     |  34 ++
 arch/arm/mach-socfpga/Kconfig                      |   4 +
 images/Makefile.socfpga                            |   8 +
 19 files changed, 1912 insertions(+)
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/Makefile
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/board.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pinmux_config.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pll_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sdram_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_auto.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_ac_init.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_inst_init.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_defines.h
 create mode 100644 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
arch/arm/boards/Makefile +1 -0
index 1029e8f..4d572a6 100644
@@ -106,6 +106,7 @@ obj-$(CONFIG_MACH_SAMA5D4EK)                        += sama5d4ek/
 obj-$(CONFIG_MACH_SCB9328)                     += scb9328/
 obj-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK)                += altera-socdk/
 obj-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES)                += ebv-socrates/
+obj-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC)        += terasic-de0-nano-soc/
 obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT)      += terasic-sockit/
 obj-$(CONFIG_MACH_SOLIDRUN_CUBOX)              += solidrun-cubox/
 obj-$(CONFIG_MACH_SOLIDRUN_MICROSOM)           += solidrun-microsom/
arch/arm/boards/terasic-de0-nano-soc/Makefile new file +2 -0
new file mode 100644
index 0000000..8c927fe
@@ -0,0 +1,2 @@
+obj-y += lowlevel.o board.o
+pbl-y += lowlevel.o
arch/arm/boards/terasic-de0-nano-soc/board.c new file +35 -0
new file mode 100644
index 0000000..919bfc8
@@ -0,0 +1,35 @@
+#include <common.h>
+#include <types.h>
+#include <driver.h>
+#include <init.h>
+#include <asm/armlinux.h>
+#include <linux/micrel_phy.h>
+#include <linux/phy.h>
+#include <linux/sizes.h>
+#include <fcntl.h>
+#include <fs.h>
+#include <mach/socfpga-regs.h>
+
+static int phy_fixup(struct phy_device *dev)
+{
+       /*
+        * min rx data delay, max rx/tx clock delay,
+        * min rx/tx control delay
+        */
+       phy_write_mmd_indirect(dev, 4, 2, 0);
+       phy_write_mmd_indirect(dev, 5, 2, 0);
+       phy_write_mmd_indirect(dev, 8, 2, 0x003ff);
+       return 0;
+}
+
+static int socfpga_init(void)
+{
+       if (!of_machine_is_compatible("terasic,de0-nano-soc"))
+               return 0;
+
+       if (IS_ENABLED(CONFIG_PHYLIB))
+               phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK, phy_fixup);
+
+       return 0;
+}
+console_initcall(socfpga_init);
arch/arm/boards/terasic-de0-nano-soc/config.h new file +1 -0
new file mode 100644
index 0000000..da84fa5
@@ -0,0 +1 @@
+/* nothing */
arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c new file +675 -0

675 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/lowlevel.c new file +76 -0

76 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/pinmux_config.c new file +240 -0

240 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/pll_config.h new file +107 -0

107 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/sdram_config.h new file +108 -0

108 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/sequencer_auto.h new file +228 -0

228 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_ac_init.c new file +69 -0

69 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_inst_init.c new file +161 -0

161 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/sequencer_defines.h new file +160 -0

160 lines not on this page · raw message

arch/arm/configs/socfpga-xload_defconfig +1 -0
index 9f64adf..1f4d74d 100644
@@ -1,6 +1,7 @@
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_ARCH_SOCFPGA_XLOAD=y
 CONFIG_MACH_SOCFPGA_EBV_SOCRATES=y
+CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC=y
 CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT=y
 CONFIG_THUMB2_BAREBOX=y
 # CONFIG_CMD_ARM_CPUINFO is not set
arch/arm/configs/socfpga_defconfig +1 -0
index 7fbe045..6cbc28e 100644
@@ -1,6 +1,7 @@
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_MACH_SOCFPGA_EBV_SOCRATES=y
 CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT=y
+CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC=y
 CONFIG_THUMB2_BAREBOX=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ARM_UNWIND=y
arch/arm/dts/Makefile +1 -0
index 2da930e..1a1a419 100644
@@ -57,6 +57,7 @@ pbl-dtb-$(CONFIG_MACH_SABRESD) += imx6q-sabresd.dtb.o
 pbl-dtb-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += imx6sx-sdb.dtb.o
 pbl-dtb-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += socfpga_cyclone5_socdk.dtb.o
 pbl-dtb-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += socfpga_cyclone5_socrates.dtb.o
+pbl-dtb-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += socfpga_cyclone5_de0_nano_soc.dtb.o
 pbl-dtb-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += socfpga_cyclone5_sockit.dtb.o
 pbl-dtb-$(CONFIG_MACH_SOLIDRUN_CUBOX) += dove-cubox-bb.dtb.o
 pbl-dtb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += imx6dl-hummingboard.dtb.o imx6q-hummingboard.dtb.o
arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts new file +34 -0
new file mode 100644
index 0000000..087fc71
@@ -0,0 +1,34 @@
+/*
+ *  Copyright (C) 2013 Steffen Trumtrar <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <arm/socfpga_cyclone5_de0_sockit.dts>
+#include "socfpga.dtsi"
+
+/ {
+       model = "Terasic DE0-Nano-SoC/Atlas-SoC Kit";
+       compatible = "terasic,de0-nano-soc","altr,socfpga-cyclone5", "altr,socfpga";
+
+       chosen {
+               stdout-path = &uart0;
+       };
+
+       leds: gpio-leds {
+       };
+
+       buttons: gpio-keys {
+       };
+};
arch/arm/mach-socfpga/Kconfig +4 -0
index 73b26ef..94689e3 100644
@@ -20,6 +20,10 @@ config MACH_SOCFPGA_EBV_SOCRATES
        select HAVE_DEFAULT_ENVIRONMENT_NEW
        bool "EBV Socrates"
 
+config MACH_SOCFPGA_TERASIC_DE0_NANO_SOC
+       select HAVE_DEFAULT_ENVIRONMENT_NEW
+       bool "Terasic DE0-NANO-SoC aka Atlas"
+
 config MACH_SOCFPGA_TERASIC_SOCKIT
        select HAVE_DEFAULT_ENVIRONMENT_NEW
        bool "Terasic SoCKit"
images/Makefile.socfpga +8 -0
index f295c67..3c7d850 100644
@@ -19,6 +19,14 @@ pblx-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += start_socfpga_socdk
 FILE_barebox-socfpga-socdk.img = start_socfpga_socdk.pblx
 socfpga-barebox-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += barebox-socfpga-socdk.img
 
+pblx-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += start_socfpga_de0_nano_soc_xload
+FILE_barebox-socfpga-de0_nano_soc-xload.img = start_socfpga_de0_nano_soc_xload.pblx.socfpgaimg
+socfpga-xload-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += barebox-socfpga-de0_nano_soc-xload.img
+
+pblx-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += start_socfpga_de0_nano_soc
+FILE_barebox-socfpga-de0_nano_soc.img = start_socfpga_de0_nano_soc.pblx
+socfpga-barebox-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += barebox-socfpga-de0_nano_soc.img
+
 pblx-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += start_socfpga_sockit_xload
 FILE_barebox-socfpga-sockit-xload.img = start_socfpga_sockit_xload.pblx.socfpgaimg
 socfpga-xload-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += barebox-socfpga-sockit-xload.img
Signature · 6 lines
1.9.1

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Applied
#1 lore raw
Quoted 9 lines · Tim Sander

v5: remove led functions,
rename socfpga_console_init -> socfpga_init
use more specific device tree identifier, needs a kernel dts addition though:
add "terasic,de0-nano-soc" to compatible string in dts file of the board.

A Patch for supporting the Terasic DE0 NANO-SoC with barebox. The pretty similar Socrates Board was taken as a starting point with pulling in the memory timings/pinmux from
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign

Applied, thanks

Sascha

Signature · 9 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox
#2 lore raw
In reply to Tim Sander

Hi Tim,

Quoted 9 lines · Tim Sander

v5: remove led functions,
rename socfpga_console_init -> socfpga_init
use more specific device tree identifier, needs a kernel dts addition though:
add "terasic,de0-nano-soc" to compatible string in dts file of the board.

A Patch for supporting the Terasic DE0 NANO-SoC with barebox. The pretty similar Socrates Board was taken as a starting point with pulling in the memory timings/pinmux from
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign

In this patch the first indention is done with 7 spaces and the others with 8 spaces. Could you resend with these converted to tabs consistently?

Thanks
Sascha

Signature · 9 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox
author
#3 lore raw

PATCH v6 1/1 Terasic DE0-Nano-SoC: add support

v6: proper whitespaces, sorry severly firewall impaired

A Patch for supporting the Terasic DE0 NANO-SoC with barebox. The pretty similar Socrates Board was taken as a starting point with pulling in the memory timings/pinmux from
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign

Signed-off-by Tim Sander <[email protected]>
---
 arch/arm/boards/Makefile                           |   1 +
 arch/arm/boards/terasic-de0-nano-soc/Makefile      |   2 +
 arch/arm/boards/terasic-de0-nano-soc/board.c       |  35 ++
 arch/arm/boards/terasic-de0-nano-soc/config.h      |   1 +
 .../terasic-de0-nano-soc/iocsr_config_cyclone5.c   | 675 +++++++++++++++++++++
 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c    |  76 +++
 .../boards/terasic-de0-nano-soc/pinmux_config.c    | 240 ++++++++
 arch/arm/boards/terasic-de0-nano-soc/pll_config.h  | 107 ++++
 .../arm/boards/terasic-de0-nano-soc/sdram_config.h | 108 ++++
 .../boards/terasic-de0-nano-soc/sequencer_auto.h   | 228 +++++++
 .../terasic-de0-nano-soc/sequencer_auto_ac_init.c  |  69 +++
 .../sequencer_auto_inst_init.c                     | 161 +++++
 .../terasic-de0-nano-soc/sequencer_defines.h       | 160 +++++
 arch/arm/configs/socfpga-xload_defconfig           |   1 +
 arch/arm/configs/socfpga_defconfig                 |   1 +
 arch/arm/dts/Makefile                              |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts     |  34 ++
 arch/arm/mach-socfpga/Kconfig                      |   4 +
 images/Makefile.socfpga                            |   8 +
 19 files changed, 1912 insertions(+)
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/Makefile
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/board.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pinmux_config.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pll_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sdram_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_auto.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_ac_init.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_inst_init.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_defines.h
 create mode 100644 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
arch/arm/boards/Makefile +1 -0
index 1029e8f..4d572a6 100644
@@ -106,6 +106,7 @@ obj-$(CONFIG_MACH_SAMA5D4EK)			+= sama5d4ek/
 obj-$(CONFIG_MACH_SCB9328)			+= scb9328/
 obj-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK)		+= altera-socdk/
 obj-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES)		+= ebv-socrates/
+obj-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC)	+= terasic-de0-nano-soc/
 obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT)	+= terasic-sockit/
 obj-$(CONFIG_MACH_SOLIDRUN_CUBOX)		+= solidrun-cubox/
 obj-$(CONFIG_MACH_SOLIDRUN_MICROSOM)		+= solidrun-microsom/
arch/arm/boards/terasic-de0-nano-soc/Makefile new file +2 -0
new file mode 100644
index 0000000..8c927fe
@@ -0,0 +1,2 @@
+obj-y += lowlevel.o board.o
+pbl-y += lowlevel.o
arch/arm/boards/terasic-de0-nano-soc/board.c new file +35 -0
new file mode 100644
index 0000000..919bfc8
@@ -0,0 +1,35 @@
+#include <common.h>
+#include <types.h>
+#include <driver.h>
+#include <init.h>
+#include <asm/armlinux.h>
+#include <linux/micrel_phy.h>
+#include <linux/phy.h>
+#include <linux/sizes.h>
+#include <fcntl.h>
+#include <fs.h>
+#include <mach/socfpga-regs.h>
+
+static int phy_fixup(struct phy_device *dev)
+{
+	/*
+	 * min rx data delay, max rx/tx clock delay,
+	 * min rx/tx control delay
+	 */
+	phy_write_mmd_indirect(dev, 4, 2, 0);
+	phy_write_mmd_indirect(dev, 5, 2, 0);
+	phy_write_mmd_indirect(dev, 8, 2, 0x003ff);
+	return 0;
+}
+
+static int socfpga_init(void)
+{
+	if (!of_machine_is_compatible("terasic,de0-nano-soc"))
+		return 0;
+
+	if (IS_ENABLED(CONFIG_PHYLIB))
+		phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK, phy_fixup);
+
+	return 0;
+}
+console_initcall(socfpga_init);
arch/arm/boards/terasic-de0-nano-soc/config.h new file +1 -0
new file mode 100644
index 0000000..da84fa5
@@ -0,0 +1 @@
+/* nothing */
arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c new file +675 -0

675 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/lowlevel.c new file +76 -0

76 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/pinmux_config.c new file +240 -0

240 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/pll_config.h new file +107 -0

107 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/sdram_config.h new file +108 -0

108 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/sequencer_auto.h new file +228 -0

228 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_ac_init.c new file +69 -0

69 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_inst_init.c new file +161 -0

161 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/sequencer_defines.h new file +160 -0

160 lines not on this page · raw message

arch/arm/configs/socfpga-xload_defconfig +1 -0
index 9f64adf..1f4d74d 100644
@@ -1,6 +1,7 @@
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_ARCH_SOCFPGA_XLOAD=y
 CONFIG_MACH_SOCFPGA_EBV_SOCRATES=y
+CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC=y
 CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT=y
 CONFIG_THUMB2_BAREBOX=y
 # CONFIG_CMD_ARM_CPUINFO is not set
arch/arm/configs/socfpga_defconfig +1 -0
index 7fbe045..6cbc28e 100644
@@ -1,6 +1,7 @@
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_MACH_SOCFPGA_EBV_SOCRATES=y
 CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT=y
+CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC=y
 CONFIG_THUMB2_BAREBOX=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ARM_UNWIND=y
arch/arm/dts/Makefile +1 -0
index 2da930e..1a1a419 100644
@@ -57,6 +57,7 @@ pbl-dtb-$(CONFIG_MACH_SABRESD) += imx6q-sabresd.dtb.o
 pbl-dtb-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += imx6sx-sdb.dtb.o
 pbl-dtb-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += socfpga_cyclone5_socdk.dtb.o
 pbl-dtb-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += socfpga_cyclone5_socrates.dtb.o
+pbl-dtb-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += socfpga_cyclone5_de0_nano_soc.dtb.o
 pbl-dtb-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += socfpga_cyclone5_sockit.dtb.o
 pbl-dtb-$(CONFIG_MACH_SOLIDRUN_CUBOX) += dove-cubox-bb.dtb.o
 pbl-dtb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += imx6dl-hummingboard.dtb.o imx6q-hummingboard.dtb.o
arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts new file +34 -0
new file mode 100644
index 0000000..087fc71
@@ -0,0 +1,34 @@
+/*
+ *  Copyright (C) 2013 Steffen Trumtrar <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <arm/socfpga_cyclone5_de0_sockit.dts>
+#include "socfpga.dtsi"
+
+/ {
+	model = "Terasic DE0-Nano-SoC/Atlas-SoC Kit";
+	compatible = "terasic,de0-nano-soc","altr,socfpga-cyclone5", "altr,socfpga";
+
+	chosen {
+		stdout-path = &uart0;
+	};
+
+	leds: gpio-leds {
+	};
+
+	buttons: gpio-keys {
+	};
+};
arch/arm/mach-socfpga/Kconfig +4 -0
index 73b26ef..94689e3 100644
@@ -20,6 +20,10 @@ config MACH_SOCFPGA_EBV_SOCRATES
 	select HAVE_DEFAULT_ENVIRONMENT_NEW
 	bool "EBV Socrates"
 
+config MACH_SOCFPGA_TERASIC_DE0_NANO_SOC
+	select HAVE_DEFAULT_ENVIRONMENT_NEW
+	bool "Terasic DE0-NANO-SoC aka Atlas"
+
 config MACH_SOCFPGA_TERASIC_SOCKIT
 	select HAVE_DEFAULT_ENVIRONMENT_NEW
 	bool "Terasic SoCKit"
images/Makefile.socfpga +8 -0
index f295c67..3c7d850 100644
@@ -19,6 +19,14 @@ pblx-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += start_socfpga_socdk
 FILE_barebox-socfpga-socdk.img = start_socfpga_socdk.pblx
 socfpga-barebox-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += barebox-socfpga-socdk.img
 
+pblx-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += start_socfpga_de0_nano_soc_xload
+FILE_barebox-socfpga-de0_nano_soc-xload.img = start_socfpga_de0_nano_soc_xload.pblx.socfpgaimg
+socfpga-xload-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += barebox-socfpga-de0_nano_soc-xload.img
+
+pblx-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += start_socfpga_de0_nano_soc
+FILE_barebox-socfpga-de0_nano_soc.img = start_socfpga_de0_nano_soc.pblx
+socfpga-barebox-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += barebox-socfpga-de0_nano_soc.img
+
 pblx-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += start_socfpga_sockit_xload
 FILE_barebox-socfpga-sockit-xload.img = start_socfpga_sockit_xload.pblx.socfpgaimg
 socfpga-xload-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += barebox-socfpga-sockit-xload.img
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author
#4 lore raw

PATCH v7 1/1 Terasic DE0-Nano-SoC: add support

v7: eof whitespace fixes

A Patch for supporting the Terasic DE0 NANO-SoC with barebox. The pretty similar Socrates Board was taken as a starting point with pulling in the memory timings/pinmux from
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign

Signed-off-by Tim Sander <[email protected]>
---
 arch/arm/boards/Makefile                           |   1 +
 arch/arm/boards/terasic-de0-nano-soc/Makefile      |   2 +
 arch/arm/boards/terasic-de0-nano-soc/board.c       |  35 ++
 arch/arm/boards/terasic-de0-nano-soc/config.h      |   1 +
 .../terasic-de0-nano-soc/iocsr_config_cyclone5.c   | 674 +++++++++++++++++++++
 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c    |  76 +++
 .../boards/terasic-de0-nano-soc/pinmux_config.c    | 240 ++++++++
 arch/arm/boards/terasic-de0-nano-soc/pll_config.h  | 107 ++++
 .../arm/boards/terasic-de0-nano-soc/sdram_config.h | 108 ++++
 .../boards/terasic-de0-nano-soc/sequencer_auto.h   | 227 +++++++
 .../terasic-de0-nano-soc/sequencer_auto_ac_init.c  |  69 +++
 .../sequencer_auto_inst_init.c                     | 161 +++++
 .../terasic-de0-nano-soc/sequencer_defines.h       | 160 +++++
 arch/arm/configs/socfpga-xload_defconfig           |   1 +
 arch/arm/configs/socfpga_defconfig                 |   1 +
 arch/arm/dts/Makefile                              |   1 +
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts     |  34 ++
 arch/arm/mach-socfpga/Kconfig                      |   4 +
 images/Makefile.socfpga                            |   8 +
 19 files changed, 1910 insertions(+)
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/Makefile
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/board.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/lowlevel.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pinmux_config.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/pll_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sdram_config.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_auto.h
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_ac_init.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_inst_init.c
 create mode 100644 arch/arm/boards/terasic-de0-nano-soc/sequencer_defines.h
 create mode 100644 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
arch/arm/boards/Makefile +1 -0
index 5a755c9..9241b66 100644
@@ -107,6 +107,7 @@ obj-$(CONFIG_MACH_SAMA5D4EK)			+= sama5d4ek/
 obj-$(CONFIG_MACH_SCB9328)			+= scb9328/
 obj-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK)		+= altera-socdk/
 obj-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES)		+= ebv-socrates/
+obj-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC)	+= terasic-de0-nano-soc/
 obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT)	+= terasic-sockit/
 obj-$(CONFIG_MACH_SOLIDRUN_CUBOX)		+= solidrun-cubox/
 obj-$(CONFIG_MACH_SOLIDRUN_MICROSOM)		+= solidrun-microsom/
arch/arm/boards/terasic-de0-nano-soc/Makefile new file +2 -0
new file mode 100644
index 0000000..8c927fe
@@ -0,0 +1,2 @@
+obj-y += lowlevel.o board.o
+pbl-y += lowlevel.o
arch/arm/boards/terasic-de0-nano-soc/board.c new file +35 -0
new file mode 100644
index 0000000..919bfc8
@@ -0,0 +1,35 @@
+#include <common.h>
+#include <types.h>
+#include <driver.h>
+#include <init.h>
+#include <asm/armlinux.h>
+#include <linux/micrel_phy.h>
+#include <linux/phy.h>
+#include <linux/sizes.h>
+#include <fcntl.h>
+#include <fs.h>
+#include <mach/socfpga-regs.h>
+
+static int phy_fixup(struct phy_device *dev)
+{
+	/*
+	 * min rx data delay, max rx/tx clock delay,
+	 * min rx/tx control delay
+	 */
+	phy_write_mmd_indirect(dev, 4, 2, 0);
+	phy_write_mmd_indirect(dev, 5, 2, 0);
+	phy_write_mmd_indirect(dev, 8, 2, 0x003ff);
+	return 0;
+}
+
+static int socfpga_init(void)
+{
+	if (!of_machine_is_compatible("terasic,de0-nano-soc"))
+		return 0;
+
+	if (IS_ENABLED(CONFIG_PHYLIB))
+		phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK, phy_fixup);
+
+	return 0;
+}
+console_initcall(socfpga_init);
arch/arm/boards/terasic-de0-nano-soc/config.h new file +1 -0
new file mode 100644
index 0000000..da84fa5
@@ -0,0 +1 @@
+/* nothing */
arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c new file +674 -0

674 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/lowlevel.c new file +76 -0

76 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/pinmux_config.c new file +240 -0

240 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/pll_config.h new file +107 -0

107 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/sdram_config.h new file +108 -0

108 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/sequencer_auto.h new file +227 -0

227 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_ac_init.c new file +69 -0

69 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/sequencer_auto_inst_init.c new file +161 -0

161 lines not on this page · raw message

arch/arm/boards/terasic-de0-nano-soc/sequencer_defines.h new file +160 -0

160 lines not on this page · raw message

arch/arm/configs/socfpga-xload_defconfig +1 -0
index 9f64adf..1f4d74d 100644
@@ -1,6 +1,7 @@
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_ARCH_SOCFPGA_XLOAD=y
 CONFIG_MACH_SOCFPGA_EBV_SOCRATES=y
+CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC=y
 CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT=y
 CONFIG_THUMB2_BAREBOX=y
 # CONFIG_CMD_ARM_CPUINFO is not set
arch/arm/configs/socfpga_defconfig +1 -0
index 7fbe045..6cbc28e 100644
@@ -1,6 +1,7 @@
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_MACH_SOCFPGA_EBV_SOCRATES=y
 CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT=y
+CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC=y
 CONFIG_THUMB2_BAREBOX=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ARM_UNWIND=y
arch/arm/dts/Makefile +1 -0
index d85c237..bfc1b61 100644
@@ -58,6 +58,7 @@ pbl-dtb-$(CONFIG_MACH_SABRESD) += imx6q-sabresd.dtb.o
 pbl-dtb-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += imx6sx-sdb.dtb.o
 pbl-dtb-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += socfpga_cyclone5_socdk.dtb.o
 pbl-dtb-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += socfpga_cyclone5_socrates.dtb.o
+pbl-dtb-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += socfpga_cyclone5_de0_nano_soc.dtb.o
 pbl-dtb-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += socfpga_cyclone5_sockit.dtb.o
 pbl-dtb-$(CONFIG_MACH_SOLIDRUN_CUBOX) += dove-cubox-bb.dtb.o
 pbl-dtb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += imx6dl-hummingboard.dtb.o imx6q-hummingboard.dtb.o
arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts new file +34 -0
new file mode 100644
index 0000000..087fc71
@@ -0,0 +1,34 @@
+/*
+ *  Copyright (C) 2013 Steffen Trumtrar <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <arm/socfpga_cyclone5_de0_sockit.dts>
+#include "socfpga.dtsi"
+
+/ {
+	model = "Terasic DE0-Nano-SoC/Atlas-SoC Kit";
+	compatible = "terasic,de0-nano-soc","altr,socfpga-cyclone5", "altr,socfpga";
+
+	chosen {
+		stdout-path = &uart0;
+	};
+
+	leds: gpio-leds {
+	};
+
+	buttons: gpio-keys {
+	};
+};
arch/arm/mach-socfpga/Kconfig +4 -0
index 73b26ef..94689e3 100644
@@ -20,6 +20,10 @@ config MACH_SOCFPGA_EBV_SOCRATES
 	select HAVE_DEFAULT_ENVIRONMENT_NEW
 	bool "EBV Socrates"
 
+config MACH_SOCFPGA_TERASIC_DE0_NANO_SOC
+	select HAVE_DEFAULT_ENVIRONMENT_NEW
+	bool "Terasic DE0-NANO-SoC aka Atlas"
+
 config MACH_SOCFPGA_TERASIC_SOCKIT
 	select HAVE_DEFAULT_ENVIRONMENT_NEW
 	bool "Terasic SoCKit"
images/Makefile.socfpga +8 -0
index f295c67..3c7d850 100644
@@ -19,6 +19,14 @@ pblx-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += start_socfpga_socdk
 FILE_barebox-socfpga-socdk.img = start_socfpga_socdk.pblx
 socfpga-barebox-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += barebox-socfpga-socdk.img
 
+pblx-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += start_socfpga_de0_nano_soc_xload
+FILE_barebox-socfpga-de0_nano_soc-xload.img = start_socfpga_de0_nano_soc_xload.pblx.socfpgaimg
+socfpga-xload-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += barebox-socfpga-de0_nano_soc-xload.img
+
+pblx-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += start_socfpga_de0_nano_soc
+FILE_barebox-socfpga-de0_nano_soc.img = start_socfpga_de0_nano_soc.pblx
+socfpga-barebox-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += barebox-socfpga-de0_nano_soc.img
+
 pblx-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += start_socfpga_sockit_xload
 FILE_barebox-socfpga-sockit-xload.img = start_socfpga_sockit_xload.pblx.socfpgaimg
 socfpga-xload-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += barebox-socfpga-sockit-xload.img
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#5 lore raw

Hi Tim!

Quoted 2 lines · Tim Sander

v7: eof whitespace fixes

FYI changelogs actually don't belong in the patch description, but ...

Quoted 7 lines

A Patch for supporting the Terasic DE0 NANO-SoC with barebox. The pretty similar Socrates Board was taken as a starting point with pulling in the memory timings/pinmux from
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign

Signed-off-by Tim Sander <[email protected]>

---

... down here. Which doesn't mean that you necessarily need to send a new version of the patches IF Sascha fixes this while applying IF he does ;-)

Quoted 3 lines
 arch/arm/boards/Makefile                           |   1 +
 arch/arm/boards/terasic-de0-nano-soc/Makefile      |   2 +
 arch/arm/boards/terasic-de0-nano-soc/board.c       |  35 ++

(...)

Regards,
Steffen

Signature · 9 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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Applied
#6 lore raw
In reply to Tim Sander
Quoted 8 lines · Tim Sander

v7: eof whitespace fixes

A Patch for supporting the Terasic DE0 NANO-SoC with barebox. The pretty similar Socrates Board was taken as a starting point with pulling in the memory timings/pinmux from
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign

Signed-off-by Tim Sander <[email protected]>

Applied, thanks. Please provide a Changelog next time, otherwise it's hard to guess what you actually changed.

BTW I noticed the xload defconfig does not build anymore with this patch applied because the image gets too big. I searched for the reason at got a step closer. The SDRAM sequencer code is compiled into the image multiple times, one time for each board. The intention was that the linker throws away the unused copies via -ffunction-section and --gc-sections. Unfortunately this does not work because the functions in the different copies all end up with the same name. So for example we have mem_precharge_and_activate() three times in the image. Only one version is used, but the others can't be thrown away because they are in the same section.

I hope we can solve this, otherwise we have to split the xloader defconfigs into multiple configs.

Sascha

Signature · 9 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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author
#7 lore raw

Hi

Am Freitag, 26. Februar 2016, 08:25:06 schrieb Sascha Hauer:

Quoted 9 lines · Tim Sander
Quoted 8 lines

v7: eof whitespace fixes

A Patch for supporting the Terasic DE0 NANO-SoC with barebox. The pretty similar Socrates Board was taken as a starting point with pulling in the memory timings/pinmux from
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardware
Design

Quoted 4 lines
Quoted 1 line
Signed-off-by Tim Sander <[email protected]>

Applied, thanks. Please provide a Changelog next time, otherwise it's hard to guess what you actually changed.

I only included the change for the last patch not the whole stuff, so if i understand correctly i will include all changelog files the next time.

Quoted 10 lines

BTW I noticed the xload defconfig does not build anymore with this patch applied because the image gets too big. I searched for the reason at got a step closer. The SDRAM sequencer code is compiled into the image multiple times, one time for each board. The intention was that the linker throws away the unused copies via -ffunction-section and --gc-sections. Unfortunately this does not work because the functions in the different copies all end up with the same name. So for example we have mem_precharge_and_activate() three times in the image. Only one version is used, but the others can't be thrown away because they are in the same section.

One thing that comes to mind is gcc -flto. My experience shows that it works much nicer than gc-sections. It hurts on large code bases though but i guess this can be neglected with barebox.

Quoted 2 lines

I hope we can solve this, otherwise we have to split the xloader defconfigs into multiple configs.

It would be indeed nicer if the compiler could sort that out.

Best regards
Tim

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#8 lore raw
In reply to Sascha Hauer
Quoted 10 lines · Sascha Hauer

BTW I noticed the xload defconfig does not build anymore with this patch applied because the image gets too big. I searched for the reason at got a step closer. The SDRAM sequencer code is compiled into the image multiple times, one time for each board. The intention was that the linker throws away the unused copies via -ffunction-section and --gc-sections. Unfortunately this does not work because the functions in the different copies all end up with the same name. So for example we have mem_precharge_and_activate() three times in the image. Only one version is used, but the others can't be thrown away because they are in the same section.

There are two possible optimization here.

As you say, if the two copies where in different sections, then all but one could be GCed by the linker, as only one will be in the call tree starting from the entry function for the board specific pbl being linked.

But it's also the case that text of all the copies of mem_precharge_and_activate() is exactly the same. And so they could also be merged as identical, i.e. via ICF.

I have an xloader that supports four socfpga board variants by exploiting the fact that most of the "board specific" sequencer, scan chain, pinmux, etc. data is in fact identical among all the board variants. I can't use GC for this, as all the board data is referenced in the single xload image which supports all the boards.
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#9 lore raw
In reply to Sascha Hauer
Quoted 24 lines · Sascha Hauer
Quoted 8 lines · Tim Sander

v7: eof whitespace fixes

A Patch for supporting the Terasic DE0 NANO-SoC with barebox. The pretty similar Socrates Board was taken as a starting point with pulling in the memory timings/pinmux from
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign

Signed-off-by Tim Sander <[email protected]>

Applied, thanks. Please provide a Changelog next time, otherwise it's hard to guess what you actually changed.

BTW I noticed the xload defconfig does not build anymore with this patch applied because the image gets too big. I searched for the reason at got a step closer. The SDRAM sequencer code is compiled into the image multiple times, one time for each board. The intention was that the linker throws away the unused copies via -ffunction-section and --gc-sections. Unfortunately this does not work because the functions in the different copies all end up with the same name. So for example we have mem_precharge_and_activate() three times in the image. Only one version is used, but the others can't be thrown away because they are in the same section.

Quoted 2 lines

I hope we can solve this, otherwise we have to split the xloader defconfigs into multiple configs.

Just did that and created a socfpga-xload-2_defconfig which contains the DE0 NANO-SoC board. When the issue is solved somehow we can merge the two configs together again.

Sascha

Signature · 9 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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