Remove CLK_IS_ROOT from drivers/clk

PATCH Applied Stephen Boyd 24 participants 100 messages Mar 1, 2016 – Apr 15, 2016

Subsystems (29)

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Stephen Boyd

author

2016-03-01 18:59 UTC #0 lore raw

cover Remove CLK_IS_ROOT from drivers/clk

There are still some CLK_IS_ROOT users outside of the clk directory, but this series removes all the CLK_IS_ROOT users in clk-next as of commit 811a498e5e9a (clk: qcom: Fix pre-divider usage for pixel RCG, 2016-02-28).

Stephen Boyd (41):
clk: at91: Remove CLK_IS_ROOT
clk: bcm: Remove CLK_IS_ROOT
clk: hisilicon: Remove CLK_IS_ROOT
clk: imx: Remove CLK_IS_ROOT
clk: mediatek: Remove CLK_IS_ROOT
clk: meson: Remove CLK_IS_ROOT
clk: mmp: Remove CLK_IS_ROOT
clk: mvebu: Remove CLK_IS_ROOT
clk: mxs: Remove CLK_IS_ROOT
clk: nxp: Remove CLK_IS_ROOT
clk: pxa: Remove CLK_IS_ROOT
clk: qcom: Remove CLK_IS_ROOT
clk: samsung: Remove CLK_IS_ROOT
clk: sirf: Remove CLK_IS_ROOT
clk: spear: Remove CLK_IS_ROOT
clk: sunxi: Remove CLK_IS_ROOT
clk: tegra: Remove CLK_IS_ROOT
clk: ti: Remove CLK_IS_ROOT
clk: ux500: Remove CLK_IS_ROOT
clk: versatile: Remove CLK_IS_ROOT
clk: x86: Remove CLK_IS_ROOT
clk: x86: Remove clkdev.h and clk.h includes
clk: zte: Remove CLK_IS_ROOT
clk: zynq: Remove CLK_IS_ROOT
clk: clps711x: Remove CLK_IS_ROOT
clk: efm32gg: Remove CLK_IS_ROOT
clk: fixed-rate: Remove CLK_IS_ROOT
clk: ls1x: Remove CLK_IS_ROOT
clk: max77{686,802}: Remove CLK_IS_ROOT
clk: mb86s7x: Remove CLK_IS_ROOT
clk: nspire: Remove CLK_IS_ROOT
clk: palmas: Remove CLK_IS_ROOT
clk: pwm: Remove CLK_IS_ROOT
clk: qoriq: Remove CLK_IS_ROOT
clk: rk808: Remove CLK_IS_ROOT
clk: s2mps11: Remove CLK_IS_ROOT
clk: scpi: Remove CLK_IS_ROOT
clk: si5{14,351,70}: Remove CLK_IS_ROOT
clk: twl6040: Remove CLK_IS_ROOT
clk: wm831x: Remove CLK_IS_ROOT
clk: xgene: Remove CLK_IS_ROOT

 drivers/clk/at91/clk-main.c              |  2 +-
 drivers/clk/at91/clk-slow.c              |  2 +-
 drivers/clk/bcm/clk-bcm2835.c            |  9 ++--
 drivers/clk/clk-clps711x.c               | 19 ++++----
 drivers/clk/clk-efm32gg.c                |  2 +-
 drivers/clk/clk-fixed-rate.c             |  3 +-
 drivers/clk/clk-ls1x.c                   |  3 +-
 drivers/clk/clk-max77686.c               |  3 --
 drivers/clk/clk-max77802.c               |  2 -
 drivers/clk/clk-mb86s7x.c                |  4 +-
 drivers/clk/clk-nspire.c                 |  3 +-
 drivers/clk/clk-palmas.c                 |  4 +-
 drivers/clk/clk-pwm.c                    |  2 +-
 drivers/clk/clk-qoriq.c                  |  2 +-
 drivers/clk/clk-rk808.c                  |  1 -
 drivers/clk/clk-s2mps11.c                |  3 --
 drivers/clk/clk-scpi.c                   |  2 +-
 drivers/clk/clk-si514.c                  |  2 +-
 drivers/clk/clk-si5351.c                 |  2 +-
 drivers/clk/clk-si570.c                  |  2 +-
 drivers/clk/clk-twl6040.c                |  1 -
 drivers/clk/clk-wm831x.c                 |  1 -
 drivers/clk/clk-xgene.c                  |  2 +-
 drivers/clk/hisilicon/clk-hi3620.c       | 18 +++----
 drivers/clk/hisilicon/clk-hi6220-stub.c  |  2 +-
 drivers/clk/hisilicon/clk-hi6220.c       | 26 +++++------
 drivers/clk/hisilicon/clk-hip04.c        |  6 +--
 drivers/clk/hisilicon/clk-hix5hd2.c      | 60 ++++++++++++------------
 drivers/clk/imx/clk.h                    |  2 +-
 drivers/clk/mediatek/clk-mtk.c           |  4 +-
 drivers/clk/meson/meson8b-clkc.c         |  6 +--
 drivers/clk/mmp/clk-mmp2.c               | 14 ++----
 drivers/clk/mmp/clk-of-mmp2.c            | 10 ++--
 drivers/clk/mmp/clk-of-pxa168.c          |  8 ++--
 drivers/clk/mmp/clk-of-pxa1928.c         | 12 ++---
 drivers/clk/mmp/clk-of-pxa910.c          |  8 ++--
 drivers/clk/mmp/clk-pxa168.c             |  8 ++--
 drivers/clk/mmp/clk-pxa910.c             |  8 ++--
 drivers/clk/mvebu/common.c               | 11 ++---
 drivers/clk/mvebu/dove-divider.c         |  3 +-
 drivers/clk/mxs/clk.h                    |  2 +-
 drivers/clk/nxp/clk-lpc18xx-cgu.c        |  2 +-
 drivers/clk/pxa/clk-pxa25x.c             |  8 ++--
 drivers/clk/pxa/clk-pxa27x.c             |  6 +--
 drivers/clk/pxa/clk-pxa3xx.c             |  8 ++--
 drivers/clk/qcom/common.c                |  1 -
 drivers/clk/qcom/gcc-ipq806x.c           | 37 ---------------
 drivers/clk/qcom/gcc-msm8660.c           | 32 -------------
 drivers/clk/qcom/gcc-msm8960.c           | 42 -----------------
 drivers/clk/qcom/gcc-msm8974.c           |  1 -
 drivers/clk/qcom/gcc-msm8996.c           |  6 +--
 drivers/clk/qcom/mmcc-msm8960.c          | 35 --------------
 drivers/clk/samsung/clk-exynos4.c        | 12 ++---
 drivers/clk/samsung/clk-exynos4415.c     |  2 +-
 drivers/clk/samsung/clk-exynos5250.c     | 10 ++--
 drivers/clk/samsung/clk-exynos5260.c     | 36 +++++++-------
 drivers/clk/samsung/clk-exynos5420.c     | 12 ++---
 drivers/clk/samsung/clk-exynos5433.c     | 74 ++++++++++++++---------------
 drivers/clk/samsung/clk-exynos5440.c     | 12 ++---
 drivers/clk/samsung/clk-exynos7.c        | 12 ++---
 drivers/clk/samsung/clk-s3c2410.c        |  2 +-
 drivers/clk/samsung/clk-s3c2412.c        |  4 +-
 drivers/clk/samsung/clk-s3c2443.c        |  8 ++--
 drivers/clk/samsung/clk-s3c64xx.c        |  8 ++--
 drivers/clk/samsung/clk-s5pv210.c        | 10 ++--
 drivers/clk/sirf/clk-atlas6.c            |  7 ++-
 drivers/clk/sirf/clk-prima2.c            |  7 ++-
 drivers/clk/spear/spear1310_clock.c      | 21 ++++-----
 drivers/clk/spear/spear1340_clock.c      | 16 +++----
 drivers/clk/spear/spear3xx_clock.c       |  8 ++--
 drivers/clk/spear/spear6xx_clock.c       |  6 +--
 drivers/clk/sunxi/clk-a10-hosc.c         |  3 +-
 drivers/clk/tegra/clk-audio-sync.c       |  2 +-
 drivers/clk/tegra/clk-dfll.c             |  1 -
 drivers/clk/tegra/clk-tegra-fixed.c      |  6 +--
 drivers/clk/tegra/clk-tegra114.c         |  3 +-
 drivers/clk/tegra/clk-tegra20.c          | 10 ++--
 drivers/clk/ti/clk.c                     |  4 +-
 drivers/clk/ux500/abx500-clk.c           |  5 +-
 drivers/clk/ux500/u8500_of_clk.c         | 74 ++++++++++++++---------------
 drivers/clk/ux500/u8540_clk.c            | 80 +++++++++++++++-----------------
 drivers/clk/versatile/clk-icst.c         |  2 +-
 drivers/clk/versatile/clk-impd1.c        |  3 +-
 drivers/clk/versatile/clk-realview.c     |  8 ++--
 drivers/clk/versatile/clk-vexpress-osc.c |  2 +-
 drivers/clk/x86/clk-lpt.c                |  4 +-
 drivers/clk/zte/clk-zx296702.c           |  3 +-
 drivers/clk/zynq/clkc.c                  |  3 +-
 88 files changed, 355 insertions(+), 587 deletions(-)

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 18:59 UTC #1 lore raw

PATCH 1/41 clk: at91: Remove CLK_IS_ROOT

This flag is a no-op now. Remove usage of the flag.

Cc Boris Brezillon <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/at91/clk-main.c | 2 +-
 drivers/clk/at91/clk-slow.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

drivers/clk/at91/clk-main.c +1 -1

index b85f43529396..b9bdfd8e4e6f 100644
@@ -315,7 +315,7 @@ at91_clk_register_main_rc_osc(struct at91_pmc *pmc,
 	init.ops = &main_rc_osc_ops;
 	init.parent_names = NULL;
 	init.num_parents = 0;
-	init.flags = CLK_IS_ROOT | CLK_IGNORE_UNUSED;
+	init.flags = CLK_IGNORE_UNUSED;
 
 	osc->hw.init = &init;
 	osc->pmc = pmc;

drivers/clk/at91/clk-slow.c +1 -1

index 67b304726d06..402b45d38d25 100644
@@ -251,7 +251,7 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr,
 	init.ops = &slow_rc_osc_ops;
 	init.parent_names = NULL;
 	init.num_parents = 0;
-	init.flags = CLK_IS_ROOT | CLK_IGNORE_UNUSED;
+	init.flags = CLK_IGNORE_UNUSED;
 
 	osc->hw.init = &init;
 	osc->sckcr = sckcr;

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Boris Brezillon

Acked-by on v1 1/41

2016-03-01 22:15 UTC #2 lore raw

Re: [PATCH 01/41] clk: at91: Remove CLK_IS_ROOT

Quoted 4 lines · On Tue, 1 Mar 2016 10:59:46 -0800 Stephen Boyd <[email protected]> wrote:

This flag is a no-op now. Remove usage of the flag.
Cc Boris Brezillon <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>

Acked-by Boris Brezillon <[email protected]>

Quoted 31 lines

---
 drivers/clk/at91/clk-main.c | 2 +-
 drivers/clk/at91/clk-slow.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

drivers/clk/at91/clk-main.c +1 -1

index b85f43529396..b9bdfd8e4e6f 100644
@@ -315,7 +315,7 @@ at91_clk_register_main_rc_osc(struct at91_pmc *pmc,
 	init.ops = &main_rc_osc_ops;
 	init.parent_names = NULL;
 	init.num_parents = 0;
-	init.flags = CLK_IS_ROOT | CLK_IGNORE_UNUSED;
+	init.flags = CLK_IGNORE_UNUSED;
 
 	osc->hw.init = &init;
 	osc->pmc = pmc;

drivers/clk/at91/clk-slow.c +1 -1

index 67b304726d06..402b45d38d25 100644
@@ -251,7 +251,7 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr,
 	init.ops = &slow_rc_osc_ops;
 	init.parent_names = NULL;
 	init.num_parents = 0;
-	init.flags = CLK_IS_ROOT | CLK_IGNORE_UNUSED;
+	init.flags = CLK_IGNORE_UNUSED;
 
 	osc->hw.init = &init;
 	osc->sckcr = sckcr;

Signature · 3 lines

Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Stephen Boyd

author

2016-03-01 18:59 UTC #3 lore raw

PATCH 2/41 clk: bcm: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Lee Jones <[email protected]>

Cc Eric Anholt <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/bcm/clk-bcm2835.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

drivers/clk/bcm/clk-bcm2835.c +3 -6

index 5747a9d17c74..c74ed3fd496d 100644
@@ -324,21 +324,18 @@ void __init bcm2835_init_clocks(void)
 	struct clk *clk;
 	int ret;
 
-	clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT,
-					126000000);
+	clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, 0, 126000000);
 	if (IS_ERR(clk))
 		pr_err("apb_pclk not registered\n");
 
-	clk = clk_register_fixed_rate(NULL, "uart0_pclk", NULL, CLK_IS_ROOT,
-					3000000);
+	clk = clk_register_fixed_rate(NULL, "uart0_pclk", NULL, 0, 3000000);
 	if (IS_ERR(clk))
 		pr_err("uart0_pclk not registered\n");
 	ret = clk_register_clkdev(clk, NULL, "20201000.uart");
 	if (ret)
 		pr_err("uart0_pclk alias not registered\n");
 
-	clk = clk_register_fixed_rate(NULL, "uart1_pclk", NULL, CLK_IS_ROOT,
-					125000000);
+	clk = clk_register_fixed_rate(NULL, "uart1_pclk", NULL, 0, 125000000);
 	if (IS_ERR(clk))
 		pr_err("uart1_pclk not registered\n");
 	ret = clk_register_clkdev(clk, NULL, "20215000.uart");

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Eric Anholt

Reviewed-by on v1 2/41

2016-03-02 21:59 UTC #4 lore raw

Re: [PATCH 02/41] clk: bcm: Remove CLK_IS_ROOT

Quoted 1 line · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

I like that this flag is going away. It's a nice cleanup.

Reviewed-by Eric Anholt <[email protected]>

Stephen Boyd

author

2016-03-01 18:59 UTC #5 lore raw

PATCH 3/41 clk: hisilicon: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Leo Yan <[email protected]>

Cc Bintian Wang <[email protected]>

Cc Zhangfei Gao <[email protected]>

Cc Haojian Zhuang <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/hisilicon/clk-hi3620.c      | 18 +++++-----
 drivers/clk/hisilicon/clk-hi6220-stub.c |  2 +-
 drivers/clk/hisilicon/clk-hi6220.c      | 26 +++++++-------
 drivers/clk/hisilicon/clk-hip04.c       |  6 ++--
 drivers/clk/hisilicon/clk-hix5hd2.c     | 60 ++++++++++++++++-----------------
 5 files changed, 56 insertions(+), 56 deletions(-)

drivers/clk/hisilicon/clk-hi3620.c +9 -9

index 7d03fe17d66f..d04a104ce1b4 100644
@@ -78,15 +78,15 @@ static const char *const mmc3_mux_p[] __initconst = { "armpll2", "armpll3", };
 
 /* fixed rate clocks */
 static struct hisi_fixed_rate_clock hi3620_fixed_rate_clks[] __initdata = {
-	{ HI3620_OSC32K,   "osc32k",   NULL, CLK_IS_ROOT, 32768, },
-	{ HI3620_OSC26M,   "osc26m",   NULL, CLK_IS_ROOT, 26000000, },
-	{ HI3620_PCLK,     "pclk",     NULL, CLK_IS_ROOT, 26000000, },
-	{ HI3620_PLL_ARM0, "armpll0",  NULL, CLK_IS_ROOT, 1600000000, },
-	{ HI3620_PLL_ARM1, "armpll1",  NULL, CLK_IS_ROOT, 1600000000, },
-	{ HI3620_PLL_PERI, "armpll2",  NULL, CLK_IS_ROOT, 1440000000, },
-	{ HI3620_PLL_USB,  "armpll3",  NULL, CLK_IS_ROOT, 1440000000, },
-	{ HI3620_PLL_HDMI, "armpll4",  NULL, CLK_IS_ROOT, 1188000000, },
-	{ HI3620_PLL_GPU,  "armpll5",  NULL, CLK_IS_ROOT, 1300000000, },
+	{ HI3620_OSC32K,   "osc32k",   NULL, 0, 32768, },
+	{ HI3620_OSC26M,   "osc26m",   NULL, 0, 26000000, },
+	{ HI3620_PCLK,     "pclk",     NULL, 0, 26000000, },
+	{ HI3620_PLL_ARM0, "armpll0",  NULL, 0, 1600000000, },
+	{ HI3620_PLL_ARM1, "armpll1",  NULL, 0, 1600000000, },
+	{ HI3620_PLL_PERI, "armpll2",  NULL, 0, 1440000000, },
+	{ HI3620_PLL_USB,  "armpll3",  NULL, 0, 1440000000, },
+	{ HI3620_PLL_HDMI, "armpll4",  NULL, 0, 1188000000, },
+	{ HI3620_PLL_GPU,  "armpll5",  NULL, 0, 1300000000, },
 };
 
 /* fixed factor clocks */

drivers/clk/hisilicon/clk-hi6220-stub.c +1 -1

index 8afb40ef40ce..329a09214d12 100644
@@ -235,7 +235,7 @@ static int hi6220_stub_clk_probe(struct platform_device *pdev)
 	init.name = "acpu0";
 	init.ops = &hi6220_stub_clk_ops;
 	init.num_parents = 0;
-	init.flags = CLK_IS_ROOT;
+	init.flags = 0;
 
 	clk = devm_clk_register(dev, &stub_clk->hw);
 	if (IS_ERR(clk))

drivers/clk/hisilicon/clk-hi6220.c +13 ~~-13~~

index 4563343b6420..f02cb41d40a4 100644
@@ -26,19 +26,19 @@
 
 /* clocks in AO (always on) controller */
 static struct hisi_fixed_rate_clock hi6220_fixed_rate_clks[] __initdata = {
-	{ HI6220_REF32K,	"ref32k",	NULL, CLK_IS_ROOT, 32764,     },
-	{ HI6220_CLK_TCXO,	"clk_tcxo",	NULL, CLK_IS_ROOT, 19200000,  },
-	{ HI6220_MMC1_PAD,	"mmc1_pad",	NULL, CLK_IS_ROOT, 100000000, },
-	{ HI6220_MMC2_PAD,	"mmc2_pad",	NULL, CLK_IS_ROOT, 100000000, },
-	{ HI6220_MMC0_PAD,	"mmc0_pad",	NULL, CLK_IS_ROOT, 200000000, },
-	{ HI6220_PLL_BBP,	"bbppll0",	NULL, CLK_IS_ROOT, 245760000, },
-	{ HI6220_PLL_GPU,	"gpupll",	NULL, CLK_IS_ROOT, 1000000000,},
-	{ HI6220_PLL1_DDR,	"ddrpll1",	NULL, CLK_IS_ROOT, 1066000000,},
-	{ HI6220_PLL_SYS,	"syspll",	NULL, CLK_IS_ROOT, 1200000000,},
-	{ HI6220_PLL_SYS_MEDIA,	"media_syspll",	NULL, CLK_IS_ROOT, 1200000000,},
-	{ HI6220_DDR_SRC,	"ddr_sel_src",  NULL, CLK_IS_ROOT, 1200000000,},
-	{ HI6220_PLL_MEDIA,	"media_pll",    NULL, CLK_IS_ROOT, 1440000000,},
-	{ HI6220_PLL_DDR,	"ddrpll0",      NULL, CLK_IS_ROOT, 1600000000,},
+	{ HI6220_REF32K,	"ref32k",	NULL, 0, 32764,     },
+	{ HI6220_CLK_TCXO,	"clk_tcxo",	NULL, 0, 19200000,  },
+	{ HI6220_MMC1_PAD,	"mmc1_pad",	NULL, 0, 100000000, },
+	{ HI6220_MMC2_PAD,	"mmc2_pad",	NULL, 0, 100000000, },
+	{ HI6220_MMC0_PAD,	"mmc0_pad",	NULL, 0, 200000000, },
+	{ HI6220_PLL_BBP,	"bbppll0",	NULL, 0, 245760000, },
+	{ HI6220_PLL_GPU,	"gpupll",	NULL, 0, 1000000000,},
+	{ HI6220_PLL1_DDR,	"ddrpll1",	NULL, 0, 1066000000,},
+	{ HI6220_PLL_SYS,	"syspll",	NULL, 0, 1200000000,},
+	{ HI6220_PLL_SYS_MEDIA,	"media_syspll",	NULL, 0, 1200000000,},
+	{ HI6220_DDR_SRC,	"ddr_sel_src",  NULL, 0, 1200000000,},
+	{ HI6220_PLL_MEDIA,	"media_pll",    NULL, 0, 1440000000,},
+	{ HI6220_PLL_DDR,	"ddrpll0",      NULL, 0, 1600000000,},
 };
 
 static struct hisi_fixed_factor_clock hi6220_fixed_factor_clks[] __initdata = {

drivers/clk/hisilicon/clk-hip04.c +3 -3

index 8ca967308343..b38e03da1d02 100644
@@ -36,9 +36,9 @@
 
 /* fixed rate clocks */
 static struct hisi_fixed_rate_clock hip04_fixed_rate_clks[] __initdata = {
-	{ HIP04_OSC50M,   "osc50m",   NULL, CLK_IS_ROOT, 50000000, },
-	{ HIP04_CLK_50M,  "clk50m",   NULL, CLK_IS_ROOT, 50000000, },
-	{ HIP04_CLK_168M, "clk168m",  NULL, CLK_IS_ROOT, 168750000, },
+	{ HIP04_OSC50M,   "osc50m",   NULL, 0, 50000000, },
+	{ HIP04_CLK_50M,  "clk50m",   NULL, 0, 50000000, },
+	{ HIP04_CLK_168M, "clk168m",  NULL, 0, 168750000, },
 };
 
 static void __init hip04_clk_init(struct device_node *np)

drivers/clk/hisilicon/clk-hix5hd2.c +30 ~~-30~~

66 lines not on this page · raw message

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Leo Yan

Tested-by on v1 3/41

2016-03-02 01:45 UTC #6 lore raw

Re: [PATCH 03/41] clk: hisilicon: Remove CLK_IS_ROOT

Quoted 82 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Leo Yan <[email protected]>

Cc Bintian Wang <[email protected]>

Cc Zhangfei Gao <[email protected]>

Cc Haojian Zhuang <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/hisilicon/clk-hi3620.c      | 18 +++++-----
 drivers/clk/hisilicon/clk-hi6220-stub.c |  2 +-
 drivers/clk/hisilicon/clk-hi6220.c      | 26 +++++++-------
 drivers/clk/hisilicon/clk-hip04.c       |  6 ++--
 drivers/clk/hisilicon/clk-hix5hd2.c     | 60 ++++++++++++++++-----------------
 5 files changed, 56 insertions(+), 56 deletions(-)

drivers/clk/hisilicon/clk-hi3620.c +9 -9

index 7d03fe17d66f..d04a104ce1b4 100644
@@ -78,15 +78,15 @@ static const char *const mmc3_mux_p[] __initconst = { "armpll2", "armpll3", };
 
 /* fixed rate clocks */
 static struct hisi_fixed_rate_clock hi3620_fixed_rate_clks[] __initdata = {
-	{ HI3620_OSC32K,   "osc32k",   NULL, CLK_IS_ROOT, 32768, },
-	{ HI3620_OSC26M,   "osc26m",   NULL, CLK_IS_ROOT, 26000000, },
-	{ HI3620_PCLK,     "pclk",     NULL, CLK_IS_ROOT, 26000000, },
-	{ HI3620_PLL_ARM0, "armpll0",  NULL, CLK_IS_ROOT, 1600000000, },
-	{ HI3620_PLL_ARM1, "armpll1",  NULL, CLK_IS_ROOT, 1600000000, },
-	{ HI3620_PLL_PERI, "armpll2",  NULL, CLK_IS_ROOT, 1440000000, },
-	{ HI3620_PLL_USB,  "armpll3",  NULL, CLK_IS_ROOT, 1440000000, },
-	{ HI3620_PLL_HDMI, "armpll4",  NULL, CLK_IS_ROOT, 1188000000, },
-	{ HI3620_PLL_GPU,  "armpll5",  NULL, CLK_IS_ROOT, 1300000000, },
+	{ HI3620_OSC32K,   "osc32k",   NULL, 0, 32768, },
+	{ HI3620_OSC26M,   "osc26m",   NULL, 0, 26000000, },
+	{ HI3620_PCLK,     "pclk",     NULL, 0, 26000000, },
+	{ HI3620_PLL_ARM0, "armpll0",  NULL, 0, 1600000000, },
+	{ HI3620_PLL_ARM1, "armpll1",  NULL, 0, 1600000000, },
+	{ HI3620_PLL_PERI, "armpll2",  NULL, 0, 1440000000, },
+	{ HI3620_PLL_USB,  "armpll3",  NULL, 0, 1440000000, },
+	{ HI3620_PLL_HDMI, "armpll4",  NULL, 0, 1188000000, },
+	{ HI3620_PLL_GPU,  "armpll5",  NULL, 0, 1300000000, },
 };
 
 /* fixed factor clocks */

drivers/clk/hisilicon/clk-hi6220-stub.c +1 -1

index 8afb40ef40ce..329a09214d12 100644
@@ -235,7 +235,7 @@ static int hi6220_stub_clk_probe(struct platform_device *pdev)
 	init.name = "acpu0";
 	init.ops = &hi6220_stub_clk_ops;
 	init.num_parents = 0;
-	init.flags = CLK_IS_ROOT;
+	init.flags = 0;
 
 	clk = devm_clk_register(dev, &stub_clk->hw);
 	if (IS_ERR(clk))

drivers/clk/hisilicon/clk-hi6220.c +4 ~~-13~~

index 4563343b6420..f02cb41d40a4 100644
@@ -26,19 +26,19 @@
 
 /* clocks in AO (always on) controller */
 static struct hisi_fixed_rate_clock hi6220_fixed_rate_clks[] __initdata = {
-	{ HI6220_REF32K,	"ref32k",	NULL, CLK_IS_ROOT, 32764,     },
-	{ HI6220_CLK_TCXO,	"clk_tcxo",	NULL, CLK_IS_ROOT, 19200000,  },
-	{ HI6220_MMC1_PAD,	"mmc1_pad",	NULL, CLK_IS_ROOT, 100000000, },
-	{ HI6220_MMC2_PAD,	"mmc2_pad",	NULL, CLK_IS_ROOT, 100000000, },
-	{ HI6220_MMC0_PAD,	"mmc0_pad",	NULL, CLK_IS_ROOT, 200000000, },
-	{ HI6220_PLL_BBP,	"bbppll0",	NULL, CLK_IS_ROOT, 245760000, },
-	{ HI6220_PLL_GPU,	"gpupll",	NULL, CLK_IS_ROOT, 1000000000,},
-	{ HI6220_PLL1_DDR,	"ddrpll1",	NULL, CLK_IS_ROOT, 1066000000,},
-	{ HI6220_PLL_SYS,	"syspll",	NULL, CLK_IS_ROOT, 1200000000,},
-	{ HI6220_PLL_SYS_MEDIA,	"media_syspll",	NULL, CLK_IS_ROOT, 1200000000,},
-	{ HI6220_DDR_SRC,	"ddr_sel_src",  NULL, CLK_IS_ROOT, 1200000000,},
-	{ HI6220_PLL_MEDIA,	"media_pll",    NULL, CLK_IS_ROOT, 1440000000,},
-	{ HI6220_PLL_DDR,	"ddrpll0",      NULL, CLK_IS_ROOT, 1600000000,},
+	{ HI6220_REF32K,	"ref32k",	NULL, 0, 32764,     },
+	{ HI6220_CLK_TCXO,	"clk_tcxo",	NULL, 0, 19200000,  },
+	{ HI6220_MMC1_PAD,	"mmc1_pad",	NULL, 0, 100000000, },
+	{ HI6220_MMC2_PAD,	"mmc2_pad",	NULL, 0, 100000000, },

drivers/clk/hisilicon/clk-hi6220.c line 42

Quoted 10 lines

drivers/clk/hisilicon/clk-hi6220.c +9 -0

+	{ HI6220_MMC0_PAD,	"mmc0_pad",	NULL, 0, 200000000, },
+	{ HI6220_PLL_BBP,	"bbppll0",	NULL, 0, 245760000, },
+	{ HI6220_PLL_GPU,	"gpupll",	NULL, 0, 1000000000,},
+	{ HI6220_PLL1_DDR,	"ddrpll1",	NULL, 0, 1066000000,},
+	{ HI6220_PLL_SYS,	"syspll",	NULL, 0, 1200000000,},
+	{ HI6220_PLL_SYS_MEDIA,	"media_syspll",	NULL, 0, 1200000000,},
+	{ HI6220_DDR_SRC,	"ddr_sel_src",  NULL, 0, 1200000000,},
+	{ HI6220_PLL_MEDIA,	"media_pll",    NULL, 0, 1440000000,},
+	{ HI6220_PLL_DDR,	"ddrpll0",      NULL, 0, 1600000000,},
 };

Tested for clk-hi6220-stub.c and clk-hi6220.c.

Tested-by Leo Yan <[email protected]>

Quoted 93 lines

drivers/clk/hisilicon/clk-hi6220.c +0 -0

 static struct hisi_fixed_factor_clock hi6220_fixed_factor_clks[] __initdata = {

drivers/clk/hisilicon/clk-hip04.c +3 -3

index 8ca967308343..b38e03da1d02 100644
@@ -36,9 +36,9 @@
 
 /* fixed rate clocks */
 static struct hisi_fixed_rate_clock hip04_fixed_rate_clks[] __initdata = {
-	{ HIP04_OSC50M,   "osc50m",   NULL, CLK_IS_ROOT, 50000000, },
-	{ HIP04_CLK_50M,  "clk50m",   NULL, CLK_IS_ROOT, 50000000, },
-	{ HIP04_CLK_168M, "clk168m",  NULL, CLK_IS_ROOT, 168750000, },
+	{ HIP04_OSC50M,   "osc50m",   NULL, 0, 50000000, },
+	{ HIP04_CLK_50M,  "clk50m",   NULL, 0, 50000000, },
+	{ HIP04_CLK_168M, "clk168m",  NULL, 0, 168750000, },
 };
 
 static void __init hip04_clk_init(struct device_node *np)

drivers/clk/hisilicon/clk-hix5hd2.c +30 ~~-30~~

index 0aaf29da8491..14b05efa3c2a 100644
@@ -14,36 +14,36 @@
 #include "clk.h"
 
 static struct hisi_fixed_rate_clock hix5hd2_fixed_rate_clks[] __initdata = {
-	{ HIX5HD2_FIXED_1200M, "1200m", NULL, CLK_IS_ROOT, 1200000000, },
-	{ HIX5HD2_FIXED_400M, "400m", NULL, CLK_IS_ROOT, 400000000, },
-	{ HIX5HD2_FIXED_48M, "48m", NULL, CLK_IS_ROOT, 48000000, },
-	{ HIX5HD2_FIXED_24M, "24m", NULL, CLK_IS_ROOT, 24000000, },
-	{ HIX5HD2_FIXED_600M, "600m", NULL, CLK_IS_ROOT, 600000000, },
-	{ HIX5HD2_FIXED_300M, "300m", NULL, CLK_IS_ROOT, 300000000, },
-	{ HIX5HD2_FIXED_75M, "75m", NULL, CLK_IS_ROOT, 75000000, },
-	{ HIX5HD2_FIXED_200M, "200m", NULL, CLK_IS_ROOT, 200000000, },
-	{ HIX5HD2_FIXED_100M, "100m", NULL, CLK_IS_ROOT, 100000000, },
-	{ HIX5HD2_FIXED_40M, "40m", NULL, CLK_IS_ROOT, 40000000, },
-	{ HIX5HD2_FIXED_150M, "150m", NULL, CLK_IS_ROOT, 150000000, },
-	{ HIX5HD2_FIXED_1728M, "1728m", NULL, CLK_IS_ROOT, 1728000000, },
-	{ HIX5HD2_FIXED_28P8M, "28p8m", NULL, CLK_IS_ROOT, 28000000, },
-	{ HIX5HD2_FIXED_432M, "432m", NULL, CLK_IS_ROOT, 432000000, },
-	{ HIX5HD2_FIXED_345P6M, "345p6m", NULL, CLK_IS_ROOT, 345000000, },
-	{ HIX5HD2_FIXED_288M, "288m", NULL, CLK_IS_ROOT, 288000000, },
-	{ HIX5HD2_FIXED_60M,	"60m", NULL, CLK_IS_ROOT, 60000000, },
-	{ HIX5HD2_FIXED_750M, "750m", NULL, CLK_IS_ROOT, 750000000, },
-	{ HIX5HD2_FIXED_500M, "500m", NULL, CLK_IS_ROOT, 500000000, },
-	{ HIX5HD2_FIXED_54M,	"54m", NULL, CLK_IS_ROOT, 54000000, },
-	{ HIX5HD2_FIXED_27M, "27m", NULL, CLK_IS_ROOT, 27000000, },
-	{ HIX5HD2_FIXED_1500M, "1500m", NULL, CLK_IS_ROOT, 1500000000, },
-	{ HIX5HD2_FIXED_375M, "375m", NULL, CLK_IS_ROOT, 375000000, },
-	{ HIX5HD2_FIXED_187M, "187m", NULL, CLK_IS_ROOT, 187000000, },
-	{ HIX5HD2_FIXED_250M, "250m", NULL, CLK_IS_ROOT, 250000000, },
-	{ HIX5HD2_FIXED_125M, "125m", NULL, CLK_IS_ROOT, 125000000, },
-	{ HIX5HD2_FIXED_2P02M, "2m", NULL, CLK_IS_ROOT, 2000000, },
-	{ HIX5HD2_FIXED_50M, "50m", NULL, CLK_IS_ROOT, 50000000, },
-	{ HIX5HD2_FIXED_25M, "25m", NULL, CLK_IS_ROOT, 25000000, },
-	{ HIX5HD2_FIXED_83M, "83m", NULL, CLK_IS_ROOT, 83333333, },
+	{ HIX5HD2_FIXED_1200M, "1200m", NULL, 0, 1200000000, },
+	{ HIX5HD2_FIXED_400M, "400m", NULL, 0, 400000000, },
+	{ HIX5HD2_FIXED_48M, "48m", NULL, 0, 48000000, },
+	{ HIX5HD2_FIXED_24M, "24m", NULL, 0, 24000000, },
+	{ HIX5HD2_FIXED_600M, "600m", NULL, 0, 600000000, },
+	{ HIX5HD2_FIXED_300M, "300m", NULL, 0, 300000000, },
+	{ HIX5HD2_FIXED_75M, "75m", NULL, 0, 75000000, },
+	{ HIX5HD2_FIXED_200M, "200m", NULL, 0, 200000000, },
+	{ HIX5HD2_FIXED_100M, "100m", NULL, 0, 100000000, },
+	{ HIX5HD2_FIXED_40M, "40m", NULL, 0, 40000000, },
+	{ HIX5HD2_FIXED_150M, "150m", NULL, 0, 150000000, },
+	{ HIX5HD2_FIXED_1728M, "1728m", NULL, 0, 1728000000, },
+	{ HIX5HD2_FIXED_28P8M, "28p8m", NULL, 0, 28000000, },
+	{ HIX5HD2_FIXED_432M, "432m", NULL, 0, 432000000, },
+	{ HIX5HD2_FIXED_345P6M, "345p6m", NULL, 0, 345000000, },
+	{ HIX5HD2_FIXED_288M, "288m", NULL, 0, 288000000, },
+	{ HIX5HD2_FIXED_60M,	"60m", NULL, 0, 60000000, },
+	{ HIX5HD2_FIXED_750M, "750m", NULL, 0, 750000000, },
+	{ HIX5HD2_FIXED_500M, "500m", NULL, 0, 500000000, },
+	{ HIX5HD2_FIXED_54M,	"54m", NULL, 0, 54000000, },
+	{ HIX5HD2_FIXED_27M, "27m", NULL, 0, 27000000, },
+	{ HIX5HD2_FIXED_1500M, "1500m", NULL, 0, 1500000000, },
+	{ HIX5HD2_FIXED_375M, "375m", NULL, 0, 375000000, },
+	{ HIX5HD2_FIXED_187M, "187m", NULL, 0, 187000000, },
+	{ HIX5HD2_FIXED_250M, "250m", NULL, 0, 250000000, },
+	{ HIX5HD2_FIXED_125M, "125m", NULL, 0, 125000000, },
+	{ HIX5HD2_FIXED_2P02M, "2m", NULL, 0, 2000000, },
+	{ HIX5HD2_FIXED_50M, "50m", NULL, 0, 50000000, },
+	{ HIX5HD2_FIXED_25M, "25m", NULL, 0, 25000000, },
+	{ HIX5HD2_FIXED_83M, "83m", NULL, 0, 83333333, },
 };
 
 static const char *const sfc_mux_p[] __initconst = {

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-03-03 01:43 UTC #7 lore raw

Re: [PATCH 03/41] clk: hisilicon: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 8 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Leo Yan <[email protected]>
Cc Bintian Wang <[email protected]>
Cc Zhangfei Gao <[email protected]>
Cc Haojian Zhuang <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 18:59 UTC #8 lore raw

PATCH 4/41 clk: imx: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Shawn Guo <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/imx/clk.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/clk/imx/clk.h +1 -1

index c94ac5c26226..d942f5748d08 100644
@@ -87,7 +87,7 @@ struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
 
 static inline struct clk *imx_clk_fixed(const char *name, int rate)
 {
-	return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
+	return clk_register_fixed_rate(NULL, name, NULL, 0, rate);
 }
 
 static inline struct clk *imx_clk_divider(const char *name, const char *parent,

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Shawn Guo

Acked-by on v1 4/41

2016-03-02 02:42 UTC #9 lore raw

Re: [PATCH 04/41] clk: imx: Remove CLK_IS_ROOT

Quoted 4 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Shawn Guo <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>

Acked-by Shawn Guo <[email protected]>

Quoted 22 lines

---
 drivers/clk/imx/clk.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/clk/imx/clk.h +1 -1

index c94ac5c26226..d942f5748d08 100644
@@ -87,7 +87,7 @@ struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
 
 static inline struct clk *imx_clk_fixed(const char *name, int rate)
 {
-	return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
+	return clk_register_fixed_rate(NULL, name, NULL, 0, rate);
 }
 
 static inline struct clk *imx_clk_divider(const char *name, const char *parent,

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 18:59 UTC #10 lore raw

PATCH 5/41 clk: mediatek: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc James Liao <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/mediatek/clk-mtk.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

drivers/clk/mediatek/clk-mtk.c +2 -2

index 352830369e0e..5ada644e6200 100644
@@ -58,8 +58,8 @@ void __init mtk_clk_register_fixed_clks(const struct mtk_fixed_clk *clks,
 	for (i = 0; i < num; i++) {
 		const struct mtk_fixed_clk *rc = &clks[i];
 
-		clk = clk_register_fixed_rate(NULL, rc->name, rc->parent,
-				rc->parent ? 0 : CLK_IS_ROOT, rc->rate);
+		clk = clk_register_fixed_rate(NULL, rc->name, rc->parent, 0,
+					      rc->rate);
 
 		if (IS_ERR(clk)) {
 			pr_err("Failed to register clk %s: %ld\n",

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

James Liao

Acked-by on v1 5/41

2016-03-02 01:58 UTC #11 lore raw

Re: [PATCH 05/41] clk: mediatek: Remove CLK_IS_ROOT

Quoted 4 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc James Liao <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>

Acked-by James Liao <[email protected]>

Best regards,

James

Quoted 19 lines

---
 drivers/clk/mediatek/clk-mtk.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

drivers/clk/mediatek/clk-mtk.c +2 -2

index 352830369e0e..5ada644e6200 100644
@@ -58,8 +58,8 @@ void __init mtk_clk_register_fixed_clks(const struct mtk_fixed_clk *clks,
 	for (i = 0; i < num; i++) {
 		const struct mtk_fixed_clk *rc = &clks[i];
 
-		clk = clk_register_fixed_rate(NULL, rc->name, rc->parent,
-				rc->parent ? 0 : CLK_IS_ROOT, rc->rate);
+		clk = clk_register_fixed_rate(NULL, rc->name, rc->parent, 0,
+					      rc->rate);
 
 		if (IS_ERR(clk)) {
 			pr_err("Failed to register clk %s: %ld\n",

Stephen Boyd

author Applied

2016-03-03 01:44 UTC #12 lore raw

Re: [PATCH 05/41] clk: mediatek: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc James Liao <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 18:59 UTC #13 lore raw

PATCH 6/41 clk: meson: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Carlo Caione <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/meson/meson8b-clkc.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

drivers/clk/meson/meson8b-clkc.c +3 -3

index 61f6d55c4ac7..4d057b3e21b2 100644
@@ -141,11 +141,11 @@ static const struct composite_conf mali_conf __initconst = {
 };
 
 static const struct clk_conf meson8b_xtal_conf __initconst =
-	FIXED_RATE_P(MESON8B_REG_CTL0_ADDR, CLKID_XTAL, "xtal",
-		     CLK_IS_ROOT, PARM(0x00, 4, 7));
+	FIXED_RATE_P(MESON8B_REG_CTL0_ADDR, CLKID_XTAL, "xtal", 0,
+			PARM(0x00, 4, 7));
 
 static const struct clk_conf meson8b_clk_confs[] __initconst = {
-	FIXED_RATE(CLKID_ZERO, "zero", CLK_IS_ROOT, 0),
+	FIXED_RATE(CLKID_ZERO, "zero", 0, 0),
 	PLL(MESON8B_REG_PLL_FIXED, CLKID_PLL_FIXED, "fixed_pll",
 	    p_xtal, 0, &pll_confs),
 	PLL(MESON8B_REG_PLL_VID, CLKID_PLL_VID, "vid_pll",

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-04-15 23:54 UTC #14 lore raw

Re: [PATCH 06/41] clk: meson: Remove CLK_IS_ROOT

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Carlo Caione <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 18:59 UTC #15 lore raw

PATCH 7/41 clk: mmp: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Chao Xie <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/mmp/clk-mmp2.c       | 14 +++++---------
 drivers/clk/mmp/clk-of-mmp2.c    | 10 +++++-----
 drivers/clk/mmp/clk-of-pxa168.c  |  8 ++++----
 drivers/clk/mmp/clk-of-pxa1928.c | 12 ++++++------
 drivers/clk/mmp/clk-of-pxa910.c  |  8 ++++----
 drivers/clk/mmp/clk-pxa168.c     |  8 +++-----
 drivers/clk/mmp/clk-pxa910.c     |  8 +++-----
 7 files changed, 30 insertions(+), 38 deletions(-)

drivers/clk/mmp/clk-mmp2.c +5 -9

index 38931dbd1eff..383f6a4f64f0 100644
@@ -99,23 +99,19 @@ void __init mmp2_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
 		return;
 	}
 
-	clk = clk_register_fixed_rate(NULL, "clk32", NULL, CLK_IS_ROOT, 3200);
+	clk = clk_register_fixed_rate(NULL, "clk32", NULL, 0, 3200);
 	clk_register_clkdev(clk, "clk32", NULL);
 
-	vctcxo = clk_register_fixed_rate(NULL, "vctcxo", NULL, CLK_IS_ROOT,
-				26000000);
+	vctcxo = clk_register_fixed_rate(NULL, "vctcxo", NULL, 0, 26000000);
 	clk_register_clkdev(vctcxo, "vctcxo", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "pll1", NULL, CLK_IS_ROOT,
-				800000000);
+	clk = clk_register_fixed_rate(NULL, "pll1", NULL, 0, 800000000);
 	clk_register_clkdev(clk, "pll1", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "usb_pll", NULL, CLK_IS_ROOT,
-				480000000);
+	clk = clk_register_fixed_rate(NULL, "usb_pll", NULL, 0, 480000000);
 	clk_register_clkdev(clk, "usb_pll", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "pll2", NULL, CLK_IS_ROOT,
-				960000000);
+	clk = clk_register_fixed_rate(NULL, "pll2", NULL, 0, 960000000);
 	clk_register_clkdev(clk, "pll2", NULL);
 
 	clk = clk_register_fixed_factor(NULL, "pll1_2", "pll1",

drivers/clk/mmp/clk-of-mmp2.c +5 -5

index 251533d87c65..3a51fff1b0e7 100644
@@ -63,11 +63,11 @@ struct mmp2_clk_unit {
 };
 
 static struct mmp_param_fixed_rate_clk fixed_rate_clks[] = {
-	{MMP2_CLK_CLK32, "clk32", NULL, CLK_IS_ROOT, 32768},
-	{MMP2_CLK_VCTCXO, "vctcxo", NULL, CLK_IS_ROOT, 26000000},
-	{MMP2_CLK_PLL1, "pll1", NULL, CLK_IS_ROOT, 800000000},
-	{MMP2_CLK_PLL2, "pll2", NULL, CLK_IS_ROOT, 960000000},
-	{MMP2_CLK_USB_PLL, "usb_pll", NULL, CLK_IS_ROOT, 480000000},
+	{MMP2_CLK_CLK32, "clk32", NULL, 0, 32768},
+	{MMP2_CLK_VCTCXO, "vctcxo", NULL, 0, 26000000},
+	{MMP2_CLK_PLL1, "pll1", NULL, 0, 800000000},
+	{MMP2_CLK_PLL2, "pll2", NULL, 0, 960000000},
+	{MMP2_CLK_USB_PLL, "usb_pll", NULL, 0, 480000000},
 };
 
 static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = {

drivers/clk/mmp/clk-of-pxa168.c +4 -4

index 64eaf4141c69..87f2317b2a00 100644
@@ -56,10 +56,10 @@ struct pxa168_clk_unit {
 };
 
 static struct mmp_param_fixed_rate_clk fixed_rate_clks[] = {
-	{PXA168_CLK_CLK32, "clk32", NULL, CLK_IS_ROOT, 32768},
-	{PXA168_CLK_VCTCXO, "vctcxo", NULL, CLK_IS_ROOT, 26000000},
-	{PXA168_CLK_PLL1, "pll1", NULL, CLK_IS_ROOT, 624000000},
-	{PXA168_CLK_USB_PLL, "usb_pll", NULL, CLK_IS_ROOT, 480000000},
+	{PXA168_CLK_CLK32, "clk32", NULL, 0, 32768},
+	{PXA168_CLK_VCTCXO, "vctcxo", NULL, 0, 26000000},
+	{PXA168_CLK_PLL1, "pll1", NULL, 0, 624000000},
+	{PXA168_CLK_USB_PLL, "usb_pll", NULL, 0, 480000000},
 };
 
 static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = {

drivers/clk/mmp/clk-of-pxa1928.c +6 -6

index 433a5ae1eae0..e478ff44e170 100644
@@ -34,12 +34,12 @@ struct pxa1928_clk_unit {
 };
 
 static struct mmp_param_fixed_rate_clk fixed_rate_clks[] = {
-	{0, "clk32", NULL, CLK_IS_ROOT, 32768},
-	{0, "vctcxo", NULL, CLK_IS_ROOT, 26000000},
-	{0, "pll1_624", NULL, CLK_IS_ROOT, 624000000},
-	{0, "pll5p", NULL, CLK_IS_ROOT, 832000000},
-	{0, "pll5", NULL, CLK_IS_ROOT, 1248000000},
-	{0, "usb_pll", NULL, CLK_IS_ROOT, 480000000},
+	{0, "clk32", NULL, 0, 32768},
+	{0, "vctcxo", NULL, 0, 26000000},
+	{0, "pll1_624", NULL, 0, 624000000},
+	{0, "pll5p", NULL, 0, 832000000},
+	{0, "pll5", NULL, 0, 1248000000},
+	{0, "usb_pll", NULL, 0, 480000000},
 };
 
 static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = {

drivers/clk/mmp/clk-of-pxa910.c +4 -4

index 13d6173326a4..e22a67f76d93 100644
@@ -56,10 +56,10 @@ struct pxa910_clk_unit {
 };
 
 static struct mmp_param_fixed_rate_clk fixed_rate_clks[] = {
-	{PXA910_CLK_CLK32, "clk32", NULL, CLK_IS_ROOT, 32768},
-	{PXA910_CLK_VCTCXO, "vctcxo", NULL, CLK_IS_ROOT, 26000000},
-	{PXA910_CLK_PLL1, "pll1", NULL, CLK_IS_ROOT, 624000000},
-	{PXA910_CLK_USB_PLL, "usb_pll", NULL, CLK_IS_ROOT, 480000000},
+	{PXA910_CLK_CLK32, "clk32", NULL, 0, 32768},
+	{PXA910_CLK_VCTCXO, "vctcxo", NULL, 0, 26000000},
+	{PXA910_CLK_PLL1, "pll1", NULL, 0, 624000000},
+	{PXA910_CLK_USB_PLL, "usb_pll", NULL, 0, 480000000},
 };
 
 static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = {

drivers/clk/mmp/clk-pxa168.c +3 -5

index 0dd83fb950c9..a9ef9209532a 100644
@@ -92,15 +92,13 @@ void __init pxa168_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
 		return;
 	}
 
-	clk = clk_register_fixed_rate(NULL, "clk32", NULL, CLK_IS_ROOT, 3200);
+	clk = clk_register_fixed_rate(NULL, "clk32", NULL, 0, 3200);
 	clk_register_clkdev(clk, "clk32", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "vctcxo", NULL, CLK_IS_ROOT,
-				26000000);
+	clk = clk_register_fixed_rate(NULL, "vctcxo", NULL, 0, 26000000);
 	clk_register_clkdev(clk, "vctcxo", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "pll1", NULL, CLK_IS_ROOT,
-				624000000);
+	clk = clk_register_fixed_rate(NULL, "pll1", NULL, 0, 624000000);
 	clk_register_clkdev(clk, "pll1", NULL);
 
 	clk = clk_register_fixed_factor(NULL, "pll1_2", "pll1",

drivers/clk/mmp/clk-pxa910.c +3 -5

index e1d2ce22cdf1..a520cf7702a1 100644
@@ -97,15 +97,13 @@ void __init pxa910_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
 		return;
 	}
 
-	clk = clk_register_fixed_rate(NULL, "clk32", NULL, CLK_IS_ROOT, 3200);
+	clk = clk_register_fixed_rate(NULL, "clk32", NULL, 0, 3200);
 	clk_register_clkdev(clk, "clk32", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "vctcxo", NULL, CLK_IS_ROOT,
-				26000000);
+	clk = clk_register_fixed_rate(NULL, "vctcxo", NULL, 0, 26000000);
 	clk_register_clkdev(clk, "vctcxo", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "pll1", NULL, CLK_IS_ROOT,
-				624000000);
+	clk = clk_register_fixed_rate(NULL, "pll1", NULL, 0, 624000000);
 	clk_register_clkdev(clk, "pll1", NULL);
 
 	clk = clk_register_fixed_factor(NULL, "pll1_2", "pll1",

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 18:59 UTC #16 lore raw

PATCH 8/41 clk: mvebu: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Gregory CLEMENT <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/mvebu/common.c       | 11 +++++------
 drivers/clk/mvebu/dove-divider.c |  3 +--
 2 files changed, 6 insertions(+), 8 deletions(-)

drivers/clk/mvebu/common.c +5 -6

index daa6ebdac131..66be2e0c82b4 100644
@@ -137,8 +137,8 @@ void __init mvebu_coreclk_setup(struct device_node *np,
 	of_property_read_string_index(np, "clock-output-names", 0,
 				      &tclk_name);
 	rate = desc->get_tclk_freq(base);
-	clk_data.clks[0] = clk_register_fixed_rate(NULL, tclk_name, NULL,
-						   CLK_IS_ROOT, rate);
+	clk_data.clks[0] = clk_register_fixed_rate(NULL, tclk_name, NULL, 0,
+						   rate);
 	WARN_ON(IS_ERR(clk_data.clks[0]));
 
 	/* Register CPU clock */

@@ -150,8 +150,8 @@ void __init mvebu_coreclk_setup(struct device_node *np,
 		&& desc->is_sscg_enabled(base))
 		rate = desc->fix_sscg_deviation(rate);
 
-	clk_data.clks[1] = clk_register_fixed_rate(NULL, cpuclk_name, NULL,
-						   CLK_IS_ROOT, rate);
+	clk_data.clks[1] = clk_register_fixed_rate(NULL, cpuclk_name, NULL, 0,
+						   rate);
 	WARN_ON(IS_ERR(clk_data.clks[1]));
 
 	/* Register fixed-factor clocks derived from CPU clock */

@@ -174,8 +174,7 @@ void __init mvebu_coreclk_setup(struct device_node *np,
 					      2 + desc->num_ratios, &name);
 		rate = desc->get_refclk_freq(base);
 		clk_data.clks[2 + desc->num_ratios] =
-			clk_register_fixed_rate(NULL, name, NULL,
-						CLK_IS_ROOT, rate);
+			clk_register_fixed_rate(NULL, name, NULL, 0, rate);
 		WARN_ON(IS_ERR(clk_data.clks[2 + desc->num_ratios]));
 	}

drivers/clk/mvebu/dove-divider.c +1 -2

index 3e0b52daa35f..4091f3cfee19 100644
@@ -225,8 +225,7 @@ static int dove_divider_init(struct device *dev, void __iomem *base,
 	 * Create the core PLL clock.  We treat this as a fixed rate
 	 * clock as we don't know any better, and documentation is sparse.
 	 */
-	clk = clk_register_fixed_rate(dev, core_pll[0], NULL, CLK_IS_ROOT,
-				      2000000000UL);
+	clk = clk_register_fixed_rate(dev, core_pll[0], NULL, 0, 2000000000UL);
 	if (IS_ERR(clk))
 		return PTR_ERR(clk);

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Gregory CLEMENT

Acked-by on v1 8/41

2016-03-03 10:27 UTC #17 lore raw

Re: [PATCH 08/41] clk: mvebu: Remove CLK_IS_ROOT

Hi Stephen,

Quoted 4 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Gregory CLEMENT <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>

Acked-by Gregory CLEMENT <[email protected]>

Thanks,

Gregory

Quoted 59 lines

---
 drivers/clk/mvebu/common.c       | 11 +++++------
 drivers/clk/mvebu/dove-divider.c |  3 +--
 2 files changed, 6 insertions(+), 8 deletions(-)

drivers/clk/mvebu/common.c +5 -6

index daa6ebdac131..66be2e0c82b4 100644
@@ -137,8 +137,8 @@ void __init mvebu_coreclk_setup(struct device_node *np,
 	of_property_read_string_index(np, "clock-output-names", 0,
 				      &tclk_name);
 	rate = desc->get_tclk_freq(base);
-	clk_data.clks[0] = clk_register_fixed_rate(NULL, tclk_name, NULL,
-						   CLK_IS_ROOT, rate);
+	clk_data.clks[0] = clk_register_fixed_rate(NULL, tclk_name, NULL, 0,
+						   rate);
 	WARN_ON(IS_ERR(clk_data.clks[0]));
 
 	/* Register CPU clock */

@@ -150,8 +150,8 @@ void __init mvebu_coreclk_setup(struct device_node *np,
 		&& desc->is_sscg_enabled(base))
 		rate = desc->fix_sscg_deviation(rate);
 
-	clk_data.clks[1] = clk_register_fixed_rate(NULL, cpuclk_name, NULL,
-						   CLK_IS_ROOT, rate);
+	clk_data.clks[1] = clk_register_fixed_rate(NULL, cpuclk_name, NULL, 0,
+						   rate);
 	WARN_ON(IS_ERR(clk_data.clks[1]));
 
 	/* Register fixed-factor clocks derived from CPU clock */

@@ -174,8 +174,7 @@ void __init mvebu_coreclk_setup(struct device_node *np,
 					      2 + desc->num_ratios, &name);
 		rate = desc->get_refclk_freq(base);
 		clk_data.clks[2 + desc->num_ratios] =
-			clk_register_fixed_rate(NULL, name, NULL,
-						CLK_IS_ROOT, rate);
+			clk_register_fixed_rate(NULL, name, NULL, 0, rate);
 		WARN_ON(IS_ERR(clk_data.clks[2 + desc->num_ratios]));
 	}

drivers/clk/mvebu/dove-divider.c +1 -2

index 3e0b52daa35f..4091f3cfee19 100644
@@ -225,8 +225,7 @@ static int dove_divider_init(struct device *dev, void __iomem *base,
 	 * Create the core PLL clock.  We treat this as a fixed rate
 	 * clock as we don't know any better, and documentation is sparse.
 	 */
-	clk = clk_register_fixed_rate(dev, core_pll[0], NULL, CLK_IS_ROOT,
-				      2000000000UL);
+	clk = clk_register_fixed_rate(dev, core_pll[0], NULL, 0, 2000000000UL);
 	if (IS_ERR(clk))
 		return PTR_ERR(clk);

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Signature · 4 lines

Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

Stephen Boyd

author Applied

2016-03-03 19:26 UTC #18 lore raw

Re: [PATCH 08/41] clk: mvebu: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Gregory CLEMENT <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 18:59 UTC #19 lore raw

PATCH 9/41 clk: mxs: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Shawn Guo <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/mxs/clk.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/clk/mxs/clk.h +1 -1

index a4590956d2a2..5a264a486ad9 100644
@@ -38,7 +38,7 @@ struct clk *mxs_clk_frac(const char *name, const char *parent_name,
 
 static inline struct clk *mxs_clk_fixed(const char *name, int rate)
 {
-	return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
+	return clk_register_fixed_rate(NULL, name, NULL, 0, rate);
 }
 
 static inline struct clk *mxs_clk_gate(const char *name,

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Shawn Guo

Acked-by on v1 9/41

2016-03-02 02:42 UTC #20 lore raw

Re: [PATCH 09/41] clk: mxs: Remove CLK_IS_ROOT

Quoted 4 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Shawn Guo <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>

Acked-by Shawn Guo <[email protected]>

Quoted 22 lines

---
 drivers/clk/mxs/clk.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/clk/mxs/clk.h +1 -1

index a4590956d2a2..5a264a486ad9 100644
@@ -38,7 +38,7 @@ struct clk *mxs_clk_frac(const char *name, const char *parent_name,
 
 static inline struct clk *mxs_clk_fixed(const char *name, int rate)
 {
-	return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
+	return clk_register_fixed_rate(NULL, name, NULL, 0, rate);
 }
 
 static inline struct clk *mxs_clk_gate(const char *name,

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-03-03 01:45 UTC #21 lore raw

Re: [PATCH 09/41] clk: mxs: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Shawn Guo <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 18:59 UTC #22 lore raw

PATCH 10/41 clk: nxp: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Joachim Eastwood <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/nxp/clk-lpc18xx-cgu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/clk/nxp/clk-lpc18xx-cgu.c +1 -1

index c924572fc9bc..2531174b399e 100644
@@ -605,7 +605,7 @@ static void __init lpc18xx_cgu_register_source_clks(struct device_node *np,
 
 	/* Register the internal 12 MHz RC oscillator (IRC) */
 	clk = clk_register_fixed_rate(NULL, clk_src_names[CLK_SRC_IRC],
-				      NULL, CLK_IS_ROOT, 12000000);
+				      NULL, 0, 12000000);
 	if (IS_ERR(clk))
 		pr_warn("%s: failed to register irc clk\n", __func__);

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Joachim Eastwood

Acked-by on v1 10/41

2016-03-01 20:06 UTC #23 lore raw

Re: [PATCH 10/41] clk: nxp: Remove CLK_IS_ROOT

Hi Stephen,

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Joachim Eastwood <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Acked-by Joachim Eastwood <[email protected]>

Stephen Boyd

author Applied

2016-03-03 01:45 UTC #24 lore raw

Re: [PATCH 10/41] clk: nxp: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Joachim Eastwood <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 18:59 UTC #25 lore raw

PATCH 11/41 clk: pxa: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Robert Jarzmik <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/pxa/clk-pxa25x.c | 8 +++-----
 drivers/clk/pxa/clk-pxa27x.c | 6 +++---
 drivers/clk/pxa/clk-pxa3xx.c | 8 ++++----
 3 files changed, 10 insertions(+), 12 deletions(-)

drivers/clk/pxa/clk-pxa25x.c +3 -5

index b7747229db9a..48b8b64fd28f 100644
@@ -200,12 +200,10 @@ static void __init pxa25x_register_core(void)
 static void __init pxa25x_register_plls(void)
 {
 	clk_register_fixed_rate(NULL, "osc_3_6864mhz", NULL,
-				CLK_GET_RATE_NOCACHE | CLK_IS_ROOT,
-				3686400);
+				CLK_GET_RATE_NOCACHE, 3686400);
 	clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,
-				CLK_GET_RATE_NOCACHE | CLK_IS_ROOT,
-				32768);
-	clk_register_fixed_rate(NULL, "clk_dummy", NULL, CLK_IS_ROOT, 0);
+				CLK_GET_RATE_NOCACHE, 32768);
+	clk_register_fixed_rate(NULL, "clk_dummy", NULL, 0, 0);
 	clk_register_fixed_factor(NULL, "ppll_95_85mhz", "osc_3_6864mhz",
 				  0, 26, 1);
 	clk_register_fixed_factor(NULL, "ppll_147_46mhz", "osc_3_6864mhz",

drivers/clk/pxa/clk-pxa27x.c +3 -3

index 5b82d30baf9f..e86cd5fa2eb4 100644
@@ -208,12 +208,12 @@ MUX_RO_RATE_RO_OPS(clk_pxa27x_lcd_base, "lcd_base");
 static void __init pxa27x_register_plls(void)
 {
 	clk_register_fixed_rate(NULL, "osc_13mhz", NULL,
-				CLK_GET_RATE_NOCACHE | CLK_IS_ROOT,
+				CLK_GET_RATE_NOCACHE,
 				13 * MHz);
 	clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,
-				CLK_GET_RATE_NOCACHE | CLK_IS_ROOT,
+				CLK_GET_RATE_NOCACHE,
 				32768 * KHz);
-	clk_register_fixed_rate(NULL, "clk_dummy", NULL, CLK_IS_ROOT, 0);
+	clk_register_fixed_rate(NULL, "clk_dummy", NULL, 0, 0);
 	clk_register_fixed_factor(NULL, "ppll_312mhz", "osc_13mhz", 0, 24, 1);
 }

drivers/clk/pxa/clk-pxa3xx.c +4 -4

index 4af4eed5f89f..9238d5f5a7fd 100644
@@ -284,15 +284,15 @@ static void __init pxa3xx_register_core(void)
 static void __init pxa3xx_register_plls(void)
 {
 	clk_register_fixed_rate(NULL, "osc_13mhz", NULL,
-				CLK_GET_RATE_NOCACHE | CLK_IS_ROOT,
+				CLK_GET_RATE_NOCACHE,
 				13 * MHz);
 	clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,
-				CLK_GET_RATE_NOCACHE | CLK_IS_ROOT,
+				CLK_GET_RATE_NOCACHE,
 				32768);
 	clk_register_fixed_rate(NULL, "ring_osc_120mhz", NULL,
-				CLK_GET_RATE_NOCACHE | CLK_IS_ROOT,
+				CLK_GET_RATE_NOCACHE,
 				120 * MHz);
-	clk_register_fixed_rate(NULL, "clk_dummy", NULL, CLK_IS_ROOT, 0);
+	clk_register_fixed_rate(NULL, "clk_dummy", NULL, 0, 0);
 	clk_register_fixed_factor(NULL, "spll_624mhz", "osc_13mhz", 0, 48, 1);
 	clk_register_fixed_factor(NULL, "ring_osc_60mhz", "ring_osc_120mhz",
 				  0, 1, 2);

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Robert Jarzmik

Acked-by on v1 11/41

2016-03-01 19:27 UTC #26 lore raw

Re: [PATCH 11/41] clk: pxa: Remove CLK_IS_ROOT

Quoted 9 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Robert Jarzmik <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---
 drivers/clk/pxa/clk-pxa25x.c | 8 +++-----
 drivers/clk/pxa/clk-pxa27x.c | 6 +++---
 drivers/clk/pxa/clk-pxa3xx.c | 8 ++++----
 3 files changed, 10 insertions(+), 12 deletions(-)

Acked-by Robert Jarzmik <[email protected]>

Cheers.

--
Robert

Stephen Boyd

author Applied

2016-03-03 01:46 UTC #27 lore raw

Re: [PATCH 11/41] clk: pxa: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Robert Jarzmik <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #28 lore raw

PATCH 12/41 clk: qcom: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/qcom/common.c       |  1 -
 drivers/clk/qcom/gcc-ipq806x.c  | 37 ------------------------------------
 drivers/clk/qcom/gcc-msm8660.c  | 32 -------------------------------
 drivers/clk/qcom/gcc-msm8960.c  | 42 -----------------------------------------
 drivers/clk/qcom/gcc-msm8974.c  |  1 -
 drivers/clk/qcom/gcc-msm8996.c  |  6 ++----
 drivers/clk/qcom/mmcc-msm8960.c | 35 ----------------------------------
 7 files changed, 2 insertions(+), 152 deletions(-)

drivers/clk/qcom/common.c +0 -1

index cc8a06534362..f7c226ab4307 100644
@@ -119,7 +119,6 @@ static int _qcom_cc_register_board_clk(struct device *dev, const char *path,
 		fixed->hw.init = &init_data;
 
 		init_data.name = path;
-		init_data.flags = CLK_IS_ROOT;
 		init_data.ops = &clk_fixed_rate_ops;
 
 		clk = devm_clk_register(dev, &fixed->hw);

drivers/clk/qcom/gcc-ipq806x.c +0 ~~-37~~

index dd5402bac620..52a7d3959875 100644
@@ -890,7 +890,6 @@ static struct clk_branch gsbi1_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi1_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -906,7 +905,6 @@ static struct clk_branch gsbi2_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi2_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -922,7 +920,6 @@ static struct clk_branch gsbi4_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi4_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -938,7 +935,6 @@ static struct clk_branch gsbi5_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi5_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -954,7 +950,6 @@ static struct clk_branch gsbi6_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi6_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -970,7 +965,6 @@ static struct clk_branch gsbi7_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi7_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1144,7 +1138,6 @@ static struct clk_branch pmem_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pmem_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1308,7 +1301,6 @@ static struct clk_branch sdc1_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "sdc1_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1324,7 +1316,6 @@ static struct clk_branch sdc3_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "sdc3_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1394,7 +1385,6 @@ static struct clk_branch tsif_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "tsif_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1410,7 +1400,6 @@ static struct clk_branch dma_bam_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "dma_bam_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1425,7 +1414,6 @@ static struct clk_branch adm0_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "adm0_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1442,7 +1430,6 @@ static struct clk_branch adm0_pbus_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "adm0_pbus_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1457,7 +1444,6 @@ static struct clk_branch pmic_arb0_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pmic_arb0_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1472,7 +1458,6 @@ static struct clk_branch pmic_arb1_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pmic_arb1_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1487,7 +1472,6 @@ static struct clk_branch pmic_ssbi2_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pmic_ssbi2_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1504,7 +1488,6 @@ static struct clk_branch rpm_msg_ram_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "rpm_msg_ram_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1563,7 +1546,6 @@ static struct clk_branch pcie_a_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pcie_a_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1577,7 +1559,6 @@ static struct clk_branch pcie_aux_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pcie_aux_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1591,7 +1572,6 @@ static struct clk_branch pcie_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pcie_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1605,7 +1585,6 @@ static struct clk_branch pcie_phy_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pcie_phy_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1659,7 +1638,6 @@ static struct clk_branch pcie1_a_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pcie1_a_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1673,7 +1651,6 @@ static struct clk_branch pcie1_aux_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pcie1_aux_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1687,7 +1664,6 @@ static struct clk_branch pcie1_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pcie1_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1701,7 +1677,6 @@ static struct clk_branch pcie1_phy_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pcie1_phy_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1755,7 +1730,6 @@ static struct clk_branch pcie2_a_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pcie2_a_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1769,7 +1743,6 @@ static struct clk_branch pcie2_aux_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pcie2_aux_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1783,7 +1756,6 @@ static struct clk_branch pcie2_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pcie2_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1797,7 +1769,6 @@ static struct clk_branch pcie2_phy_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pcie2_phy_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1887,7 +1858,6 @@ static struct clk_branch sata_a_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "sata_a_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1901,7 +1871,6 @@ static struct clk_branch sata_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "sata_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1915,7 +1884,6 @@ static struct clk_branch sfab_sata_s_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "sfab_sata_s_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1929,7 +1897,6 @@ static struct clk_branch sata_phy_cfg_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "sata_phy_cfg_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2139,7 +2106,6 @@ static struct clk_branch usb_hs1_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "usb_hs1_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2218,7 +2184,6 @@ static struct clk_branch usb_fs1_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "usb_fs1_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2234,7 +2199,6 @@ static struct clk_branch ebi2_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "ebi2_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2248,7 +2212,6 @@ static struct clk_branch ebi2_aon_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "ebi2_always_on_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

drivers/clk/qcom/gcc-msm8660.c +0 ~~-32~~

index ad413036f7c7..6dc55864979c 100644
@@ -1479,7 +1479,6 @@ static struct clk_branch pmem_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pmem_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2027,7 +2026,6 @@ static struct clk_branch gsbi1_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi1_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2041,7 +2039,6 @@ static struct clk_branch gsbi2_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi2_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2055,7 +2052,6 @@ static struct clk_branch gsbi3_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi3_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2069,7 +2065,6 @@ static struct clk_branch gsbi4_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi4_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2083,7 +2078,6 @@ static struct clk_branch gsbi5_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi5_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2097,7 +2091,6 @@ static struct clk_branch gsbi6_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi6_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2111,7 +2104,6 @@ static struct clk_branch gsbi7_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi7_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2125,7 +2117,6 @@ static struct clk_branch gsbi8_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi8_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2139,7 +2130,6 @@ static struct clk_branch gsbi9_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi9_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2153,7 +2143,6 @@ static struct clk_branch gsbi10_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi10_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2167,7 +2156,6 @@ static struct clk_branch gsbi11_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi11_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2181,7 +2169,6 @@ static struct clk_branch gsbi12_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gsbi12_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2195,7 +2182,6 @@ static struct clk_branch tsif_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "tsif_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2209,7 +2195,6 @@ static struct clk_branch usb_fs1_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "usb_fs1_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2223,7 +2208,6 @@ static struct clk_branch usb_fs2_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "usb_fs2_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2237,7 +2221,6 @@ static struct clk_branch usb_hs1_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "usb_hs1_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2251,7 +2234,6 @@ static struct clk_branch sdc1_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "sdc1_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2265,7 +2247,6 @@ static struct clk_branch sdc2_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "sdc2_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2279,7 +2260,6 @@ static struct clk_branch sdc3_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "sdc3_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2293,7 +2273,6 @@ static struct clk_branch sdc4_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "sdc4_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2307,7 +2286,6 @@ static struct clk_branch sdc5_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "sdc5_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2322,7 +2300,6 @@ static struct clk_branch adm0_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "adm0_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2337,7 +2314,6 @@ static struct clk_branch adm0_pbus_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "adm0_pbus_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2352,7 +2328,6 @@ static struct clk_branch adm1_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "adm1_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2367,7 +2342,6 @@ static struct clk_branch adm1_pbus_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "adm1_pbus_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2382,7 +2356,6 @@ static struct clk_branch modem_ahb1_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "modem_ahb1_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2397,7 +2370,6 @@ static struct clk_branch modem_ahb2_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "modem_ahb2_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2412,7 +2384,6 @@ static struct clk_branch pmic_arb0_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pmic_arb0_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2427,7 +2398,6 @@ static struct clk_branch pmic_arb1_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pmic_arb1_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2442,7 +2412,6 @@ static struct clk_branch pmic_ssbi2_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "pmic_ssbi2_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2459,7 +2428,6 @@ static struct clk_branch rpm_msg_ram_h_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "rpm_msg_ram_h_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

drivers/clk/qcom/gcc-msm8960.c +0 ~~-42~~

294 lines not on this page · raw message

drivers/clk/qcom/gcc-msm8974.c +0 -1

index 335952db309b..00915209e7c5 100644
@@ -1965,7 +1965,6 @@ static struct clk_branch gcc_mss_q6_bimc_axi_clk = {
 		.enable_mask = BIT(0),
 		.hw.init = &(struct clk_init_data){
 			.name = "gcc_mss_q6_bimc_axi_clk",
-			.flags = CLK_IS_ROOT,
 			.ops = &clk_branch2_ops,
 		},
 	},

drivers/clk/qcom/gcc-msm8996.c +2 -4

index bb8c61ff0176..c9b96f318d9c 100644
@@ -1321,7 +1321,7 @@ static struct clk_branch gcc_mmss_bimc_gfx_clk = {
 		.enable_mask = BIT(0),
 		.hw.init = &(struct clk_init_data){
 			.name = "gcc_mmss_bimc_gfx_clk",
-			.flags = CLK_SET_RATE_PARENT | CLK_IS_ROOT,
+			.flags = CLK_SET_RATE_PARENT,
 			.ops = &clk_branch2_ops,
 		},
 	},

@@ -2315,7 +2315,7 @@ static struct clk_branch gcc_bimc_gfx_clk = {
 		.enable_mask = BIT(0),
 		.hw.init = &(struct clk_init_data){
 			.name = "gcc_bimc_gfx_clk",
-			.flags = CLK_SET_RATE_PARENT | CLK_IS_ROOT,
+			.flags = CLK_SET_RATE_PARENT,
 			.ops = &clk_branch2_ops,
 		},
 	},

@@ -2815,7 +2815,6 @@ static struct clk_branch gcc_ufs_sys_clk_core_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gcc_ufs_sys_clk_core_clk",
 			.ops = &clk_branch2_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2828,7 +2827,6 @@ static struct clk_branch gcc_ufs_tx_symbol_clk_core_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gcc_ufs_tx_symbol_clk_core_clk",
 			.ops = &clk_branch2_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

drivers/clk/qcom/mmcc-msm8960.c +0 ~~-35~~

index 00e36192a1de..7f21421c87d6 100644
@@ -1789,7 +1789,6 @@ static struct clk_branch gmem_axi_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gmem_axi_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1805,7 +1804,6 @@ static struct clk_branch ijpeg_axi_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "ijpeg_axi_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1821,7 +1819,6 @@ static struct clk_branch mmss_imem_axi_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "mmss_imem_axi_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1835,7 +1832,6 @@ static struct clk_branch jpegd_axi_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "jpegd_axi_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1851,7 +1847,6 @@ static struct clk_branch vcodec_axi_b_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "vcodec_axi_b_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1867,7 +1862,6 @@ static struct clk_branch vcodec_axi_a_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "vcodec_axi_a_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1883,7 +1877,6 @@ static struct clk_branch vcodec_axi_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "vcodec_axi_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1897,7 +1890,6 @@ static struct clk_branch vfe_axi_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "vfe_axi_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1913,7 +1905,6 @@ static struct clk_branch mdp_axi_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "mdp_axi_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1929,7 +1920,6 @@ static struct clk_branch rot_axi_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "rot_axi_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1945,7 +1935,6 @@ static struct clk_branch vcap_axi_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "vcap_axi_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1961,7 +1950,6 @@ static struct clk_branch vpe_axi_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "vpe_axi_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1977,7 +1965,6 @@ static struct clk_branch gfx3d_axi_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gfx3d_axi_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -1991,7 +1978,6 @@ static struct clk_branch amp_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "amp_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2005,7 +1991,6 @@ static struct clk_branch csi_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "csi_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT
 		},
 	},
 };

@@ -2019,7 +2004,6 @@ static struct clk_branch dsi_m_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "dsi_m_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2035,7 +2019,6 @@ static struct clk_branch dsi_s_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "dsi_s_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2049,7 +2032,6 @@ static struct clk_branch dsi2_m_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "dsi2_m_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT
 		},
 	},
 };

@@ -2065,7 +2047,6 @@ static struct clk_branch dsi2_s_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "dsi2_s_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2425,7 +2406,6 @@ static struct clk_branch gfx2d0_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gfx2d0_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2441,7 +2421,6 @@ static struct clk_branch gfx2d1_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gfx2d1_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2457,7 +2436,6 @@ static struct clk_branch gfx3d_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gfx3d_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2473,7 +2451,6 @@ static struct clk_branch hdmi_m_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "hdmi_m_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2489,7 +2466,6 @@ static struct clk_branch hdmi_s_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "hdmi_s_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2503,7 +2479,6 @@ static struct clk_branch ijpeg_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "ijpeg_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT
 		},
 	},
 };

@@ -2519,7 +2494,6 @@ static struct clk_branch mmss_imem_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "mmss_imem_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT
 		},
 	},
 };

@@ -2533,7 +2507,6 @@ static struct clk_branch jpegd_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "jpegd_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2547,7 +2520,6 @@ static struct clk_branch mdp_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "mdp_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2561,7 +2533,6 @@ static struct clk_branch rot_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "rot_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT
 		},
 	},
 };

@@ -2577,7 +2548,6 @@ static struct clk_branch smmu_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "smmu_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2591,7 +2561,6 @@ static struct clk_branch tv_enc_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "tv_enc_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2605,7 +2574,6 @@ static struct clk_branch vcap_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "vcap_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2621,7 +2589,6 @@ static struct clk_branch vcodec_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "vcodec_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2635,7 +2602,6 @@ static struct clk_branch vfe_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "vfe_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

@@ -2649,7 +2615,6 @@ static struct clk_branch vpe_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "vpe_ahb_clk",
 			.ops = &clk_branch_ops,
-			.flags = CLK_IS_ROOT,
 		},
 	},
 };

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-03-04 20:53 UTC #29 lore raw

Re: [PATCH 12/41] clk: qcom: Remove CLK_IS_ROOT

Quoted 4 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 18:59 UTC #30 lore raw

PATCH 13/41 clk: samsung: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Sylwester Nawrocki <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/samsung/clk-exynos4.c    | 12 +++---
 drivers/clk/samsung/clk-exynos4415.c |  2 +-
 drivers/clk/samsung/clk-exynos5250.c | 10 ++---
 drivers/clk/samsung/clk-exynos5260.c | 36 ++++++++----------
 drivers/clk/samsung/clk-exynos5420.c | 12 +++---
 drivers/clk/samsung/clk-exynos5433.c | 74 +++++++++++++++++-------------------
 drivers/clk/samsung/clk-exynos5440.c | 12 +++---
 drivers/clk/samsung/clk-exynos7.c    | 12 +++---
 drivers/clk/samsung/clk-s3c2410.c    |  2 +-
 drivers/clk/samsung/clk-s3c2412.c    |  4 +-
 drivers/clk/samsung/clk-s3c2443.c    |  8 ++--
 drivers/clk/samsung/clk-s3c64xx.c    |  8 ++--
 drivers/clk/samsung/clk-s5pv210.c    | 10 ++---
 13 files changed, 95 insertions(+), 107 deletions(-)

drivers/clk/samsung/clk-exynos4.c +6 -6

index ac03e4fe2871..7b3d0f975987 100644
@@ -500,19 +500,19 @@ PNAME(clkout_cpu_p4x12) = { "fout_apll_div_2", "none", "none", "none",
 
 /* fixed rate clocks generated outside the soc */
 static struct samsung_fixed_rate_clock exynos4_fixed_rate_ext_clks[] __initdata = {
-	FRATE(CLK_XXTI, "xxti", NULL, CLK_IS_ROOT, 0),
-	FRATE(CLK_XUSBXTI, "xusbxti", NULL, CLK_IS_ROOT, 0),
+	FRATE(CLK_XXTI, "xxti", NULL, 0, 0),
+	FRATE(CLK_XUSBXTI, "xusbxti", NULL, 0, 0),
 };
 
 /* fixed rate clocks generated inside the soc */
 static struct samsung_fixed_rate_clock exynos4_fixed_rate_clks[] __initdata = {
-	FRATE(0, "sclk_hdmi24m", NULL, CLK_IS_ROOT, 24000000),
+	FRATE(0, "sclk_hdmi24m", NULL, 0, 24000000),
 	FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", "hdmi", 0, 27000000),
-	FRATE(0, "sclk_usbphy0", NULL, CLK_IS_ROOT, 48000000),
+	FRATE(0, "sclk_usbphy0", NULL, 0, 48000000),
 };
 
 static struct samsung_fixed_rate_clock exynos4210_fixed_rate_clks[] __initdata = {
-	FRATE(0, "sclk_usbphy1", NULL, CLK_IS_ROOT, 48000000),
+	FRATE(0, "sclk_usbphy1", NULL, 0, 48000000),
 };
 
 static struct samsung_fixed_factor_clock exynos4_fixed_factor_clks[] __initdata = {

@@ -1251,7 +1251,7 @@ static void __init exynos4_clk_register_finpll(struct samsung_clk_provider *ctx)
 	fclk.id = CLK_FIN_PLL;
 	fclk.name = "fin_pll";
 	fclk.parent_name = NULL;
-	fclk.flags = CLK_IS_ROOT;
+	fclk.flags = 0;
 	fclk.fixed_rate = finpll_f;
 	samsung_clk_register_fixed_rate(ctx, &fclk, 1);

drivers/clk/samsung/clk-exynos4415.c +1 -1

index 92c39f6efec8..86ee06b226bd 100644
@@ -274,7 +274,7 @@ static struct samsung_fixed_factor_clock exynos4415_fixed_factor_clks[] __initda
 };
 
 static struct samsung_fixed_rate_clock exynos4415_fixed_rate_clks[] __initdata = {
-	FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 27000000),
+	FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", NULL, 0, 27000000),
 };
 
 static struct samsung_mux_clock exynos4415_mux_clks[] __initdata = {

drivers/clk/samsung/clk-exynos5250.c +5 -5

index 5bebf8cb0d70..837197db4ffb 100644
@@ -262,15 +262,15 @@ PNAME(mout_spdif_p)	= { "sclk_audio0", "sclk_audio1", "sclk_audio2",
 
 /* fixed rate clocks generated outside the soc */
 static struct samsung_fixed_rate_clock exynos5250_fixed_rate_ext_clks[] __initdata = {
-	FRATE(CLK_FIN_PLL, "fin_pll", NULL, CLK_IS_ROOT, 0),
+	FRATE(CLK_FIN_PLL, "fin_pll", NULL, 0, 0),
 };
 
 /* fixed rate clocks generated inside the soc */
 static struct samsung_fixed_rate_clock exynos5250_fixed_rate_clks[] __initdata = {
-	FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000),
-	FRATE(0, "sclk_hdmi27m", NULL, CLK_IS_ROOT, 27000000),
-	FRATE(0, "sclk_dptxphy", NULL, CLK_IS_ROOT, 24000000),
-	FRATE(0, "sclk_uhostphy", NULL, CLK_IS_ROOT, 48000000),
+	FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", NULL, 0, 24000000),
+	FRATE(0, "sclk_hdmi27m", NULL, 0, 27000000),
+	FRATE(0, "sclk_dptxphy", NULL, 0, 24000000),
+	FRATE(0, "sclk_uhostphy", NULL, 0, 48000000),
 };
 
 static struct samsung_fixed_factor_clock exynos5250_fixed_factor_clks[] __initdata = {

drivers/clk/samsung/clk-exynos5260.c +16 ~~-20~~

index d1a29f6c1084..7a7ed075a573 100644
@@ -1432,42 +1432,38 @@ static unsigned long top_clk_regs[] __initdata = {
 /* fixed rate clocks generated inside the soc */
 static struct samsung_fixed_rate_clock fixed_rate_clks[] __initdata = {
 	FRATE(PHYCLK_DPTX_PHY_CH3_TXD_CLK, "phyclk_dptx_phy_ch3_txd_clk", NULL,
-			CLK_IS_ROOT, 270000000),
+			0, 270000000),
 	FRATE(PHYCLK_DPTX_PHY_CH2_TXD_CLK, "phyclk_dptx_phy_ch2_txd_clk", NULL,
-			CLK_IS_ROOT, 270000000),
+			0, 270000000),
 	FRATE(PHYCLK_DPTX_PHY_CH1_TXD_CLK, "phyclk_dptx_phy_ch1_txd_clk", NULL,
-			CLK_IS_ROOT, 270000000),
+			0, 270000000),
 	FRATE(PHYCLK_DPTX_PHY_CH0_TXD_CLK, "phyclk_dptx_phy_ch0_txd_clk", NULL,
-			CLK_IS_ROOT, 270000000),
+			0, 270000000),
 	FRATE(phyclk_hdmi_phy_tmds_clko, "phyclk_hdmi_phy_tmds_clko", NULL,
-			CLK_IS_ROOT, 250000000),
+			0, 250000000),
 	FRATE(PHYCLK_HDMI_PHY_PIXEL_CLKO, "phyclk_hdmi_phy_pixel_clko", NULL,
-			CLK_IS_ROOT, 1660000000),
+			0, 1660000000),
 	FRATE(PHYCLK_HDMI_LINK_O_TMDS_CLKHI, "phyclk_hdmi_link_o_tmds_clkhi",
-			NULL, CLK_IS_ROOT, 125000000),
+			NULL, 0, 125000000),
 	FRATE(PHYCLK_MIPI_DPHY_4L_M_TXBYTECLKHS,
 			"phyclk_mipi_dphy_4l_m_txbyte_clkhs" , NULL,
-			CLK_IS_ROOT, 187500000),
+			0, 187500000),
 	FRATE(PHYCLK_DPTX_PHY_O_REF_CLK_24M, "phyclk_dptx_phy_o_ref_clk_24m",
-			NULL, CLK_IS_ROOT, 24000000),
+			NULL, 0, 24000000),
 	FRATE(PHYCLK_DPTX_PHY_CLK_DIV2, "phyclk_dptx_phy_clk_div2", NULL,
-			CLK_IS_ROOT, 135000000),
+			0, 135000000),
 	FRATE(PHYCLK_MIPI_DPHY_4L_M_RXCLKESC0,
-			"phyclk_mipi_dphy_4l_m_rxclkesc0", NULL,
-			CLK_IS_ROOT, 20000000),
+			"phyclk_mipi_dphy_4l_m_rxclkesc0", NULL, 0, 20000000),
 	FRATE(PHYCLK_USBHOST20_PHY_PHYCLOCK, "phyclk_usbhost20_phy_phyclock",
-			NULL, CLK_IS_ROOT, 60000000),
+			NULL, 0, 60000000),
 	FRATE(PHYCLK_USBHOST20_PHY_FREECLK, "phyclk_usbhost20_phy_freeclk",
-			NULL, CLK_IS_ROOT, 60000000),
+			NULL, 0, 60000000),
 	FRATE(PHYCLK_USBHOST20_PHY_CLK48MOHCI,
-			"phyclk_usbhost20_phy_clk48mohci",
-			NULL, CLK_IS_ROOT, 48000000),
+			"phyclk_usbhost20_phy_clk48mohci", NULL, 0, 48000000),
 	FRATE(PHYCLK_USBDRD30_UDRD30_PIPE_PCLK,
-			"phyclk_usbdrd30_udrd30_pipe_pclk", NULL,
-			CLK_IS_ROOT, 125000000),
+			"phyclk_usbdrd30_udrd30_pipe_pclk", NULL, 0, 125000000),
 	FRATE(PHYCLK_USBDRD30_UDRD30_PHYCLOCK,
-			"phyclk_usbdrd30_udrd30_phyclock", NULL,
-			CLK_IS_ROOT, 60000000),
+			"phyclk_usbdrd30_udrd30_phyclock", NULL, 0, 60000000),
 };
 
 PNAME(mout_memtop_pll_user_p) = {"fin_pll", "dout_mem_pll"};

drivers/clk/samsung/clk-exynos5420.c +6 -6

index d048dedd8b72..be03ed0fcb6b 100644
@@ -480,16 +480,16 @@ PNAME(mout_group15_5800_p)	= { "dout_osc_div", "mout_sw_aclk550_cam" };
 /* fixed rate clocks generated outside the soc */
 static struct samsung_fixed_rate_clock
 		exynos5x_fixed_rate_ext_clks[] __initdata = {
-	FRATE(CLK_FIN_PLL, "fin_pll", NULL, CLK_IS_ROOT, 0),
+	FRATE(CLK_FIN_PLL, "fin_pll", NULL, 0, 0),
 };
 
 /* fixed rate clocks generated inside the soc */
 static struct samsung_fixed_rate_clock exynos5x_fixed_rate_clks[] __initdata = {
-	FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000),
-	FRATE(0, "sclk_pwi", NULL, CLK_IS_ROOT, 24000000),
-	FRATE(0, "sclk_usbh20", NULL, CLK_IS_ROOT, 48000000),
-	FRATE(0, "mphy_refclk_ixtal24", NULL, CLK_IS_ROOT, 48000000),
-	FRATE(0, "sclk_usbh20_scan_clk", NULL, CLK_IS_ROOT, 480000000),
+	FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", NULL, 0, 24000000),
+	FRATE(0, "sclk_pwi", NULL, 0, 24000000),
+	FRATE(0, "sclk_usbh20", NULL, 0, 48000000),
+	FRATE(0, "mphy_refclk_ixtal24", NULL, 0, 48000000),
+	FRATE(0, "sclk_usbh20_scan_clk", NULL, 0, 480000000),
 };
 
 static struct samsung_fixed_factor_clock

drivers/clk/samsung/clk-exynos5433.c +34 ~~-40~~

139 lines not on this page · raw message

drivers/clk/samsung/clk-exynos5440.c +6 -6

index 590813871ffe..c57cff1e1798 100644
@@ -31,16 +31,16 @@ PNAME(mout_spi_p)	= { "div125", "div200" };
 
 /* fixed rate clocks generated outside the soc */
 static struct samsung_fixed_rate_clock exynos5440_fixed_rate_ext_clks[] __initdata = {
-	FRATE(0, "xtal", NULL, CLK_IS_ROOT, 0),
+	FRATE(0, "xtal", NULL, 0, 0),
 };
 
 /* fixed rate clocks */
 static struct samsung_fixed_rate_clock exynos5440_fixed_rate_clks[] __initdata = {
-	FRATE(0, "ppll", NULL, CLK_IS_ROOT, 1000000000),
-	FRATE(0, "usb_phy0", NULL, CLK_IS_ROOT, 60000000),
-	FRATE(0, "usb_phy1", NULL, CLK_IS_ROOT, 60000000),
-	FRATE(0, "usb_ohci12", NULL, CLK_IS_ROOT, 12000000),
-	FRATE(0, "usb_ohci48", NULL, CLK_IS_ROOT, 48000000),
+	FRATE(0, "ppll", NULL, 0, 1000000000),
+	FRATE(0, "usb_phy0", NULL, 0, 60000000),
+	FRATE(0, "usb_phy1", NULL, 0, 60000000),
+	FRATE(0, "usb_ohci12", NULL, 0, 12000000),
+	FRATE(0, "usb_ohci48", NULL, 0, 48000000),
 };
 
 /* fixed factor clocks */

drivers/clk/samsung/clk-exynos7.c +5 -7

index 55f8e2e24ab8..ad68d463b12c 100644
@@ -894,10 +894,8 @@ PNAME(mout_phyclk_usbdrd300_udrd30_pipe_pclk_user_p)	= { "fin_pll",
 
 /* fixed rate clocks used in the FSYS0 block */
 static struct samsung_fixed_rate_clock fixed_rate_clks_fsys0[] __initdata = {
-	FRATE(0, "phyclk_usbdrd300_udrd30_phyclock", NULL,
-		CLK_IS_ROOT, 60000000),
-	FRATE(0, "phyclk_usbdrd300_udrd30_pipe_pclk", NULL,
-		CLK_IS_ROOT, 125000000),
+	FRATE(0, "phyclk_usbdrd300_udrd30_phyclock", NULL, 0, 60000000),
+	FRATE(0, "phyclk_usbdrd300_udrd30_pipe_pclk", NULL, 0, 125000000),
 };
 
 static unsigned long fsys0_clk_regs[] __initdata = {

@@ -1009,11 +1007,11 @@ PNAME(mout_phyclk_ufs20_rx1_user_p) = { "fin_pll", "phyclk_ufs20_rx1_symbol" };
 /* fixed rate clocks used in the FSYS1 block */
 static struct samsung_fixed_rate_clock fixed_rate_clks_fsys1[] __initdata = {
 	FRATE(PHYCLK_UFS20_TX0_SYMBOL, "phyclk_ufs20_tx0_symbol", NULL,
-			CLK_IS_ROOT, 300000000),
+			0, 300000000),
 	FRATE(PHYCLK_UFS20_RX0_SYMBOL, "phyclk_ufs20_rx0_symbol", NULL,
-			CLK_IS_ROOT, 300000000),
+			0, 300000000),
 	FRATE(PHYCLK_UFS20_RX1_SYMBOL, "phyclk_ufs20_rx1_symbol", NULL,
-			CLK_IS_ROOT, 300000000),
+			0, 300000000),
 };
 
 static unsigned long fsys1_clk_regs[] __initdata = {

drivers/clk/samsung/clk-s3c2410.c +1 -1

index 0945a8852299..d7b011c1fcf8 100644
@@ -344,7 +344,7 @@ struct samsung_mux_clock s3c2442_muxes[] __initdata = {
  */
 #define XTI	1
 struct samsung_fixed_rate_clock s3c2410_common_frate_clks[] __initdata = {
-	FRATE(XTI, "xti", NULL, CLK_IS_ROOT, 0),
+	FRATE(XTI, "xti", NULL, 0, 0),
 };
 
 static void __init s3c2410_common_clk_register_fixed_ext(

drivers/clk/samsung/clk-s3c2412.c +2 -2

index 44d6a9f4f5b2..effe3736ec6b 100644
@@ -232,8 +232,8 @@ static struct notifier_block s3c2412_restart_handler = {
  */
 #define XTI	1
 struct samsung_fixed_rate_clock s3c2412_common_frate_clks[] __initdata = {
-	FRATE(XTI, "xti", NULL, CLK_IS_ROOT, 0),
-	FRATE(0, "ext", NULL, CLK_IS_ROOT, 0),
+	FRATE(XTI, "xti", NULL, 0, 0),
+	FRATE(0, "ext", NULL, 0, 0),
 };
 
 static void __init s3c2412_common_clk_register_fixed_ext(

drivers/clk/samsung/clk-s3c2443.c +4 -4

index 2c0a1ea3c80c..37562783b25e 100644
@@ -371,10 +371,10 @@ static struct notifier_block s3c2443_restart_handler = {
  * Only necessary until the devicetree-move is complete
  */
 struct samsung_fixed_rate_clock s3c2443_common_frate_clks[] __initdata = {
-	FRATE(0, "xti", NULL, CLK_IS_ROOT, 0),
-	FRATE(0, "ext", NULL, CLK_IS_ROOT, 0),
-	FRATE(0, "ext_i2s", NULL, CLK_IS_ROOT, 0),
-	FRATE(0, "ext_uart", NULL, CLK_IS_ROOT, 0),
+	FRATE(0, "xti", NULL, 0, 0),
+	FRATE(0, "ext", NULL, 0, 0),
+	FRATE(0, "ext_i2s", NULL, 0, 0),
+	FRATE(0, "ext_uart", NULL, 0, 0),
 };
 
 static void __init s3c2443_common_clk_register_fixed_ext(

drivers/clk/samsung/clk-s3c64xx.c +4 -4

index d325ed1e196b..60aa775bd374 100644
@@ -176,14 +176,14 @@ PNAME(audio2_p6410)	= { "mout_epll", "dout_mpll", "fin_pll", "iiscdclk2",
 
 /* Fixed rate clocks generated outside the SoC. */
 FIXED_RATE_CLOCKS(s3c64xx_fixed_rate_ext_clks) __initdata = {
-	FRATE(0, "fin_pll", NULL, CLK_IS_ROOT, 0),
-	FRATE(0, "xusbxti", NULL, CLK_IS_ROOT, 0),
+	FRATE(0, "fin_pll", NULL, 0, 0),
+	FRATE(0, "xusbxti", NULL, 0, 0),
 };
 
 /* Fixed rate clocks generated inside the SoC. */
 FIXED_RATE_CLOCKS(s3c64xx_fixed_rate_clks) __initdata = {
-	FRATE(CLK27M, "clk27m", NULL, CLK_IS_ROOT, 27000000),
-	FRATE(CLK48M, "clk48m", NULL, CLK_IS_ROOT, 48000000),
+	FRATE(CLK27M, "clk27m", NULL, 0, 27000000),
+	FRATE(CLK48M, "clk48m", NULL, 0, 48000000),
 };
 
 /* List of clock muxes present on all S3C64xx SoCs. */

drivers/clk/samsung/clk-s5pv210.c +5 -5

index 759aaf342bea..52302262045d 100644
@@ -503,15 +503,15 @@ static const struct samsung_mux_clock s5p6442_mux_clks[] __initconst = {
 
 /* S5PV210-specific fixed rate clocks generated inside the SoC. */
 static const struct samsung_fixed_rate_clock s5pv210_frate_clks[] __initconst = {
-	FRATE(SCLK_HDMI27M, "sclk_hdmi27m", NULL, CLK_IS_ROOT, 27000000),
-	FRATE(SCLK_HDMIPHY, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 27000000),
-	FRATE(SCLK_USBPHY0, "sclk_usbphy0", NULL, CLK_IS_ROOT, 48000000),
-	FRATE(SCLK_USBPHY1, "sclk_usbphy1", NULL, CLK_IS_ROOT, 48000000),
+	FRATE(SCLK_HDMI27M, "sclk_hdmi27m", NULL, 0, 27000000),
+	FRATE(SCLK_HDMIPHY, "sclk_hdmiphy", NULL, 0, 27000000),
+	FRATE(SCLK_USBPHY0, "sclk_usbphy0", NULL, 0, 48000000),
+	FRATE(SCLK_USBPHY1, "sclk_usbphy1", NULL, 0, 48000000),
 };
 
 /* S5P6442-specific fixed rate clocks generated inside the SoC. */
 static const struct samsung_fixed_rate_clock s5p6442_frate_clks[] __initconst = {
-	FRATE(SCLK_USBPHY0, "sclk_usbphy0", NULL, CLK_IS_ROOT, 30000000),
+	FRATE(SCLK_USBPHY0, "sclk_usbphy0", NULL, 0, 30000000),
 };
 
 /* Common clock dividers. */

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Sylwester Nawrocki

maintainer Acked-by on v1 13/41

2016-03-02 10:26 UTC #31 lore raw

Re: [PATCH 13/41] clk: samsung: Remove CLK_IS_ROOT

Quoted 4 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Sylwester Nawrocki <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>

Quoted 15 lines

---
 drivers/clk/samsung/clk-exynos4.c    | 12 +++---
 drivers/clk/samsung/clk-exynos4415.c |  2 +-
 drivers/clk/samsung/clk-exynos5250.c | 10 ++---
 drivers/clk/samsung/clk-exynos5260.c | 36 ++++++++----------
 drivers/clk/samsung/clk-exynos5420.c | 12 +++---
 drivers/clk/samsung/clk-exynos5433.c | 74 +++++++++++++++++-------------------
 drivers/clk/samsung/clk-exynos5440.c | 12 +++---
 drivers/clk/samsung/clk-exynos7.c    | 12 +++---
 drivers/clk/samsung/clk-s3c2410.c    |  2 +-
 drivers/clk/samsung/clk-s3c2412.c    |  4 +-
 drivers/clk/samsung/clk-s3c2443.c    |  8 ++--
 drivers/clk/samsung/clk-s3c64xx.c    |  8 ++--
 drivers/clk/samsung/clk-s5pv210.c    | 10 ++---
 13 files changed, 95 insertions(+), 107 deletions(-)

Acked-by Sylwester Nawrocki <[email protected]>

Stephen Boyd

author

2016-03-01 18:59 UTC #32 lore raw

PATCH 14/41 clk: sirf: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Guo Zeng <[email protected]>

Cc Barry Song <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/sirf/clk-atlas6.c | 7 +++----
 drivers/clk/sirf/clk-prima2.c | 7 +++----
 2 files changed, 6 insertions(+), 8 deletions(-)

drivers/clk/sirf/clk-atlas6.c +3 -4

index c5eaa9d16247..665fa681b2e1 100644
@@ -130,10 +130,9 @@ static void __init atlas6_clk_init(struct device_node *np)
 		panic("unable to map clkc registers\n");
 
 	/* These are always available (RTC and 26MHz OSC)*/
-	atlas6_clks[rtc] = clk_register_fixed_rate(NULL, "rtc", NULL,
-		CLK_IS_ROOT, 32768);
-	atlas6_clks[osc] = clk_register_fixed_rate(NULL, "osc", NULL,
-		CLK_IS_ROOT, 26000000);
+	atlas6_clks[rtc] = clk_register_fixed_rate(NULL, "rtc", NULL, 0, 32768);
+	atlas6_clks[osc] = clk_register_fixed_rate(NULL, "osc", NULL, 0,
+						   26000000);
 
 	for (i = pll1; i < maxclk; i++) {
 		atlas6_clks[i] = clk_register(NULL, atlas6_clk_hw_array[i]);

drivers/clk/sirf/clk-prima2.c +3 -4

index f92c40264342..aac1c8ec151a 100644
@@ -129,10 +129,9 @@ static void __init prima2_clk_init(struct device_node *np)
 		panic("unable to map clkc registers\n");
 
 	/* These are always available (RTC and 26MHz OSC)*/
-	prima2_clks[rtc] = clk_register_fixed_rate(NULL, "rtc", NULL,
-		CLK_IS_ROOT, 32768);
-	prima2_clks[osc] = clk_register_fixed_rate(NULL, "osc", NULL,
-		CLK_IS_ROOT, 26000000);
+	prima2_clks[rtc] = clk_register_fixed_rate(NULL, "rtc", NULL, 0, 32768);
+	prima2_clks[osc] = clk_register_fixed_rate(NULL, "osc", NULL, 0,
+						   26000000);
 
 	for (i = pll1; i < maxclk; i++) {
 		prima2_clks[i] = clk_register(NULL, prima2_clk_hw_array[i]);

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-04-15 23:54 UTC #33 lore raw

Re: [PATCH 14/41] clk: sirf: Remove CLK_IS_ROOT

Quoted 6 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Guo Zeng <[email protected]>
Cc Barry Song <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #34 lore raw

PATCH 15/41 clk: spear: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Viresh Kumar <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/spear/spear1310_clock.c | 21 ++++++++-------------
 drivers/clk/spear/spear1340_clock.c | 16 ++++++----------
 drivers/clk/spear/spear3xx_clock.c  |  8 +++-----
 drivers/clk/spear/spear6xx_clock.c  |  6 ++----
 4 files changed, 19 insertions(+), 32 deletions(-)

drivers/clk/spear/spear1310_clock.c +8 ~~-13~~

index 009bd1410cfa..2f86e3f94efa 100644
@@ -386,24 +386,20 @@ void __init spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base)
 {
 	struct clk *clk, *clk1;
 
-	clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
-			32000);
+	clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);
 	clk_register_clkdev(clk, "osc_32k_clk", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, CLK_IS_ROOT,
-			24000000);
+	clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, 0, 24000000);
 	clk_register_clkdev(clk, "osc_24m_clk", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, CLK_IS_ROOT,
-			25000000);
+	clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, 0, 25000000);
 	clk_register_clkdev(clk, "osc_25m_clk", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, CLK_IS_ROOT,
-			125000000);
+	clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, 0, 125000000);
 	clk_register_clkdev(clk, "gmii_pad_clk", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL,
-			CLK_IS_ROOT, 12288000);
+	clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, 0,
+				      12288000);
 	clk_register_clkdev(clk, "i2s_src_pad_clk", NULL);
 
 	/* clock derived from 32 KHz osc clk */

@@ -897,11 +893,10 @@ void __init spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base)
 			&_lock);
 	clk_register_clkdev(clk, "ras_apb_clk", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "ras_plclk0_clk", NULL, CLK_IS_ROOT,
+	clk = clk_register_fixed_rate(NULL, "ras_plclk0_clk", NULL, 0,
 			50000000);
 
-	clk = clk_register_fixed_rate(NULL, "ras_tx50_clk", NULL, CLK_IS_ROOT,
-			50000000);
+	clk = clk_register_fixed_rate(NULL, "ras_tx50_clk", NULL, 0, 50000000);
 
 	clk = clk_register_gate(NULL, "can0_clk", "apb_clk", 0,
 			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_CAN0_CLK_ENB, 0,

drivers/clk/spear/spear1340_clock.c +6 ~~-10~~

index 9c7abfd951ba..cbb19a90f2d6 100644
@@ -443,24 +443,20 @@ void __init spear1340_clk_init(void __iomem *misc_base)
 {
 	struct clk *clk, *clk1;
 
-	clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
-			32000);
+	clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);
 	clk_register_clkdev(clk, "osc_32k_clk", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, CLK_IS_ROOT,
-			24000000);
+	clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, 0, 24000000);
 	clk_register_clkdev(clk, "osc_24m_clk", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, CLK_IS_ROOT,
-			25000000);
+	clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, 0, 25000000);
 	clk_register_clkdev(clk, "osc_25m_clk", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, CLK_IS_ROOT,
-			125000000);
+	clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, 0, 125000000);
 	clk_register_clkdev(clk, "gmii_pad_clk", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL,
-			CLK_IS_ROOT, 12288000);
+	clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, 0,
+				      12288000);
 	clk_register_clkdev(clk, "i2s_src_pad_clk", NULL);
 
 	/* clock derived from 32 KHz osc clk */

drivers/clk/spear/spear3xx_clock.c +3 -5

index 404a55edd613..c403c66b6583 100644
@@ -251,7 +251,7 @@ static void __init spear320_clk_init(void __iomem *soc_config_base,
 	struct clk *clk;
 
 	clk = clk_register_fixed_rate(NULL, "smii_125m_pad_clk", NULL,
-			CLK_IS_ROOT, 125000000);
+			0, 125000000);
 	clk_register_clkdev(clk, "smii_125m_pad", NULL);
 
 	clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_clk", 0,

@@ -391,12 +391,10 @@ void __init spear3xx_clk_init(void __iomem *misc_base, void __iomem *soc_config_
 {
 	struct clk *clk, *clk1, *ras_apb_clk;
 
-	clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
-			32000);
+	clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);
 	clk_register_clkdev(clk, "osc_32k_clk", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, CLK_IS_ROOT,
-			24000000);
+	clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, 0, 24000000);
 	clk_register_clkdev(clk, "osc_24m_clk", NULL);
 
 	/* clock derived from 32 KHz osc clk */

drivers/clk/spear/spear6xx_clock.c +2 -4

index e24f85cd4300..7c9383c3c2c6 100644
@@ -117,12 +117,10 @@ void __init spear6xx_clk_init(void __iomem *misc_base)
 {
 	struct clk *clk, *clk1;
 
-	clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
-			32000);
+	clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);
 	clk_register_clkdev(clk, "osc_32k_clk", NULL);
 
-	clk = clk_register_fixed_rate(NULL, "osc_30m_clk", NULL, CLK_IS_ROOT,
-			30000000);
+	clk = clk_register_fixed_rate(NULL, "osc_30m_clk", NULL, 0, 30000000);
 	clk_register_clkdev(clk, "osc_30m_clk", NULL);
 
 	/* clock derived from 32 KHz osc clk */

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Viresh Kumar

Acked-by on v1 15/41

2016-03-02 02:54 UTC #35 lore raw

Re: [PATCH 15/41] clk: spear: Remove CLK_IS_ROOT

Quoted 10 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Viresh Kumar <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---
 drivers/clk/spear/spear1310_clock.c | 21 ++++++++-------------
 drivers/clk/spear/spear1340_clock.c | 16 ++++++----------
 drivers/clk/spear/spear3xx_clock.c  |  8 +++-----
 drivers/clk/spear/spear6xx_clock.c  |  6 ++----
 4 files changed, 19 insertions(+), 32 deletions(-)

Acked-by Viresh Kumar <[email protected]>

Signature · 1 line

viresh

Stephen Boyd

author Applied

2016-03-03 01:47 UTC #36 lore raw

Re: [PATCH 15/41] clk: spear: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Viresh Kumar <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #37 lore raw

PATCH 16/41 clk: sunxi: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Maxime Ripard <[email protected]>

Cc Chen-Yu Tsai <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/sunxi/clk-a10-hosc.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

drivers/clk/sunxi/clk-a10-hosc.c +1 -2

index 0481d5d673d6..3bb4f6295474 100644
@@ -54,8 +54,7 @@ static void __init sun4i_osc_clk_setup(struct device_node *node)
 			NULL, 0,
 			NULL, NULL,
 			&fixed->hw, &clk_fixed_rate_ops,
-			&gate->hw, &clk_gate_ops,
-			CLK_IS_ROOT);
+			&gate->hw, &clk_gate_ops, 0);
 
 	if (IS_ERR(clk))
 		goto err_free_gate;

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-04-15 23:54 UTC #38 lore raw

Re: [PATCH 16/41] clk: sunxi: Remove CLK_IS_ROOT

Quoted 6 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Maxime Ripard <[email protected]>
Cc Chen-Yu Tsai <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #39 lore raw

PATCH 17/41 clk: tegra: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Rhyland Klein <[email protected]>

Cc Thierry Reding <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/tegra/clk-audio-sync.c  |  2 +-
 drivers/clk/tegra/clk-dfll.c        |  1 -
 drivers/clk/tegra/clk-tegra-fixed.c |  6 ++----
 drivers/clk/tegra/clk-tegra114.c    |  3 +--
 drivers/clk/tegra/clk-tegra20.c     | 10 ++++------
 5 files changed, 8 insertions(+), 14 deletions(-)

drivers/clk/tegra/clk-audio-sync.c +1 -1

index c0f7843e80e6..92d04ce2dee6 100644
@@ -72,7 +72,7 @@ struct clk *tegra_clk_register_sync_source(const char *name,
 
 	init.ops = &tegra_clk_sync_source_ops;
 	init.name = name;
-	init.flags = CLK_IS_ROOT;
+	init.flags = 0;
 	init.parent_names = NULL;
 	init.num_parents = 0;

drivers/clk/tegra/clk-dfll.c +0 -1

index 86a307b17eb0..19bfa07e24b1 100644
@@ -995,7 +995,6 @@ static const struct clk_ops dfll_clk_ops = {
 };
 
 static struct clk_init_data dfll_clk_init_data = {
-	.flags		= CLK_IS_ROOT,
 	.ops		= &dfll_clk_ops,
 	.num_parents	= 0,
 };

drivers/clk/tegra/clk-tegra-fixed.c +2 -4

index da0b5941c89f..d64ec7a1b976 100644
@@ -52,8 +52,7 @@ int __init tegra_osc_clk_init(void __iomem *clk_base, struct tegra_clk *clks,
 		return -EINVAL;
 	}
 
-	osc = clk_register_fixed_rate(NULL, "osc", NULL, CLK_IS_ROOT,
-				      *osc_freq);
+	osc = clk_register_fixed_rate(NULL, "osc", NULL, 0, *osc_freq);
 
 	dt_clk = tegra_lookup_dt_id(tegra_clk_clk_m, clks);
 	if (!dt_clk)

@@ -88,8 +87,7 @@ void __init tegra_fixed_clk_init(struct tegra_clk *tegra_clks)
 	/* clk_32k */
 	dt_clk = tegra_lookup_dt_id(tegra_clk_clk_32k, tegra_clks);
 	if (dt_clk) {
-		clk = clk_register_fixed_rate(NULL, "clk_32k", NULL,
-					CLK_IS_ROOT, 32768);
+		clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, 0, 32768);
 		*dt_clk = clk;
 	}

drivers/clk/tegra/clk-tegra114.c +1 -2

index 4a24aa4bbdea..df47ec3169c3 100644
@@ -972,8 +972,7 @@ static void __init tegra114_fixed_clk_init(void __iomem *clk_base)
 	struct clk *clk;
 
 	/* clk_32k */
-	clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, CLK_IS_ROOT,
-				      32768);
+	clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, 0, 32768);
 	clks[TEGRA114_CLK_CLK_32K] = clk;
 
 	/* clk_m_div2 */

drivers/clk/tegra/clk-tegra20.c +4 -6

index 7a48e986c4c9..7ad63837694f 100644
@@ -837,15 +837,13 @@ static void __init tegra20_periph_clk_init(void)
 	clks[TEGRA20_CLK_PEX] = clk;
 
 	/* cdev1 */
-	clk = clk_register_fixed_rate(NULL, "cdev1_fixed", NULL, CLK_IS_ROOT,
-				      26000000);
+	clk = clk_register_fixed_rate(NULL, "cdev1_fixed", NULL, 0, 26000000);
 	clk = tegra_clk_register_periph_gate("cdev1", "cdev1_fixed", 0,
 				    clk_base, 0, 94, periph_clk_enb_refcnt);
 	clks[TEGRA20_CLK_CDEV1] = clk;
 
 	/* cdev2 */
-	clk = clk_register_fixed_rate(NULL, "cdev2_fixed", NULL, CLK_IS_ROOT,
-				      26000000);
+	clk = clk_register_fixed_rate(NULL, "cdev2_fixed", NULL, 0, 26000000);
 	clk = tegra_clk_register_periph_gate("cdev2", "cdev2_fixed", 0,
 				    clk_base, 0, 93, periph_clk_enb_refcnt);
 	clks[TEGRA20_CLK_CDEV2] = clk;

@@ -879,8 +877,8 @@ static void __init tegra20_osc_clk_init(void)
 	input_freq = tegra20_clk_measure_input_freq();
 
 	/* clk_m */
-	clk = clk_register_fixed_rate(NULL, "clk_m", NULL, CLK_IS_ROOT |
-				      CLK_IGNORE_UNUSED, input_freq);
+	clk = clk_register_fixed_rate(NULL, "clk_m", NULL, CLK_IGNORE_UNUSED,
+				      input_freq);
 	clks[TEGRA20_CLK_CLK_M] = clk;
 
 	/* pll_ref */

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Thierry Reding

Acked-by on v1 17/41

2016-03-02 14:55 UTC #40 lore raw

Re: [PATCH 17/41] clk: tegra: Remove CLK_IS_ROOT

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Rhyland Klein <[email protected]>
Cc Thierry Reding <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>

Quoted 7 lines

---
 drivers/clk/tegra/clk-audio-sync.c  |  2 +-
 drivers/clk/tegra/clk-dfll.c        |  1 -
 drivers/clk/tegra/clk-tegra-fixed.c |  6 ++----
 drivers/clk/tegra/clk-tegra114.c    |  3 +--
 drivers/clk/tegra/clk-tegra20.c     | 10 ++++------
 5 files changed, 8 insertions(+), 14 deletions(-)

Acked-by Thierry Reding <[email protected]>

Rhyland Klein

Acked-by on v1 17/41

2016-03-02 16:50 UTC #41 lore raw

Re: [PATCH 17/41] clk: tegra: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 100 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Rhyland Klein <[email protected]>

Cc Thierry Reding <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/tegra/clk-audio-sync.c  |  2 +-
 drivers/clk/tegra/clk-dfll.c        |  1 -
 drivers/clk/tegra/clk-tegra-fixed.c |  6 ++----
 drivers/clk/tegra/clk-tegra114.c    |  3 +--
 drivers/clk/tegra/clk-tegra20.c     | 10 ++++------
 5 files changed, 8 insertions(+), 14 deletions(-)

drivers/clk/tegra/clk-audio-sync.c +1 -1

index c0f7843e80e6..92d04ce2dee6 100644
@@ -72,7 +72,7 @@ struct clk *tegra_clk_register_sync_source(const char *name,
 
 	init.ops = &tegra_clk_sync_source_ops;
 	init.name = name;
-	init.flags = CLK_IS_ROOT;
+	init.flags = 0;
 	init.parent_names = NULL;
 	init.num_parents = 0;

drivers/clk/tegra/clk-dfll.c +0 -1

index 86a307b17eb0..19bfa07e24b1 100644
@@ -995,7 +995,6 @@ static const struct clk_ops dfll_clk_ops = {
 };
 
 static struct clk_init_data dfll_clk_init_data = {
-	.flags		= CLK_IS_ROOT,
 	.ops		= &dfll_clk_ops,
 	.num_parents	= 0,
 };

drivers/clk/tegra/clk-tegra-fixed.c +2 -4

index da0b5941c89f..d64ec7a1b976 100644
@@ -52,8 +52,7 @@ int __init tegra_osc_clk_init(void __iomem *clk_base, struct tegra_clk *clks,
 		return -EINVAL;
 	}
 
-	osc = clk_register_fixed_rate(NULL, "osc", NULL, CLK_IS_ROOT,
-				      *osc_freq);
+	osc = clk_register_fixed_rate(NULL, "osc", NULL, 0, *osc_freq);
 
 	dt_clk = tegra_lookup_dt_id(tegra_clk_clk_m, clks);
 	if (!dt_clk)

@@ -88,8 +87,7 @@ void __init tegra_fixed_clk_init(struct tegra_clk *tegra_clks)
 	/* clk_32k */
 	dt_clk = tegra_lookup_dt_id(tegra_clk_clk_32k, tegra_clks);
 	if (dt_clk) {
-		clk = clk_register_fixed_rate(NULL, "clk_32k", NULL,
-					CLK_IS_ROOT, 32768);
+		clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, 0, 32768);
 		*dt_clk = clk;
 	}

drivers/clk/tegra/clk-tegra114.c +1 -2

index 4a24aa4bbdea..df47ec3169c3 100644
@@ -972,8 +972,7 @@ static void __init tegra114_fixed_clk_init(void __iomem *clk_base)
 	struct clk *clk;
 
 	/* clk_32k */
-	clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, CLK_IS_ROOT,
-				      32768);
+	clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, 0, 32768);
 	clks[TEGRA114_CLK_CLK_32K] = clk;
 
 	/* clk_m_div2 */

drivers/clk/tegra/clk-tegra20.c +2 -4

index 7a48e986c4c9..7ad63837694f 100644
@@ -837,15 +837,13 @@ static void __init tegra20_periph_clk_init(void)
 	clks[TEGRA20_CLK_PEX] = clk;
 
 	/* cdev1 */
-	clk = clk_register_fixed_rate(NULL, "cdev1_fixed", NULL, CLK_IS_ROOT,
-				      26000000);
+	clk = clk_register_fixed_rate(NULL, "cdev1_fixed", NULL, 0, 26000000);
 	clk = tegra_clk_register_periph_gate("cdev1", "cdev1_fixed", 0,
 				    clk_base, 0, 94, periph_clk_enb_refcnt);
 	clks[TEGRA20_CLK_CDEV1] = clk;
 
 	/* cdev2 */
-	clk = clk_register_fixed_rate(NULL, "cdev2_fixed", NULL, CLK_IS_ROOT,
-				      26000000);
+	clk = clk_register_fixed_rate(NULL, "cdev2_fixed", NULL, 0, 26000000);
 	clk = tegra_clk_register_periph_gate("cdev2", "cdev2_fixed", 0,
 				    clk_base, 0, 93, periph_clk_enb_refcnt);
 	clks[TEGRA20_CLK_CDEV2] = clk;

drivers/clk/tegra/clk-tegra20.c static void __init tegra20_osc_clk_init(void) · line 884

Quoted 10 lines

drivers/clk/tegra/clk-tegra20.c +2 -2

@@ -879,8 +877,8 @@ static void __init tegra20_osc_clk_init(void)
 	input_freq = tegra20_clk_measure_input_freq();
 
 	/* clk_m */
-	clk = clk_register_fixed_rate(NULL, "clk_m", NULL, CLK_IS_ROOT |
-				      CLK_IGNORE_UNUSED, input_freq);
+	clk = clk_register_fixed_rate(NULL, "clk_m", NULL, CLK_IGNORE_UNUSED,
+				      input_freq);
 	clks[TEGRA20_CLK_CLK_M] = clk;
 
 	/* pll_ref */

Acked-by Rhyland Klein <[email protected]>

Signature · 1 line

nvpublic

Stephen Boyd

author Applied

2016-03-03 01:47 UTC #42 lore raw

Re: [PATCH 17/41] clk: tegra: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 6 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Rhyland Klein <[email protected]>
Cc Thierry Reding <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #43 lore raw

PATCH 18/41 clk: ti: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Tero Kristo <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/ti/clk.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

drivers/clk/ti/clk.c +2 -2

index b5bcd77e8d0f..5fcf247759ac 100644
@@ -305,8 +305,8 @@ struct clk __init *ti_clk_register_clk(struct ti_clk *setup)
 	case TI_CLK_FIXED:
 		fixed = setup->data;
 
-		clk = clk_register_fixed_rate(NULL, setup->name, NULL,
-					      CLK_IS_ROOT, fixed->frequency);
+		clk = clk_register_fixed_rate(NULL, setup->name, NULL, 0,
+					      fixed->frequency);
 		break;
 	case TI_CLK_MUX:
 		clk = ti_clk_register_mux(setup);

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Tero Kristo

Acked-by on v1 18/41

2016-03-02 15:32 UTC #44 lore raw

Re: [PATCH 18/41] clk: ti: Remove CLK_IS_ROOT

Quoted 4 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Tero Kristo <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>

Acked-by Tero Kristo <[email protected]>

Quoted 20 lines

---
  drivers/clk/ti/clk.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

drivers/clk/ti/clk.c +2 -2

index b5bcd77e8d0f..5fcf247759ac 100644
@@ -305,8 +305,8 @@ struct clk __init *ti_clk_register_clk(struct ti_clk *setup)
  	case TI_CLK_FIXED:
  		fixed = setup->data;
 
-		clk = clk_register_fixed_rate(NULL, setup->name, NULL,
-					      CLK_IS_ROOT, fixed->frequency);
+		clk = clk_register_fixed_rate(NULL, setup->name, NULL, 0,
+					      fixed->frequency);
  		break;
  	case TI_CLK_MUX:
  		clk = ti_clk_register_mux(setup);

Stephen Boyd

author Applied

2016-03-03 01:47 UTC #45 lore raw

Re: [PATCH 18/41] clk: ti: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Tero Kristo <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #46 lore raw

PATCH 19/41 clk: ux500: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Ulf Hansson <[email protected]>

Cc Linus Walleij <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/ux500/abx500-clk.c   |  5 +--
 drivers/clk/ux500/u8500_of_clk.c | 74 ++++++++++++++++++-------------------
 drivers/clk/ux500/u8540_clk.c    | 80 +++++++++++++++++++---------------------
 3 files changed, 75 insertions(+), 84 deletions(-)

drivers/clk/ux500/abx500-clk.c +2 -3

index 222425d08ab6..a07c31e6f26d 100644
@@ -40,8 +40,7 @@ static int ab8500_reg_clks(struct device *dev)
 		return ret;
 
 	/* ab8500_sysclk */
-	clk = clk_reg_prcmu_gate("ab8500_sysclk", NULL, PRCMU_SYSCLK,
-				CLK_IS_ROOT);
+	clk = clk_reg_prcmu_gate("ab8500_sysclk", NULL, PRCMU_SYSCLK, 0);
 	clk_register_clkdev(clk, "sysclk", "ab8500-usb.0");
 	clk_register_clkdev(clk, "sysclk", "ab-iddet.0");
 	clk_register_clkdev(clk, "sysclk", "snd-soc-mop500.0");

@@ -68,7 +67,7 @@ static int ab8500_reg_clks(struct device *dev)
 	clk = clk_reg_sysctrl_gate_fixed_rate(dev, "ulpclk", NULL,
 		AB8500_SYSULPCLKCTRL1, AB8500_SYSULPCLKCTRL1_ULPCLKREQ,
 		AB8500_SYSULPCLKCTRL1_ULPCLKREQ,
-		38400000, 9000, CLK_IS_ROOT);
+		38400000, 9000, 0);
 	clk_register_clkdev(clk, "ulpclk", "snd-soc-mop500.0");
 
 	/* ab8500_intclk */

drivers/clk/ux500/u8500_of_clk.c +35 ~~-39~~

168 lines not on this page · raw message

drivers/clk/ux500/u8540_clk.c +38 ~~-42~~

193 lines not on this page · raw message

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Ulf Hansson

Acked-by on v1 19/41

2016-03-01 20:05 UTC #47 lore raw

Re: [PATCH 19/41] clk: ux500: Remove CLK_IS_ROOT

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Ulf Hansson <[email protected]>
Cc Linus Walleij <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>

Acked-by Ulf Hansson <[email protected]>

Kind regards
Uffe

Quoted 408 lines

---
 drivers/clk/ux500/abx500-clk.c   |  5 +--
 drivers/clk/ux500/u8500_of_clk.c | 74 ++++++++++++++++++-------------------
 drivers/clk/ux500/u8540_clk.c    | 80 +++++++++++++++++++---------------------
 3 files changed, 75 insertions(+), 84 deletions(-)

drivers/clk/ux500/abx500-clk.c +2 -3

index 222425d08ab6..a07c31e6f26d 100644
@@ -40,8 +40,7 @@ static int ab8500_reg_clks(struct device *dev)
                return ret;
 
        /* ab8500_sysclk */
-       clk = clk_reg_prcmu_gate("ab8500_sysclk", NULL, PRCMU_SYSCLK,
-                               CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("ab8500_sysclk", NULL, PRCMU_SYSCLK, 0);
        clk_register_clkdev(clk, "sysclk", "ab8500-usb.0");
        clk_register_clkdev(clk, "sysclk", "ab-iddet.0");
        clk_register_clkdev(clk, "sysclk", "snd-soc-mop500.0");

@@ -68,7 +67,7 @@ static int ab8500_reg_clks(struct device *dev)
        clk = clk_reg_sysctrl_gate_fixed_rate(dev, "ulpclk", NULL,
                AB8500_SYSULPCLKCTRL1, AB8500_SYSULPCLKCTRL1_ULPCLKREQ,
                AB8500_SYSULPCLKCTRL1_ULPCLKREQ,
-               38400000, 9000, CLK_IS_ROOT);
+               38400000, 9000, 0);
        clk_register_clkdev(clk, "ulpclk", "snd-soc-mop500.0");
 
        /* ab8500_intclk */

drivers/clk/ux500/u8500_of_clk.c +35 ~~-39~~

index 271c09644652..9a736d939806 100644
@@ -91,21 +91,21 @@ void u8500_clk_init(void)
 
        /* Clock sources */
        clk = clk_reg_prcmu_gate("soc0_pll", NULL, PRCMU_PLLSOC0,
-                               CLK_IS_ROOT|CLK_IGNORE_UNUSED);
+                               CLK_IGNORE_UNUSED);
        prcmu_clk[PRCMU_PLLSOC0] = clk;
 
        clk = clk_reg_prcmu_gate("soc1_pll", NULL, PRCMU_PLLSOC1,
-                               CLK_IS_ROOT|CLK_IGNORE_UNUSED);
+                               CLK_IGNORE_UNUSED);
        prcmu_clk[PRCMU_PLLSOC1] = clk;
 
        clk = clk_reg_prcmu_gate("ddr_pll", NULL, PRCMU_PLLDDR,
-                               CLK_IS_ROOT|CLK_IGNORE_UNUSED);
+                               CLK_IGNORE_UNUSED);
        prcmu_clk[PRCMU_PLLDDR] = clk;
 
        /* FIXME: Add sys, ulp and int clocks here. */
 
        rtc_clk = clk_register_fixed_rate(NULL, "rtc32k", "NULL",
-                               CLK_IS_ROOT|CLK_IGNORE_UNUSED,
+                               CLK_IGNORE_UNUSED,
                                32768);
 
        /* PRCMU clocks */

@@ -126,105 +126,101 @@ void u8500_clk_init(void)
                clk = clk_reg_prcmu_gate("sgclk", sgaclk_parent,
                                        PRCMU_SGACLK, 0);
        else
-               clk = clk_reg_prcmu_gate("sgclk", NULL,
-                                       PRCMU_SGACLK, CLK_IS_ROOT);
+               clk = clk_reg_prcmu_gate("sgclk", NULL, PRCMU_SGACLK, 0);
        prcmu_clk[PRCMU_SGACLK] = clk;
 
-       clk = clk_reg_prcmu_gate("uartclk", NULL, PRCMU_UARTCLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("uartclk", NULL, PRCMU_UARTCLK, 0);
        prcmu_clk[PRCMU_UARTCLK] = clk;
 
-       clk = clk_reg_prcmu_gate("msp02clk", NULL, PRCMU_MSP02CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("msp02clk", NULL, PRCMU_MSP02CLK, 0);
        prcmu_clk[PRCMU_MSP02CLK] = clk;
 
-       clk = clk_reg_prcmu_gate("msp1clk", NULL, PRCMU_MSP1CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("msp1clk", NULL, PRCMU_MSP1CLK, 0);
        prcmu_clk[PRCMU_MSP1CLK] = clk;
 
-       clk = clk_reg_prcmu_gate("i2cclk", NULL, PRCMU_I2CCLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("i2cclk", NULL, PRCMU_I2CCLK, 0);
        prcmu_clk[PRCMU_I2CCLK] = clk;
 
-       clk = clk_reg_prcmu_gate("slimclk", NULL, PRCMU_SLIMCLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("slimclk", NULL, PRCMU_SLIMCLK, 0);
        prcmu_clk[PRCMU_SLIMCLK] = clk;
 
-       clk = clk_reg_prcmu_gate("per1clk", NULL, PRCMU_PER1CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("per1clk", NULL, PRCMU_PER1CLK, 0);
        prcmu_clk[PRCMU_PER1CLK] = clk;
 
-       clk = clk_reg_prcmu_gate("per2clk", NULL, PRCMU_PER2CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("per2clk", NULL, PRCMU_PER2CLK, 0);
        prcmu_clk[PRCMU_PER2CLK] = clk;
 
-       clk = clk_reg_prcmu_gate("per3clk", NULL, PRCMU_PER3CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("per3clk", NULL, PRCMU_PER3CLK, 0);
        prcmu_clk[PRCMU_PER3CLK] = clk;
 
-       clk = clk_reg_prcmu_gate("per5clk", NULL, PRCMU_PER5CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("per5clk", NULL, PRCMU_PER5CLK, 0);
        prcmu_clk[PRCMU_PER5CLK] = clk;
 
-       clk = clk_reg_prcmu_gate("per6clk", NULL, PRCMU_PER6CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("per6clk", NULL, PRCMU_PER6CLK, 0);
        prcmu_clk[PRCMU_PER6CLK] = clk;
 
-       clk = clk_reg_prcmu_gate("per7clk", NULL, PRCMU_PER7CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("per7clk", NULL, PRCMU_PER7CLK, 0);
        prcmu_clk[PRCMU_PER7CLK] = clk;
 
        clk = clk_reg_prcmu_scalable("lcdclk", NULL, PRCMU_LCDCLK, 0,
-                               CLK_IS_ROOT|CLK_SET_RATE_GATE);
+                               CLK_SET_RATE_GATE);
        prcmu_clk[PRCMU_LCDCLK] = clk;
 
-       clk = clk_reg_prcmu_opp_gate("bmlclk", NULL, PRCMU_BMLCLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_opp_gate("bmlclk", NULL, PRCMU_BMLCLK, 0);
        prcmu_clk[PRCMU_BMLCLK] = clk;
 
        clk = clk_reg_prcmu_scalable("hsitxclk", NULL, PRCMU_HSITXCLK, 0,
-                               CLK_IS_ROOT|CLK_SET_RATE_GATE);
+                               CLK_SET_RATE_GATE);
        prcmu_clk[PRCMU_HSITXCLK] = clk;
 
        clk = clk_reg_prcmu_scalable("hsirxclk", NULL, PRCMU_HSIRXCLK, 0,
-                               CLK_IS_ROOT|CLK_SET_RATE_GATE);
+                               CLK_SET_RATE_GATE);
        prcmu_clk[PRCMU_HSIRXCLK] = clk;
 
        clk = clk_reg_prcmu_scalable("hdmiclk", NULL, PRCMU_HDMICLK, 0,
-                               CLK_IS_ROOT|CLK_SET_RATE_GATE);
+                               CLK_SET_RATE_GATE);
        prcmu_clk[PRCMU_HDMICLK] = clk;
 
-       clk = clk_reg_prcmu_gate("apeatclk", NULL, PRCMU_APEATCLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("apeatclk", NULL, PRCMU_APEATCLK, 0);
        prcmu_clk[PRCMU_APEATCLK] = clk;
 
        clk = clk_reg_prcmu_scalable("apetraceclk", NULL, PRCMU_APETRACECLK, 0,
-                               CLK_IS_ROOT|CLK_SET_RATE_GATE);
+                               CLK_SET_RATE_GATE);
        prcmu_clk[PRCMU_APETRACECLK] = clk;
 
-       clk = clk_reg_prcmu_gate("mcdeclk", NULL, PRCMU_MCDECLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("mcdeclk", NULL, PRCMU_MCDECLK, 0);
        prcmu_clk[PRCMU_MCDECLK] = clk;
 
-       clk = clk_reg_prcmu_opp_gate("ipi2cclk", NULL, PRCMU_IPI2CCLK,
-                               CLK_IS_ROOT);
+       clk = clk_reg_prcmu_opp_gate("ipi2cclk", NULL, PRCMU_IPI2CCLK, 0);
        prcmu_clk[PRCMU_IPI2CCLK] = clk;
 
-       clk = clk_reg_prcmu_gate("dsialtclk", NULL, PRCMU_DSIALTCLK,
-                               CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("dsialtclk", NULL, PRCMU_DSIALTCLK, 0);
        prcmu_clk[PRCMU_DSIALTCLK] = clk;
 
-       clk = clk_reg_prcmu_gate("dmaclk", NULL, PRCMU_DMACLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("dmaclk", NULL, PRCMU_DMACLK, 0);
        prcmu_clk[PRCMU_DMACLK] = clk;
 
-       clk = clk_reg_prcmu_gate("b2r2clk", NULL, PRCMU_B2R2CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("b2r2clk", NULL, PRCMU_B2R2CLK, 0);
        prcmu_clk[PRCMU_B2R2CLK] = clk;
 
        clk = clk_reg_prcmu_scalable("tvclk", NULL, PRCMU_TVCLK, 0,
-                               CLK_IS_ROOT|CLK_SET_RATE_GATE);
+                               CLK_SET_RATE_GATE);
        prcmu_clk[PRCMU_TVCLK] = clk;
 
-       clk = clk_reg_prcmu_gate("sspclk", NULL, PRCMU_SSPCLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("sspclk", NULL, PRCMU_SSPCLK, 0);
        prcmu_clk[PRCMU_SSPCLK] = clk;
 
-       clk = clk_reg_prcmu_gate("rngclk", NULL, PRCMU_RNGCLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("rngclk", NULL, PRCMU_RNGCLK, 0);
        prcmu_clk[PRCMU_RNGCLK] = clk;
 
-       clk = clk_reg_prcmu_gate("uiccclk", NULL, PRCMU_UICCCLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("uiccclk", NULL, PRCMU_UICCCLK, 0);
        prcmu_clk[PRCMU_UICCCLK] = clk;
 
-       clk = clk_reg_prcmu_gate("timclk", NULL, PRCMU_TIMCLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("timclk", NULL, PRCMU_TIMCLK, 0);
        prcmu_clk[PRCMU_TIMCLK] = clk;
 
        clk = clk_reg_prcmu_opp_volt_scalable("sdmmcclk", NULL, PRCMU_SDMMCCLK,
-                                       100000000,
-                                       CLK_IS_ROOT|CLK_SET_RATE_GATE);
+                                       100000000, CLK_SET_RATE_GATE);
        prcmu_clk[PRCMU_SDMMCCLK] = clk;
 
        clk = clk_reg_prcmu_scalable("dsi_pll", "hdmiclk",

@@ -252,7 +248,7 @@ void u8500_clk_init(void)
        prcmu_clk[PRCMU_DSI2ESCCLK] = clk;
 
        clk = clk_reg_prcmu_scalable_rate("armss", NULL,
-                               PRCMU_ARMSS, 0, CLK_IS_ROOT|CLK_IGNORE_UNUSED);
+                               PRCMU_ARMSS, 0, CLK_IGNORE_UNUSED);
        prcmu_clk[PRCMU_ARMSS] = clk;
 
        twd_clk = clk_register_fixed_factor(NULL, "smp_twd", "armss",

drivers/clk/ux500/u8540_clk.c +38 ~~-43~~

index d7bcb7a86615..86549e59fb42 100644
@@ -56,28 +56,28 @@ void u8540_clk_init(void)
        /* Clock sources. */
        /* Fixed ClockGen */
        clk = clk_reg_prcmu_gate("soc0_pll", NULL, PRCMU_PLLSOC0,
-                               CLK_IS_ROOT|CLK_IGNORE_UNUSED);
+                               CLK_IGNORE_UNUSED);
        clk_register_clkdev(clk, "soc0_pll", NULL);
 
        clk = clk_reg_prcmu_gate("soc1_pll", NULL, PRCMU_PLLSOC1,
-                               CLK_IS_ROOT|CLK_IGNORE_UNUSED);
+                               CLK_IGNORE_UNUSED);
        clk_register_clkdev(clk, "soc1_pll", NULL);
 
        clk = clk_reg_prcmu_gate("ddr_pll", NULL, PRCMU_PLLDDR,
-                               CLK_IS_ROOT|CLK_IGNORE_UNUSED);
+                               CLK_IGNORE_UNUSED);
        clk_register_clkdev(clk, "ddr_pll", NULL);
 
        clk = clk_register_fixed_rate(NULL, "rtc32k", NULL,
-                               CLK_IS_ROOT|CLK_IGNORE_UNUSED,
+                               CLK_IGNORE_UNUSED,
                                32768);
        clk_register_clkdev(clk, "clk32k", NULL);
        clk_register_clkdev(clk, "apb_pclk", "rtc-pl031");
 
        clk = clk_register_fixed_rate(NULL, "ulp38m4", NULL,
-                               CLK_IS_ROOT|CLK_IGNORE_UNUSED,
+                               CLK_IGNORE_UNUSED,
                                38400000);
 
-       clk = clk_reg_prcmu_gate("uartclk", NULL, PRCMU_UARTCLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("uartclk", NULL, PRCMU_UARTCLK, 0);
        clk_register_clkdev(clk, NULL, "UART");
 
        /* msp02clk needs a abx500 clk as parent. Handle by abx500 clk driver */

@@ -85,120 +85,116 @@ void u8540_clk_init(void)
                        PRCMU_MSP02CLK, 0);
        clk_register_clkdev(clk, NULL, "MSP02");
 
-       clk = clk_reg_prcmu_gate("msp1clk", NULL, PRCMU_MSP1CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("msp1clk", NULL, PRCMU_MSP1CLK, 0);
        clk_register_clkdev(clk, NULL, "MSP1");
 
-       clk = clk_reg_prcmu_gate("i2cclk", NULL, PRCMU_I2CCLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("i2cclk", NULL, PRCMU_I2CCLK, 0);
        clk_register_clkdev(clk, NULL, "I2C");
 
-       clk = clk_reg_prcmu_gate("slimclk", NULL, PRCMU_SLIMCLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("slimclk", NULL, PRCMU_SLIMCLK, 0);
        clk_register_clkdev(clk, NULL, "slim");
 
-       clk = clk_reg_prcmu_gate("per1clk", NULL, PRCMU_PER1CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("per1clk", NULL, PRCMU_PER1CLK, 0);
        clk_register_clkdev(clk, NULL, "PERIPH1");
 
-       clk = clk_reg_prcmu_gate("per2clk", NULL, PRCMU_PER2CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("per2clk", NULL, PRCMU_PER2CLK, 0);
        clk_register_clkdev(clk, NULL, "PERIPH2");
 
-       clk = clk_reg_prcmu_gate("per3clk", NULL, PRCMU_PER3CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("per3clk", NULL, PRCMU_PER3CLK, 0);
        clk_register_clkdev(clk, NULL, "PERIPH3");
 
-       clk = clk_reg_prcmu_gate("per5clk", NULL, PRCMU_PER5CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("per5clk", NULL, PRCMU_PER5CLK, 0);
        clk_register_clkdev(clk, NULL, "PERIPH5");
 
-       clk = clk_reg_prcmu_gate("per6clk", NULL, PRCMU_PER6CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("per6clk", NULL, PRCMU_PER6CLK, 0);
        clk_register_clkdev(clk, NULL, "PERIPH6");
 
-       clk = clk_reg_prcmu_gate("per7clk", NULL, PRCMU_PER7CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("per7clk", NULL, PRCMU_PER7CLK, 0);
        clk_register_clkdev(clk, NULL, "PERIPH7");
 
        clk = clk_reg_prcmu_scalable("lcdclk", NULL, PRCMU_LCDCLK, 0,
-                               CLK_IS_ROOT|CLK_SET_RATE_GATE);
+                               CLK_SET_RATE_GATE);
        clk_register_clkdev(clk, NULL, "lcd");
        clk_register_clkdev(clk, "lcd", "mcde");
 
-       clk = clk_reg_prcmu_opp_gate("bmlclk", NULL, PRCMU_BMLCLK,
-                               CLK_IS_ROOT);
+       clk = clk_reg_prcmu_opp_gate("bmlclk", NULL, PRCMU_BMLCLK, 0);
        clk_register_clkdev(clk, NULL, "bml");
 
        clk = clk_reg_prcmu_scalable("hsitxclk", NULL, PRCMU_HSITXCLK, 0,
-                               CLK_IS_ROOT|CLK_SET_RATE_GATE);
+                                    CLK_SET_RATE_GATE);
 
        clk = clk_reg_prcmu_scalable("hsirxclk", NULL, PRCMU_HSIRXCLK, 0,
-                               CLK_IS_ROOT|CLK_SET_RATE_GATE);
+                                    CLK_SET_RATE_GATE);
 
        clk = clk_reg_prcmu_scalable("hdmiclk", NULL, PRCMU_HDMICLK, 0,
-                               CLK_IS_ROOT|CLK_SET_RATE_GATE);
+                                    CLK_SET_RATE_GATE);
        clk_register_clkdev(clk, NULL, "hdmi");
        clk_register_clkdev(clk, "hdmi", "mcde");
 
-       clk = clk_reg_prcmu_gate("apeatclk", NULL, PRCMU_APEATCLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("apeatclk", NULL, PRCMU_APEATCLK, 0);
        clk_register_clkdev(clk, NULL, "apeat");
 
-       clk = clk_reg_prcmu_gate("apetraceclk", NULL, PRCMU_APETRACECLK,
-                               CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("apetraceclk", NULL, PRCMU_APETRACECLK, 0);
        clk_register_clkdev(clk, NULL, "apetrace");
 
-       clk = clk_reg_prcmu_gate("mcdeclk", NULL, PRCMU_MCDECLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("mcdeclk", NULL, PRCMU_MCDECLK, 0);
        clk_register_clkdev(clk, NULL, "mcde");
        clk_register_clkdev(clk, "mcde", "mcde");
        clk_register_clkdev(clk, NULL, "dsilink.0");
        clk_register_clkdev(clk, NULL, "dsilink.1");
        clk_register_clkdev(clk, NULL, "dsilink.2");
 
-       clk = clk_reg_prcmu_opp_gate("ipi2cclk", NULL, PRCMU_IPI2CCLK,
-                               CLK_IS_ROOT);
+       clk = clk_reg_prcmu_opp_gate("ipi2cclk", NULL, PRCMU_IPI2CCLK, 0);
        clk_register_clkdev(clk, NULL, "ipi2");
 
-       clk = clk_reg_prcmu_gate("dsialtclk", NULL, PRCMU_DSIALTCLK,
-                               CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("dsialtclk", NULL, PRCMU_DSIALTCLK, 0);
        clk_register_clkdev(clk, NULL, "dsialt");
 
-       clk = clk_reg_prcmu_gate("dmaclk", NULL, PRCMU_DMACLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("dmaclk", NULL, PRCMU_DMACLK, 0);
        clk_register_clkdev(clk, NULL, "dma40.0");
 
-       clk = clk_reg_prcmu_gate("b2r2clk", NULL, PRCMU_B2R2CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("b2r2clk", NULL, PRCMU_B2R2CLK, 0);
        clk_register_clkdev(clk, NULL, "b2r2");
        clk_register_clkdev(clk, NULL, "b2r2_core");
        clk_register_clkdev(clk, NULL, "U8500-B2R2.0");
        clk_register_clkdev(clk, NULL, "b2r2_1_core");
 
        clk = clk_reg_prcmu_scalable("tvclk", NULL, PRCMU_TVCLK, 0,
-                               CLK_IS_ROOT|CLK_SET_RATE_GATE);
+                                    CLK_SET_RATE_GATE);
        clk_register_clkdev(clk, NULL, "tv");
        clk_register_clkdev(clk, "tv", "mcde");
 
-       clk = clk_reg_prcmu_gate("sspclk", NULL, PRCMU_SSPCLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("sspclk", NULL, PRCMU_SSPCLK, 0);
        clk_register_clkdev(clk, NULL, "SSP");
 
-       clk = clk_reg_prcmu_gate("rngclk", NULL, PRCMU_RNGCLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("rngclk", NULL, PRCMU_RNGCLK, 0);
        clk_register_clkdev(clk, NULL, "rngclk");
 
-       clk = clk_reg_prcmu_gate("uiccclk", NULL, PRCMU_UICCCLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("uiccclk", NULL, PRCMU_UICCCLK, 0);
        clk_register_clkdev(clk, NULL, "uicc");
 
-       clk = clk_reg_prcmu_gate("timclk", NULL, PRCMU_TIMCLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("timclk", NULL, PRCMU_TIMCLK, 0);
        clk_register_clkdev(clk, NULL, "mtu0");
        clk_register_clkdev(clk, NULL, "mtu1");
 
        clk = clk_reg_prcmu_opp_volt_scalable("sdmmcclk", NULL,
                                        PRCMU_SDMMCCLK, 100000000,
-                                       CLK_IS_ROOT|CLK_SET_RATE_GATE);
+                                       CLK_SET_RATE_GATE);
        clk_register_clkdev(clk, NULL, "sdmmc");
 
        clk = clk_reg_prcmu_opp_volt_scalable("sdmmchclk", NULL,
                                        PRCMU_SDMMCHCLK, 400000000,
-                                       CLK_IS_ROOT|CLK_SET_RATE_GATE);
+                                       CLK_SET_RATE_GATE);
        clk_register_clkdev(clk, NULL, "sdmmchclk");
 
-       clk = clk_reg_prcmu_gate("hvaclk", NULL, PRCMU_HVACLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("hvaclk", NULL, PRCMU_HVACLK, 0);
        clk_register_clkdev(clk, NULL, "hva");
 
-       clk = clk_reg_prcmu_gate("g1clk", NULL, PRCMU_G1CLK, CLK_IS_ROOT);
+       clk = clk_reg_prcmu_gate("g1clk", NULL, PRCMU_G1CLK, 0);
        clk_register_clkdev(clk, NULL, "g1");
 
        clk = clk_reg_prcmu_scalable("spare1clk", NULL, PRCMU_SPARE1CLK, 0,
-                               CLK_IS_ROOT|CLK_SET_RATE_GATE);
+                                    CLK_SET_RATE_GATE);
        clk_register_clkdev(clk, "dsilcd", "mcde");
 
        clk = clk_reg_prcmu_scalable("dsi_pll", "hdmiclk",

@@ -244,7 +240,7 @@ void u8540_clk_init(void)
        clk_register_clkdev(clk, "dsilp2", "mcde");
 
        clk = clk_reg_prcmu_scalable_rate("armss", NULL,
-                               PRCMU_ARMSS, 0, CLK_IS_ROOT|CLK_IGNORE_UNUSED);
+                               PRCMU_ARMSS, 0, CLK_IGNORE_UNUSED);
        clk_register_clkdev(clk, "armss", NULL);
 
        clk = clk_register_fixed_factor(NULL, "smp_twd", "armss",
--

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-03-03 01:48 UTC #48 lore raw

Re: [PATCH 19/41] clk: ux500: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 6 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Ulf Hansson <[email protected]>
Cc Linus Walleij <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #49 lore raw

PATCH 20/41 clk: versatile: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Pawel Moll <[email protected]>

Cc Linus Walleij <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/versatile/clk-icst.c         | 2 +-
 drivers/clk/versatile/clk-impd1.c        | 3 +--
 drivers/clk/versatile/clk-realview.c     | 8 +++-----
 drivers/clk/versatile/clk-vexpress-osc.c | 2 +-
 4 files changed, 6 insertions(+), 9 deletions(-)

drivers/clk/versatile/clk-icst.c +1 -1

index 3bca438ecd19..5e9b65278e4c 100644
@@ -170,7 +170,7 @@ static struct clk *icst_clk_setup(struct device *dev,
 
 	init.name = name;
 	init.ops = &icst_ops;
-	init.flags = CLK_IS_ROOT;
+	init.flags = 0;
 	init.parent_names = (parent_name ? &parent_name : NULL);
 	init.num_parents = (parent_name ? 1 : 0);
 	icst->map = map;

drivers/clk/versatile/clk-impd1.c +1 -2

index 65c842a21c62..74c3216dbb00 100644
@@ -98,8 +98,7 @@ void integrator_impd1_clk_init(void __iomem *base, unsigned int id)
 
 	/* Register the fixed rate PCLK */
 	imc->pclkname = kasprintf(GFP_KERNEL, "lm%x-pclk", id);
-	pclk = clk_register_fixed_rate(NULL, imc->pclkname, NULL,
-				      CLK_IS_ROOT, 0);
+	pclk = clk_register_fixed_rate(NULL, imc->pclkname, NULL, 0, 0);
 	imc->pclk = pclk;
 
 	imc->vco1name = kasprintf(GFP_KERNEL, "lm%x-vco1", id);

drivers/clk/versatile/clk-realview.c +3 -5

index bd4dd2463e23..c56efc70ac16 100644
@@ -56,12 +56,11 @@ void __init realview_clk_init(void __iomem *sysbase, bool is_pb1176)
 	struct clk *clk;
 
 	/* APB clock dummy */
-	clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
+	clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, 0, 0);
 	clk_register_clkdev(clk, "apb_pclk", NULL);
 
 	/* 24 MHz clock */
-	clk = clk_register_fixed_rate(NULL, "clk24mhz", NULL, CLK_IS_ROOT,
-				24000000);
+	clk = clk_register_fixed_rate(NULL, "clk24mhz", NULL, 0, 24000000);
 	clk_register_clkdev(clk, NULL, "dev:uart0");
 	clk_register_clkdev(clk, NULL, "dev:uart1");
 	clk_register_clkdev(clk, NULL, "dev:uart2");

@@ -81,8 +80,7 @@ void __init realview_clk_init(void __iomem *sysbase, bool is_pb1176)
 
 
 	/* 1 MHz clock */
-	clk = clk_register_fixed_rate(NULL, "clk1mhz", NULL, CLK_IS_ROOT,
-				      1000000);
+	clk = clk_register_fixed_rate(NULL, "clk1mhz", NULL, 0, 1000000);
 	clk_register_clkdev(clk, NULL, "sp804");
 
 	/* ICST VCO clock */

drivers/clk/versatile/clk-vexpress-osc.c +1 -1

index 89c0609e180b..7e5add7d7752 100644
@@ -94,7 +94,7 @@ static int vexpress_osc_probe(struct platform_device *pdev)
 		init.name = dev_name(&pdev->dev);
 
 	init.ops = &vexpress_osc_ops;
-	init.flags = CLK_IS_ROOT;
+	init.flags = 0;
 	init.num_parents = 0;
 
 	osc->hw.init = &init;

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Linus Walleij

Acked-by on v1 20/41

2016-03-05 16:49 UTC #50 lore raw

Re: [PATCH 20/41] clk: versatile: Remove CLK_IS_ROOT

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Pawel Moll <[email protected]>
Cc Linus Walleij <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>

Acked-by Linus Walleij <[email protected]>

Yours,
Linus Walleij

Stephen Boyd

author Applied

2016-03-15 22:19 UTC #51 lore raw

Re: [PATCH 20/41] clk: versatile: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 6 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Pawel Moll <[email protected]>
Cc Linus Walleij <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #52 lore raw

PATCH 21/41 clk: x86: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Mika Westerberg <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/x86/clk-lpt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/clk/x86/clk-lpt.c +1 -1

index f827083defc4..54e0cf9d8edd 100644
@@ -30,7 +30,7 @@ static int lpt_clk_probe(struct platform_device *pdev)
 	/* LPSS free running clock */
 	drvdata->name = "lpss_clk";
 	clk = clk_register_fixed_rate(&pdev->dev, drvdata->name, NULL,
-				      CLK_IS_ROOT, 100000000);
+				      0, 100000000);
 	if (IS_ERR(clk))
 		return PTR_ERR(clk);

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Mika Westerberg

Acked-by on v1 21/41

2016-03-03 10:34 UTC #53 lore raw

Re: [PATCH 21/41] clk: x86: Remove CLK_IS_ROOT

Quoted 3 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Mika Westerberg <[email protected]>

Acked-by Mika Westerberg <[email protected]>

Stephen Boyd

author

2016-03-01 19:00 UTC #54 lore raw

PATCH 22/41 clk: x86: Remove clkdev.h and clk.h includes

In reply to Stephen Boyd

This driver is a clk provider and not a clk consumer, so remove the clk.h include. Also, drop clkdev.h because there's not clkdev usage here either.

Cc Mika Westerberg <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/x86/clk-lpt.c | 2 --
 1 file changed, 2 deletions(-)

drivers/clk/x86/clk-lpt.c +0 -2

index 54e0cf9d8edd..6b40eb89ae19 100644
@@ -10,8 +10,6 @@
  * published by the Free Software Foundation.
  */
 
-#include <linux/clk.h>
-#include <linux/clkdev.h>
 #include <linux/clk-provider.h>
 #include <linux/err.h>
 #include <linux/module.h>

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Mika Westerberg

Acked-by on v1 22/41

2016-03-03 10:35 UTC #55 lore raw

Re: [PATCH 22/41] clk: x86: Remove clkdev.h and clk.h includes

Quoted 5 lines · Stephen Boyd

This driver is a clk provider and not a clk consumer, so remove the clk.h include. Also, drop clkdev.h because there's not clkdev usage here either.
Cc Mika Westerberg <[email protected]>

Acked-by Mika Westerberg <[email protected]>

Stephen Boyd

author

2016-03-01 19:00 UTC #56 lore raw

PATCH 23/41 clk: zte: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Jun Nie <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/zte/clk-zx296702.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

drivers/clk/zte/clk-zx296702.c +1 -2

index ebd20d852e73..76e967c19775 100644
@@ -234,8 +234,7 @@ static void __init zx296702_top_clocks_init(struct device_node *np)
 	WARN_ON(!topcrm_base);
 
 	clk[ZX296702_OSC] =
-		clk_register_fixed_rate(NULL, "osc", NULL, CLK_IS_ROOT,
-				30000000);
+		clk_register_fixed_rate(NULL, "osc", NULL, 0, 30000000);
 	clk[ZX296702_PLL_A9] =
 		clk_register_zx_pll("pll_a9", "osc", 0, topcrm_base
 				+ 0x01c, pll_a9_config,

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-04-15 23:54 UTC #57 lore raw

Re: [PATCH 23/41] clk: zte: Remove CLK_IS_ROOT

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Jun Nie <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #58 lore raw

PATCH 24/41 clk: zynq: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Sören Brinkmann <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/zynq/clkc.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

drivers/clk/zynq/clkc.c +1 -2

index 38a65c3e62fc..88a2cab37f62 100644
@@ -265,8 +265,7 @@ static void __init zynq_clk_setup(struct device_node *np)
 		pr_warn("ps_clk frequency not specified, using 33 MHz.\n");
 		tmp = 33333333;
 	}
-	ps_clk = clk_register_fixed_rate(NULL, "ps_clk", NULL, CLK_IS_ROOT,
-			tmp);
+	ps_clk = clk_register_fixed_rate(NULL, "ps_clk", NULL, 0, tmp);
 
 	/* PLLs */
 	clk = clk_register_zynq_pll("armpll_int", "ps_clk", SLCR_ARMPLL_CTRL,

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Sören Brinkmann

Reviewed-by on v1 24/41

2016-03-02 03:33 UTC #59 lore raw

Re: [PATCH 24/41] clk: zynq: Remove CLK_IS_ROOT

Quoted 4 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Sören Brinkmann <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>

Reviewed-by Sören Brinkmann <[email protected]>

Thanks,
Sören

Stephen Boyd

author Applied

2016-03-03 01:48 UTC #60 lore raw

Re: [PATCH 24/41] clk: zynq: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Sören Brinkmann <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #61 lore raw

PATCH 25/41 clk: clps711x: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Alexander Shiyan <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/clk-clps711x.c | 19 ++++++++-----------
 1 file changed, 8 insertions(+), 11 deletions(-)

drivers/clk/clk-clps711x.c +8 ~~-11~~

index ff4ef4f1df62..1f60b02416a7 100644
@@ -107,16 +107,15 @@ static struct clps711x_clk * __init _clps711x_clk_init(void __iomem *base,
 	writel(tmp, base + CLPS711X_SYSCON1);
 
 	clps711x_clk->clks[CLPS711X_CLK_DUMMY] =
-		clk_register_fixed_rate(NULL, "dummy", NULL, CLK_IS_ROOT, 0);
+		clk_register_fixed_rate(NULL, "dummy", NULL, 0, 0);
 	clps711x_clk->clks[CLPS711X_CLK_CPU] =
-		clk_register_fixed_rate(NULL, "cpu", NULL, CLK_IS_ROOT, f_cpu);
+		clk_register_fixed_rate(NULL, "cpu", NULL, 0, f_cpu);
 	clps711x_clk->clks[CLPS711X_CLK_BUS] =
-		clk_register_fixed_rate(NULL, "bus", NULL, CLK_IS_ROOT, f_bus);
+		clk_register_fixed_rate(NULL, "bus", NULL, 0, f_bus);
 	clps711x_clk->clks[CLPS711X_CLK_PLL] =
-		clk_register_fixed_rate(NULL, "pll", NULL, CLK_IS_ROOT, f_pll);
+		clk_register_fixed_rate(NULL, "pll", NULL, 0, f_pll);
 	clps711x_clk->clks[CLPS711X_CLK_TIMERREF] =
-		clk_register_fixed_rate(NULL, "timer_ref", NULL, CLK_IS_ROOT,
-					f_tim);
+		clk_register_fixed_rate(NULL, "timer_ref", NULL, 0, f_tim);
 	clps711x_clk->clks[CLPS711X_CLK_TIMER1] =
 		clk_register_divider_table(NULL, "timer1", "timer_ref", 0,
 					   base + CLPS711X_SYSCON1, 5, 1, 0,

@@ -126,10 +125,9 @@ static struct clps711x_clk * __init _clps711x_clk_init(void __iomem *base,
 					   base + CLPS711X_SYSCON1, 7, 1, 0,
 					   timer_div_table, &clps711x_clk->lock);
 	clps711x_clk->clks[CLPS711X_CLK_PWM] =
-		clk_register_fixed_rate(NULL, "pwm", NULL, CLK_IS_ROOT, f_pwm);
+		clk_register_fixed_rate(NULL, "pwm", NULL, 0, f_pwm);
 	clps711x_clk->clks[CLPS711X_CLK_SPIREF] =
-		clk_register_fixed_rate(NULL, "spi_ref", NULL, CLK_IS_ROOT,
-					f_spi);
+		clk_register_fixed_rate(NULL, "spi_ref", NULL, 0, f_spi);
 	clps711x_clk->clks[CLPS711X_CLK_SPI] =
 		clk_register_divider_table(NULL, "spi", "spi_ref", 0,
 					   base + CLPS711X_SYSCON1, 16, 2, 0,

@@ -137,8 +135,7 @@ static struct clps711x_clk * __init _clps711x_clk_init(void __iomem *base,
 	clps711x_clk->clks[CLPS711X_CLK_UART] =
 		clk_register_fixed_factor(NULL, "uart", "bus", 0, 1, 10);
 	clps711x_clk->clks[CLPS711X_CLK_TICK] =
-		clk_register_fixed_rate(NULL, "tick", NULL, CLK_IS_ROOT, 64);
-
+		clk_register_fixed_rate(NULL, "tick", NULL, 0, 64);
 	for (i = 0; i < CLPS711X_CLK_MAX; i++)
 		if (IS_ERR(clps711x_clk->clks[i]))
 			pr_err("clk %i: register failed with %ld\n",

Signature · 2 lines

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a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-04-15 23:54 UTC #62 lore raw

Re: [PATCH 25/41] clk: clps711x: Remove CLK_IS_ROOT

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Alexander Shiyan <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

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a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #63 lore raw

PATCH 26/41 clk: efm32gg: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Uwe Kleine-König <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/clk-efm32gg.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/clk/clk-efm32gg.c +1 -1

index bac4553f04b8..22e4c659704e 100644
@@ -36,7 +36,7 @@ static void __init efm32gg_cmu_init(struct device_node *np)
 	}
 
 	clk[clk_HFXO] = clk_register_fixed_rate(NULL, "HFXO", NULL,
-			CLK_IS_ROOT, 48000000);
+			0, 48000000);
 
 	clk[clk_HFPERCLKUSART0] = clk_register_gate(NULL, "HFPERCLK.USART0",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 0, 0, NULL);

Signature · 2 lines

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a Linux Foundation Collaborative Project

Uwe Kleine-König

2016-03-01 19:26 UTC #64 lore raw

Re: [PATCH 26/41] clk: efm32gg: Remove CLK_IS_ROOT

Quoted 1 line · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

I believe you, but still it would be nice to point out at least in the cover letter (that I didn't receive) the commit that made CLK_IS_ROOT a no-op.

Best regards
Uwe

Signature · 2 lines

Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

Stephen Boyd

author

2016-03-01 19:37 UTC #65 lore raw

Re: [PATCH 26/41] clk: efm32gg: Remove CLK_IS_ROOT

Quoted 7 lines · Uwe Kleine-König

Quoted 1 line · Stephen Boyd
This flag is a no-op now. Remove usage of the flag.
I believe you, but still it would be nice to point out at least in the cover letter (that I didn't receive) the commit that made CLK_IS_ROOT a no-op.

That would be too many Cc people on the cover letter. Thanks for the faith!

http://lkml.kernel.org/r/[email protected]

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Uwe Kleine-König

Acked-by on v1 26/41

2016-03-01 19:52 UTC #66 lore raw

Re: [PATCH 26/41] clk: efm32gg: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 4 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Uwe Kleine-König <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>

Acked-by Uwe Kleine-König <[email protected]>

Best regards
Uwe

Signature · 2 lines

Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

Stephen Boyd

author Applied

2016-03-03 01:48 UTC #67 lore raw

Re: [PATCH 26/41] clk: efm32gg: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Uwe Kleine-König <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #68 lore raw

PATCH 27/41 clk: fixed-rate: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/clk-fixed-rate.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

drivers/clk/clk-fixed-rate.c +1 -2

index 6858bfc548a9..cd9dc925b3f8 100644
@@ -136,8 +136,7 @@ void of_fixed_clk_setup(struct device_node *node)
 	of_property_read_string(node, "clock-output-names", &clk_name);
 
 	clk = clk_register_fixed_rate_with_accuracy(NULL, clk_name, NULL,
-						    CLK_IS_ROOT, rate,
-						    accuracy);
+						    0, rate, accuracy);
 	if (!IS_ERR(clk))
 		of_clk_add_provider(node, of_clk_src_simple_get, clk);
 }

Signature · 2 lines

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a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-03-04 22:31 UTC #69 lore raw

Re: [PATCH 27/41] clk: fixed-rate: Remove CLK_IS_ROOT

Quoted 4 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #70 lore raw

PATCH 28/41 clk: ls1x: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Kelvin Cheung <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/clk-ls1x.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

drivers/clk/clk-ls1x.c +1 -2

index d4c61985f448..5097831387ff 100644
@@ -88,8 +88,7 @@ void __init ls1x_clk_init(void)
 {
 	struct clk *clk;
 
-	clk = clk_register_fixed_rate(NULL, "osc_33m_clk", NULL, CLK_IS_ROOT,
-				      OSC);
+	clk = clk_register_fixed_rate(NULL, "osc_33m_clk", NULL, 0, OSC);
 	clk_register_clkdev(clk, "osc_33m_clk", NULL);
 
 	/* clock derived from 33 MHz OSC clk */

Signature · 2 lines

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a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #71 lore raw

PATCH 29/41 clk: max77{686,802}: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Javier Martinez Canillas <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/clk-max77686.c | 3 ---
 drivers/clk/clk-max77802.c | 2 --
 2 files changed, 5 deletions(-)

drivers/clk/clk-max77686.c +0 -3

index 446c2fe76dc2..9b6f2772e948 100644
@@ -38,17 +38,14 @@ static struct clk_init_data max77686_clks_init[MAX77686_CLKS_NUM] = {
 	[MAX77686_CLK_AP] = {
 		.name = "32khz_ap",
 		.ops = &max_gen_clk_ops,
-		.flags = CLK_IS_ROOT,
 	},
 	[MAX77686_CLK_CP] = {
 		.name = "32khz_cp",
 		.ops = &max_gen_clk_ops,
-		.flags = CLK_IS_ROOT,
 	},
 	[MAX77686_CLK_PMIC] = {
 		.name = "32khz_pmic",
 		.ops = &max_gen_clk_ops,
-		.flags = CLK_IS_ROOT,
 	},
 };

drivers/clk/clk-max77802.c +0 -2

index 4a89f7979ba0..355dd2e522c3 100644
@@ -39,12 +39,10 @@ static struct clk_init_data max77802_clks_init[MAX77802_CLKS_NUM] = {
 	[MAX77802_CLK_32K_AP] = {
 		.name = "32khz_ap",
 		.ops = &max_gen_clk_ops,
-		.flags = CLK_IS_ROOT,
 	},
 	[MAX77802_CLK_32K_CP] = {
 		.name = "32khz_cp",
 		.ops = &max_gen_clk_ops,
-		.flags = CLK_IS_ROOT,
 	},
 };

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Javier Martinez Canillas

Reviewed-by on v1 29/41

2016-03-07 13:46 UTC #72 lore raw

Re: [PATCH 29/41] clk: max77{686,802}: Remove CLK_IS_ROOT

Hello Stephen,

Quoted 2 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Doing some search I found the patch that makes the flag to be a no-op: https://lkml.org/lkml/2016/2/2/1037.

It would had been nice though to have that information somewhere in the patch, probably between the separator line and the actual diff so people know that is true :)

Quoted 3 lines

Cc Javier Martinez Canillas <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Reviewed-by Javier Martinez Canillas <[email protected]>

Best regards,
--
Javier Martinez Canillas
Open Source Group
Samsung Research America

Stephen Boyd

author

2016-03-01 19:00 UTC #73 lore raw

PATCH 30/41 clk: mb86s7x: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Jassi Brar <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/clk-mb86s7x.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

drivers/clk/clk-mb86s7x.c +2 -2

index f39c25a22f43..e0817754ca3e 100644
@@ -217,7 +217,7 @@ static struct clk *crg11_get(struct of_phandle_args *clkspec, void *data)
 	init.name = clkp;
 	init.num_parents = 0;
 	init.ops = &crg_port_ops;
-	init.flags = CLK_IS_ROOT;
+	init.flags = 0;
 	crgclk->hw.init = &init;
 	crgclk->cntrlr = cntrlr;
 	crgclk->domain = domain;

@@ -341,7 +341,7 @@ struct clk *mb86s7x_clclk_register(struct device *cpu_dev)
 
 	init.name = dev_name(cpu_dev);
 	init.ops = &clk_clc_ops;
-	init.flags = CLK_IS_ROOT | CLK_GET_RATE_NOCACHE;
+	init.flags = CLK_GET_RATE_NOCACHE;
 	init.num_parents = 0;
 
 	return devm_clk_register(cpu_dev, &clc->hw);

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Jassi Brar

Acked-by on v1 30/41

2016-03-03 11:42 UTC #74 lore raw

Re: [PATCH 30/41] clk: mb86s7x: Remove CLK_IS_ROOT

Quoted 4 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Jassi Brar <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>

Acked-by Jassi Brar <[email protected]>

Stephen Boyd

author

2016-03-01 19:00 UTC #75 lore raw

PATCH 31/41 clk: nspire: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Daniel Tang <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/clk-nspire.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

drivers/clk/clk-nspire.c +1 -2

index a378db7b2382..64f196a90816 100644
@@ -125,8 +125,7 @@ static void __init nspire_clk_setup(struct device_node *node,
 
 	of_property_read_string(node, "clock-output-names", &clk_name);
 
-	clk = clk_register_fixed_rate(NULL, clk_name, NULL, CLK_IS_ROOT,
-			info.base_clock);
+	clk = clk_register_fixed_rate(NULL, clk_name, NULL, 0, info.base_clock);
 	if (!IS_ERR(clk))
 		of_clk_add_provider(node, of_clk_src_simple_get, clk);
 	else

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-04-15 23:54 UTC #76 lore raw

Re: [PATCH 31/41] clk: nspire: Remove CLK_IS_ROOT

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Daniel Tang <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #77 lore raw

PATCH 32/41 clk: palmas: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Peter Ujfalusi <[email protected]>

Cc Nishanth Menon <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/clk-palmas.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

drivers/clk/clk-palmas.c +2 -2

index 9c0b8e6b1ab3..8328863cb0e0 100644
@@ -132,7 +132,7 @@ static const struct palmas_clks_of_match_data palmas_of_clk32kg = {
 	.init = {
 		.name = "clk32kg",
 		.ops = &palmas_clks_ops,
-		.flags = CLK_IS_ROOT | CLK_IGNORE_UNUSED,
+		.flags = CLK_IGNORE_UNUSED,
 	},
 	.desc = {
 		.clk_name = "clk32kg",

@@ -148,7 +148,7 @@ static const struct palmas_clks_of_match_data palmas_of_clk32kgaudio = {
 	.init = {
 		.name = "clk32kgaudio",
 		.ops = &palmas_clks_ops,
-		.flags = CLK_IS_ROOT | CLK_IGNORE_UNUSED,
+		.flags = CLK_IGNORE_UNUSED,
 	},
 	.desc = {
 		.clk_name = "clk32kgaudio",

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-04-15 23:54 UTC #78 lore raw

Re: [PATCH 32/41] clk: palmas: Remove CLK_IS_ROOT

Quoted 6 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Peter Ujfalusi <[email protected]>
Cc Nishanth Menon <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #79 lore raw

PATCH 33/41 clk: pwm: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Philipp Zabel <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/clk-pwm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/clk/clk-pwm.c +1 -1

index 328fcfcefd8c..883045814dac 100644
@@ -95,7 +95,7 @@ static int clk_pwm_probe(struct platform_device *pdev)
 
 	init.name = clk_name;
 	init.ops = &clk_pwm_ops;
-	init.flags = CLK_IS_BASIC | CLK_IS_ROOT;
+	init.flags = CLK_IS_BASIC;
 	init.num_parents = 0;
 
 	clk_pwm->pwm = pwm;

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Philipp Zabel

Acked-by on v1 33/41

2016-03-02 09:37 UTC #80 lore raw

Re: [PATCH 33/41] clk: pwm: Remove CLK_IS_ROOT

Am Dienstag, den 01.03.2016, 11:00 -0800 schrieb Stephen Boyd:

Quoted 13 lines

This flag is a no-op now. Remove usage of the flag.
Cc Philipp Zabel <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---
 drivers/clk/clk-pwm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/clk/clk-pwm.c +0 -0
index 328fcfcefd8c..883045814dac 100644

drivers/clk/clk-pwm.c static int clk_pwm_probe(struct platform_device *pdev) · line 101

Quoted 8 lines

drivers/clk/clk-pwm.c +1 -1

@@ -95,7 +95,7 @@ static int clk_pwm_probe(struct platform_device *pdev)
 
 	init.name = clk_name;
 	init.ops = &clk_pwm_ops;
-	init.flags = CLK_IS_BASIC | CLK_IS_ROOT;
+	init.flags = CLK_IS_BASIC;
 	init.num_parents = 0;
 
 	clk_pwm->pwm = pwm;

Acked-by Philipp Zabel <[email protected]>

thanks
Philipp

Stephen Boyd

author Applied

2016-03-03 01:50 UTC #81 lore raw

Re: [PATCH 33/41] clk: pwm: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Philipp Zabel <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #82 lore raw

PATCH 34/41 clk: qoriq: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Hou Zhiqiang <[email protected]>

Cc Scott Wood <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/clk-qoriq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/clk/clk-qoriq.c +1 -1

index 7bc1c4527ae4..d247b75ddf6a 100644
@@ -876,7 +876,7 @@ static struct clk *sysclk_from_fixed(struct device_node *node, const char *name)
 	if (of_property_read_u32(node, "clock-frequency", &rate))
 		return ERR_PTR(-ENODEV);
 
-	return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
+	return clk_register_fixed_rate(NULL, name, NULL, 0, rate);
 }
 
 static struct clk *sysclk_from_parent(const char *name)

Signature · 2 lines

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a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-04-15 23:54 UTC #83 lore raw

Re: [PATCH 34/41] clk: qoriq: Remove CLK_IS_ROOT

Quoted 6 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Hou Zhiqiang <[email protected]>
Cc Scott Wood <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #84 lore raw

PATCH 35/41 clk: rk808: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Chris Zhong <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/clk-rk808.c | 1 -
 1 file changed, 1 deletion(-)

drivers/clk/clk-rk808.c +0 -1

index 0fee2f4ca258..74383039761e 100644
@@ -106,7 +106,6 @@ static int rk808_clkout_probe(struct platform_device *pdev)
 	if (!clk_table)
 		return -ENOMEM;
 
-	init.flags = CLK_IS_ROOT;
 	init.parent_names = NULL;
 	init.num_parents = 0;
 	init.name = "rk808-clkout1";

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-04-15 23:54 UTC #85 lore raw

Re: [PATCH 35/41] clk: rk808: Remove CLK_IS_ROOT

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Chris Zhong <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #86 lore raw

PATCH 36/41 clk: s2mps11: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Andi Shyti <[email protected]>

Cc Krzysztof Kozlowski <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/clk-s2mps11.c | 3 ---
 1 file changed, 3 deletions(-)

drivers/clk/clk-s2mps11.c +0 -3

index 371150aabd15..f8c83977c7fa 100644
@@ -99,17 +99,14 @@ static struct clk_init_data s2mps11_clks_init[S2MPS11_CLKS_NUM] = {
 	[S2MPS11_CLK_AP] = {
 		.name = "s2mps11_ap",
 		.ops = &s2mps11_clk_ops,
-		.flags = CLK_IS_ROOT,
 	},
 	[S2MPS11_CLK_CP] = {
 		.name = "s2mps11_cp",
 		.ops = &s2mps11_clk_ops,
-		.flags = CLK_IS_ROOT,
 	},
 	[S2MPS11_CLK_BT] = {
 		.name = "s2mps11_bt",
 		.ops = &s2mps11_clk_ops,
-		.flags = CLK_IS_ROOT,
 	},
 };

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Andi Shyti

Acked-by on v1 36/41

2016-03-02 02:25 UTC #87 lore raw

Re: [PATCH 36/41] clk: s2mps11: Remove CLK_IS_ROOT

Hi Stephen,

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Andi Shyti <[email protected]>
Cc Krzysztof Kozlowski <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>

Acked-by Andi Shyti <[email protected]>

Thanks,
Andi

Quoted 30 lines

---
 drivers/clk/clk-s2mps11.c | 3 ---
 1 file changed, 3 deletions(-)

drivers/clk/clk-s2mps11.c +0 -3

index 371150aabd15..f8c83977c7fa 100644
@@ -99,17 +99,14 @@ static struct clk_init_data s2mps11_clks_init[S2MPS11_CLKS_NUM] = {
 	[S2MPS11_CLK_AP] = {
 		.name = "s2mps11_ap",
 		.ops = &s2mps11_clk_ops,
-		.flags = CLK_IS_ROOT,
 	},
 	[S2MPS11_CLK_CP] = {
 		.name = "s2mps11_cp",
 		.ops = &s2mps11_clk_ops,
-		.flags = CLK_IS_ROOT,
 	},
 	[S2MPS11_CLK_BT] = {
 		.name = "s2mps11_bt",
 		.ops = &s2mps11_clk_ops,
-		.flags = CLK_IS_ROOT,
 	},
 };

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-03-03 01:50 UTC #88 lore raw

Re: [PATCH 36/41] clk: s2mps11: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 6 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Andi Shyti <[email protected]>
Cc Krzysztof Kozlowski <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #89 lore raw

PATCH 37/41 clk: scpi: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Sudeep Holla <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/clk-scpi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/clk/clk-scpi.c +1 -1

index 89e9ca78bb94..6962ee5d1e9a 100644
@@ -155,7 +155,7 @@ scpi_clk_ops_init(struct device *dev, const struct of_device_id *match,
 	unsigned long min = 0, max = 0;
 
 	init.name = name;
-	init.flags = CLK_IS_ROOT;
+	init.flags = 0;
 	init.num_parents = 0;
 	init.ops = match->data;
 	sclk->hw.init = &init;

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Sudeep Holla

Acked-by on v1 37/41

2016-03-02 09:34 UTC #90 lore raw

Re: [PATCH 37/41] clk: scpi: Remove CLK_IS_ROOT

Quoted 3 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Sudeep Holla <[email protected]>

FWIW

Acked-by Sudeep Holla <[email protected]>

Stephen Boyd

author Applied

2016-03-03 01:51 UTC #91 lore raw

Re: [PATCH 37/41] clk: scpi: Remove CLK_IS_ROOT

In reply to Stephen Boyd

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Sudeep Holla <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #92 lore raw

PATCH 38/41 clk: si5{14,351,70}: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Sebastian Hesselbarth <[email protected]>

Cc Guenter Roeck <[email protected]>

Cc Sören Brinkmann <[email protected]>

Cc Mike Looijmans <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/clk-si514.c  | 2 +-
 drivers/clk/clk-si5351.c | 2 +-
 drivers/clk/clk-si570.c  | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

drivers/clk/clk-si514.c +1 -1

index 6af7dce54241..ceef25b0990b 100644
@@ -313,7 +313,7 @@ static int si514_probe(struct i2c_client *client,
 		return -ENOMEM;
 
 	init.ops = &si514_clk_ops;
-	init.flags = CLK_IS_ROOT;
+	init.flags = 0;
 	init.num_parents = 0;
 	data->hw.init = &init;
 	data->i2c_client = client;

drivers/clk/clk-si5351.c +1 -1

index 850316ac8831..b1bc12c045d3 100644
@@ -1495,7 +1495,7 @@ static int si5351_i2c_probe(struct i2c_client *client,
 	if (drvdata->variant == SI5351_VARIANT_B) {
 		init.name = si5351_pll_names[2];
 		init.ops = &si5351_vxco_ops;
-		init.flags = CLK_IS_ROOT;
+		init.flags = 0;
 		init.parent_names = NULL;
 		init.num_parents = 0;
 	} else {

drivers/clk/clk-si570.c +1 -1

index cf478aa9fa5d..d56648521a95 100644
@@ -418,7 +418,7 @@ static int si570_probe(struct i2c_client *client,
 		return -ENOMEM;
 
 	init.ops = &si570_clk_ops;
-	init.flags = CLK_IS_ROOT;
+	init.flags = 0;
 	init.num_parents = 0;
 	data->hw.init = &init;
 	data->i2c_client = client;

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Sören Brinkmann

Reviewed-by on v1 38/41

2016-03-02 03:34 UTC #93 lore raw

Re: [PATCH 38/41] clk: si5{14,351,70}: Remove CLK_IS_ROOT

Quoted 7 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Sebastian Hesselbarth <[email protected]>
Cc Guenter Roeck <[email protected]>
Cc Sören Brinkmann <[email protected]>
Cc Mike Looijmans <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>

Reviewed-by Sören Brinkmann <[email protected]>

Thanks,
Sören

Stephen Boyd

author

2016-03-01 19:00 UTC #94 lore raw

PATCH 39/41 clk: twl6040: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Peter Ujfalusi <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/clk-twl6040.c | 1 -
 1 file changed, 1 deletion(-)

drivers/clk/clk-twl6040.c +0 -1

index 8e5ed649a098..697c66757400 100644
@@ -74,7 +74,6 @@ static const struct clk_ops twl6040_mcpdm_ops = {
 static struct clk_init_data wm831x_clkout_init = {
 	.name = "mcpdm_fclk",
 	.ops = &twl6040_mcpdm_ops,
-	.flags = CLK_IS_ROOT,
 };
 
 static int twl6040_clk_probe(struct platform_device *pdev)

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-04-15 23:54 UTC #95 lore raw

Re: [PATCH 39/41] clk: twl6040: Remove CLK_IS_ROOT

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Peter Ujfalusi <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #96 lore raw

PATCH 40/41 clk: wm831x: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Mark Brown <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/clk-wm831x.c | 1 -
 1 file changed, 1 deletion(-)

drivers/clk/clk-wm831x.c +0 -1

index 43f9d15255f4..88def4b2761c 100644
@@ -58,7 +58,6 @@ static const struct clk_ops wm831x_xtal_ops = {
 static struct clk_init_data wm831x_xtal_init = {
 	.name = "xtal",
 	.ops = &wm831x_xtal_ops,
-	.flags = CLK_IS_ROOT,
 };
 
 static const unsigned long wm831x_fll_auto_rates[] = {

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-04-15 23:54 UTC #97 lore raw

Re: [PATCH 40/41] clk: wm831x: Remove CLK_IS_ROOT

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Mark Brown <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-03-01 19:00 UTC #98 lore raw

PATCH 41/41 clk: xgene: Remove CLK_IS_ROOT

In reply to Stephen Boyd

This flag is a no-op now. Remove usage of the flag.

Cc Loc Ho <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---
 drivers/clk/clk-xgene.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/clk/clk-xgene.c +1 -1

index bd7156baa08b..ce4cac7c6583 100644
@@ -198,7 +198,7 @@ static void xgene_pllclk_init(struct device_node *np, enum xgene_pll_type pll_ty
 	of_property_read_string(np, "clock-output-names", &clk_name);
 	clk = xgene_register_clk_pll(NULL,
 			clk_name, of_clk_get_parent_name(np, 0),
-			CLK_IS_ROOT, reg, 0, pll_type, &clk_lock,
+			0, reg, 0, pll_type, &clk_lock,
 			version);
 	if (!IS_ERR(clk)) {
 		of_clk_add_provider(np, of_clk_src_simple_get, clk);

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author Applied

2016-04-15 23:54 UTC #99 lore raw

Re: [PATCH 41/41] clk: xgene: Remove CLK_IS_ROOT

Quoted 5 lines · Stephen Boyd

This flag is a no-op now. Remove usage of the flag.
Cc Loc Ho <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project