Skip to contentSkip to conversation

clk: xgene: Add missing parenthesis when clearing divider value

PATCH New Loc Ho 2 participants 2 messages Feb 29, 2016 – Mar 3, 2016 Common clk

lore
Share & tools
lore

Loc Ho

author
#0 lore raw

PATCH 1/1 clk: xgene: Add missing parenthesis when clearing divider value

In the initial fix for non-zero divider shift value, the parenthesis was missing after the negate operation. This patch adds the required parenthesis. Otherwise, lower bits may be cleared unintentionally.

---
 drivers/clk/clk-xgene.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
drivers/clk/clk-xgene.c +2 -2
index bd7156b..d73450b 100644
@@ -376,8 +376,8 @@ static int xgene_clk_set_rate(struct clk_hw *hw, unsigned long rate,
 		/* Set new divider */
 		data = xgene_clk_read(pclk->param.divider_reg +
 				pclk->param.reg_divider_offset);
-		data &= ~((1 << pclk->param.reg_divider_width) - 1)
-				<< pclk->param.reg_divider_shift;
+		data &= ~(((1 << pclk->param.reg_divider_width) - 1)
+				<< pclk->param.reg_divider_shift);
 		data |= divider;
 		xgene_clk_write(data, pclk->param.divider_reg +
 					pclk->param.reg_divider_offset);
Signature · 1 line
1.7.1
Applied
#1 lore raw

PATCH 1/1 clk: xgene: Add missing parenthesis when clearing divider value

Quoted 7 lines · Loc Ho

In the initial fix for non-zero divider shift value, the parenthesis was missing after the negate operation. This patch adds the required parenthesis. Otherwise, lower bits may be cleared unintentionally.

---

Applied to clk-next + added a fixes tag.

Signature · 2 lines
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project