RAS changes for v4.6
Subsystems (6)
Linus,
Please pull the latest ras-core-for-linus git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git ras-core-for-linus
# HEAD: eb1af3b71f9d83e45f2fd2fd649356e98e1c582c EDAC/sb_edac: Fix computation of channel address
Various RAS updates:
- AMD MCE support updates for future CPUs, fixes and 'SMCA' (Scalable MCA) error decoding support (Aravind Gopalakrishnan)
- x86 memcpy_mcsafe() support, to enable smart(er) hardware error recovery in NVDIMM drivers, based on an extension of the x86 exception handling code. (Tony Luck)
Thanks,
Ingo
------------------>
Aravind Gopalakrishnan (10):
x86/mce: Fix order of AMD MCE init function call x86/mce/AMD: Do not perform shared bank check for future processors x86/mce/AMD: Reduce number of blocks scanned per bank x86/mce/AMD: Fix LVT offset configuration for thresholding x86/mce/AMD: Set MCAX Enable bit
x86/mce: Move MCx_CONFIG MSR definitions
x86/mce/AMD, EDAC: Enable error decoding of Scalable MCA errors x86/mce/AMD: Fix logic to obtain block address
x86/mce: Clarify comments regarding deferred error x86/mce/AMD: Document some functionality
Borislav Petkov (1):
x86/mce/AMD: Carve out threshold block preparation
Tony Luck (4):
x86/mm: Expand the exception table logic to allow new handling options x86/mce: Check for faults tagged in EXTABLE_CLASS_FAULT exception table entries x86/mm, x86/mce: Add memcpy_mcsafe()
EDAC/sb_edac: Fix computation of channel address
Documentation/x86/exception-tables.txt | 35 ++++ arch/x86/include/asm/amd_nb.h | 26 ++- arch/x86/include/asm/asm.h | 40 ++-- arch/x86/include/asm/mce.h | 69 +++++- arch/x86/include/asm/string_64.h | 13 ++ arch/x86/include/asm/uaccess.h | 16 +- arch/x86/kernel/cpu/mcheck/mce-severity.c | 22 +- arch/x86/kernel/cpu/mcheck/mce.c | 72 +++---- arch/x86/kernel/cpu/mcheck/mce_amd.c | 231 ++++++++++++++------ arch/x86/kernel/kprobes/core.c | 2 +- arch/x86/kernel/traps.c | 6 +- arch/x86/kernel/x8664_ksyms_64.c | 2 + arch/x86/lib/memcpy_64.S | 117 +++++++++++ arch/x86/mm/extable.c | 100 ++++++--- arch/x86/mm/fault.c | 2 +- drivers/edac/mce_amd.c | 335 +++++++++++++++++++++++++++++- drivers/edac/sb_edac.c | 26 +-- scripts/sortextable.c | 32 +++ 18 files changed, 962 insertions(+), 184 deletions(-)
Documentation/x86/exception-tables.txt +35 -0
@@ -290,3 +290,38 @@ Due to the way that the exception table is built and needs to be ordered, only use exceptions for code in the .text section. Any other section will cause the exception table to not be sorted correctly, and the exceptions will fail. + +Things changed when 64-bit support was added to x86 Linux. Rather than +double the size of the exception table by expanding the two entries +from 32-bits to 64 bits, a clever trick was used to store addresses +as relative offsets from the table itself. The assembly code changed +from: + .long 1b,3b +to: + .long (from) - . + .long (to) - . + +and the C-code that uses these values converts back to absolute addresses +like this: + + ex_insn_addr(const struct exception_table_entry *x) + { + return (unsigned long)&x->insn + x->insn; + } + +In v4.6 the exception table entry was expanded with a new field "handler". +This is also 32-bits wide and contains a third relative function +pointer which points to one of: + +1) int ex_handler_default(const struct exception_table_entry *fixup) + This is legacy case that just jumps to the fixup code +2) int ex_handler_fault(const struct exception_table_entry *fixup) + This case provides the fault number of the trap that occurred at + entry->insn. It is used to distinguish page faults from machine + check. +3) int ex_handler_ext(const struct exception_table_entry *fixup) + This case is used for uaccess_err ... we need to set a flag + in the task structure. Before the handler functions existed this + case was handled by adding a large offset to the fixup to tag + it as special. +More functions can easily be added.
arch/x86/include/asm/amd_nb.h +17 -9
@@ -27,15 +27,23 @@ struct amd_l3_cache { };struct threshold_block { -unsigned int block; -unsigned int bank; -unsigned int cpu; -u32 address; -u16 interrupt_enable; -bool interrupt_capable; -u16 threshold_limit; -struct kobject kobj; -struct list_head miscj; +unsigned int block;/* Number within bank */ +unsigned int bank;/* MCA bank the block belongs to */ +unsigned int cpu;/* CPU which controls MCA bank */ +u32 address;/* MSR address for the block */ +u16 interrupt_enable;/* Enable/Disable APIC interrupt */ +bool interrupt_capable;/* Bank can generate an interrupt. */ + +u16 threshold_limit;/* +* Value upon which threshold +* interrupt is generated. +*/ + +struct kobject kobj;/* sysfs object */ +struct list_head miscj;/* +* List of threshold blocks +* within a bank. +*/ };struct threshold_bank {
arch/x86/include/asm/asm.h +24 -16
@@ -44,19 +44,22 @@/* Exception table entry */ #ifdef __ASSEMBLY__ -# define _ASM_EXTABLE (from,to) \ +# define _ASM_EXTABLE_HANDLE (from, to, handler) \ .pushsection "__ex_table","a" ; \ - .balign 8 ; \ + .balign 4 ; \ .long (from) - . ; \ .long (to) - . ; \ + .long (handler) - . ; \ .popsection -# define _ASM_EXTABLE_EX (from,to) \ - .pushsection "__ex_table","a" ; \ - .balign 8 ; \ - .long (from) - . ; \ - .long (to) - . + 0x7ffffff0 ; \ - .popsection +# define _ASM_EXTABLE (from, to) \ + _ASM_EXTABLE_HANDLE(from, to, ex_handler_default) + +# define _ASM_EXTABLE_FAULT (from, to) \ + _ASM_EXTABLE_HANDLE(from, to, ex_handler_fault) + +# define _ASM_EXTABLE_EX (from, to) \ + _ASM_EXTABLE_HANDLE(from, to, ex_handler_ext)# define _ASM_NOKPROBE (entry) \ .pushsection "_kprobe_blacklist","aw" ; \
@@ -89,19 +92,24 @@ .endm#else -# define _ASM_EXTABLE (from,to) \ +# define _EXPAND_EXTABLE_HANDLE (x) #x +# define _ASM_EXTABLE_HANDLE (from, to, handler) \ " .pushsection \"__ex_table\",\"a\"\n" \ - " .balign 8\n" \ + " .balign 4\n" \ " .long (" #from ") - .\n" \ " .long (" #to ") - .\n" \ + " .long (" _EXPAND_EXTABLE_HANDLE(handler) ") - .\n" \ " .popsection\n" -# define _ASM_EXTABLE_EX (from,to) \ - " .pushsection \"__ex_table\",\"a\"\n" \ - " .balign 8\n" \ - " .long (" #from ") - .\n" \ - " .long (" #to ") - . + 0x7ffffff0\n" \ - " .popsection\n" +# define _ASM_EXTABLE (from, to) \ + _ASM_EXTABLE_HANDLE(from, to, ex_handler_default) + +# define _ASM_EXTABLE_FAULT (from, to) \ + _ASM_EXTABLE_HANDLE(from, to, ex_handler_fault) + +# define _ASM_EXTABLE_EX (from, to) \ + _ASM_EXTABLE_HANDLE(from, to, ex_handler_ext) +/* For C file, we already have NOKPROBE_SYMBOL macro */ #endif
arch/x86/include/asm/mce.h +68 -1
86 lines not on this page · raw message
arch/x86/include/asm/string_64.h +13 -0
@@ -78,6 +78,19 @@ int strcmp(const char *cs, const char *ct);#define memset (s, c, n) __memset(s, c, n)#endif +/** +* memcpy_mcsafe - copy memory with indication if a machine check happened +* +* @dst: destination address +* @src: source address +* @cnt: number of bytes to copy +* +* Low level memory copy function that catches machine checks +* +* Return true for success, false for fail +*/ +bool memcpy_mcsafe (void *dst,const void *src,size_t cnt); +#endif /* __KERNEL__ */ #endif /* _ASM_X86_STRING_64_H */
arch/x86/include/asm/uaccess.h +8 -8
@@ -90,12 +90,11 @@ static inline bool __chk_range_not_ok(unsigned long addr, unsigned long size, unlikely (!__range_not_ok (addr, size,user_addr_max ()))/* -* The exception table consists of pairs of addresses relative to the -* exception table enty itself: the first is the address of an -* instruction that is allowed to fault, and the second is the address -* at which the program should continue. No registers are modified, -* so it is entirely up to the continuation code to figure out what to -* do. +* The exception table consists of triples of addresses relative to the +* exception table entry itself. The first address is of an instruction +* that is allowed to fault, the second is the target at which the program +* should continue. The third is a handler function to deal with the fault +* caused by the instruction in the first field. * * All the routines below use bits of fixup code that are out of line * with the main instruction path. This means when everything is well,
@@ -104,13 +103,14 @@ static inline bool __chk_range_not_ok(unsigned long addr, unsigned long size, un*/ struct exception_table_entry { -int insn, fixup; +int insn, fixup, handler; };/* This is not the generic standard exception_table_entry format */ #define ARCH_HAS_SORT_EXTABLE #define ARCH_HAS_SEARCH_EXTABLE -extern int fixup_exception (struct pt_regs *regs); +extern int fixup_exception (struct pt_regs *regs,int trapnr); +extern bool ex_has_fault_handler (unsigned long ip);extern int early_fixup_exception (unsigned long *ip);/*
arch/x86/kernel/cpu/mcheck/mce-severity.c +20 -2
@@ -14,6 +14,7 @@#include <linux/init.h> #include <linux/debugfs.h> #include <asm/mce.h> +#include <asm/uaccess.h> #include "mce-internal.h"
@@ -29,7 +30,7 @@* panic situations) */ -enum context {IN_KERNEL =1 ,IN_USER =2 }; +enum context {IN_KERNEL =1 ,IN_USER =2 ,IN_KERNEL_RECOV =3 };enum ser {SER_REQUIRED =1 ,NO_SER =2 };enum exception {EXCP_CONTEXT =1 ,NO_EXCP =2 };
@@ -48,6 +49,7 @@ static struct severity { #define MCESEV(s, m, c...) { .sev = MCE_ ## s ## _SEVERITY, .msg = m, ## c }#define KERNEL .context = IN_KERNEL#define USER .context = IN_USER +#define KERNEL_RECOV .context = IN_KERNEL_RECOV#define SER .ser = SER_REQUIRED#define NOSER .ser = NO_SER#define EXCP .excp = EXCP_CONTEXT
@@ -87,6 +89,10 @@ static struct severity { EXCP, KERNEL, MCGMASK(MCG_STATUS_RIPV, 0) ),MCESEV ( +PANIC ,"In kernel and no restart IP" , +EXCP ,KERNEL_RECOV ,MCGMASK (MCG_STATUS_RIPV ,0 ) + ), +MCESEV (DEFERRED ,"Deferred error" ,NOSER ,MASK (MCI_STATUS_UC |MCI_STATUS_DEFERRED |MCI_STATUS_POISON ,MCI_STATUS_DEFERRED ) ),
@@ -123,6 +129,11 @@ static struct severity {MCGMASK (MCG_STATUS_RIPV |MCG_STATUS_EIPV ,MCG_STATUS_RIPV ) ),MCESEV ( +AR ,"Action required: data load in error recoverable area of kernel" , +SER ,MASK (MCI_STATUS_OVER |MCI_UC_SAR |MCI_ADDR |MCACOD ,MCI_UC_SAR |MCI_ADDR |MCACOD_DATA ), +KERNEL_RECOV + ), +MCESEV (AR ,"Action required: data load error in a user process" ,SER ,MASK (MCI_STATUS_OVER |MCI_UC_SAR |MCI_ADDR |MCACOD ,MCI_UC_SAR |MCI_ADDR |MCACOD_DATA ), USER
@@ -170,6 +181,9 @@ static struct severity { ) /* always matches. keep at end */ }; +#define mc_recoverable (mcg) (((mcg) & (MCG_STATUS_RIPV|MCG_STATUS_EIPV)) == \ + (MCG_STATUS_RIPV|MCG_STATUS_EIPV)) +/* * If mcgstatus indicated that ip/cs on the stack were * no good, then "m->cs" will be zero and we will have
@@ -183,7 +197,11 @@ static struct severity {*/ static int error_context (struct mce *m) { -return ((m->cs &3 ) ==3 ) ?IN_USER :IN_KERNEL ; +if ((m->cs &3 ) ==3 ) +return IN_USER ; +if (mc_recoverable (m->mcgstatus) &&ex_has_fault_handler (m->ip)) +return IN_KERNEL_RECOV ; +return IN_KERNEL ; }/*
arch/x86/kernel/cpu/mcheck/mce.c +37 -35
108 lines not on this page · raw message
arch/x86/kernel/cpu/mcheck/mce_amd.c +170 -61
304 lines not on this page · raw message
arch/x86/kernel/kprobes/core.c +1 -1
@@ -988,7 +988,7 @@ int kprobe_fault_handler(struct pt_regs *regs, int trapnr)* In case the user-specified fault handler returned * zero, try to fix up. */ -if (fixup_exception (regs)) +if (fixup_exception (regs, trapnr))return 1 ;/*
arch/x86/kernel/traps.c +3 -3
@@ -199,7 +199,7 @@ do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str, }if (!user_mode (regs)) { -if (!fixup_exception (regs)) { +if (!fixup_exception (regs, trapnr)) { tsk->thread.error_code = error_code; tsk->thread.trap_nr = trapnr;die (str, regs, error_code);
@@ -453,7 +453,7 @@ do_general_protection(struct pt_regs *regs, long error_code) tsk = current;if (!user_mode (regs)) { -if (fixup_exception (regs)) +if (fixup_exception (regs,X86_TRAP_GP ))return ; tsk->thread.error_code = error_code;
@@ -699,7 +699,7 @@ static void math_error(struct pt_regs *regs, int error_code, int trapnr)conditional_sti (regs);if (!user_mode (regs)) { -if (!fixup_exception (regs)) { +if (!fixup_exception (regs, trapnr)) { task->thread.error_code = error_code; task->thread.trap_nr = trapnr;die (str, regs, error_code);
arch/x86/kernel/x8664_ksyms_64.c +2 -0
@@ -37,6 +37,8 @@ EXPORT_SYMBOL(__copy_user_nocache);EXPORT_SYMBOL (_copy_from_user);EXPORT_SYMBOL (_copy_to_user); +EXPORT_SYMBOL_GPL (memcpy_mcsafe); +EXPORT_SYMBOL (copy_page);EXPORT_SYMBOL (clear_page);
arch/x86/lib/memcpy_64.S +117 -0
120 lines not on this page · raw message
arch/x86/mm/extable.c +72 -28
143 lines not on this page · raw message
arch/x86/mm/fault.c +1 -1
@@ -663,7 +663,7 @@ no_context(struct pt_regs *regs, unsigned long error_code,int sig;/* Are we prepared to handle this kernel fault? */ -if (fixup_exception (regs)) { +if (fixup_exception (regs,X86_TRAP_PF )) {/* * Any interrupt that takes a fault gets the fixup. This makes * the below recursive fault logic only apply to a faults from
drivers/edac/mce_amd.c +332 -3
389 lines not on this page · raw message
drivers/edac/sb_edac.c +10 -16
@@ -1839,8 +1839,8 @@ static void get_memory_layout(const struct mem_ctl_info *mci) edac_dbg(0, "TAD#%d: up to %u.%03u GB (0x%016Lx), socket interleave %d, memory interleave %d, TGT: %d, %d, %d, %d, reg=0x%08x\n", n_tads, gb, (mb*1000)/1024, ((u64)tmp_mb) << 20L, - (u32)TAD_SOCK(reg), - (u32)TAD_CH(reg), + (u32)(1 << TAD_SOCK(reg)), + (u32)TAD_CH(reg) + 1, (u32)TAD_TGT0(reg), (u32)TAD_TGT1(reg), (u32)TAD_TGT2(reg),
@@ -2118,7 +2118,7 @@ static int get_memory_error_data(struct mem_ctl_info *mci, } ch_way =TAD_CH (reg) +1 ; - sck_way =TAD_SOCK (reg) +1 ; + sck_way =1 <<TAD_SOCK (reg);if (ch_way ==3 ) idx = addr >>6 ;
@@ -2175,7 +2175,7 @@ static int get_memory_error_data(struct mem_ctl_info *mci, n_tads, addr, limit, - (u32 )TAD_SOCK (reg), + sck_way, ch_way, offset, idx,
@@ -2190,18 +2190,12 @@ static int get_memory_error_data(struct mem_ctl_info *mci, offset, addr);return -EINVAL ; } - addr -= offset; -/* Store the low bits [0:6] of the addr */ - ch_addr = addr &0x7f ; -/* Remove socket wayness and remove 6 bits */ - addr >>=6 ; - addr =div_u64 (addr, sck_xch); -#if 0 -/* Divide by channel way */ - addr = addr / ch_way; -#endif -/* Recover the last 6 bits */ - ch_addr |= addr <<6 ; + + ch_addr = addr - offset; + ch_addr >>= (6 + shiftup); + ch_addr /= ch_way * sck_way; + ch_addr <<= (6 + shiftup); + ch_addr |= addr & ((1 << (6 + shiftup)) -1 );/* * Step 3) Decode rank
scripts/sortextable.c +32 -0
@@ -209,6 +209,35 @@ static int compare_relative_table(const void *a, const void *b)return 0 ; } +static void x86_sort_relative_table (char *extab_image,int image_size) +{ +int i; + + i =0 ; +while (i < image_size) { +uint32_t *loc = (uint32_t *)(extab_image + i); + +w (r (loc) + i, loc); +w (r (loc +1 ) + i +4 , loc +1 ); +w (r (loc +2 ) + i +8 , loc +2 ); + + i +=sizeof (uint32_t ) *3 ; + } + +qsort (extab_image, image_size /12 ,12 , compare_relative_table); + + i =0 ; +while (i < image_size) { +uint32_t *loc = (uint32_t *)(extab_image + i); + +w (r (loc) - i, loc); +w (r (loc +1 ) - (i +4 ), loc +1 ); +w (r (loc +2 ) - (i +8 ), loc +2 ); + + i +=sizeof (uint32_t ) *3 ; + } +} +static void sort_relative_table (char *extab_image,int image_size) {int i;
@@ -281,6 +310,9 @@ do_file(char const *const fname)break ;case EM_386 :case EM_X86_64 : + custom_sort = x86_sort_relative_table; +break ; +case EM_S390 : custom_sort = sort_relative_table;break ;